[media] drxk: fix GPIOs
authorAntti Palosaari <crope@iki.fi>
Thu, 17 May 2012 21:26:50 +0000 (18:26 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Sun, 20 May 2012 13:22:42 +0000 (10:22 -0300)
UIO-2 and UIO-3 were broken.

Signed-off-by: Antti Palosaari <crope@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
drivers/media/dvb/frontends/drxk_hard.c
drivers/media/dvb/frontends/drxk_map.h

index 8d99ac1598aef310b6b3986f62a52b04a988df7a..60b868faeacfaf372f617ae31885727f701faa32 100644 (file)
@@ -5835,7 +5835,7 @@ static int WriteGPIO(struct drxk_state *state)
                }
                if (state->UIO_mask & 0x0002) { /* UIO-2 */
                        /* write to io pad configuration register - output mode */
-                       status = write16(state, SIO_PDR_SMA_TX_CFG__A, state->m_GPIOCfg);
+                       status = write16(state, SIO_PDR_SMA_RX_CFG__A, state->m_GPIOCfg);
                        if (status < 0)
                                goto error;
 
@@ -5854,7 +5854,7 @@ static int WriteGPIO(struct drxk_state *state)
                }
                if (state->UIO_mask & 0x0004) { /* UIO-3 */
                        /* write to io pad configuration register - output mode */
-                       status = write16(state, SIO_PDR_SMA_TX_CFG__A, state->m_GPIOCfg);
+                       status = write16(state, SIO_PDR_GPIO_CFG__A, state->m_GPIOCfg);
                        if (status < 0)
                                goto error;
 
index 9b11a832886936d9c932b68dd433500cc429fb29..23e16c12f234a07aba87a19298b2768df69e27cd 100644 (file)
 #define  SIO_PDR_UIO_OUT_LO__A                                             0x7F0016
 #define  SIO_PDR_OHW_CFG__A                                                0x7F001F
 #define    SIO_PDR_OHW_CFG_FREF_SEL__M                                     0x3
+#define  SIO_PDR_GPIO_CFG__A                                               0x7F0021
 #define  SIO_PDR_MSTRT_CFG__A                                              0x7F0025
 #define  SIO_PDR_MERR_CFG__A                                               0x7F0026
 #define  SIO_PDR_MCLK_CFG__A                                               0x7F0028
 #define  SIO_PDR_MD5_CFG__A                                                0x7F0030
 #define  SIO_PDR_MD6_CFG__A                                                0x7F0031
 #define  SIO_PDR_MD7_CFG__A                                                0x7F0032
+#define  SIO_PDR_SMA_RX_CFG__A                                             0x7F0037
 #define  SIO_PDR_SMA_TX_CFG__A                                             0x7F0038
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