drm/i915: Implement Wa4x4STCOptimizationDisable:chv
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 21 Jan 2015 17:37:58 +0000 (19:37 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 27 Jan 2015 08:51:09 +0000 (09:51 +0100)
Wa4x4STCOptimizationDisable got only implemented for BDW, but according
to the w/a database CHV needs it too, so add it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_ringbuffer.c

index d7aa5c464d965f1b6c4cefeb3f1a6d1a138e3f72..2a1a178153e1ae4bb4138f900a894d50db3c4e1c 100644 (file)
@@ -851,6 +851,10 @@ static int chv_init_workarounds(struct intel_engine_cs *ring)
         */
        WA_CLR_BIT_MASKED(CACHE_MODE_0_GEN7, HIZ_RAW_STALL_OPT_DISABLE);
 
+       /* Wa4x4STCOptimizationDisable:chv */
+       WA_SET_BIT_MASKED(CACHE_MODE_1,
+                         GEN8_4x4_STC_OPTIMIZATION_DISABLE);
+
        /* Improve HiZ throughput on CHV. */
        WA_SET_BIT_MASKED(HIZ_CHICKEN, CHV_HZ_8X8_MODE_IN_1X);
 
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