iwlwifi: pcie: use shadow registers for updating write pointer
authorSara Sharon <sara.sharon@intel.com>
Sun, 17 Apr 2016 12:08:59 +0000 (15:08 +0300)
committerLuca Coelho <luciano.coelho@intel.com>
Tue, 10 May 2016 19:34:09 +0000 (22:34 +0300)
The RX queues have a shadow register for the write pointer
that enables updates without grabbing NIC access. Use them
instead of the periphery registers because accessing those
is much more expensive.

Signed-off-by: Sara Sharon <sara.sharon@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
drivers/net/wireless/intel/iwlwifi/iwl-fh.h
drivers/net/wireless/intel/iwlwifi/pcie/rx.c

index 582008a6606978b293787499976279c8bb318e16..270f39ecd2d499f3bc04c123e2f44bdd8588901f 100644 (file)
@@ -321,6 +321,9 @@ static inline unsigned int FH_MEM_CBBC_QUEUE(unsigned int chnl)
 /* Write index table */
 #define RFH_Q0_FRBDCB_WIDX 0xA08080
 #define RFH_Q_FRBDCB_WIDX(q) (RFH_Q0_FRBDCB_WIDX + (q) * 4)
+/* Write index table - shadow registers */
+#define RFH_Q0_FRBDCB_WIDX_TRG 0x1C80
+#define RFH_Q_FRBDCB_WIDX_TRG(q) (RFH_Q0_FRBDCB_WIDX_TRG + (q) * 4)
 /* Read index table */
 #define RFH_Q0_FRBDCB_RIDX 0xA080C0
 #define RFH_Q_FRBDCB_RIDX(q) (RFH_Q0_FRBDCB_RIDX + (q) * 4)
index 89f87f7fb0d64b9d16ea25cfcfcef0fada48d50a..347782157407ca457d7baa2139cad00a2b4e865e 100644 (file)
@@ -208,8 +208,8 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans,
 
        rxq->write_actual = round_down(rxq->write, 8);
        if (trans->cfg->mq_rx_supported)
-               iwl_write_prph(trans, RFH_Q_FRBDCB_WIDX(rxq->id),
-                              rxq->write_actual);
+               iwl_write32(trans, RFH_Q_FRBDCB_WIDX_TRG(rxq->id),
+                           rxq->write_actual);
        /*
         * write to FH_RSCSR_CHNL0_WPTR register even in MQ as a W/A to
         * hardware shadow registers bug - writing to RFH_Q_FRBDCB_WIDX will
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