sh: sh7724: Update FSI/SPU2 clock
authorKuninori Morimoto <morimoto.kuninori@renesas.com>
Mon, 22 Feb 2010 05:18:10 +0000 (05:18 +0000)
committerPaul Mundt <lethal@linux-sh.org>
Mon, 22 Feb 2010 10:14:18 +0000 (19:14 +0900)
When FSI and Network (= NFS file system) were used at the same time,
the I/O of FSI was unstable.  This patch updates the SPU2 clock (which
is used for FSI) to solve this issue.  Special thanks to Jeremy.

Signed-off-by: Jeremy Baker <Jeremy.Baker@renesas.com>
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/boards/mach-ecovec24/setup.c
arch/sh/boards/mach-se/7724/setup.c

index a17dbb3ac73f697f6ec3390a6fd535e232e42681..6f2e8a78b4617f8faa1f35538b753c7e4bb34c49 100644 (file)
@@ -1105,6 +1105,11 @@ static int __init arch_setup(void)
        gpio_request(GPIO_FN_FSIOBLRCK,  NULL);
        gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
 
+       /* set SPU2 clock to 83.4 MHz */
+       clk = clk_get(NULL, "spu_clk");
+       clk_set_rate(clk, clk_round_rate(clk, 83333333));
+       clk_put(clk);
+
        /* change parent of FSI B */
        clk = clk_get(NULL, "fsib_clk");
        clk_register(&fsimckb_clk);
index 50e4d159957634a8ee550302b80fd70569cbf79c..1f6cf86049432a0ea8ca85c236b1219e38721e96 100644 (file)
@@ -586,7 +586,7 @@ arch_initcall(arch_setup);
 static int __init devices_setup(void)
 {
        u16 sw = __raw_readw(SW4140); /* select camera, monitor */
-       struct clk *fsia_clk;
+       struct clk *clk;
 
        /* register board specific self-refresh code */
        sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
@@ -755,13 +755,18 @@ static int __init devices_setup(void)
        gpio_request(GPIO_FN_CLKAUDIOBO, NULL);
        gpio_request(GPIO_FN_FSIIASD,    NULL);
 
+       /* set SPU2 clock to 83.4 MHz */
+       clk = clk_get(NULL, "spu_clk");
+       clk_set_rate(clk, clk_round_rate(clk, 83333333));
+       clk_put(clk);
+
        /* change parent of FSI A */
-       fsia_clk = clk_get(NULL, "fsia_clk");
+       clk = clk_get(NULL, "fsia_clk");
        clk_register(&fsimcka_clk);
-       clk_set_parent(fsia_clk, &fsimcka_clk);
-       clk_set_rate(fsia_clk, 11000);
+       clk_set_parent(clk, &fsimcka_clk);
+       clk_set_rate(clk, 11000);
        clk_set_rate(&fsimcka_clk, 11000);
-       clk_put(fsia_clk);
+       clk_put(clk);
 
        /* SDHI0 connected to cn7 */
        gpio_request(GPIO_FN_SDHI0CD, NULL);
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