ARM: tegra114: add power up sequence for warm boot CPU
authorJoseph Lo <josephl@nvidia.com>
Mon, 20 May 2013 10:39:27 +0000 (18:39 +0800)
committerStephen Warren <swarren@nvidia.com>
Wed, 22 May 2013 21:19:22 +0000 (15:19 -0600)
For Tegra114, once the CPUs were powered up by PMC in cold boot flow. The
flow controller will maintain the power state and control power sequence
for each CPU by setting event trigger (e.g. CPU hotplug ,idle and
suspend power down/up).

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/flowctrl.h
arch/arm/mach-tegra/platsmp.c

index 67eab56699bd49f66925b66ed4c5b8d5922de037..7a29bae799a7fc4cc674e5703ead29cfb94182ac 100644 (file)
@@ -25,6 +25,7 @@
 #define FLOW_CTRL_WAITEVENT            (2 << 29)
 #define FLOW_CTRL_WAIT_FOR_INTERRUPT   (4 << 29)
 #define FLOW_CTRL_JTAG_RESUME          (1 << 28)
+#define FLOW_CTRL_SCLK_RESUME          (1 << 27)
 #define FLOW_CTRL_HALT_CPU_IRQ         (1 << 10)
 #define        FLOW_CTRL_HALT_CPU_FIQ          (1 << 8)
 #define FLOW_CTRL_CPU0_CSR             0x8
index fad4226ef710da28f19c3ada496495e563c89f49..554aedc98c9f5ba198370bf830daee24d7570c82 100644 (file)
@@ -140,8 +140,31 @@ remove_clamps:
 
 static int tegra114_boot_secondary(unsigned int cpu, struct task_struct *idle)
 {
+       int ret = 0;
+
        cpu = cpu_logical_map(cpu);
-       return tegra_pmc_cpu_power_on(cpu);
+
+       if (cpumask_test_cpu(cpu, &tegra_cpu_init_mask)) {
+               /*
+                * Warm boot flow
+                * The flow controller in charge of the power state and
+                * control for each CPU.
+                */
+               /* set SCLK as event trigger for flow controller */
+               flowctrl_write_cpu_csr(cpu, 1);
+               flowctrl_write_cpu_halt(cpu,
+                               FLOW_CTRL_WAITEVENT | FLOW_CTRL_SCLK_RESUME);
+       } else {
+               /*
+                * Cold boot flow
+                * The CPU is powered up by toggling PMC directly. It will
+                * also initial power state in flow controller. After that,
+                * the CPU's power state is maintained by flow controller.
+                */
+               ret = tegra_pmc_cpu_power_on(cpu);
+       }
+
+       return ret;
 }
 
 static int __cpuinit tegra_boot_secondary(unsigned int cpu,
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