Avoid SMP cacheflushes. This is a minor optimization of startup but

will also avoid smp_call_function from doing stupid things when called
from a CPU that is not yet marked online.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 0a3969aa8dc6f548eb04a2a689b613199e43a4d8..519b8f18eedfcafea926b2d0b2aefd809b2b63a8 100644 (file)
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1150,6 +1150,7 @@ static inline void signal32_init(void)
 
 extern void cpu_cache_init(void);
 extern void tlb_init(void);
+extern void flush_tlb_handlers(void);
 
 void __init per_cpu_trap_init(void)
 {
@@ -1348,4 +1349,5 @@ void __init trap_init(void)
 #endif
 
        flush_icache_range(ebase, ebase + 0x400);
+       flush_tlb_handlers();
 }

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 6a1267ad071fbd22e1de266aba2ca68e3d0273e9..637052b230421183e46981af975a4b5fbd31de43 100644 (file)
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1270,9 +1270,8 @@ void __init ld_mmu_r4xx0(void)
        _dma_cache_inv          = r4k_dma_cache_inv;
 #endif
 
-       __flush_cache_all();
-       coherency_setup();
-
        build_clear_page();
        build_copy_page();
+       local_r4k___flush_cache_all(NULL);
+       coherency_setup();
 }

diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index 5054a0ed2b6dc77ed5ff3cc6e2b6237b3e3c799c..56c3fcdd282296b38b806d5d8404633dd0b1ab01 100644 (file)
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -492,4 +492,5 @@ void __init ld_mmu_tx39(void)
 
        build_clear_page();
        build_copy_page();
+       tx39h_flush_icache_all();
 }

diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index 9f8b16541577776180c15192a03a5ab6856f05d9..75d9ebfc54316ff59a8a995594f515a7d89abe83 100644 (file)
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -404,9 +404,6 @@ dest = label();
 
        build_jr_ra();
 
-       flush_icache_range((unsigned long)&clear_page_array,
-                          (unsigned long) epc);
-
        BUG_ON(epc > clear_page_array + ARRAY_SIZE(clear_page_array));
 }
 
@@ -482,8 +479,5 @@ dest = label();
 
        build_jr_ra();
 
-       flush_icache_range((unsigned long)&copy_page_array,
-                          (unsigned long) epc);
-
        BUG_ON(epc > copy_page_array + ARRAY_SIZE(copy_page_array));
 }

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index a876ed6cde24e0ae4a7cc037011fa75e669cf718..c3c75a234f506a71b815251f1575135ead5cd0c9 100644 (file)
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -743,7 +743,6 @@ static void __init build_r3000_tlb_refill_handler(void)
 #endif
 
        memcpy((void *)CAC_BASE, tlb_handler, 0x80);
-       flush_icache_range(CAC_BASE, CAC_BASE + 0x80);
 }
 
 /*
@@ -1258,7 +1257,6 @@ static void __init build_r4000_tlb_refill_handler(void)
 #endif
 
        memcpy((void *)CAC_BASE, final_handler, 0x100);
-       flush_icache_range(CAC_BASE, CAC_BASE + 0x100);
 }
 
 /*
@@ -1519,9 +1517,6 @@ static void __init build_r3000_tlb_load_handler(void)
                        printk("%08x\n", handle_tlbl[i]);
        }
 #endif
-
-       flush_icache_range((unsigned long)handle_tlbl,
-                          (unsigned long)handle_tlbl + FASTPATH_SIZE * sizeof(u32));
 }
 
 static void __init build_r3000_tlb_store_handler(void)
@@ -1559,9 +1554,6 @@ static void __init build_r3000_tlb_store_handler(void)
                        printk("%08x\n", handle_tlbs[i]);
        }
 #endif
-
-       flush_icache_range((unsigned long)handle_tlbs,
-                          (unsigned long)handle_tlbs + FASTPATH_SIZE * sizeof(u32));
 }
 
 static void __init build_r3000_tlb_modify_handler(void)
@@ -1599,9 +1591,6 @@ static void __init build_r3000_tlb_modify_handler(void)
                        printk("%08x\n", handle_tlbm[i]);
        }
 #endif
-
-       flush_icache_range((unsigned long)handle_tlbm,
-                          (unsigned long)handle_tlbm + FASTPATH_SIZE * sizeof(u32));
 }
 
 /*
@@ -1691,9 +1680,6 @@ static void __init build_r4000_tlb_load_handler(void)
                        printk("%08x\n", handle_tlbl[i]);
        }
 #endif
-
-       flush_icache_range((unsigned long)handle_tlbl,
-                          (unsigned long)handle_tlbl + FASTPATH_SIZE * sizeof(u32));
 }
 
 static void __init build_r4000_tlb_store_handler(void)
@@ -1730,9 +1716,6 @@ static void __init build_r4000_tlb_store_handler(void)
                        printk("%08x\n", handle_tlbs[i]);
        }
 #endif
-
-       flush_icache_range((unsigned long)handle_tlbs,
-                          (unsigned long)handle_tlbs + FASTPATH_SIZE * sizeof(u32));
 }
 
 static void __init build_r4000_tlb_modify_handler(void)
@@ -1770,9 +1753,6 @@ static void __init build_r4000_tlb_modify_handler(void)
                        printk("%08x\n", handle_tlbm[i]);
        }
 #endif
-
-       flush_icache_range((unsigned long)handle_tlbm,
-                          (unsigned long)handle_tlbm + FASTPATH_SIZE * sizeof(u32));
 }
 
 void __init build_tlb_refill_handler(void)
@@ -1820,3 +1800,13 @@ void __init build_tlb_refill_handler(void)
                }
        }
 }
+
+void __init flush_tlb_handlers(void)
+{
+       flush_icache_range((unsigned long)handle_tlbl,
+                          (unsigned long)handle_tlbl + sizeof(handle_tlbl));
+       flush_icache_range((unsigned long)handle_tlbs,
+                          (unsigned long)handle_tlbs + sizeof(handle_tlbs));
+       flush_icache_range((unsigned long)handle_tlbm,
+                          (unsigned long)handle_tlbm + sizeof(handle_tlbm));
+}