ARM: at91/dt: Declare a second ram controller when relevant

The G45 and 9263 SoCs has two identical ram controller, that are defined as a
single node, with two reg cells.

The proper way to support such a case is to have two separate DT nodes.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>

diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index fece8665fb63ad89232a821c4da307475bbc4f88..e8ecb03772cef6883a960682516e93b15a2c1040 100644 (file)
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -71,10 +71,14 @@
                                reg = <0xfffffc00 0x100>;
                        };
 
-                       ramc: ramc@ffffe200 {
+                       ramc0: ramc@ffffe200 {
                                compatible = "atmel,at91sam9260-sdramc";
-                               reg = <0xffffe200 0x200
-                                      0xffffe800 0x200>;
+                               reg = <0xffffe200 0x200>;
+                       };
+
+                       ramc1: ramc@ffffe800 {
+                               compatible = "atmel,at91sam9260-sdramc";
+                               reg = <0xffffe800 0x200>;
                        };
 
                        pit: timer@fffffd30 {

diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ace6bf197b708dd79e29054773d50c5f1a3fd864..6f648b85b7256db3317d73968c7eca29873842da 100644 (file)
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -75,8 +75,12 @@
 
                        ramc0: ramc@ffffe400 {
                                compatible = "atmel,at91sam9g45-ddramc";
-                               reg = <0xffffe400 0x200
-                                      0xffffe600 0x200>;
+                               reg = <0xffffe400 0x200>;
+                       };
+
+                       ramc1: ramc@ffffe600 {
+                               compatible = "atmel,at91sam9g45-ddramc";
+                               reg = <0xffffe600 0x200>;
                        };
 
                        pmc: pmc@fffffc00 {