drm/i915: fix Haswell DP M/N registers

We have to write the correct values inside intel_dp_set_m_n and then
prevent these values from being overwritten later.

V2: Unconfuse double negation.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fe366a1add339f364ad47ee93ebd80a373f366a0..c2c219bf3758ed75e7c26a2be3b25d61b690de0c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5356,7 +5356,8 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
 
        intel_set_pipe_timings(intel_crtc, mode, adjusted_mode);
 
-       ironlake_set_m_n(crtc, mode, adjusted_mode);
+       if (!is_dp || is_cpu_edp)
+               ironlake_set_m_n(crtc, mode, adjusted_mode);
 
        if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
                if (is_cpu_edp)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c875e2e21651e636d178201acec17d739c4eb290..db6ef136a1b65ef5d889938755626f66aed67ef2 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -816,7 +816,12 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
        intel_dp_compute_m_n(intel_crtc->bpp, lane_count,
                             mode->clock, adjusted_mode->clock, &m_n);
 
-       if (HAS_PCH_SPLIT(dev)) {
+       if (IS_HASWELL(dev)) {
+               I915_WRITE(PIPE_DATA_M1(pipe), TU_SIZE(m_n.tu) | m_n.gmch_m);
+               I915_WRITE(PIPE_DATA_N1(pipe), m_n.gmch_n);
+               I915_WRITE(PIPE_LINK_M1(pipe), m_n.link_m);
+               I915_WRITE(PIPE_LINK_N1(pipe), m_n.link_n);
+       } else if (HAS_PCH_SPLIT(dev)) {
                I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n.tu) | m_n.gmch_m);
                I915_WRITE(TRANSDATA_N1(pipe), m_n.gmch_n);
                I915_WRITE(TRANSDPLINK_M1(pipe), m_n.link_m);