ARM: mach-shmobile: Use 0x3400 as INTCS vector offset

Update mach-shmobile to use 0x3400 as INTCS_VECT_BASE.

Since the ARM architecture a little while back added support
for 10 bit irqs we can now undo the previously merged commit
9b7c23adb350a108737a993c9c781463c1439dc6 and use 0x3400 as
INTCS vector base.

This change is necessary to avoid overlapping of interrupt
ranges so separate IRQ domains can be used for different INTC
instances. Without this fix the vectors used by various INTC
instances are overlapping on for instance sh7372 which works
at the moment but breaks upcoming IRQ domain support.

Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>

diff --git a/arch/arm/mach-shmobile/include/mach/irqs.h b/arch/arm/mach-shmobile/include/mach/irqs.h
index 4e686cc201fc8bacab46ad6aed6c01aac653c42c..06a5da3c305090e0176373d2576f6de68feb2922 100644 (file)
--- a/arch/arm/mach-shmobile/include/mach/irqs.h
+++ b/arch/arm/mach-shmobile/include/mach/irqs.h
@@ -7,7 +7,7 @@
 #define gic_spi(nr)            ((nr) + 32)
 
 /* INTCS */
-#define INTCS_VECT_BASE                0x2200
+#define INTCS_VECT_BASE                0x3400
 #define INTCS_VECT(n, vect)    INTC_VECT((n), INTCS_VECT_BASE + (vect))
 #define intcs_evt2irq(evt)     evt2irq(INTCS_VECT_BASE + (evt))