ARM: S3C2412: SoC has the fractional baud rate register

The S3C2412 has a fractional baud rate register, this patch adds the
corresponding flag to the UART definition to allow generation of more
precise baud rates for the various clock combinations.

Signed-off-by: Michel Pollet <buserror@gmail.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index ce75e28e36ef5a443c3f11bebada3b882a22281f..1700b1a2fb7e03cf6c6a2b9fa600a240f9e632f5 100644 (file)
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = {
        .name           = "Samsung S3C2412 UART",
        .type           = PORT_S3C2412,
        .fifosize       = 64,
+       .has_divslot    = 1,
        .rx_fifomask    = S3C2440_UFSTAT_RXMASK,
        .rx_fifoshift   = S3C2440_UFSTAT_RXSHIFT,
        .rx_fifofull    = S3C2440_UFSTAT_RXFULL,