drm/i915: don't rely on previous values when setting LPT TRANSCONF

Because we already set all the bits we can set.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: apply by hand due to dropped patch. Also, obey my OCD a bit
and do a s/_TRANSACONF/TRANSCONF(TRANSCODER_A)/, makes it more
consisten with other lpt pch code imnsho ...]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9c25199a5e4ac842819cab2292ed9b7a8aa00e9a..43ad1a556b3cdd8c6f1abbbdb6f12f05eb02696f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1729,16 +1729,15 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
        assert_fdi_tx_enabled(dev_priv, cpu_transcoder);
        assert_fdi_rx_enabled(dev_priv, TRANSCODER_A);
 
-       val = I915_READ(_TRANSACONF);
+       val = TRANS_ENABLE;
        pipeconf_val = I915_READ(PIPECONF(cpu_transcoder));
 
-       val &= ~TRANS_INTERLACE_MASK;
        if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK)
                val |= TRANS_INTERLACED;
        else
                val |= TRANS_PROGRESSIVE;
 
-       I915_WRITE(_TRANSACONF, val | TRANS_ENABLE);
+       I915_WRITE(TRANSCONF(TRANSCODER_A), val);
        if (wait_for(I915_READ(_TRANSACONF) & TRANS_STATE_ENABLE, 100))
                DRM_ERROR("Failed to enable PCH transcoder\n");
 }