Merge branch 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git...

* 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Support Suspend/Resume for EXYNOS4412
  ARM: EXYNOS: To use common config for EXYNOS4 and EXYNOS5 SPI
  ARM: EXYNOS: Support DMA for EXYNOS5250 SoC
  ARM: EXYNOS: Add platform resource definitions for FIMC-LITE
  ARM: EXYNOS: add platform device for core DRM subsystem
  ARM: EXYNOS: add dts files to dtbs target
  spi/s3c64xx: Allow usage for ARCH_S3C24XX
  ARM: S3C24XX: Add HSSPI setup callback for s3c64xx-spi driver
  ARM: S3C24XX: Add clock-lookup entries required by s3c64xx-spi
  ARM: S3C24XX: Add map entries needed by the s3c64xx-spi devices
  ARM: S3C24XX: claim spi channels for hsspi in dma-s3c2443
  ARM: S3C24XX: Add forgotten clock lookup table to S3C2443

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index d3e54cbe14cf67b73109eda1eac5f329748721ab..5893e2397da12de33b441711bf7b4a389fe7efce 100644 (file)
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -61,6 +61,7 @@ config SOC_EXYNOS5250
        bool "SAMSUNG EXYNOS5250"
        default y
        depends on ARCH_EXYNOS5
+       select SAMSUNG_DMADEV
        help
          Enable EXYNOS5250 SoC support
 
@@ -70,7 +71,7 @@ config EXYNOS4_MCT
        help
          Use MCT (Multi Core Timer) as kernel timers
 
-config EXYNOS4_DEV_DMA
+config EXYNOS_DEV_DMA
        bool
        help
          Compile in amba device definitions for DMA controller
@@ -80,6 +81,11 @@ config EXYNOS4_DEV_AHCI
        help
          Compile in platform device definitions for AHCI
 
+config EXYNOS_DEV_DRM
+       bool
+       help
+         Compile in platform device definitions for core DRM device
+
 config EXYNOS4_SETUP_FIMD0
        bool
        help
@@ -161,7 +167,7 @@ config EXYNOS4_SETUP_USB_PHY
        help
          Common setup code for USB PHY controller
 
-config EXYNOS4_SETUP_SPI
+config EXYNOS_SETUP_SPI
        bool
        help
          Common setup code for SPI GPIO configurations.
@@ -223,7 +229,7 @@ config MACH_ARMLEX4210
        select S3C_DEV_HSMMC2
        select S3C_DEV_HSMMC3
        select EXYNOS4_DEV_AHCI
-       select EXYNOS4_DEV_DMA
+       select EXYNOS_DEV_DMA
        select EXYNOS4_SETUP_SDHCI
        help
          Machine support for Samsung ARMLEX4210 based on EXYNOS4210
@@ -350,7 +356,7 @@ config MACH_SMDK4212
        select SAMSUNG_DEV_KEYPAD
        select SAMSUNG_DEV_PWM
        select EXYNOS_DEV_SYSMMU
-       select EXYNOS4_DEV_DMA
+       select EXYNOS_DEV_DMA
        select EXYNOS4_SETUP_I2C1
        select EXYNOS4_SETUP_I2C3
        select EXYNOS4_SETUP_I2C7

diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 272625231c73d168599745b4624b11c47da72cee..440a637c76f1933347050b82fb21e0275c1b327d 100644 (file)
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -50,10 +50,11 @@ obj-$(CONFIG_MACH_EXYNOS5_DT)               += mach-exynos5-dt.o
 obj-y                                  += dev-uart.o
 obj-$(CONFIG_ARCH_EXYNOS4)             += dev-audio.o
 obj-$(CONFIG_EXYNOS4_DEV_AHCI)         += dev-ahci.o
-obj-$(CONFIG_EXYNOS_DEV_SYSMMU)                += dev-sysmmu.o
 obj-$(CONFIG_EXYNOS4_DEV_DWMCI)                += dev-dwmci.o
-obj-$(CONFIG_EXYNOS4_DEV_DMA)          += dma.o
+obj-$(CONFIG_EXYNOS_DEV_DMA)           += dma.o
 obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI)     += dev-ohci.o
+obj-$(CONFIG_EXYNOS_DEV_DRM)           += dev-drm.o
+obj-$(CONFIG_EXYNOS_DEV_SYSMMU)                += dev-sysmmu.o
 
 obj-$(CONFIG_ARCH_EXYNOS)              += setup-i2c0.o
 obj-$(CONFIG_EXYNOS4_SETUP_FIMC)       += setup-fimc.o
@@ -68,4 +69,4 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7)      += setup-i2c7.o
 obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD)     += setup-keypad.o
 obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
 obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY)    += setup-usb-phy.o
-obj-$(CONFIG_EXYNOS4_SETUP_SPI)                += setup-spi.o
+obj-$(CONFIG_EXYNOS_SETUP_SPI)         += setup-spi.o

diff --git a/arch/arm/mach-exynos/Makefile.boot b/arch/arm/mach-exynos/Makefile.boot
index b9862e22bf10a3ecc4ccca0c6e7ece16f3f3a2bb..31bd181b0514e2221f14fe3c8f778697ab8f32a3 100644 (file)
--- a/arch/arm/mach-exynos/Makefile.boot
+++ b/arch/arm/mach-exynos/Makefile.boot
@@ -1,2 +1,5 @@
    zreladdr-y  += 0x40008000
 params_phys-y  := 0x40000100
+
+dtb-$(CONFIG_MACH_EXYNOS4_DT) += exynos4210-origen.dtb exynos4210-smdkv310.dtb
+dtb-$(CONFIG_MACH_EXYNOS5_DT) += exynos5250-smdk5250.dtb

diff --git a/arch/arm/mach-exynos/clock-exynos4212.c b/arch/arm/mach-exynos/clock-exynos4212.c
index 98823120570ee1f809752e3135594776b01b2527..da397d21bbcf438cb81f73fe28adbfc7d365668f 100644 (file)
--- a/arch/arm/mach-exynos/clock-exynos4212.c
+++ b/arch/arm/mach-exynos/clock-exynos4212.c
@@ -92,6 +92,16 @@ static struct clk init_clocks_off[] = {
                .devname        = SYSMMU_CLOCK_DEVNAME(isp, 9),
                .enable         = exynos4212_clk_ip_isp1_ctrl,
                .ctrlbit        = (1 << 4),
+       }, {
+               .name           = "flite",
+               .devname        = "exynos-fimc-lite.0",
+               .enable         = exynos4212_clk_ip_isp0_ctrl,
+               .ctrlbit        = (1 << 4),
+       }, {
+               .name           = "flite",
+               .devname        = "exynos-fimc-lite.1",
+               .enable         = exynos4212_clk_ip_isp0_ctrl,
+               .ctrlbit        = (1 << 3),
        }
 };
 

diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c
new file mode 100644 (file)
index 0000000..17c9c6e
--- /dev/null
+++ b/arch/arm/mach-exynos/dev-drm.c
@@ -0,0 +1,29 @@
+/*
+ * linux/arch/arm/mach-exynos/dev-drm.c
+ *
+ * Copyright (c) 2012 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * EXYNOS - core DRM device
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+
+#include <plat/devs.h>
+
+static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32);
+
+struct platform_device exynos_device_drm = {
+       .name   = "exynos-drm",
+       .dev    = {
+               .dma_mask               = &exynos_drm_dma_mask,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       }
+};

diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c
index 69aaa45032057d8409e890b90ff6a6c1bd0b106c..f60b66dbcf84ebe5ebe750e3e89521724d7a8d73 100644 (file)
--- a/arch/arm/mach-exynos/dma.c
+++ b/arch/arm/mach-exynos/dma.c
@@ -103,10 +103,45 @@ static u8 exynos4212_pdma0_peri[] = {
        DMACH_MIPI_HSI5,
 };
 
-struct dma_pl330_platdata exynos4_pdma0_pdata;
+static u8 exynos5250_pdma0_peri[] = {
+       DMACH_PCM0_RX,
+       DMACH_PCM0_TX,
+       DMACH_PCM2_RX,
+       DMACH_PCM2_TX,
+       DMACH_SPI0_RX,
+       DMACH_SPI0_TX,
+       DMACH_SPI2_RX,
+       DMACH_SPI2_TX,
+       DMACH_I2S0S_TX,
+       DMACH_I2S0_RX,
+       DMACH_I2S0_TX,
+       DMACH_I2S2_RX,
+       DMACH_I2S2_TX,
+       DMACH_UART0_RX,
+       DMACH_UART0_TX,
+       DMACH_UART2_RX,
+       DMACH_UART2_TX,
+       DMACH_UART4_RX,
+       DMACH_UART4_TX,
+       DMACH_SLIMBUS0_RX,
+       DMACH_SLIMBUS0_TX,
+       DMACH_SLIMBUS2_RX,
+       DMACH_SLIMBUS2_TX,
+       DMACH_SLIMBUS4_RX,
+       DMACH_SLIMBUS4_TX,
+       DMACH_AC97_MICIN,
+       DMACH_AC97_PCMIN,
+       DMACH_AC97_PCMOUT,
+       DMACH_MIPI_HSI0,
+       DMACH_MIPI_HSI2,
+       DMACH_MIPI_HSI4,
+       DMACH_MIPI_HSI6,
+};
+
+static struct dma_pl330_platdata exynos_pdma0_pdata;
 
-static AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330,
-       EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &exynos4_pdma0_pdata);
+static AMBA_AHB_DEVICE(exynos_pdma0, "dma-pl330.0", 0x00041330,
+       EXYNOS4_PA_PDMA0, {EXYNOS4_IRQ_PDMA0}, &exynos_pdma0_pdata);
 
 static u8 exynos4210_pdma1_peri[] = {
        DMACH_PCM0_RX,
@@ -169,10 +204,45 @@ static u8 exynos4212_pdma1_peri[] = {
        DMACH_MIPI_HSI7,
 };
 
-static struct dma_pl330_platdata exynos4_pdma1_pdata;
+static u8 exynos5250_pdma1_peri[] = {
+       DMACH_PCM0_RX,
+       DMACH_PCM0_TX,
+       DMACH_PCM1_RX,
+       DMACH_PCM1_TX,
+       DMACH_SPI1_RX,
+       DMACH_SPI1_TX,
+       DMACH_PWM,
+       DMACH_SPDIF,
+       DMACH_I2S0S_TX,
+       DMACH_I2S0_RX,
+       DMACH_I2S0_TX,
+       DMACH_I2S1_RX,
+       DMACH_I2S1_TX,
+       DMACH_UART0_RX,
+       DMACH_UART0_TX,
+       DMACH_UART1_RX,
+       DMACH_UART1_TX,
+       DMACH_UART3_RX,
+       DMACH_UART3_TX,
+       DMACH_SLIMBUS1_RX,
+       DMACH_SLIMBUS1_TX,
+       DMACH_SLIMBUS3_RX,
+       DMACH_SLIMBUS3_TX,
+       DMACH_SLIMBUS5_RX,
+       DMACH_SLIMBUS5_TX,
+       DMACH_SLIMBUS0AUX_RX,
+       DMACH_SLIMBUS0AUX_TX,
+       DMACH_DISP1,
+       DMACH_MIPI_HSI1,
+       DMACH_MIPI_HSI3,
+       DMACH_MIPI_HSI5,
+       DMACH_MIPI_HSI7,
+};
 
-static AMBA_AHB_DEVICE(exynos4_pdma1,  "dma-pl330.1", 0x00041330,
-       EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &exynos4_pdma1_pdata);
+static struct dma_pl330_platdata exynos_pdma1_pdata;
+
+static AMBA_AHB_DEVICE(exynos_pdma1,  "dma-pl330.1", 0x00041330,
+       EXYNOS4_PA_PDMA1, {EXYNOS4_IRQ_PDMA1}, &exynos_pdma1_pdata);
 
 static u8 mdma_peri[] = {
        DMACH_MTOM_0,
@@ -185,46 +255,63 @@ static u8 mdma_peri[] = {
        DMACH_MTOM_7,
 };
 
-static struct dma_pl330_platdata exynos4_mdma1_pdata = {
+static struct dma_pl330_platdata exynos_mdma1_pdata = {
        .nr_valid_peri = ARRAY_SIZE(mdma_peri),
        .peri_id = mdma_peri,
 };
 
-static AMBA_AHB_DEVICE(exynos4_mdma1,  "dma-pl330.2", 0x00041330,
-       EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &exynos4_mdma1_pdata);
+static AMBA_AHB_DEVICE(exynos_mdma1,  "dma-pl330.2", 0x00041330,
+       EXYNOS4_PA_MDMA1, {EXYNOS4_IRQ_MDMA1}, &exynos_mdma1_pdata);
 
-static int __init exynos4_dma_init(void)
+static int __init exynos_dma_init(void)
 {
        if (of_have_populated_dt())
                return 0;
 
        if (soc_is_exynos4210()) {
-               exynos4_pdma0_pdata.nr_valid_peri =
+               exynos_pdma0_pdata.nr_valid_peri =
                        ARRAY_SIZE(exynos4210_pdma0_peri);
-               exynos4_pdma0_pdata.peri_id = exynos4210_pdma0_peri;
-               exynos4_pdma1_pdata.nr_valid_peri =
+               exynos_pdma0_pdata.peri_id = exynos4210_pdma0_peri;
+               exynos_pdma1_pdata.nr_valid_peri =
                        ARRAY_SIZE(exynos4210_pdma1_peri);
-               exynos4_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
+               exynos_pdma1_pdata.peri_id = exynos4210_pdma1_peri;
        } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
-               exynos4_pdma0_pdata.nr_valid_peri =
+               exynos_pdma0_pdata.nr_valid_peri =
                        ARRAY_SIZE(exynos4212_pdma0_peri);
-               exynos4_pdma0_pdata.peri_id = exynos4212_pdma0_peri;
-               exynos4_pdma1_pdata.nr_valid_peri =
+               exynos_pdma0_pdata.peri_id = exynos4212_pdma0_peri;
+               exynos_pdma1_pdata.nr_valid_peri =
                        ARRAY_SIZE(exynos4212_pdma1_peri);
-               exynos4_pdma1_pdata.peri_id = exynos4212_pdma1_peri;
+               exynos_pdma1_pdata.peri_id = exynos4212_pdma1_peri;
+       } else if (soc_is_exynos5250()) {
+               exynos_pdma0_pdata.nr_valid_peri =
+                       ARRAY_SIZE(exynos5250_pdma0_peri);
+               exynos_pdma0_pdata.peri_id = exynos5250_pdma0_peri;
+               exynos_pdma1_pdata.nr_valid_peri =
+                       ARRAY_SIZE(exynos5250_pdma1_peri);
+               exynos_pdma1_pdata.peri_id = exynos5250_pdma1_peri;
+
+               exynos_pdma0_device.res.start = EXYNOS5_PA_PDMA0;
+               exynos_pdma0_device.res.end = EXYNOS5_PA_PDMA0 + SZ_4K;
+               exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA0;
+               exynos_pdma1_device.res.start = EXYNOS5_PA_PDMA1;
+               exynos_pdma1_device.res.end = EXYNOS5_PA_PDMA1 + SZ_4K;
+               exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_PDMA1;
+               exynos_mdma1_device.res.start = EXYNOS5_PA_MDMA1;
+               exynos_mdma1_device.res.end = EXYNOS5_PA_MDMA1 + SZ_4K;
+               exynos_pdma0_device.irq[0] = EXYNOS5_IRQ_MDMA1;
        }
 
-       dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask);
-       dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask);
-       amba_device_register(&exynos4_pdma0_device, &iomem_resource);
+       dma_cap_set(DMA_SLAVE, exynos_pdma0_pdata.cap_mask);
+       dma_cap_set(DMA_CYCLIC, exynos_pdma0_pdata.cap_mask);
+       amba_device_register(&exynos_pdma0_device, &iomem_resource);
 
-       dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask);
-       dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask);
-       amba_device_register(&exynos4_pdma1_device, &iomem_resource);
+       dma_cap_set(DMA_SLAVE, exynos_pdma1_pdata.cap_mask);
+       dma_cap_set(DMA_CYCLIC, exynos_pdma1_pdata.cap_mask);
+       amba_device_register(&exynos_pdma1_device, &iomem_resource);
 
-       dma_cap_set(DMA_MEMCPY, exynos4_mdma1_pdata.cap_mask);
-       amba_device_register(&exynos4_mdma1_device, &iomem_resource);
+       dma_cap_set(DMA_MEMCPY, exynos_mdma1_pdata.cap_mask);
+       amba_device_register(&exynos_mdma1_device, &iomem_resource);
 
        return 0;
 }
-arch_initcall(exynos4_dma_init);
+arch_initcall(exynos_dma_init);

diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 0e2292d04550359b637d7ce011c7c7549be711ee..d30643ba27391b2d7d70c13c6384d1c2de0938df 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -34,6 +34,9 @@
 
 #define EXYNOS4_PA_JPEG                        0x11840000
 
+/* x = 0...1 */
+#define EXYNOS4_PA_FIMC_LITE(x)                (0x12390000 + ((x) * 0x10000))
+
 #define EXYNOS4_PA_G2D                 0x12800000
 
 #define EXYNOS4_PA_I2S0                        0x03830000

diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index 4c53f38b5a9e962f2c81bdedf726cee5dbe4017d..606b19907f99d635bc1e5a30d90dfca85b51bed8 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -177,7 +177,7 @@
 
 #define S5P_PMU_LCD1_CONF              S5P_PMUREG(0x3CA0)
 
-/* Only for EXYNOS4212 */
+/* Only for EXYNOS4x12 */
 #define S5P_ISP_ARM_LOWPWR                     S5P_PMUREG(0x1050)
 #define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR       S5P_PMUREG(0x1054)
 #define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR     S5P_PMUREG(0x1058)
@@ -218,4 +218,12 @@
 #define S5P_SECSS_MEM_OPTION                   S5P_PMUREG(0x2EC8)
 #define S5P_ROTATOR_MEM_OPTION                 S5P_PMUREG(0x2F48)
 
+/* Only for EXYNOS4412 */
+#define S5P_ARM_CORE2_LOWPWR                   S5P_PMUREG(0x1020)
+#define S5P_DIS_IRQ_CORE2                      S5P_PMUREG(0x1024)
+#define S5P_DIS_IRQ_CENTRAL2                   S5P_PMUREG(0x1028)
+#define S5P_ARM_CORE3_LOWPWR                   S5P_PMUREG(0x1030)
+#define S5P_DIS_IRQ_CORE3                      S5P_PMUREG(0x1034)
+#define S5P_DIS_IRQ_CENTRAL3                   S5P_PMUREG(0x1038)
+
 #endif /* __ASM_ARCH_REGS_PMU_H */

diff --git a/arch/arm/mach-exynos/include/mach/spi-clocks.h b/arch/arm/mach-exynos/include/mach/spi-clocks.h
index 576efdf6d09163b1244cecc36747468d6a444de7..c71a5fba6a84c4f6a0a6cf4b538241519389dac3 100644 (file)
--- a/arch/arm/mach-exynos/include/mach/spi-clocks.h
+++ b/arch/arm/mach-exynos/include/mach/spi-clocks.h
@@ -11,6 +11,6 @@
 #define __ASM_ARCH_SPI_CLKS_H __FILE__
 
 /* Must source from SCLK_SPI */
-#define EXYNOS4_SPI_SRCCLK_SCLK                0
+#define EXYNOS_SPI_SRCCLK_SCLK         0
 
 #endif /* __ASM_ARCH_SPI_CLKS_H */

diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 428cfeb577248a5e812e7c954b8faa7584bbbe3a..f0bb4677eb11674eb5faeceff380c0f8b53ff5a1 100644 (file)
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -313,7 +313,7 @@ static int exynos4_pm_suspend(void)
        tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
        __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 
-       if (soc_is_exynos4212()) {
+       if (soc_is_exynos4212() || soc_is_exynos4412()) {
                tmp = __raw_readl(S5P_CENTRAL_SEQ_OPTION);
                tmp &= ~(S5P_USE_STANDBYWFI_ISP_ARM |
                         S5P_USE_STANDBYWFE_ISP_ARM);

diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index bba48f5c3e8fe21a6d2218949d929ee4e5b08d8a..77c6815eebeea9c6070ccab7474f5282368b037e 100644 (file)
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -94,7 +94,7 @@ static struct exynos4_pmu_conf exynos4210_pmu_config[] = {
        { PMU_TABLE_END,},
 };
 
-static struct exynos4_pmu_conf exynos4212_pmu_config[] = {
+static struct exynos4_pmu_conf exynos4x12_pmu_config[] = {
        { S5P_ARM_CORE0_LOWPWR,                 { 0x0, 0x0, 0x2 } },
        { S5P_DIS_IRQ_CORE0,                    { 0x0, 0x0, 0x0 } },
        { S5P_DIS_IRQ_CENTRAL0,                 { 0x0, 0x0, 0x0 } },
@@ -202,6 +202,16 @@ static struct exynos4_pmu_conf exynos4212_pmu_config[] = {
        { PMU_TABLE_END,},
 };
 
+static struct exynos4_pmu_conf exynos4412_pmu_config[] = {
+       { S5P_ARM_CORE2_LOWPWR,                 { 0x0, 0x0, 0x2 } },
+       { S5P_DIS_IRQ_CORE2,                    { 0x0, 0x0, 0x0 } },
+       { S5P_DIS_IRQ_CENTRAL2,                 { 0x0, 0x0, 0x0 } },
+       { S5P_ARM_CORE3_LOWPWR,                 { 0x0, 0x0, 0x2 } },
+       { S5P_DIS_IRQ_CORE3,                    { 0x0, 0x0, 0x0 } },
+       { S5P_DIS_IRQ_CENTRAL3,                 { 0x0, 0x0, 0x0 } },
+       { PMU_TABLE_END,},
+};
+
 void exynos4_sys_powerdown_conf(enum sys_powerdown mode)
 {
        unsigned int i;
@@ -209,6 +219,12 @@ void exynos4_sys_powerdown_conf(enum sys_powerdown mode)
        for (i = 0; (exynos4_pmu_config[i].reg != PMU_TABLE_END) ; i++)
                __raw_writel(exynos4_pmu_config[i].val[mode],
                                exynos4_pmu_config[i].reg);
+
+       if (soc_is_exynos4412()) {
+               for (i = 0; exynos4412_pmu_config[i].reg != PMU_TABLE_END ; i++)
+                       __raw_writel(exynos4412_pmu_config[i].val[mode],
+                               exynos4412_pmu_config[i].reg);
+       }
 }
 
 static int __init exynos4_pmu_init(void)
@@ -218,9 +234,9 @@ static int __init exynos4_pmu_init(void)
        if (soc_is_exynos4210()) {
                exynos4_pmu_config = exynos4210_pmu_config;
                pr_info("EXYNOS4210 PMU Initialize\n");
-       } else if (soc_is_exynos4212()) {
-               exynos4_pmu_config = exynos4212_pmu_config;
-               pr_info("EXYNOS4212 PMU Initialize\n");
+       } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
+               exynos4_pmu_config = exynos4x12_pmu_config;
+               pr_info("EXYNOS4x12 PMU Initialize\n");
        } else {
                pr_info("EXYNOS4: PMU not supported\n");
        }

diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index b34287ab5afd93502e9b5779918085c3b8eb68ec..e24961109b70286655c36c46a3083809511870c5 100644 (file)
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -518,6 +518,11 @@ config S3C2443_DMA
        help
          Internal config node for S3C2443 DMA support
 
+config S3C2443_SETUP_SPI
+       bool
+       help
+         Common setup code for SPI GPIO configurations
+
 endif  # CPU_S3C2443 || CPU_S3C2416
 
 if CPU_S3C2443

diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile
index 3518fe812d5f73b183d1fae156a821a0b947eb82..d0f3a92f9e4af35d0dabe24447faac9d3e83f5d0 100644 (file)
--- a/arch/arm/mach-s3c24xx/Makefile
+++ b/arch/arm/mach-s3c24xx/Makefile
@@ -91,5 +91,6 @@ obj-$(CONFIG_MACH_OSIRIS_DVS)         += mach-osiris-dvs.o
 # device setup
 
 obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
+obj-$(CONFIG_S3C2443_SETUP_SPI)                += setup-spi.o
 obj-$(CONFIG_ARCH_S3C24XX)             += setup-i2c.o
 obj-$(CONFIG_S3C24XX_SETUP_TS)         += setup-ts.o

diff --git a/arch/arm/mach-s3c24xx/clock-s3c2416.c b/arch/arm/mach-s3c24xx/clock-s3c2416.c
index dbc9ab4aaca233485dfaa9f8dc414e85e6fdc931..8702ecfaab3098f3987cd4bc6c23a2bc88a07a8e 100644 (file)
--- a/arch/arm/mach-s3c24xx/clock-s3c2416.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2416.c
@@ -144,6 +144,7 @@ static struct clk_lookup s3c2416_clk_lookup[] = {
        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk),
        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk),
        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk),
+       CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &hsspi_mux.clk),
 };
 
 void __init s3c2416_init_clocks(int xtal)

diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index efb3ac359566de3b141f5ff0e3eaabed565f0cbc..a4c5a520d9942abe648af870f978e79ebf15bab4 100644 (file)
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -179,6 +179,11 @@ static struct clk *clks[] __initdata = {
        &clk_hsmmc,
 };
 
+static struct clk_lookup s3c2443_clk_lookup[] = {
+       CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_hsmmc),
+       CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_hsspi.clk),
+};
+
 void __init s3c2443_init_clocks(int xtal)
 {
        unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
@@ -210,6 +215,7 @@ void __init s3c2443_init_clocks(int xtal)
 
        s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
        s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
+       clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
 
        s3c_pwmclk_init();
 }

diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c
index 460431589f393898c15c351a60c41524ccb313e0..aeeb2be283fae341492bbe08efb3a44298182ebb 100644 (file)
--- a/arch/arm/mach-s3c24xx/common-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/common-s3c2443.c
@@ -423,11 +423,6 @@ static struct clk init_clocks_off[] = {
                .parent         = &clk_p,
                .enable         = s3c2443_clkcon_enable_p,
                .ctrlbit        = S3C2443_PCLKCON_IIS,
-       }, {
-               .name           = "hsspi",
-               .parent         = &clk_p,
-               .enable         = s3c2443_clkcon_enable_p,
-               .ctrlbit        = S3C2443_PCLKCON_HSSPI,
        }, {
                .name           = "adc",
                .parent         = &clk_p,
@@ -562,6 +557,14 @@ static struct clk hsmmc1_clk = {
        .ctrlbit        = S3C2443_HCLKCON_HSMMC,
 };
 
+static struct clk hsspi_clk = {
+       .name           = "spi",
+       .devname        = "s3c64xx-spi.0",
+       .parent         = &clk_p,
+       .enable         = s3c2443_clkcon_enable_p,
+       .ctrlbit        = S3C2443_PCLKCON_HSSPI,
+};
+
 /* EPLLCON compatible enough to get on/off information */
 
 void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll)
@@ -612,6 +615,7 @@ static struct clk *clks[] __initdata = {
        &clk_usb_bus,
        &clk_armdiv,
        &hsmmc1_clk,
+       &hsspi_clk,
 };
 
 static struct clksrc_clk *clksrcs[] __initdata = {
@@ -629,6 +633,7 @@ static struct clk_lookup s3c2443_clk_lookup[] = {
        CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
        CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk),
        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk),
+       CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &hsspi_clk),
 };
 
 void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,

diff --git a/arch/arm/mach-s3c24xx/dma-s3c2443.c b/arch/arm/mach-s3c24xx/dma-s3c2443.c
index e227c472a40ab45530e69ad4dc57a9f1055d9139..2d94228d2866eef4bc56408a641b1f3084492d2a 100644 (file)
--- a/arch/arm/mach-s3c24xx/dma-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/dma-s3c2443.c
@@ -55,12 +55,20 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
                .name           = "sdi",
                .channels       = MAP(S3C2443_DMAREQSEL_SDI),
        },
-       [DMACH_SPI0] = {
-               .name           = "spi0",
+       [DMACH_SPI0_RX] = {
+               .name           = "spi0-rx",
+               .channels       = MAP(S3C2443_DMAREQSEL_SPI0RX),
+       },
+       [DMACH_SPI0_TX] = {
+               .name           = "spi0-tx",
                .channels       = MAP(S3C2443_DMAREQSEL_SPI0TX),
        },
-       [DMACH_SPI1] = { /* only on S3C2443/S3C2450 */
-               .name           = "spi1",
+       [DMACH_SPI1_RX] = { /* only on S3C2443/S3C2450 */
+               .name           = "spi1-rx",
+               .channels       = MAP(S3C2443_DMAREQSEL_SPI1RX),
+       },
+       [DMACH_SPI1_TX] = { /* only on S3C2443/S3C2450 */
+               .name           = "spi1-tx",
                .channels       = MAP(S3C2443_DMAREQSEL_SPI1TX),
        },
        [DMACH_UART0] = {

diff --git a/arch/arm/mach-s3c24xx/include/mach/dma.h b/arch/arm/mach-s3c24xx/include/mach/dma.h
index acbdfecd4186f6aa0f309315069f13a28f1625e5..454831b66037f9c64d37521bf14e118dcc92bc9a 100644 (file)
--- a/arch/arm/mach-s3c24xx/include/mach/dma.h
+++ b/arch/arm/mach-s3c24xx/include/mach/dma.h
@@ -47,6 +47,10 @@ enum dma_ch {
        DMACH_UART2_SRC2,
        DMACH_UART3,            /* s3c2443 has extra uart */
        DMACH_UART3_SRC2,
+       DMACH_SPI0_TX,          /* s3c2443/2416/2450 hsspi0 */
+       DMACH_SPI0_RX,          /* s3c2443/2416/2450 hsspi0 */
+       DMACH_SPI1_TX,          /* s3c2443/2450 hsspi1 */
+       DMACH_SPI1_RX,          /* s3c2443/2450 hsspi1 */
        DMACH_MAX,              /* the end entry */
 };
 

diff --git a/arch/arm/mach-s3c24xx/include/mach/map.h b/arch/arm/mach-s3c24xx/include/mach/map.h
index 78ae807f1281e6a250cfab6b440428c4283ed7fa..8ba381f2dbe1b306d07943eccc1f3e550302c3d6 100644 (file)
--- a/arch/arm/mach-s3c24xx/include/mach/map.h
+++ b/arch/arm/mach-s3c24xx/include/mach/map.h
@@ -98,6 +98,8 @@
 
 /* SPI */
 #define S3C2410_PA_SPI    (0x59000000)
+#define S3C2443_PA_SPI0                (0x52000000)
+#define S3C2443_PA_SPI1                S3C2410_PA_SPI
 
 /* SDI */
 #define S3C2410_PA_SDI    (0x5A000000)
@@ -162,4 +164,7 @@
 #define S3C_PA_WDT         S3C2410_PA_WATCHDOG
 #define S3C_PA_NAND        S3C24XX_PA_NAND
 
+#define S3C_PA_SPI0            S3C2443_PA_SPI0
+#define S3C_PA_SPI1            S3C2443_PA_SPI1
+
 #endif /* __ASM_ARCH_MAP_H */

diff --git a/arch/arm/mach-s3c24xx/setup-spi.c b/arch/arm/mach-s3c24xx/setup-spi.c
new file mode 100644 (file)
index 0000000..5712c85
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/setup-spi.c
@@ -0,0 +1,39 @@
+/*
+ * HS-SPI device setup for S3C2443/S3C2416
+ *
+ * Copyright (C) 2011 Samsung Electronics Ltd.
+ *             http://www.samsung.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/s3c64xx-spi.h>
+
+#include <mach/hardware.h>
+#include <mach/regs-gpio.h>
+
+#ifdef CONFIG_S3C64XX_DEV_SPI0
+struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
+       .fifo_lvl_mask  = 0x7f,
+       .rx_lvl_offset  = 13,
+       .tx_st_done     = 21,
+       .high_speed     = 1,
+};
+
+int s3c64xx_spi0_cfg_gpio(struct platform_device *pdev)
+{
+       /* enable hsspi bit in misccr */
+       s3c2410_modify_misccr(S3C2416_MISCCR_HSSPI_EN2, 1);
+
+       s3c_gpio_cfgall_range(S3C2410_GPE(11), 3,
+                             S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
+
+       return 0;
+}
+#endif

diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index a0ffc77da8091a3ab962b8570a7592e9d254bfb5..77e65b483f90bde678871297b84b212e624e1424 100644 (file)
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -291,7 +291,7 @@ config S3C_DMA
 config SAMSUNG_DMADEV
        bool
        select DMADEVICES
-       select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \
+       select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \
                                        CPU_S5P6450 || CPU_S5P6440)
        select ARM_AMBA
        help

diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 4067d1dd7f1c3e067b41ebb6963b5c1226994db0..61ca2f356c52d6d4ea3fac036788cc422aa02235 100644 (file)
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -134,6 +134,8 @@ extern struct platform_device exynos4_device_pcm2;
 extern struct platform_device exynos4_device_pd[];
 extern struct platform_device exynos4_device_spdif;
 
+extern struct platform_device exynos_device_drm;
+
 extern struct platform_device samsung_asoc_dma;
 extern struct platform_device samsung_asoc_idma;
 extern struct platform_device samsung_device_keypad;

diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h
index 0670f37aaaedcfe7990d359df010db7ced9c935a..d384a8016b47d2463218748289cfbac3c8b272cc 100644 (file)
--- a/arch/arm/plat-samsung/include/plat/dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h
@@ -90,6 +90,7 @@ enum dma_ch {
        DMACH_MIPI_HSI5,
        DMACH_MIPI_HSI6,
        DMACH_MIPI_HSI7,
+       DMACH_DISP1,
        DMACH_MTOM_0,
        DMACH_MTOM_1,
        DMACH_MTOM_2,

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 00c024039c9713a7b8468d91f5a7e42316db65d5..cd2fe350e724a1db540dc372ca081646bb10a881 100644 (file)
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -311,7 +311,7 @@ config SPI_S3C24XX_FIQ
 
 config SPI_S3C64XX
        tristate "Samsung S3C64XX series type SPI"
-       depends on (ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS)
+       depends on (ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || ARCH_EXYNOS)
        select S3C64XX_DMA if ARCH_S3C64XX
        help
          SPI driver for Samsung S3C64XX and newer SoCs.