ARM: pgtable: remove L2 cache flushes for SMP page table bring-up

The MMU is always configured to read page tables from the L2 cache
so there's little point flushing them out of the L2 cache back to
RAM.  Remove these flushes.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index 8c1959590252e7161f1da38497eddba9b0538afb..46313805f4304ba1919e07124004d57b27ed12f9 100644 (file)
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -85,7 +85,6 @@ static inline void identity_mapping_add(pgd_t *pgd, unsigned long start,
                pmd[1] = __pmd(addr | prot);
                addr += SECTION_SIZE;
                flush_pmd_entry(pmd);
-               outer_clean_range(__pa(pmd), __pa(pmd + 1));
        }
 }
 
@@ -100,7 +99,6 @@ static inline void identity_mapping_del(pgd_t *pgd, unsigned long start,
                pmd[0] = __pmd(0);
                pmd[1] = __pmd(0);
                clean_pmd_entry(pmd);
-               outer_clean_range(__pa(pmd), __pa(pmd + 1));
        }
 }