This is more descriptive.
Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Change-Id: I3f397cc63f60c2d806b1665de9b6bae4106f1db1
RSEQ_ASM_CBNE_CPU_ID(cpu_id, current_cpu_id, "%l[error1]")
RSEQ_ASM_OP_CBNE(v, expect, "%l[error2]")
#endif
- RSEQ_ASM_OP_R_BAD_MEMCPY(dst, src, len)
+ RSEQ_ASM_OP_R_BYTEWISE_MEMCPY(dst, src, len)
RSEQ_INJECT_ASM(5)
#ifdef RSEQ_TEMPLATE_MO_RELEASE
RSEQ_ASM_OP_FINAL_STORE_RELEASE(newv, v, 3)
REG_S RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(var) "]\n" \
__rseq_str(post_commit_label) ":\n"
-#define RSEQ_ASM_OP_R_BAD_MEMCPY(dst, src, len) \
+#define RSEQ_ASM_OP_R_BYTEWISE_MEMCPY(dst, src, len) \
"beqz %[" __rseq_str(len) "], 333f\n" \
"mv " RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(len) "]\n" \
"mv " RSEQ_ASM_TMP_REG_2 ", %[" __rseq_str(src) "]\n" \