usb: dwc2: gadget: only reset core after addressed state

There is a 200ms guard period to avoid unnecessary resets of the dwc2
ip. This delay sometimes prove to be too large when usbcv is run with
an ehci host. dwc2 only needs to be reset after addressed state.
Change the logic to reset ip after addressed state.

Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Tested-by: Robert Baldyga <r.baldyga@samsung.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Tested-by: John Youn <johnyoun@synopsys.com>
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h
index d2115d2a3db28413effb890b288aaff3d80897ec..30569810900058d27f2c2c40860bf3752e4266c0 100644 (file)
--- a/drivers/usb/dwc2/core.h
+++ b/drivers/usb/dwc2/core.h
@@ -688,7 +688,6 @@ struct dwc2_hregs_backup {
  * @ctrl_req:           Request for EP0 control packets.
  * @ep0_state:          EP0 control transfers state
  * @test_mode:          USB test mode requested by the host
- * @last_rst:           Time of last reset
  * @eps:                The endpoints being supplied to the gadget framework
  * @g_using_dma:          Indicate if dma usage is enabled
  * @g_rx_fifo_sz:         Contains rx fifo size value
@@ -831,7 +830,6 @@ struct dwc2_hsotg {
        struct usb_gadget gadget;
        unsigned int enabled:1;
        unsigned int connected:1;
-       unsigned long last_rst;
        struct dwc2_hsotg_ep *eps_in[MAX_EPS_CHANNELS];
        struct dwc2_hsotg_ep *eps_out[MAX_EPS_CHANNELS];
        u32 g_using_dma;

diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
index 2d81fc5f39e9d8bb75cca88673416b14a16044f0..d6f552cc6a59fdd03ccfc384a9b53251722bfb1d 100644 (file)
--- a/drivers/usb/dwc2/gadget.c
+++ b/drivers/usb/dwc2/gadget.c
@@ -2420,7 +2420,6 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
        /* must be at-least 3ms to allow bus to see disconnect */
        mdelay(3);
 
-       hsotg->last_rst = jiffies;
        hsotg->lx_state = DWC2_L0;
 }
 
@@ -2504,6 +2503,7 @@ irq_retry:
        if (gintsts & (GINTSTS_USBRST | GINTSTS_RESETDET)) {
 
                u32 usb_status = dwc2_readl(hsotg->regs + GOTGCTL);
+               u32 connected = hsotg->connected;
 
                dev_dbg(hsotg->dev, "%s: USBRst\n", __func__);
                dev_dbg(hsotg->dev, "GNPTXSTS=%08x\n",
@@ -2514,13 +2514,8 @@ irq_retry:
                /* Report disconnection if it is not already done. */
                dwc2_hsotg_disconnect(hsotg);
 
-               if (usb_status & GOTGCTL_BSESVLD) {
-                       if (time_after(jiffies, hsotg->last_rst +
-                                      msecs_to_jiffies(200))) {
-
-                               dwc2_hsotg_core_init_disconnected(hsotg, true);
-                       }
-               }
+               if (usb_status & GOTGCTL_BSESVLD && connected)
+                       dwc2_hsotg_core_init_disconnected(hsotg, true);
        }
 
        /* check both FIFOs */