ARM: tegra: Fix unit address for Cortex-A9 TWD timer

The Cortex-A9 TWD timer has registers at address 0x50040600, but the
unit address was 50004600, most likely a typo.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index f76fe94267d6c34c4df0514384bede4aef2d9183..e5527f74269666cd96f38b4ec6c335639e7b9314 100644 (file)
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -140,7 +140,7 @@
                };
        };
 
-       timer@50004600 {
+       timer@50040600 {
                compatible = "arm,cortex-a9-twd-timer";
                reg = <0x50040600 0x20>;
                interrupts = <GIC_PPI 13

diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 99475f6e76a3b5edd4b10c2dde8d73f06673ab2e..db4810df142c39b62655d674229325c7a577b194 100644 (file)
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -225,7 +225,7 @@
                };
        };
 
-       timer@50004600 {
+       timer@50040600 {
                compatible = "arm,cortex-a9-twd-timer";
                reg = <0x50040600 0x20>;
                interrupts = <GIC_PPI 13