* hppa.h (pa_opcodes): Reorder bb opcodes so that pa10 opcodes come

	first.  Correct mask of bb "B" opcode.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 9edfd3f3b934ef5fb2e2dfed759bf82be66813b2..9786caf045c91921e78e56d0dec830d22383d276 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2006-03-04  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
+
+       * hppa.h (pa_opcodes): Reorder bb opcodes so that pa10 opcodes come
+       first.  Correct mask of bb "B" opcode.
+
 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 
        * i386.h (i386_optab): Support Intel Merom New Instructions.

diff --git a/include/opcode/hppa.h b/include/opcode/hppa.h
index 5b08b9d2b843bb5765e0b8022fefd054d7665ca4..d1c0e83952b8e3afccbf4dfb0acebe99667914d7 100644 (file)
--- a/include/opcode/hppa.h
+++ b/include/opcode/hppa.h
@@ -593,10 +593,10 @@ static const struct pa_opcode pa_opcodes[] =
 { "addbf",     0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0},
 { "addibt",    0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0},
 { "addibf",    0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0},
+{ "bb",                0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT}, 
 { "bb",                0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT}, 
+{ "bb",                0xc4004000, 0xfc006000, "?bnx,Q,w", pa10, FLAG_STRICT}, 
 { "bb",                0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT}, 
-{ "bb",                0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT}, 
-{ "bb",                0xc4004000, 0xfc004000, "?bnx,Q,w", pa10, 0}, 
 { "bvb",       0xc0004000, 0xffe04000, "?bnx,w", pa10, 0},
 { "clrbts",    0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT},
 { "popbts",    0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT},