[binutils][aarch64] New sve_size_bh iclass.
authorMatthew Malcomson <matthew.malcomson@arm.com>
Thu, 9 May 2019 09:29:20 +0000 (10:29 +0100)
committerMatthew Malcomson <matthew.malcomson@arm.com>
Thu, 9 May 2019 09:29:20 +0000 (10:29 +0100)
Add new iclass sve_size_bh to handle instructions that have two variants
encoded with the SVE_sz field.
This iclass behaves the same as the sve_size_sd iclass, but it has a
nicer name for those instructions that choose between variants using the
"B" and "H" size qualifiers.

include/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

* opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.

opcodes/ChangeLog:

2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>

* aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
sve_size_bh iclass encode.
* aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
sve_size_bh iclass decode.

include/ChangeLog
include/opcode/aarch64.h
opcodes/ChangeLog
opcodes/aarch64-asm.c
opcodes/aarch64-dis.c

index 3d17921d7ee7654f0156b049855955d4488c03e8..28e00bfcec8b4c102fbb4d77e6dff129ffb8153a 100644 (file)
@@ -1,3 +1,7 @@
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
+
+       * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
+
 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
        * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
index 874999303985a8af3bbf44fe2b41e7a967fa0221..0df8bddfd1ce9c8d71f9491f3d7db70066e510ce 100644 (file)
@@ -594,6 +594,7 @@ enum aarch64_insn_class
   sve_size_hsd,
   sve_size_hsd2,
   sve_size_sd,
+  sve_size_bh,
   sve_size_sd2,
   testbranch,
   cryptosm3,
index f139282c9b3200d89fde6a615788d22dcbc49080..d0f28ced24dbfda00e23ca5ac880700b68574067 100644 (file)
@@ -1,3 +1,10 @@
+2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
+
+       * aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
+       sve_size_bh iclass encode.
+       * aarch64-dis.c (aarch64_decode_variant_using_iclass): Handle
+       sve_size_bh iclass decode.
+
 2019-05-09  Matthew Malcomson  <matthew.malcomson@arm.com>
 
        * aarch64-asm.c (aarch64_encode_variant_using_iclass): Handle
index 6627b543aed9ec8b47d3e66ae5269c43e874c622..674eba5e9d31e9004ad1e71320ee2788e8c791ce 100644 (file)
@@ -1655,6 +1655,7 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
       insert_field (FLD_size, &inst->value, aarch64_get_variant (inst) + 1, 0);
       break;
 
+    case sve_size_bh:
     case sve_size_sd:
       insert_field (FLD_SVE_sz, &inst->value, aarch64_get_variant (inst), 0);
       break;
index 35576b3d2de06b608cdfeefdfbd65d34e51e2ef1..bfc47b4c1b80f672e12ead2fe89f2d33bfe8ca47 100644 (file)
@@ -2806,6 +2806,7 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst)
       variant = i - 1;
       break;
 
+    case sve_size_bh:
     case sve_size_sd:
       variant = extract_field (FLD_SVE_sz, inst->value, 0);
       break;
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