drm/i915/skl: SKL pipe misc programming
authorSatheeshakrishna M <satheeshakrishna.m@intel.com>
Tue, 8 Apr 2014 10:16:53 +0000 (15:46 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 24 Sep 2014 12:52:01 +0000 (14:52 +0200)
Pipe misc programming in gen9 is similar to BDW. Extending the BDW
implementation to gen 9.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Satheeshakrishna M <satheeshakrishna.m@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c

index 40f73fc4ce656d4cebeb9fae6fa15decb53e715e..901c035514ac06039fb33097cc184b52ae00aad9 100644 (file)
@@ -7064,7 +7064,7 @@ static void haswell_set_pipeconf(struct drm_crtc *crtc)
        I915_WRITE(GAMMA_MODE(intel_crtc->pipe), GAMMA_MODE_MODE_8BIT);
        POSTING_READ(GAMMA_MODE(intel_crtc->pipe));
 
-       if (IS_BROADWELL(dev)) {
+       if (IS_BROADWELL(dev) || INTEL_INFO(dev)->gen >= 9) {
                val = 0;
 
                switch (intel_crtc->config.pipe_bpp) {
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