Merge branch 'drm-intel-fixes' into drm-intel-next

diff --combined drivers/gpu/drm/i915/intel_dp.c
index 84bfdd1434f5c34c767bd97f4fceb10c77fc2228,2f901c05ea2ccbfc8bd43e58351ea527c8b4eda1..0feae908bb37f7bc8cbc642ea12f96a6cabf467a
--- 1/drivers/gpu/drm/i915/intel_dp.c
--- 2/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@@ -179,14 -179,12 +179,14 @@@ intel_dp_link_clock(uint8_t link_bw
  static int
  intel_dp_link_required(struct drm_device *dev, struct intel_dp *intel_dp, int pixel_clock)
  {
 -      struct drm_i915_private *dev_priv = dev->dev_private;
 +      struct drm_crtc *crtc = intel_dp->base.base.crtc;
 +      struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 +      int bpp = 24;
  
 -      if (is_edp(intel_dp))
 -              return (pixel_clock * dev_priv->edp.bpp + 7) / 8;
 -      else
 -              return pixel_clock * 3;
 +      if (intel_crtc)
 +              bpp = intel_crtc->bpp;
 +
 +      return (pixel_clock * bpp + 7) / 8;
  }
  
  static int
@@@ -317,9 -315,17 +317,17 @@@ intel_dp_aux_ch(struct intel_dp *intel_
        else
                precharge = 5;
  
-       if (I915_READ(ch_ctl) & DP_AUX_CH_CTL_SEND_BUSY) {
-               DRM_ERROR("dp_aux_ch not started status 0x%08x\n",
-                         I915_READ(ch_ctl));
+       /* Try to wait for any previous AUX channel activity */
+       for (try = 0; try < 3; try++) {
+               status = I915_READ(ch_ctl);
+               if ((status & DP_AUX_CH_CTL_SEND_BUSY) == 0)
+                       break;
+               msleep(1);
+       }
+ 
+       if (try == 3) {
+               WARN(1, "dp_aux_ch not started status 0x%08x\n",
+                    I915_READ(ch_ctl));
                return -EBUSY;
        }
  
@@@ -684,7 -690,7 +692,7 @@@ intel_dp_set_m_n(struct drm_crtc *crtc
        struct drm_encoder *encoder;
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 -      int lane_count = 4, bpp = 24;
 +      int lane_count = 4;
        struct intel_dp_m_n m_n;
        int pipe = intel_crtc->pipe;
  
@@@ -703,6 -709,7 +711,6 @@@
                        break;
                } else if (is_edp(intel_dp)) {
                        lane_count = dev_priv->edp.lanes;
 -                      bpp = dev_priv->edp.bpp;
                        break;
                }
        }
@@@ -712,7 -719,7 +720,7 @@@
         * the number of bytes_per_pixel post-LUT, which we always
         * set up for 8-bits of R/G/B, or 3 bytes total.
         */
 -      intel_dp_compute_m_n(bpp, lane_count,
 +      intel_dp_compute_m_n(intel_crtc->bpp, lane_count,
                             mode->clock, adjusted_mode->clock, &m_n);
  
        if (HAS_PCH_SPLIT(dev)) {
@@@ -1690,7 -1697,6 +1698,6 @@@ intel_dp_detect(struct drm_connector *c
        struct edid *edid = NULL;
  
        intel_dp->has_audio = false;
-       memset(intel_dp->dpcd, 0, sizeof(intel_dp->dpcd));
  
        if (HAS_PCH_SPLIT(dev))
                status = ironlake_dp_detect(intel_dp);