ARM: shmobile: r8a7778: add support HSPI clock
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tue, 4 Jun 2013 05:11:24 +0000 (22:11 -0700)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 11 Jun 2013 08:32:22 +0000 (17:32 +0900)
This patch adds r8a7778 HSPI clock support.
It also adds shyway_clk which is requiested
from sh-hspi driver

Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/mach-shmobile/clock-r8a7778.c

index 1386c59b8e3155eecffce71f12f05f5ead79e32b..c2c1895b9846638037b2bcaa275a4462454d50d2 100644 (file)
@@ -108,6 +108,7 @@ enum {
        MSTP030,
        MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
        MSTP016, MSTP015,
+       MSTP007,
        MSTP_NR };
 
 static struct clk mstp_clks[MSTP_NR] = {
@@ -127,10 +128,12 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
        [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
        [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
+       [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0,  7, 0), /* HSPI */
 };
 
 static struct clk_lookup lookups[] = {
        /* main */
+       CLKDEV_CON_ID("shyway_clk",     &s_clk),
        CLKDEV_CON_ID("peripheral_clk", &p_clk),
 
        /* MSTP32 clocks */
@@ -150,6 +153,9 @@ static struct clk_lookup lookups[] = {
        CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
        CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
        CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
+       CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
+       CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
+       CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
 };
 
 void __init r8a7778_clock_init(void)
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