ARM i.MX53 enable sdhc support on EVK board
authorYong Shen <yong.shen@freescale.com>
Fri, 7 Jan 2011 04:25:34 +0000 (12:25 +0800)
committerSascha Hauer <s.hauer@pengutronix.de>
Fri, 7 Jan 2011 14:20:53 +0000 (15:20 +0100)
1. changes some register address to fit macro definition
2. add platform data and clock for sdhc

Signed-off-by: Yong Shen <yong.shen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
arch/arm/mach-mx5/Kconfig
arch/arm/mach-mx5/board-mx53_evk.c
arch/arm/mach-mx5/clock-mx51-mx53.c
arch/arm/mach-mx5/devices-imx53.h
arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
arch/arm/plat-mxc/include/mach/mx53.h

index 632d711f1925a53b15996a698ce1933504b8a4e7..23b0e3f5cad7a72308d7118fdffcb99f5881efef 100644 (file)
@@ -125,6 +125,7 @@ config MACH_MX53_EVK
        select SOC_IMX53
        select IMX_HAVE_PLATFORM_IMX_UART
        select IMX_HAVE_PLATFORM_IMX_I2C
+       select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
        help
          Include support for MX53 EVK platform. This includes specific
          configurations for the board and its peripherals.
index d0b4570f44eec30046b6868e80da61bda1fc23ae..4043451798dbd992ddad6d1b09e71ba8f38c6822 100644 (file)
@@ -99,6 +99,9 @@ static void __init mx53_evk_board_init(void)
 
        imx53_add_imx_i2c(0, &mx53_evk_i2c_data);
        imx53_add_imx_i2c(1, &mx53_evk_i2c_data);
+
+       imx53_add_sdhci_esdhc_imx(0, NULL);
+       imx53_add_sdhci_esdhc_imx(1, NULL);
 }
 
 static void __init mx53_evk_timer_init(void)
index 0ade3c4cc6c545b791e0f4f2fd3cf0deb1d5ccfa..15fa89ed5d0cfec639c566497f2b9e9f3466d73c 100644 (file)
@@ -1328,6 +1328,8 @@ static struct clk_lookup mx53_lookups[] = {
        _REGISTER_CLOCK(NULL, "iim_clk", iim_clk)
        _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk)
        _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk)
+       _REGISTER_CLOCK("sdhci-esdhc-imx.0", NULL, esdhc1_clk)
+       _REGISTER_CLOCK("sdhci-esdhc-imx.1", NULL, esdhc2_clk)
 };
 
 static void clk_tree_init(void)
index ca1232bcedebdd8ab16a75560cf83fe6f9b66576..f7c89ef2f6671f37e3d59e1e7573c5dad68a707a 100644 (file)
@@ -20,3 +20,8 @@ extern const struct imx_imx_uart_1irq_data imx53_imx_uart_data[] __initconst;
 extern const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst;
 #define imx53_add_imx_i2c(id, pdata)   \
        imx_add_imx_i2c(&imx53_imx_i2c_data[id], pdata)
+
+extern const struct imx_sdhci_esdhc_imx_data
+imx53_sdhci_esdhc_imx_data[] __initconst;
+#define imx53_add_sdhci_esdhc_imx(id, pdata)   \
+       imx_add_sdhci_esdhc_imx(&imx53_sdhci_esdhc_imx_data[id], pdata)
index b3525648a01d9ba4556555246224ec2f8b09cb32..6b2940b93d943a416361202dee46dcca92d40567 100644 (file)
@@ -53,6 +53,18 @@ imx51_sdhci_esdhc_imx_data[] __initconst = {
 };
 #endif /* ifdef CONFIG_SOC_IMX51 */
 
+#ifdef CONFIG_SOC_IMX53
+const struct imx_sdhci_esdhc_imx_data
+imx53_sdhci_esdhc_imx_data[] __initconst = {
+#define imx53_sdhci_esdhc_imx_data_entry(_id, _hwid)                   \
+       imx_sdhci_esdhc_imx_data_entry(MX53, _id, _hwid)
+       imx53_sdhci_esdhc_imx_data_entry(0, 1),
+       imx53_sdhci_esdhc_imx_data_entry(1, 2),
+       imx53_sdhci_esdhc_imx_data_entry(2, 3),
+       imx53_sdhci_esdhc_imx_data_entry(3, 4),
+};
+#endif /* ifdef CONFIG_SOC_IMX53 */
+
 struct platform_device *__init imx_add_sdhci_esdhc_imx(
                const struct imx_sdhci_esdhc_imx_data *data,
                const struct esdhc_platform_data *pdata)
index a35e0c79bf238efc7a2839e8d33267f26725a80c..340937f94e6f2a4bf35d848f3bf0366e36399b8c 100644 (file)
 #define MX53_SPBA0_BASE_ADDR           0x50000000
 #define MX53_SPBA0_SIZE                SZ_1M
 
-#define MX53_MMC_SDHC1_BASE_ADDR       (MX53_SPBA0_BASE_ADDR + 0x00004000)
-#define MX53_MMC_SDHC2_BASE_ADDR       (MX53_SPBA0_BASE_ADDR + 0x00008000)
+#define MX53_ESDHC1_BASE_ADDR  (MX53_SPBA0_BASE_ADDR + 0x00004000)
+#define MX53_ESDHC2_BASE_ADDR  (MX53_SPBA0_BASE_ADDR + 0x00008000)
 #define MX53_UART3_BASE_ADDR           (MX53_SPBA0_BASE_ADDR + 0x0000C000)
 #define MX53_CSPI1_BASE_ADDR           (MX53_SPBA0_BASE_ADDR + 0x00010000)
 #define MX53_SSI2_BASE_ADDR            (MX53_SPBA0_BASE_ADDR + 0x00014000)
-#define MX53_MMC_SDHC3_BASE_ADDR       (MX53_SPBA0_BASE_ADDR + 0x00020000)
-#define MX53_MMC_SDHC4_BASE_ADDR       (MX53_SPBA0_BASE_ADDR + 0x00024000)
+#define MX53_ESDHC3_BASE_ADDR  (MX53_SPBA0_BASE_ADDR + 0x00020000)
+#define MX53_ESDHC4_BASE_ADDR  (MX53_SPBA0_BASE_ADDR + 0x00024000)
 #define MX53_SPDIF_BASE_ADDR           (MX53_SPBA0_BASE_ADDR + 0x00028000)
 #define MX53_ASRC_BASE_ADDR            (MX53_SPBA0_BASE_ADDR + 0x0002C000)
 #define MX53_ATA_DMA_BASE_ADDR (MX53_SPBA0_BASE_ADDR + 0x00030000)
  * Interrupt numbers
  */
 #define MX53_INT_RESV0         0
-#define MX53_INT_MMC_SDHC1     1
-#define MX53_INT_MMC_SDHC2     2
-#define MX53_INT_MMC_SDHC3     3
-#define MX53_INT_MMC_SDHC4     4
+#define MX53_INT_ESDHC1        1
+#define MX53_INT_ESDHC2        2
+#define MX53_INT_ESDHC3        3
+#define MX53_INT_ESDHC4        4
 #define MX53_INT_RESV5 5
 #define MX53_INT_SDMA  6
 #define MX53_INT_IOMUX 7
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