devicetree:bindings: add devicetree bindings for Freescale AHCI
authorTang Yuantian <Yuantian.Tang@freescale.com>
Mon, 7 Sep 2015 08:23:15 +0000 (16:23 +0800)
committerTejun Heo <tj@kernel.org>
Tue, 8 Sep 2015 16:30:06 +0000 (12:30 -0400)
adds bindings for Freescale QorIQ AHCI SATA controller.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
new file mode 100644 (file)
index 0000000..b614e3b
--- /dev/null
@@ -0,0 +1,21 @@
+Binding for Freescale QorIQ AHCI SATA Controller
+
+Required properties:
+  - reg: Physical base address and size of the controller's register area.
+  - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where
+    chip could be ls1021a, ls2085a, ls1043a etc.
+  - clocks: Input clock specifier. Refer to common clock bindings.
+  - interrupts: Interrupt specifier. Refer to interrupt binding.
+
+Optional properties:
+  - dma-coherent: Enable ACHI coherency DMA operation.
+  - reg-names: register area names when there are more then 1 regster area.
+
+Examples:
+       sata@3200000 {
+               compatible = "fsl,ls1021a-ahci";
+               reg = <0x0 0x3200000 0x0 0x10000>;
+               interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&platform_clk 1>;
+               dma-coherent;
+       };
This page took 0.024928 seconds and 5 git commands to generate.