ARM: dts: imx6qdl-sabrelite: move USDHC3 CD/WP to pinctrl_usdhc3

This patch moves pin SD3_DAT5/4 (CD/WP) from pinctrl_hog to pinctrl_usdhc3.
It also explicitly sets the pad SD3_DAT5 to 0x1b0b0, which is also the value
that it has before this patch if using mainline u-boot.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index d5629a50fc06d999033601c1c463885bfd71bec4..b4646c46f02ddefb048c9117081f5635f2be3058 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -117,8 +117,6 @@
                                MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x80000000
                                MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x80000000
                                MX6QDL_PAD_EIM_D23__GPIO3_IO23  0x80000000
-                               MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
-                               MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
                                MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x80000000
                        >;
                };
@@ -196,6 +194,8 @@
                                MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
                                MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
                                MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
+                               MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
+                               MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
                        >;
                };