* mn10300-opc.c (mn10300_opcodes): Demand parens around

        register argument is calls and jmp instructions.
Found trying to build libgcc2 for the mn10300 :-)

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7b4bf58e2e99eae13a46b7c9ea8c20385981b44b..88315b9708a56682b838321a6629b02d1ae7e19e 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,13 @@
+Fri Nov 15 13:43:19 1996  Jeffrey A Law  (law@cygnus.com)
+
+       * mn10300-opc.c (mn10300_opcodes): Demand parens around
+       register argument is calls and jmp instructions.
+
+Thu Nov  7 00:26:05 1996  Jeffrey A Law  (law@cygnus.com)
+
+       * mn10300-opc.c (mn10300_opcodes): Use DN01 for putx and
+       getx operand.  Fix opcode for mulqu imm,dn.
+
 Wed Nov  6 13:42:32 1996  Jeffrey A Law  (law@cygnus.com)
 
        * mn10300-opc.c (mn10300_operands): Hijack "bits" field

diff --git a/opcodes/mn10300-opc.c b/opcodes/mn10300-opc.c
index 89714f5f9f66b45e1d429a654be1d6bc81c7dbae..cebceac184b592fb67e837a5135d61248456cd0d 100644 (file)
--- a/opcodes/mn10300-opc.c
+++ b/opcodes/mn10300-opc.c
@@ -402,13 +402,13 @@ const struct mn10300_opcode mn10300_opcodes[] = {
 { "lcc",       0xd6,           0xff,           FMT_S0, {UNUSED}},
 { "setlb",     0xdb,           0xff,           FMT_S0, {UNUSED}},
 
-{ "jmp",       0xf0f4,         0xfffc,         FMT_D0, {AN0}},
+{ "jmp",       0xf0f4,         0xfffc,         FMT_D0, {PAREN,AN0,PAREN}},
 { "jmp",       0xcc0000,       0xff0000,       FMT_S2, {IMM16}},
 { "jmp",       0xdc000000,     0xff000000,     FMT_S4, {IMM32_HIGH24}},
 { "call",      0xcd000000,     0xff000000,     FMT_S4, {D16_SHIFT,IMM8,IMM8E}},
 { "call",      0xdd000000,     0xff000000,     FMT_S6,
                                        {IMM32_HIGH24_LOWSHIFT16,IMM8E_SHIFT8,IMM8E}},
-{ "calls",     0xf0f0,         0xfffc,         FMT_D0, {AN0}},
+{ "calls",     0xf0f0,         0xfffc,         FMT_D0, {PAREN,AN0,PAREN}},
 { "calls",     0xfaff0000,     0xffff0000,     FMT_D2, {IMM16}},
 { "calls",     0xfcff0000,     0xffff0000,     FMT_D4, {IMM32}},