aarc64-linux-nat: Use ptid from regcache instead of inferior_ptid

gdb/ChangeLog:

	* aarch64-linux-nat.c (fetch_gregs_from_thread,
	store_gregs_to_thread, fetch_fpregs_from_thread,
	store_fpregs_to_thread): Use regcache->ptid instead of
	inferior_ptid.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 6f25b87fcafadf73b385cb658d8426396c29c73d..ea293a4e8c4663669136e013bac17d72bf7fa39c 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,10 @@
+2017-03-13  Simon Marchi  <simon.marchi@polymtl.ca>
+
+       * aarch64-linux-nat.c (fetch_gregs_from_thread,
+       store_gregs_to_thread, fetch_fpregs_from_thread,
+       store_fpregs_to_thread): Use regcache->ptid instead of
+       inferior_ptid.
+
 2017-03-13  Simon Marchi  <simon.marchi@polymtl.ca>
 
        * amd64-linux-nat.c (amd64_linux_fetch_inferior_registers,

diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c
index 0d472e2e53a31a6ac8dcd16374e206a2b7eca65d..3f5b30eaeb2b01021841d8d4ddc541c5c2b574b0 100644 (file)
--- a/gdb/aarch64-linux-nat.c
+++ b/gdb/aarch64-linux-nat.c
@@ -163,7 +163,7 @@ fetch_gregs_from_thread (struct regcache *regcache)
      and arm.  */
   gdb_static_assert (sizeof (regs) >= 18 * 4);
 
-  tid = ptid_get_lwp (inferior_ptid);
+  tid = ptid_get_lwp (regcache_get_ptid (regcache));
 
   iovec.iov_base = &regs;
   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
@@ -200,7 +200,7 @@ store_gregs_to_thread (const struct regcache *regcache)
   /* Make sure REGS can hold all registers contents on both aarch64
      and arm.  */
   gdb_static_assert (sizeof (regs) >= 18 * 4);
-  tid = ptid_get_lwp (inferior_ptid);
+  tid = ptid_get_lwp (regcache_get_ptid (regcache));
 
   iovec.iov_base = &regs;
   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
@@ -244,7 +244,7 @@ fetch_fpregs_from_thread (struct regcache *regcache)
      and arm.  */
   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 
-  tid = ptid_get_lwp (inferior_ptid);
+  tid = ptid_get_lwp (regcache_get_ptid (regcache));
 
   iovec.iov_base = &regs;
 
@@ -291,7 +291,7 @@ store_fpregs_to_thread (const struct regcache *regcache)
   /* Make sure REGS can hold all VFP registers contents on both aarch64
      and arm.  */
   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
-  tid = ptid_get_lwp (inferior_ptid);
+  tid = ptid_get_lwp (regcache_get_ptid (regcache));
 
   iovec.iov_base = &regs;