drm/radeon: add pcie set/get lanes callbacks for newer asics

Uses the same functions as older asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 19bf122a9d6ff41f55f21ee2059b6dcd97dfe530..48d020057100dd8378e65a153230a52b1357c022 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1468,8 +1468,8 @@ static struct radeon_asic btc_asic = {
                .set_engine_clock = &radeon_atom_set_engine_clock,
                .get_memory_clock = &radeon_atom_get_memory_clock,
                .set_memory_clock = &radeon_atom_set_memory_clock,
-               .get_pcie_lanes = NULL,
-               .set_pcie_lanes = NULL,
+               .get_pcie_lanes = &r600_get_pcie_lanes,
+               .set_pcie_lanes = &r600_set_pcie_lanes,
                .set_clock_gating = NULL,
                .set_uvd_clocks = &evergreen_set_uvd_clocks,
        },
@@ -1607,8 +1607,8 @@ static struct radeon_asic cayman_asic = {
                .set_engine_clock = &radeon_atom_set_engine_clock,
                .get_memory_clock = &radeon_atom_get_memory_clock,
                .set_memory_clock = &radeon_atom_set_memory_clock,
-               .get_pcie_lanes = NULL,
-               .set_pcie_lanes = NULL,
+               .get_pcie_lanes = &r600_get_pcie_lanes,
+               .set_pcie_lanes = &r600_set_pcie_lanes,
                .set_clock_gating = NULL,
                .set_uvd_clocks = &evergreen_set_uvd_clocks,
        },
@@ -1885,8 +1885,8 @@ static struct radeon_asic si_asic = {
                .set_engine_clock = &radeon_atom_set_engine_clock,
                .get_memory_clock = &radeon_atom_get_memory_clock,
                .set_memory_clock = &radeon_atom_set_memory_clock,
-               .get_pcie_lanes = NULL,
-               .set_pcie_lanes = NULL,
+               .get_pcie_lanes = &r600_get_pcie_lanes,
+               .set_pcie_lanes = &r600_set_pcie_lanes,
                .set_clock_gating = NULL,
                .set_uvd_clocks = &si_set_uvd_clocks,
        },