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clocksource/drivers/tegra: Fix IO endianness
author
Dmitry Osipenko
<digetx@gmail.com>
Mon, 30 Mar 2015 20:17:11 +0000
(22:17 +0200)
committer
Ingo Molnar
<mingo@kernel.org>
Tue, 31 Mar 2015 07:15:58 +0000
(09:15 +0200)
Support big-endian kernel by using endian-aware register access
functions.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Cc: ben.dooks@codethink.co.uk
Cc: hdegoede@redhat.com
Cc: laurent.pinchart+renesas@ideasonboard.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: maxime.ripard@free-electrons.com
Cc: viresh.kumar@linaro.org
Link:
http://lkml.kernel.org/r/1427746633-9137-9-git-send-email-daniel.lezcano@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
drivers/clocksource/tegra20_timer.c
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diff --git
a/drivers/clocksource/tegra20_timer.c
b/drivers/clocksource/tegra20_timer.c
index d2616ef167701526a13efe7ef896f3cca2c8668a..d8a3a4eb9f977961d9e8282422d7aa328c445057 100644
(file)
--- a/
drivers/clocksource/tegra20_timer.c
+++ b/
drivers/clocksource/tegra20_timer.c
@@
-57,9
+57,9
@@
static u64 persistent_ms, last_persistent_ms;
static struct delay_timer tegra_delay_timer;
#define timer_writel(value, reg) \
-
__raw_writel
(value, timer_reg_base + (reg))
+
writel_relaxed
(value, timer_reg_base + (reg))
#define timer_readl(reg) \
-
__raw_readl
(timer_reg_base + (reg))
+
readl_relaxed
(timer_reg_base + (reg))
static int tegra_timer_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
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