x86-64: Always display suffix for %LQ in 64bit
authorH.J. Lu <hjl.tools@gmail.com>
Mon, 5 Oct 2020 12:27:58 +0000 (05:27 -0700)
committerH.J. Lu <hjl.tools@gmail.com>
Mon, 5 Oct 2020 12:28:12 +0000 (05:28 -0700)
In 64bit, assembler generates a warning for "sysret":

$ echo sysret | as --64 -o x.o -
{standard input}: Assembler messages:
{standard input}:1: Warning: no instruction mnemonic suffix given and no register operands; using default for `sysret'

Always display suffix for %LQ in 64bit to display "sysretl".

gas/

PR binutils/26704
* testsuite/gas/i386/noreg64-data16.d: Expect sysretl instead of
sysret.
* testsuite/gas/i386/noreg64.d: Likewise.
* testsuite/gas/i386/x86-64-intel64.d: Likewise.
* testsuite/gas/i386/x86-64-opcode.d: Likewise.

opcodes/

PR binutils/26704
* i386-dis.c (putop): Always display suffix for %LQ in 64bit.

gas/ChangeLog
gas/testsuite/gas/i386/noreg64-data16.d
gas/testsuite/gas/i386/noreg64.d
gas/testsuite/gas/i386/x86-64-intel64.d
gas/testsuite/gas/i386/x86-64-opcode.d
opcodes/ChangeLog
opcodes/i386-dis.c

index ae5a614543fe54a5e7b34d27ef9e55d96f0d6f0e..bd0834016b95e9713e51e4a895858fa0a4ffba61 100644 (file)
@@ -1,3 +1,12 @@
+2020-10-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/26704
+       * testsuite/gas/i386/noreg64-data16.d: Expect sysretl instead of
+       sysret.
+       * testsuite/gas/i386/noreg64.d: Likewise.
+       * testsuite/gas/i386/x86-64-intel64.d: Likewise.
+       * testsuite/gas/i386/x86-64-opcode.d: Likewise.
+
 2020-10-05  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR binutils/26705
index 81afa9f1439cee45393900337da95e87ba15089f..881043df61e48aca86e009b338909029df5529ae 100644 (file)
@@ -150,7 +150,7 @@ Disassembly of section .text:
  *[a-f0-9]+:   66 81 28 89 00          subw   \$0x89,\(%rax\)
  *[a-f0-9]+:   66 81 28 34 12          subw   \$0x1234,\(%rax\)
  *[a-f0-9]+:   66 81 28 78 56          subw   \$0x5678,\(%rax\)
- *[a-f0-9]+:   66 0f 07                data16 sysret *
+ *[a-f0-9]+:   66 0f 07                data16 sysretl *
  *[a-f0-9]+:   66 f7 00 89 00          testw  \$0x89,\(%rax\)
  *[a-f0-9]+:   66 f7 00 34 12          testw  \$0x1234,\(%rax\)
  *[a-f0-9]+:   66 f7 00 78 56          testw  \$0x5678,\(%rax\)
index 33457049df4675fb1908a49b96d8eca2659cffc6..6cc461f485b0337a3b7cabc4fda47a86c80709f7 100644 (file)
@@ -151,7 +151,7 @@ Disassembly of section .text:
  *[a-f0-9]+:   81 28 89 00 00 00       subl   \$0x89,\(%rax\)
  *[a-f0-9]+:   81 28 34 12 00 00       subl   \$0x1234,\(%rax\)
  *[a-f0-9]+:   81 28 78 56 34 12       subl   \$0x12345678,\(%rax\)
- *[a-f0-9]+:   0f 07                   sysret *
+ *[a-f0-9]+:   0f 07                   sysretl *
  *[a-f0-9]+:   f7 00 89 00 00 00       testl  \$0x89,\(%rax\)
  *[a-f0-9]+:   f7 00 34 12 00 00       testl  \$0x1234,\(%rax\)
  *[a-f0-9]+:   f7 00 78 56 34 12       testl  \$0x12345678,\(%rax\)
index 10c820f8dd2bfa21b291e9a2d5d985efbdae01e1..496e2e50fabc7cdb004274729bdb667613131abb 100644 (file)
@@ -15,7 +15,7 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    48 ff 18                rex\.W lcall \*\(%rax\)
 [      ]*[a-f0-9]+:    48 ff 29                rex\.W ljmp \*\(%rcx\)
 [      ]*[a-f0-9]+:    0f 05                   syscall 
-[      ]*[a-f0-9]+:    0f 07                   sysret 
+[      ]*[a-f0-9]+:    0f 07                   sysretl 
 [      ]*[a-f0-9]+:    48 0f 07                sysretq *
 [      ]*[a-f0-9]+:    48 0f b4 01             lfs    \(%rcx\),%rax
 [      ]*[a-f0-9]+:    48 0f b4 01             lfs    \(%rcx\),%rax
index 10cde8163860659cdfdb179ab483727e32189f67..ab55d2ca35064dc2a7b4ae96be1db813faa45be9 100644 (file)
@@ -321,7 +321,7 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 0f 00 c8             str    %ax
 [      ]*[a-f0-9]+:    0f 00 08                str    \(%rax\)
 [      ]*[a-f0-9]+:    0f 05                   syscall 
-[      ]*[a-f0-9]+:    0f 07                   sysret 
+[      ]*[a-f0-9]+:    0f 07                   sysretl 
 [      ]*[a-f0-9]+:    48 0f 07                sysretq *
 [      ]*[a-f0-9]+:    0f 01 f8                swapgs 
 [      ]*[a-f0-9]+:    66 68 22 22             pushw  \$0x2222
index f1b427318d5de0d3608d1d3eb771b74e490bc7ce..3c74fbf3d870be9fe33718b8e14024ede66c9353 100644 (file)
@@ -1,3 +1,8 @@
+2020-10-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR binutils/26704
+       * i386-dis.c (putop): Always display suffix for %LQ in 64bit.
+
 2020-10-05  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR binutils/26705
index f4f35bc8f1a862d79198e7d686d5cc8d55312ef2..4d8f4f4cc2bd6c6532bc43c0145f78a25f337cf4 100644 (file)
@@ -10870,7 +10870,7 @@ putop (const char *in_template, int sizeflag)
                  USED_REX (REX_W);
                  *obufp++ = 'q';
                }
-             else if((address_mode == mode_64bit && need_modrm && cond)
+             else if((address_mode == mode_64bit && cond)
                      || (sizeflag & SUFFIX_ALWAYS))
                *obufp++ = intel_syntax? 'd' : 'l';
            }
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