ARM: tegra: add common resume handling code for LP1 resuming

Add support to the Tegra CPU reset vector to detect whether the CPU is
resuming from LP1 suspend state. If it is, branch to the LP1-specific
resume code.

When Tegra enters the LP1 suspend state, the SDRAM controller is placed
into a self-refresh state. For this reason, we must place the LP1 resume
code into IRAM, so that it is accessible before SDRAM access has been
re-enabled.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h
index 399fbca271027e6e77e4e61a02d0ceae35912571..f2bdcb4eac94653819be84e09584c582e1f181ac 100644 (file)
--- a/arch/arm/mach-tegra/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -24,6 +24,8 @@
 #define TEGRA_IRAM_BASE                        0x40000000
 #define TEGRA_IRAM_SIZE                        SZ_256K
 
+#define TEGRA_IRAM_CODE_AREA           (TEGRA_IRAM_BASE + SZ_4K)
+
 #define TEGRA_HOST1X_BASE              0x50000000
 #define TEGRA_HOST1X_SIZE              0x24000
 

diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
index 34614bdf3f5b0167592308a103bd8348711ca9b3..f527b2c2dea779be4f8f26d654e14ba3282369ee 100644 (file)
--- a/arch/arm/mach-tegra/reset-handler.S
+++ b/arch/arm/mach-tegra/reset-handler.S
@@ -182,6 +182,19 @@ after_errata:
 1:
 #endif
 
+       /* Waking up from LP1? */
+       ldr     r8, [r12, #RESET_DATA(MASK_LP1)]
+       tst     r8, r11                         @ if in_lp1
+       beq     __is_not_lp1
+       cmp     r10, #0
+       bne     __die                           @ only CPU0 can be here
+       ldr     lr, [r12, #RESET_DATA(STARTUP_LP1)]
+       cmp     lr, #0
+       bleq    __die                           @ no LP1 startup handler
+ THUMB(        add     lr, lr, #1 )                    @ switch to Thumb mode
+       bx      lr
+__is_not_lp1:
+
        /* Waking up from LP2? */
        ldr     r9, [r12, #RESET_DATA(MASK_LP2)]
        tst     r9, r11                         @ if in_lp2

diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index 1ac434e0068fc3773c0b9efce025837317719ef0..fd0bbf8a6c948494efaa497facc51f15aaba8f5f 100644 (file)
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -81,6 +81,8 @@ void __init tegra_cpu_reset_handler_init(void)
 #endif
 
 #ifdef CONFIG_PM_SLEEP
+       __tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP1] =
+               TEGRA_IRAM_CODE_AREA;
        __tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP2] =
                virt_to_phys((void *)tegra_resume);
 #endif