clk: vt8500: Remove unnecessary divisor adjustment in vtwm_dclk_set_rate()

The divisor adjustment code to ensure that a divisor is not rounded down,
thereby giving a rate higher than requested, is unnecessary and in some
instances results in the actual rate being much lower than requested due to
rounding errors.

The test is already performed in vtwm_dclk_round_rate(), which is always
called when clk_set_rate is called. Due to rounding errors in the line:
divisor = parent_rate / rate (clk-vt8500.c:160) we will sometimes end up
adjusting the divisor twice - first in round_rate and then again in set_rate.

This patch removes the test/adjustment in vtwm_dclk_set_rate.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c
index 6d5b6e901b96752279a086e92cdf0625e3668e49..d8fd085719bf101558eadf06ae15b044485f06b7 100644 (file)
--- a/drivers/clk/clk-vt8500.c
+++ b/drivers/clk/clk-vt8500.c
@@ -157,10 +157,6 @@ static int vt8500_dclk_set_rate(struct clk_hw *hw, unsigned long rate,
 
        divisor =  parent_rate / rate;
 
-       /* If prate / rate would be decimal, incr the divisor */
-       if (rate * divisor < parent_rate)
-               divisor++;
-
        if (divisor == cdev->div_mask + 1)
                divisor = 0;