Merge tag 'sunxi-fixes-for-3.15' of https://github.com/mripard/linux into fixes
authorOlof Johansson <olof@lixom.net>
Sun, 11 May 2014 03:25:07 +0000 (20:25 -0700)
committerOlof Johansson <olof@lixom.net>
Sun, 11 May 2014 03:25:07 +0000 (20:25 -0700)
Merge 'Allwinner fixes for 3.15' from Maxime Ripard:

Set of fixes for the Allwinner support for 3.15

Some minor things, the major thing being the enabling of the GMAC driver in
sunxi_defconfig that will un-break Olof's autobooters.

* tag 'sunxi-fixes-for-3.15' of https://github.com/mripard/linux:
  ARM: sunxi: Enable GMAC in sunxi_defconfig
  ARM: sun7i: Fix i2c4 base address
  ARM: sun7i: fix PLL4 clock and add PLL8

Signed-off-by: Olof Johansson <olof@lixom.net>
arch/arm/boot/dts/sun7i-a20.dtsi
arch/arm/configs/sunxi_defconfig

index 32efc105df834de3c3143938bf0cfdebbf5d1b55..aba1c8a3f3883320a50b31dcac05341568e0a335 100644 (file)
@@ -87,7 +87,7 @@
 
                pll4: clk@01c20018 {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-pll1-clk";
+                       compatible = "allwinner,sun7i-a20-pll4-clk";
                        reg = <0x01c20018 0x4>;
                        clocks = <&osc24M>;
                        clock-output-names = "pll4";
                        clock-output-names = "pll6_sata", "pll6_other", "pll6";
                };
 
+               pll8: clk@01c20040 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun7i-a20-pll4-clk";
+                       reg = <0x01c20040 0x4>;
+                       clocks = <&osc24M>;
+                       clock-output-names = "pll8";
+               };
+
                cpu: cpu@01c20054 {
                        #clock-cells = <0>;
                        compatible = "allwinner,sun4i-a10-cpu-clk";
                        status = "disabled";
                };
 
-               i2c4: i2c@01c2bc00 {
+               i2c4: i2c@01c2c000 {
                        compatible = "allwinner,sun4i-i2c";
-                       reg = <0x01c2bc00 0x400>;
+                       reg = <0x01c2c000 0x400>;
                        interrupts = <0 89 4>;
                        clocks = <&apb1_gates 15>;
                        clock-frequency = <100000>;
index b5df4a511b0acdfea6df30b7dd4b9753d2b00f9a..81ba78eaf54adb02840dbc2d41cc4af8acc7c08a 100644 (file)
@@ -37,7 +37,7 @@ CONFIG_SUN4I_EMAC=y
 # CONFIG_NET_VENDOR_NATSEMI is not set
 # CONFIG_NET_VENDOR_SEEQ is not set
 # CONFIG_NET_VENDOR_SMSC is not set
-# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_STMMAC_ETH=y
 # CONFIG_NET_VENDOR_WIZNET is not set
 # CONFIG_WLAN is not set
 CONFIG_SERIAL_8250=y
This page took 0.027964 seconds and 5 git commands to generate.