select S3C_DEV_HSMMC1
select S3C_DEV_I2C1
select S3C_DEV_FB
+ select SAMSUNG_DEV_TS
select S3C_DEV_USB_HOST
select S3C_DEV_USB_HSOTG
+ select S3C_DEV_WDT
+ select HAVE_S3C2410_WATCHDOG
select S3C64XX_SETUP_SDHCI
select S3C64XX_SETUP_I2C1
select S3C64XX_SETUP_FB_24BPP
select HAVE_PWM
help
Machine support for the Airgoo HMT
+
+config MACH_SMARTQ
+ bool
+ select CPU_S3C6410
+ select S3C_DEV_HSMMC
+ select S3C_DEV_HSMMC1
+ select S3C_DEV_HSMMC2
+ select S3C_DEV_FB
+ select S3C_DEV_HWMON
+ select S3C_DEV_RTC
+ select S3C_DEV_USB_HSOTG
+ select S3C_DEV_USB_HOST
+ select S3C64XX_SETUP_SDHCI
+ select S3C64XX_SETUP_FB_24BPP
+ select SAMSUNG_DEV_ADC
+ select SAMSUNG_DEV_TS
+ select HAVE_PWM
+ help
+ Shared machine support for SmartQ 5/7
+
+config MACH_SMARTQ5
+ bool "SmartQ 5"
+ select MACH_SMARTQ
+ help
+ Machine support for the SmartQ 5
+
+config MACH_SMARTQ7
+ bool "SmartQ 7"
+ select MACH_SMARTQ
+ help
+ Machine support for the SmartQ 7
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
+#include <plat/adc.h>
+#include <plat/ts.h>
#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
&smdk6410_lcd_powerdev,
&smdk6410_smsc911x,
+ &s3c_device_adc,
+ &s3c_device_ts,
+ &s3c_device_wdt,
};
#ifdef CONFIG_REGULATOR
{ I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
};
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+ .delay = 10000,
+ .presc = 49,
+ .oversampling_shift = 2,
+};
+
static void __init smdk6410_map_io(void)
{
u32 tmp;
s3c_i2c1_set_platdata(NULL);
s3c_fb_set_platdata(&smdk6410_lcd_pdata);
+ s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
/* configure nCS1 width to 16 bits */
cs1 = __raw_readl(S3C64XX_SROM_BW) &
config MACH_SMDK6440
bool "SMDK6440"
select CPU_S5P6440
+ select SAMSUNG_DEV_TS
+ select SAMSUNG_DEV_ADC
+ select S3C_DEV_WDT
+ select HAVE_S3C2410_WATCHDOG
help
Machine support for the Samsung SMDK6440
#define S5P6440_PA_IIC0 (0xEC104000)
+#define S5P6440_PA_SPI0 0xEC400000
+#define S5P6440_PA_SPI1 0xEC500000
+
#define S5P6440_PA_HSOTG (0xED100000)
#define S5P6440_PA_HSMMC0 (0xED800000)
/* PCM */
#define S5P6440_PA_PCM 0xF2100000
+#define S5P6440_PA_ADC (0xF3000000)
+
/* compatibiltiy defines. */
#define S3C_PA_UART S5P6440_PA_UART
#define S3C_PA_IIC S5P6440_PA_IIC0
+ #define S3C_PA_WDT S5P6440_PA_WDT
+
+#define SAMSUNG_PA_ADC S5P6440_PA_ADC
+
#endif /* __ASM_ARCH_MAP_H */
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/pll.h>
+#include <plat/adc.h>
+#include <plat/ts.h>
#define S5P6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
S3C2410_UCON_RXILEVEL | \
static struct platform_device *smdk6440_devices[] __initdata = {
&s5p6440_device_iis,
+ &s3c_device_adc,
+ &s3c_device_ts,
+ &s3c_device_wdt,
};
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+ .delay = 10000,
+ .presc = 49,
+ .oversampling_shift = 2,
+};
+
static void __init smdk6440_map_io(void)
{
s5p_init_io(NULL, 0, S5P_SYS_ID);
static void __init smdk6440_machine_init(void)
{
+ s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
}
bool
select PLAT_S5P
select S3C_PL330_DMA
+ select S5P_EXT_INT
help
Enable S5PV210 CPU support
-choice
- prompt "Select machine type"
- depends on ARCH_S5PV210
- default MACH_SMDKV210
+config S5PV210_SETUP_I2C1
+ bool
+ help
+ Common setup code for i2c bus 1.
+
+config S5PV210_SETUP_I2C2
+ bool
+ help
+ Common setup code for i2c bus 2.
+
+config S5PV210_SETUP_FB_24BPP
+ bool
+ help
+ Common setup code for S5PV210 with an 24bpp RGB display helper.
+
+config S5PV210_SETUP_SDHCI
+ bool
+ select S5PV210_SETUP_SDHCI_GPIO
+ help
+ Internal helper functions for S5PV210 based SDHCI systems
+
+config S5PV210_SETUP_SDHCI_GPIO
+ bool
+ help
+ Common setup code for SDHCI gpio.
+
+# machine support
+
+config MACH_AQUILA
+ bool "Samsung Aquila"
+ select CPU_S5PV210
+ select ARCH_SPARSEMEM_ENABLE
+ select S5PV210_SETUP_FB_24BPP
+ select S3C_DEV_FB
+ help
+ Machine support for the Samsung Aquila target based on S5PC110 SoC
+
+config MACH_GONI
+ bool "GONI"
+ select CPU_S5PV210
+ select ARCH_SPARSEMEM_ENABLE
+ help
+ Machine support for Samsung GONI board
+ S5PC110(MCP) is one of package option of S5PV210
config MACH_SMDKV210
bool "SMDKV210"
select CPU_S5PV210
select ARCH_SPARSEMEM_ENABLE
+ select SAMSUNG_DEV_ADC
+ select SAMSUNG_DEV_TS
+ select S3C_DEV_WDT
+ select HAVE_S3C2410_WATCHDOG
help
Machine support for Samsung SMDKV210
bool "SMDKC110"
select CPU_S5PV210
select ARCH_SPARSEMEM_ENABLE
+ select S3C_DEV_WDT
+ select HAVE_S3C2410_WATCHDOG
help
Machine support for Samsung SMDKC110
S5PC110(MCP) is one of package option of S5PV210
-endchoice
-
endif
#define S5PV210_PA_GPIO (0xE0200000)
#define S5P_PA_GPIO S5PV210_PA_GPIO
+/* SPI */
+#define S5PV210_PA_SPI0 0xE1300000
+#define S5PV210_PA_SPI1 0xE1400000
+
#define S5PV210_PA_IIC0 (0xE1800000)
+#define S5PV210_PA_IIC1 (0xFAB00000)
+#define S5PV210_PA_IIC2 (0xE1A00000)
#define S5PV210_PA_TIMER (0xE2500000)
#define S5P_PA_TIMER S5PV210_PA_TIMER
#define S5PV210_PA_SYSTIMER (0xE2600000)
+ #define S5PV210_PA_WATCHDOG (0xE2700000)
+
#define S5PV210_PA_UART (0xE2900000)
#define S5P_PA_UART0 (S5PV210_PA_UART + 0x0)
#define S5PV210_PA_PDMA0 0xE0900000
#define S5PV210_PA_PDMA1 0xE0A00000
+#define S5PV210_PA_FB (0xF8000000)
+
+#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
+
#define S5PV210_PA_VIC0 (0xF2000000)
#define S5P_PA_VIC0 S5PV210_PA_VIC0
/* AC97 */
#define S5PV210_PA_AC97 0xE2200000
+#define S5PV210_PA_ADC (0xE1700000)
+
/* compatibiltiy defines. */
#define S3C_PA_UART S5PV210_PA_UART
+#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0)
+#define S3C_PA_HSMMC1 S5PV210_PA_HSMMC(1)
+#define S3C_PA_HSMMC2 S5PV210_PA_HSMMC(2)
#define S3C_PA_IIC S5PV210_PA_IIC0
+#define S3C_PA_IIC1 S5PV210_PA_IIC1
+#define S3C_PA_IIC2 S5PV210_PA_IIC2
+#define S3C_PA_FB S5PV210_PA_FB
+ #define S3C_PA_WDT S5PV210_PA_WATCHDOG
+#define SAMSUNG_PA_ADC S5PV210_PA_ADC
+
#endif /* __ASM_ARCH_MAP_H */
#include <plat/s5pv210.h>
#include <plat/devs.h>
#include <plat/cpu.h>
+#include <plat/adc.h>
+#include <plat/ts.h>
/* Following are default values for UCON, ULCON and UFCON UART registers */
#define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
static struct platform_device *smdkv210_devices[] __initdata = {
&s5pv210_device_iis0,
&s5pv210_device_ac97,
+ &s3c_device_adc,
+ &s3c_device_ts,
+ &s3c_device_wdt,
};
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+ .delay = 10000,
+ .presc = 49,
+ .oversampling_shift = 2,
+};
+
static void __init smdkv210_map_io(void)
{
s5p_init_io(NULL, 0, S5P_VA_CHIPID);
static void __init smdkv210_machine_init(void)
{
+ s3c24xx_ts_set_platdata(&s3c_ts_platform);
platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
}
config PLAT_SAMSUNG
bool
- depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX || ARCH_S5PC1XX
+ depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
select NO_IOPORT
default y
help
help
Compile in platform device definitions for I2C channel 1
+config S3C_DEV_I2C2
+ bool
+ help
+ Compile in platform device definitions for I2C channel 2
+
config S3C_DEV_FB
bool
help
help
Compile in platform device definition for USB high-speed OtG
+ config S3C_DEV_WDT
+ bool
+ default y if ARCH_S3C2410
+ help
+ Complie in platform device definition for Watchdog Timer
+
config S3C_DEV_NAND
bool
help
obj-$(CONFIG_S3C_DEV_HWMON) += dev-hwmon.o
obj-y += dev-i2c0.o
obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o
+obj-$(CONFIG_S3C_DEV_I2C2) += dev-i2c2.o
obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o
obj-y += dev-uart.o
obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o
obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o
+ obj-$(CONFIG_S3C_DEV_WDT) += dev-wdt.o
obj-$(CONFIG_S3C_DEV_NAND) += dev-nand.o
obj-$(CONFIG_S3C_DEV_RTC) += dev-rtc.o
projects / deliverable / linux.git / commitdiff
