usb: dwc2: Add support for Lantiq ARX and XRX SoCs
authorAntti Seppälä <a.seppala@gmail.com>
Sat, 27 Feb 2016 10:31:24 +0000 (12:31 +0200)
committerFelipe Balbi <balbi@kernel.org>
Fri, 4 Mar 2016 13:14:47 +0000 (15:14 +0200)
Add support for Lantiq ARX and XRX SoC families to the dwc2 driver.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Signed-off-by: Felipe Balbi <balbi@kernel.org>
Documentation/devicetree/bindings/usb/dwc2.txt
drivers/usb/dwc2/platform.c

index 221368207ca4c60a57794a3288244dd9307b493e..20a68bf2b4e755fb3d2679c80d77795de695e8de 100644 (file)
@@ -8,6 +8,8 @@ Required properties:
   - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
   - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
   - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
+  - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
+  - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
   - snps,dwc2: A generic DWC2 USB controller with default parameters.
 - reg : Should contain 1 register range (address and length)
 - interrupts : Should contain 1 interrupt
index bc3f2a45a2bc6e8929139b56994cce58fe56e35e..88629bed66147a4219a2f1dc36b1a0f4f556defc 100644 (file)
@@ -149,6 +149,38 @@ static const struct dwc2_core_params params_rk3066 = {
        .hibernation                    = -1,
 };
 
+static const struct dwc2_core_params params_ltq = {
+       .otg_cap                        = 2,    /* non-HNP/non-SRP */
+       .otg_ver                        = -1,
+       .dma_enable                     = -1,
+       .dma_desc_enable                = -1,
+       .dma_desc_fs_enable             = -1,
+       .speed                          = -1,
+       .enable_dynamic_fifo            = -1,
+       .en_multiple_tx_fifo            = -1,
+       .host_rx_fifo_size              = 288,  /* 288 DWORDs */
+       .host_nperio_tx_fifo_size       = 128,  /* 128 DWORDs */
+       .host_perio_tx_fifo_size        = 96,   /* 96 DWORDs */
+       .max_transfer_size              = 65535,
+       .max_packet_count               = 511,
+       .host_channels                  = -1,
+       .phy_type                       = -1,
+       .phy_utmi_width                 = -1,
+       .phy_ulpi_ddr                   = -1,
+       .phy_ulpi_ext_vbus              = -1,
+       .i2c_enable                     = -1,
+       .ulpi_fs_ls                     = -1,
+       .host_support_fs_ls_low_power   = -1,
+       .host_ls_low_power_phy_clk      = -1,
+       .ts_dline                       = -1,
+       .reload_ctl                     = -1,
+       .ahbcfg                         = GAHBCFG_HBSTLEN_INCR16 <<
+                                         GAHBCFG_HBSTLEN_SHIFT,
+       .uframe_sched                   = -1,
+       .external_id_pin_ctl            = -1,
+       .hibernation                    = -1,
+};
+
 /*
  * Check the dr_mode against the module configuration and hardware
  * capabilities.
@@ -428,6 +460,8 @@ static const struct of_device_id dwc2_of_match_table[] = {
        { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
        { .compatible = "hisilicon,hi6220-usb", .data = &params_hi6220 },
        { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
+       { .compatible = "lantiq,arx100-usb", .data = &params_ltq },
+       { .compatible = "lantiq,xrx200-usb", .data = &params_ltq },
        { .compatible = "snps,dwc2", .data = NULL },
        { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
        {},
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