writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
}
-static void ahci_phy_reset(struct ata_port *ap)
+static int ahci_stop_engine(struct ata_port *ap)
+{
+ void __iomem *mmio = ap->host_set->mmio_base;
+ void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
+ int work;
+ u32 tmp;
+
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp &= ~PORT_CMD_START;
+ writel(tmp, port_mmio + PORT_CMD);
+
+ /* wait for engine to stop. TODO: this could be
+ * as long as 500 msec
+ */
+ work = 1000;
+ while (work-- > 0) {
+ tmp = readl(port_mmio + PORT_CMD);
+ if ((tmp & PORT_CMD_LIST_ON) == 0)
+ return 0;
+ udelay(10);
+ }
+
+ return -EIO;
+}
+
+static void ahci_start_engine(struct ata_port *ap)
+{
+ void __iomem *mmio = ap->host_set->mmio_base;
+ void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
+ u32 tmp;
+
+ tmp = readl(port_mmio + PORT_CMD);
+ tmp |= PORT_CMD_START;
+ writel(tmp, port_mmio + PORT_CMD);
+ readl(port_mmio + PORT_CMD); /* flush */
+}
+
+static unsigned int ahci_dev_classify(struct ata_port *ap)
{
void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
struct ata_taskfile tf;
+ u32 tmp;
+
+ tmp = readl(port_mmio + PORT_SIG);
+ tf.lbah = (tmp >> 24) & 0xff;
+ tf.lbam = (tmp >> 16) & 0xff;
+ tf.lbal = (tmp >> 8) & 0xff;
+ tf.nsect = (tmp) & 0xff;
+
+ return ata_dev_classify(&tf);
+}
+
+static void ahci_phy_reset(struct ata_port *ap)
+{
+ void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
struct ata_device *dev = &ap->device[0];
u32 new_tmp, tmp;
if (ap->flags & ATA_FLAG_PORT_DISABLED)
return;
- tmp = readl(port_mmio + PORT_SIG);
- tf.lbah = (tmp >> 24) & 0xff;
- tf.lbam = (tmp >> 16) & 0xff;
- tf.lbal = (tmp >> 8) & 0xff;
- tf.nsect = (tmp) & 0xff;
-
- dev->class = ata_dev_classify(&tf);
+ dev->class = ahci_dev_classify(ap);
if (!ata_dev_present(dev)) {
ata_port_disable(ap);
return;
void __iomem *mmio = ap->host_set->mmio_base;
void __iomem *port_mmio = ahci_port_base(mmio, ap->port_no);
u32 tmp;
- int work;
if ((ap->device[0].class != ATA_DEV_ATAPI) ||
((irq_stat & PORT_IRQ_TF_ERR) == 0))
readl(port_mmio + PORT_SCR_ERR));
/* stop DMA */
- tmp = readl(port_mmio + PORT_CMD);
- tmp &= ~PORT_CMD_START;
- writel(tmp, port_mmio + PORT_CMD);
-
- /* wait for engine to stop. TODO: this could be
- * as long as 500 msec
- */
- work = 1000;
- while (work-- > 0) {
- tmp = readl(port_mmio + PORT_CMD);
- if ((tmp & PORT_CMD_LIST_ON) == 0)
- break;
- udelay(10);
- }
+ ahci_stop_engine(ap);
/* clear SATA phy error, if any */
tmp = readl(port_mmio + PORT_SCR_ERR);
}
/* re-start DMA */
- tmp = readl(port_mmio + PORT_CMD);
- tmp |= PORT_CMD_START;
- writel(tmp, port_mmio + PORT_CMD);
- readl(port_mmio + PORT_CMD); /* flush */
+ ahci_start_engine(ap);
}
static void ahci_eng_timeout(struct ata_port *ap)
ICH5_PCS = 0x92, /* port control and status */
PIIX_SCC = 0x0A, /* sub-class code register */
- PIIX_FLAG_AHCI = (1 << 28), /* AHCI possible */
- PIIX_FLAG_CHECKINTR = (1 << 29), /* make sure PCI INTx enabled */
- PIIX_FLAG_COMBINED = (1 << 30), /* combined mode possible */
+ PIIX_FLAG_AHCI = (1 << 27), /* AHCI possible */
+ PIIX_FLAG_CHECKINTR = (1 << 28), /* make sure PCI INTx enabled */
+ PIIX_FLAG_COMBINED = (1 << 29), /* combined mode possible */
+ /* ICH6/7 use different scheme for map value */
+ PIIX_FLAG_COMBINED_ICH6 = PIIX_FLAG_COMBINED | (1 << 30),
/* combined mode. if set, PATA is channel 0.
* if clear, PATA is channel 1.
{
.sht = &piix_sht,
.host_flags = ATA_FLAG_SATA | ATA_FLAG_SRST |
- PIIX_FLAG_COMBINED | PIIX_FLAG_CHECKINTR |
- ATA_FLAG_SLAVE_POSS,
+ PIIX_FLAG_COMBINED_ICH6 |
+ PIIX_FLAG_CHECKINTR | ATA_FLAG_SLAVE_POSS,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = 0x7f, /* udma0-6 */
{
.sht = &piix_sht,
.host_flags = ATA_FLAG_SATA | ATA_FLAG_SRST |
- PIIX_FLAG_COMBINED | PIIX_FLAG_CHECKINTR |
- ATA_FLAG_SLAVE_POSS | PIIX_FLAG_AHCI,
+ PIIX_FLAG_COMBINED_ICH6 |
+ PIIX_FLAG_CHECKINTR | ATA_FLAG_SLAVE_POSS |
+ PIIX_FLAG_AHCI,
.pio_mask = 0x1f, /* pio0-4 */
.mwdma_mask = 0x07, /* mwdma0-2 */
.udma_mask = 0x7f, /* udma0-6 */
struct ata_port_info *port_info[2];
unsigned int combined = 0;
unsigned int pata_chan = 0, sata_chan = 0;
+ unsigned long host_flags;
if (!printed_version++)
dev_printk(KERN_DEBUG, &pdev->dev,
port_info[0] = &piix_port_info[ent->driver_data];
port_info[1] = &piix_port_info[ent->driver_data];
- if (port_info[0]->host_flags & PIIX_FLAG_AHCI) {
+ host_flags = port_info[0]->host_flags;
+
+ if (host_flags & PIIX_FLAG_AHCI) {
u8 tmp;
pci_read_config_byte(pdev, PIIX_SCC, &tmp);
if (tmp == PIIX_AHCI_DEVICE) {
}
}
- if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) {
+ if (host_flags & PIIX_FLAG_COMBINED) {
u8 tmp;
pci_read_config_byte(pdev, ICH5_PMR, &tmp);
- if (tmp & PIIX_COMB) {
- combined = 1;
- if (tmp & PIIX_COMB_PATA_P0)
+ if (host_flags & PIIX_FLAG_COMBINED_ICH6) {
+ switch (tmp) {
+ case 0:
+ break;
+ case 1:
+ combined = 1;
sata_chan = 1;
- else
+ break;
+ case 2:
+ combined = 1;
pata_chan = 1;
+ break;
+ case 3:
+ dev_printk(KERN_WARNING, &pdev->dev,
+ "invalid MAP value %u\n", tmp);
+ break;
+ }
+ } else {
+ if (tmp & PIIX_COMB) {
+ combined = 1;
+ if (tmp & PIIX_COMB_PATA_P0)
+ sata_chan = 1;
+ else
+ pata_chan = 1;
+ }
}
}
* MSI is disabled (and it is disabled, as we don't use
* message-signalled interrupts currently).
*/
- if (port_info[0]->host_flags & PIIX_FLAG_CHECKINTR)
+ if (host_flags & PIIX_FLAG_CHECKINTR)
pci_intx(pdev, 1);
if (combined) {
ap->flags &= ~ATA_FLAG_PORT_DISABLED;
}
+/**
+ * sata_print_link_status - Print SATA link status
+ * @ap: SATA port to printk link status about
+ *
+ * This function prints link speed and status of a SATA link.
+ *
+ * LOCKING:
+ * None.
+ */
+static void sata_print_link_status(struct ata_port *ap)
+{
+ u32 sstatus, tmp;
+ const char *speed;
+
+ if (!ap->ops->scr_read)
+ return;
+
+ sstatus = scr_read(ap, SCR_STATUS);
+
+ if (sata_dev_present(ap)) {
+ tmp = (sstatus >> 4) & 0xf;
+ if (tmp & (1 << 0))
+ speed = "1.5";
+ else if (tmp & (1 << 1))
+ speed = "3.0";
+ else
+ speed = "<unknown>";
+ printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
+ ap->id, speed, sstatus);
+ } else {
+ printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
+ ap->id, sstatus);
+ }
+}
+
/**
* __sata_phy_reset - Wake/reset a low-level SATA PHY
* @ap: SATA port associated with target SATA PHY.
break;
} while (time_before(jiffies, timeout));
- /* TODO: phy layer with polling, timeouts, etc. */
- sstatus = scr_read(ap, SCR_STATUS);
- if (sata_dev_present(ap)) {
- const char *speed;
- u32 tmp;
+ /* print link status */
+ sata_print_link_status(ap);
- tmp = (sstatus >> 4) & 0xf;
- if (tmp & (1 << 0))
- speed = "1.5";
- else if (tmp & (1 << 1))
- speed = "3.0";
- else
- speed = "<unknown>";
- printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
- ap->id, speed, sstatus);
+ /* TODO: phy layer with polling, timeouts, etc. */
+ if (sata_dev_present(ap))
ata_port_probe(ap);
- } else {
- printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
- ap->id, sstatus);
+ else
ata_port_disable(ap);
- }
if (ap->flags & ATA_FLAG_PORT_DISABLED)
return;
if (dev->flags & ATA_DFLAG_LBA) {
tf->flags |= ATA_TFLAG_LBA;
- if (dev->flags & ATA_DFLAG_LBA48) {
- if (n_block > (64 * 1024))
- goto invalid_fld;
+ if (lba_28_ok(block, n_block)) {
+ /* use LBA28 */
+ tf->command = ATA_CMD_VERIFY;
+ tf->device |= (block >> 24) & 0xf;
+ } else if (lba_48_ok(block, n_block)) {
+ if (!(dev->flags & ATA_DFLAG_LBA48))
+ goto out_of_range;
/* use LBA48 */
tf->flags |= ATA_TFLAG_LBA48;
tf->hob_lbah = (block >> 40) & 0xff;
tf->hob_lbam = (block >> 32) & 0xff;
tf->hob_lbal = (block >> 24) & 0xff;
- } else {
- if (n_block > 256)
- goto invalid_fld;
-
- /* use LBA28 */
- tf->command = ATA_CMD_VERIFY;
-
- tf->device |= (block >> 24) & 0xf;
- }
+ } else
+ /* request too large even for LBA48 */
+ goto out_of_range;
tf->nsect = n_block & 0xff;
/* CHS */
u32 sect, head, cyl, track;
- if (n_block > 256)
- goto invalid_fld;
+ if (!lba_28_ok(block, n_block))
+ goto out_of_range;
/* Convert LBA to CHS */
track = (u32)block / dev->sectors;
if (dev->flags & ATA_DFLAG_LBA) {
tf->flags |= ATA_TFLAG_LBA;
- if (dev->flags & ATA_DFLAG_LBA48) {
- /* The request -may- be too large for LBA48. */
- if ((block >> 48) || (n_block > 65536))
+ if (lba_28_ok(block, n_block)) {
+ /* use LBA28 */
+ tf->device |= (block >> 24) & 0xf;
+ } else if (lba_48_ok(block, n_block)) {
+ if (!(dev->flags & ATA_DFLAG_LBA48))
goto out_of_range;
/* use LBA48 */
tf->hob_lbah = (block >> 40) & 0xff;
tf->hob_lbam = (block >> 32) & 0xff;
tf->hob_lbal = (block >> 24) & 0xff;
- } else {
- /* use LBA28 */
-
- /* The request -may- be too large for LBA28. */
- if ((block >> 28) || (n_block > 256))
- goto out_of_range;
-
- tf->device |= (block >> 24) & 0xf;
- }
+ } else
+ /* request too large even for LBA48 */
+ goto out_of_range;
if (unlikely(ata_rwcmd_protocol(qc) < 0))
goto invalid_fld;
u32 sect, head, cyl, track;
/* The request -may- be too large for CHS addressing. */
- if ((block >> 28) || (n_block > 256))
+ if (!lba_28_ok(block, n_block))
goto out_of_range;
if (unlikely(ata_rwcmd_protocol(qc) < 0))
== ATA_DRDY);
}
+static inline int lba_28_ok(u64 block, u32 n_block)
+{
+ /* check the ending block number */
+ return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256);
+}
+
+static inline int lba_48_ok(u64 block, u32 n_block)
+{
+ /* check the ending block number */
+ return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
+}
+
#endif /* __LINUX_ATA_H__ */
#include <linux/workqueue.h>
/*
- * compile-time options
+ * compile-time options: to be removed as soon as all the drivers are
+ * converted to the new debugging mechanism
*/
#undef ATA_DEBUG /* debugging output */
#undef ATA_VERBOSE_DEBUG /* yet more debugging output */
}
#endif
+/* NEW: debug levels */
+#define HAVE_LIBATA_MSG 1
+
+enum {
+ ATA_MSG_DRV = 0x0001,
+ ATA_MSG_INFO = 0x0002,
+ ATA_MSG_PROBE = 0x0004,
+ ATA_MSG_WARN = 0x0008,
+ ATA_MSG_MALLOC = 0x0010,
+ ATA_MSG_CTL = 0x0020,
+ ATA_MSG_INTR = 0x0040,
+ ATA_MSG_ERR = 0x0080,
+};
+
+#define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV)
+#define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO)
+#define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE)
+#define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN)
+#define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC)
+#define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL)
+#define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR)
+#define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR)
+
+static inline u32 ata_msg_init(int dval, int default_msg_enable_bits)
+{
+ if (dval < 0 || dval >= (sizeof(u32) * 8))
+ return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */
+ if (!dval)
+ return 0;
+ return (1 << dval) - 1;
+}
+
/* defines only for the constants which don't work well as enums */
#define ATA_TAG_POISON 0xfafbfcfdU
unsigned int hsm_task_state;
unsigned long pio_task_timeout;
+ u32 msg_enable;
+
void *private_data;
};
if (status & (ATA_BUSY | ATA_DRQ)) {
unsigned long l = ap->ioaddr.status_addr;
- printk(KERN_WARNING
- "ATA: abnormal status 0x%X on port 0x%lX\n",
- status, l);
+ if (ata_msg_warn(ap))
+ printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n",
+ status, l);
}
return status;
status = ata_busy_wait(ap, bits, 1000);
if (status & bits)
- DPRINTK("abnormal status 0x%X\n", status);
+ if (ata_msg_err(ap))
+ printk(KERN_ERR "abnormal status 0x%X\n", status);
/* get controller status; clear intr, err bits */
if (ap->flags & ATA_FLAG_MMIO) {
post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
}
- VPRINTK("irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
- host_stat, post_stat, status);
+ if (ata_msg_intr(ap))
+ printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n",
+ __FUNCTION__,
+ host_stat, post_stat, status);
return status;
}
projects / deliverable / linux.git / commitdiff
