ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
authorRongjun Ying <Rongjun.Ying@csr.com>
Fri, 3 Jan 2014 02:59:26 +0000 (10:59 +0800)
committerBarry Song <Baohua.Song@csr.com>
Thu, 9 Jan 2014 12:05:31 +0000 (20:05 +0800)
add pin groups for USP0 only holding one of TX and RX frame sync. this
patch matches with the change in drivers/pinctrl/sirf.

Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Barry.Song@csr.com>
arch/arm/boot/dts/prima2.dtsi

index 00a4b20c03843a5acf2a5d8c27ceb3b75297c2e5..0e219932d7cce360ea8011893424ec52979a1bfb 100644 (file)
                                                        "usp0_uart_nostreamctrl";
                                         };
                                 };
+                                usp0_only_utfs_pins_a: usp0@2 {
+                                        usp0 {
+                                                sirf,pins = "usp0_only_utfs_grp";
+                                                sirf,function = "usp0_only_utfs";
+                                        };
+                                };
+                                usp0_only_urfs_pins_a: usp0@3 {
+                                        usp0 {
+                                                sirf,pins = "usp0_only_urfs_grp";
+                                                sirf,function = "usp0_only_urfs";
+                                        };
+                                };
                                 usp1_pins_a: usp1@0 {
                                         usp1 {
                                                 sirf,pins = "usp1grp";
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