ARM: berlin: add SMP support

Adds SMP support for Berlin SoCs. Secondary CPUs are reset, then
execute the instruction we put in the reset exception register, setting
the pc at the address contained in the software reset address register,
which is the physical address of the Berlin secondary startup.

This implementation avoid using the pen lock mechanism.

Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>

diff --git a/arch/arm/mach-berlin/Kconfig b/arch/arm/mach-berlin/Kconfig
index 101e0f3567305f3c53c5f800a53791c63a8344c8..ba5b6ce97b0acfeaddc4b76f77c8e2c2107341f6 100644 (file)
--- a/arch/arm/mach-berlin/Kconfig
+++ b/arch/arm/mach-berlin/Kconfig
@@ -15,7 +15,9 @@ config MACH_BERLIN_BG2
        bool "Marvell Armada 1500 (BG2)"
        select CACHE_L2X0
        select CPU_PJ4B
+       select HAVE_ARM_SCU if SMP
        select HAVE_ARM_TWD if SMP
+       select HAVE_SMP
        select PINCTRL_BERLIN_BG2
 
 config MACH_BERLIN_BG2CD
@@ -27,6 +29,7 @@ config MACH_BERLIN_BG2CD
 config MACH_BERLIN_BG2Q
        bool "Marvell Armada 1500 Pro (BG2-Q)"
        select CACHE_L2X0
+       select HAVE_ARM_SCU if SMP
        select HAVE_ARM_TWD if SMP
        select PINCTRL_BERLIN_BG2Q
 

diff --git a/arch/arm/mach-berlin/Makefile b/arch/arm/mach-berlin/Makefile
index ab69fe956f4929258135dfb08c440e64b2838cf9..c0719ecd189044a70d3d7585e05fcd6674c26ca9 100644 (file)
--- a/arch/arm/mach-berlin/Makefile
+++ b/arch/arm/mach-berlin/Makefile
@@ -1 +1,2 @@
-obj-y += berlin.o
+obj-y                  += berlin.o
+obj-$(CONFIG_SMP)      += headsmp.o platsmp.o

diff --git a/arch/arm/mach-berlin/headsmp.S b/arch/arm/mach-berlin/headsmp.S
new file mode 100644 (file)
index 0000000..4a4c56a
--- /dev/null
+++ b/arch/arm/mach-berlin/headsmp.S
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2014 Marvell Technology Group Ltd.
+ *
+ * Antoine Ténart <antoine.tenart@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/linkage.h>
+#include <linux/init.h>
+#include <asm/assembler.h>
+
+ENTRY(berlin_secondary_startup)
+ ARM_BE8(setend be)
+       bl      v7_invalidate_l1
+       b       secondary_startup
+ENDPROC(berlin_secondary_startup)
+
+/*
+ * If the following instruction is set in the reset exception vector, CPUs
+ * will fetch the value of the software reset address vector when being
+ * reset.
+ */
+.global boot_inst
+boot_inst:
+       ldr     pc, [pc, #140]
+
+       .align

diff --git a/arch/arm/mach-berlin/platsmp.c b/arch/arm/mach-berlin/platsmp.c
new file mode 100644 (file)
index 0000000..702e798
--- /dev/null
+++ b/arch/arm/mach-berlin/platsmp.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 2014 Marvell Technology Group Ltd.
+ *
+ * Antoine Ténart <antoine.tenart@free-electrons.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+#include <asm/cacheflush.h>
+#include <asm/smp_plat.h>
+#include <asm/smp_scu.h>
+
+#define CPU_RESET              0x00
+
+#define RESET_VECT             0x00
+#define SW_RESET_ADDR          0x94
+
+extern void berlin_secondary_startup(void);
+extern u32 boot_inst;
+
+static void __iomem *cpu_ctrl;
+
+static inline void berlin_perform_reset_cpu(unsigned int cpu)
+{
+       u32 val;
+
+       val = readl(cpu_ctrl + CPU_RESET);
+       val |= BIT(cpu_logical_map(cpu));
+       writel(val, cpu_ctrl + CPU_RESET);
+}
+
+static int berlin_boot_secondary(unsigned int cpu, struct task_struct *idle)
+{
+       if (!cpu_ctrl)
+               return -EFAULT;
+
+       /*
+        * Reset the CPU, making it to execute the instruction in the reset
+        * exception vector.
+        */
+       berlin_perform_reset_cpu(cpu);
+
+       return 0;
+}
+
+static void __init berlin_smp_prepare_cpus(unsigned int max_cpus)
+{
+       struct device_node *np;
+       void __iomem *scu_base;
+       void __iomem *vectors_base;
+
+       np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
+       scu_base = of_iomap(np, 0);
+       of_node_put(np);
+       if (!scu_base)
+               return;
+
+       np = of_find_compatible_node(NULL, NULL, "marvell,berlin-cpu-ctrl");
+       cpu_ctrl = of_iomap(np, 0);
+       of_node_put(np);
+       if (!cpu_ctrl)
+               goto unmap_scu;
+
+       vectors_base = ioremap(CONFIG_VECTORS_BASE, SZ_32K);
+       if (!vectors_base)
+               goto unmap_scu;
+
+       scu_enable(scu_base);
+       flush_cache_all();
+
+       /*
+        * Write the first instruction the CPU will execute after being reset
+        * in the reset exception vector.
+        */
+       writel(boot_inst, vectors_base + RESET_VECT);
+
+       /*
+        * Write the secondary startup address into the SW reset address
+        * vector. This is used by boot_inst.
+        */
+       writel(virt_to_phys(berlin_secondary_startup), vectors_base + SW_RESET_ADDR);
+
+       iounmap(vectors_base);
+unmap_scu:
+       iounmap(scu_base);
+}
+
+static struct smp_operations berlin_smp_ops __initdata = {
+       .smp_prepare_cpus       = berlin_smp_prepare_cpus,
+       .smp_boot_secondary     = berlin_boot_secondary,
+};
+CPU_METHOD_OF_DECLARE(berlin_smp, "marvell,berlin-smp", &berlin_smp_ops);