Merge tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git...
authorOlof Johansson <olof@lixom.net>
Mon, 5 May 2014 21:33:48 +0000 (14:33 -0700)
committerOlof Johansson <olof@lixom.net>
Mon, 5 May 2014 21:33:48 +0000 (14:33 -0700)
Merge "Renesas ARM Based SoC DT Updates for v3.16" from Simon Horman:

r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs
* Add MSIOF nodes and aliases
* Correct I2C clock parents

r8a7791 (R-Car M2) SoC
* Add EHCI MSTP clock

r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards
* Add MSIOF nodes
* Add gpio-keys support for SW2
* Enable I2C
* Enable Quad SPI transfers for the SPI FLASH
* Rename and lable spi to qspi, add spi0 alias
* Set ethernet PHY LED mode

r8a7779 (R-Car H1) and r8a7778 (R-Car M2) SoCs
* Improve and correct HSPI nodes

r8a7778 (R-Car M2) based Bock-W board
* Add SPI FLASH

r8a7740 (R-Mobile A1) SoC
* Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings

r8a7740 (R-Mobile A1) based Armadillo800 EVA board
* Enable RTC
* Use KEY_* macros for gpio-keys

EMEV2 (Emma Mobile EV2) based kzm9g board
* Use KEY_* macros for gpio-keys

* tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits)
  ARM: shmobile: armadillo-reference dts: Seiko Instruments, Inc is "sii"
  ARM: shmobile: lager dts: Enable Quad SPI transfers for the SPI FLASH
  ARM: shmobile: koelsch dts: Enable Quad SPI transfers for the SPI FLASH
  ARM: shmobile: r8a7790: add IIC(B) cores to dtsi
  ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi
  ARM: shmobile: r8a7790: add IIC0-2 clock macros
  ARM: shmobile: r8a7791: Fix the I2C clocks parents in DT
  ARM: shmobile: r8a7790: Fix the I2C clocks parents in DT
  ARM: shmobile: lager: Correct setting of ethernet PHY LED mode
  ARM: shmobile: armadillo-reference dts: enable RTC
  ARM: shmobile: r8a7791: Add EHCI MSTP clock
  ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings
  ARM: shmobile: koelsch: activate i2c6 bus
  ARM: shmobile: koelsch: make i2c2-pfc node unique
  ARM: shmobile: r8a7791: add IIC(B) cores to dtsi
  ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi
  ARM: shmobile: r8a7791: add IIC0/1 clock macros
  ARM: shmobile: kzm9g-reference dts: Use KEY_* macros for gpio-keys
  ARM: shmobile: armadillo-reference dts: Use KEY_* macros for gpio-keys
  ARM: shmobile: koelsch: Set ethernet PHY LED mode
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
12 files changed:
arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
arch/arm/boot/dts/r8a7740.dtsi
arch/arm/boot/dts/r8a7778-bockw-reference.dts
arch/arm/boot/dts/r8a7778.dtsi
arch/arm/boot/dts/r8a7779.dtsi
arch/arm/boot/dts/r8a7790-lager.dts
arch/arm/boot/dts/r8a7790.dtsi
arch/arm/boot/dts/r8a7791-koelsch.dts
arch/arm/boot/dts/r8a7791.dtsi
arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
include/dt-bindings/clock/r8a7790-clock.h
include/dt-bindings/clock/r8a7791-clock.h

index 95a849bf921f464fa4e59bcada97d7a048dcd876..10344e6edd20a396d653969fac4de365953784ff 100644 (file)
@@ -11,6 +11,7 @@
 /dts-v1/;
 #include "r8a7740.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pwm/pwm.h>
 
 
                power-key {
                        gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
-                       linux,code = <116>;
+                       linux,code = <KEY_POWER>;
                        label = "SW3";
                        gpio-key,wakeup;
                };
 
                back-key {
                        gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
-                       linux,code = <158>;
+                       linux,code = <KEY_BACK>;
                        label = "SW4";
                };
 
                menu-key {
                        gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
-                       linux,code = <139>;
+                       linux,code = <KEY_MENU>;
                        label = "SW5";
                };
 
                home-key {
                        gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
-                       linux,code = <102>;
+                       linux,code = <KEY_HOME>;
                        label = "SW6";
                };
        };
                };
        };
 
+       i2c2: i2c@2 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "i2c-gpio";
+               gpios = <&pfc 208 GPIO_ACTIVE_HIGH /* sda */
+                        &pfc 91 GPIO_ACTIVE_HIGH /* scl */
+                       >;
+               i2c-gpio,delay-us = <5>;
+       };
+
        backlight {
                compatible = "pwm-backlight";
                pwms = <&tpu 2 33333 PWM_POLARITY_INVERTED>;
        };
 };
 
+&i2c2 {
+       status = "okay";
+       rtc@30 {
+               compatible = "sii,s35390a";
+               reg = <0x30>;
+       };
+};
+
 &pfc {
        pinctrl-0 = <&scifa1_pins>;
        pinctrl-names = "default";
index 2551e9438d358a55e8e4edb7c494ea231ee46810..3834b94dc02ae25dddac5661e12d49627a30a77a 100644 (file)
        i2c0: i2c@fff20000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "renesas,rmobile-iic";
+               compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
                reg = <0xfff20000 0x425>;
                interrupt-parent = <&gic>;
                interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH
        i2c1: i2c@e6c20000 {
                #address-cells = <1>;
                #size-cells = <0>;
-               compatible = "renesas,rmobile-iic";
+               compatible = "renesas,iic-r8a7740", "renesas,rmobile-iic";
                reg = <0xe6c20000 0x425>;
                interrupt-parent = <&gic>;
                interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH
        };
 
        mmcif0: mmc@e6bd0000 {
-               compatible = "renesas,sh-mmcif";
+               compatible = "renesas,mmcif-r8a7740", "renesas,sh-mmcif";
                reg = <0xe6bd0000 0x100>;
                interrupt-parent = <&gic>;
                interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
 
        sh_fsi2: sound@fe1f0000 {
                #sound-dai-cells = <1>;
-               compatible = "renesas,sh_fsi2";
+               compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
                reg = <0xfe1f0000 0x400>;
                interrupt-parent = <&gic>;
                interrupts = <0 9 0x4>;
index 06cda19dac6a6dccef649109ca17eb4528327dc7..f76f6ec01e194c669ef0bcc055e78b20d602086a 100644 (file)
        pinctrl-0 = <&hspi0_pins>;
        pinctrl-names = "default";
        status = "okay";
+
+       flash: flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "spansion,s25fl008k";
+               reg = <0>;
+               spi-max-frequency = <104000000>;
+               m25p,fast-read;
+
+               partition@0 {
+                       label = "data(spi)";
+                       reg = <0x00000000 0x00100000>;
+               };
+       };
 };
index 85c5b3b99f5e3b87485f193750e8150815ff9e17..3c6fab5c9702e437aebe18e622b8358b675c806b 100644 (file)
        };
 
        hspi0: spi@fffc7000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7778", "renesas,hspi";
                reg = <0xfffc7000 0x18>;
-               interrupt-controller = <&gic>;
+               interrupt-parent = <&gic>;
                interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 
        hspi1: spi@fffc8000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7778", "renesas,hspi";
                reg = <0xfffc8000 0x18>;
-               interrupt-controller = <&gic>;
+               interrupt-parent = <&gic>;
                interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 
        hspi2: spi@fffc6000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7778", "renesas,hspi";
                reg = <0xfffc6000 0x18>;
-               interrupt-controller = <&gic>;
+               interrupt-parent = <&gic>;
                interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 };
index d0561d4c7c466056096969331d467f6196b9ff63..8b1a336ee401bebb40bf4158338a125434c6f1f2 100644 (file)
        };
 
        hspi0: spi@fffc7000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7779", "renesas,hspi";
                reg = <0xfffc7000 0x18>;
-               interrupt-controller = <&gic>;
+               interrupt-parent = <&gic>;
                interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 
        hspi1: spi@fffc8000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7779", "renesas,hspi";
                reg = <0xfffc8000 0x18>;
-               interrupt-controller = <&gic>;
+               interrupt-parent = <&gic>;
                interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 
        hspi2: spi@fffc6000 {
-               compatible = "renesas,hspi";
+               compatible = "renesas,hspi-r8a7779", "renesas,hspi";
                reg = <0xfffc6000 0x18>;
-               interrupt-controller = <&gic>;
+               interrupt-parent = <&gic>;
                interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
                status = "disabled";
        };
 };
index d01048ab3e777534e224eb9a9395ba0a83cd56b7..86d676f629429ab3c304111fcdd987e91fca0c9a 100644 (file)
@@ -12,6 +12,7 @@
 /dts-v1/;
 #include "r8a7790.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 
 / {
        model = "Lager";
                #size-cells = <1>;
        };
 
+       gpio_keys {
+               compatible = "gpio-keys";
+
+               button@1 {
+                       linux,code = <KEY_1>;
+                       label = "SW2-1";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+                       gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+               };
+               button@2 {
+                       linux,code = <KEY_2>;
+                       label = "SW2-2";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+                       gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
+               };
+               button@3 {
+                       linux,code = <KEY_3>;
+                       label = "SW2-3";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+                       gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
+               };
+               button@4 {
+                       linux,code = <KEY_4>;
+                       label = "SW2-4";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+                       gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
+               };
+       };
+
        leds {
                compatible = "gpio-leds";
                led6 {
                renesas,function = "mmc1";
        };
 
-       qspi_pins: spi {
+       qspi_pins: spi0 {
                renesas,groups = "qspi_ctrl", "qspi_data4";
                renesas,function = "qspi";
        };
+
+       msiof1_pins: spi2 {
+               renesas,groups = "msiof1_clk", "msiof1_sync", "msiof1_rx",
+                                "msiof1_tx";
+               renesas,function = "msiof1";
+       };
 };
 
 &ether {
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               micrel,led-mode = <1>;
        };
 };
 
        status = "okay";
 };
 
-&spi {
+&qspi {
        pinctrl-0 = <&qspi_pins>;
        pinctrl-names = "default";
 
                compatible = "spansion,s25fl512s";
                reg = <0>;
                spi-max-frequency = <30000000>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
                m25p,fast-read;
 
                partition@0 {
        };
 };
 
+&msiof1 {
+       pinctrl-0 = <&msiof1_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       pmic: pmic@0 {
+               compatible = "renesas,r2a11302ft";
+               reg = <0>;
+               spi-max-frequency = <6000000>;
+               spi-cpol;
+               spi-cpha;
+       };
+
+};
+
 &sdhi0 {
        pinctrl-0 = <&sdhi0_pins>;
        pinctrl-names = "default";
index 618e5b537eaf9deb5efbe34ee7f917f8ea95990b..bf2db38eade105c1af303337e8acb9471155f0b5 100644 (file)
                i2c1 = &i2c1;
                i2c2 = &i2c2;
                i2c3 = &i2c3;
+               i2c4 = &iic0;
+               i2c5 = &iic1;
+               i2c6 = &iic2;
+               i2c7 = &iic3;
+               spi0 = &qspi;
+               spi1 = &msiof0;
+               spi2 = &msiof1;
+               spi3 = &msiof2;
+               spi4 = &msiof3;
        };
 
        cpus {
                status = "disabled";
        };
 
+       iic0: i2c@e6500000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+               reg = <0 0xe6500000 0 0x425>;
+               interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
+               status = "disabled";
+       };
+
+       iic1: i2c@e6510000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+               reg = <0 0xe6510000 0 0x425>;
+               interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_IIC1>;
+               status = "disabled";
+       };
+
+       iic2: i2c@e6520000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+               reg = <0 0xe6520000 0 0x425>;
+               interrupts = <0 176 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7790_CLK_IIC2>;
+               status = "disabled";
+       };
+
+       iic3: i2c@e60b0000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7790", "renesas,rmobile-iic";
+               reg = <0 0xe60b0000 0 0x425>;
+               interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp9_clks R8A7790_CLK_IICDVFS>;
+               status = "disabled";
+       };
+
        mmcif0: mmcif@ee200000 {
                compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
                reg = <0 0xee200000 0 0x80>;
                mstp3_clks: mstp3_clks@e615013c {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-                       clocks = <&cp_clk>, <&mmc1_clk>, <&sd3_clk>, <&sd2_clk>,
-                                <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>,
-                                <&mmc0_clk>, <&rclk_clk>;
+                       clocks = <&hp_clk>, <&cp_clk>, <&mmc1_clk>, <&sd3_clk>,
+                                <&sd2_clk>, <&cpg_clocks R8A7790_CLK_SD1>, <&cpg_clocks R8A7790_CLK_SD0>, <&mmc0_clk>,
+                                <&hp_clk>, <&hp_clk>, <&rclk_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
-                               R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
-                               R8A7790_CLK_MMCIF0 R8A7790_CLK_CMT1
+                               R8A7790_CLK_IIC2 R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
+                               R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 R8A7790_CLK_MMCIF0
+                               R8A7790_CLK_IIC0 R8A7790_CLK_IIC1 R8A7790_CLK_CMT1
                        >;
                        clock-output-names =
-                               "tpu0", "mmcif1", "sdhi3", "sdhi2",
-                               "sdhi1", "sdhi0", "mmcif0", "cmt1";
+                               "iic2", "tpu0", "mmcif1", "sdhi3",
+                               "sdhi2", "sdhi1", "sdhi0", "mmcif0",
+                               "iic0", "iic1", "cmt1";
                };
                mstp5_clks: mstp5_clks@e6150144 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                mstp9_clks: mstp9_clks@e6150994 {
                        compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-                       clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>,
-                                <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
+                       clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7790_CLK_QSPI>, <&cp_clk>,
+                                <&hp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD
-                               R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1
-                               R8A7790_CLK_I2C0
+                               R8A7790_CLK_RCAN1 R8A7790_CLK_RCAN0 R8A7790_CLK_QSPI_MOD R8A7790_CLK_IICDVFS
+                               R8A7790_CLK_I2C3 R8A7790_CLK_I2C2 R8A7790_CLK_I2C1 R8A7790_CLK_I2C0
                        >;
                        clock-output-names =
-                               "rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
+                               "rcan1", "rcan0", "qspi_mod", "iic3",
+                               "i2c3", "i2c2", "i2c1", "i2c0";
                };
        };
 
-       spi: spi@e6b10000 {
+       qspi: spi@e6b10000 {
                compatible = "renesas,qspi-r8a7790", "renesas,qspi";
                reg = <0 0xe6b10000 0 0x2c>;
                interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
                #size-cells = <0>;
                status = "disabled";
        };
+
+       msiof0: spi@e6e20000 {
+               compatible = "renesas,msiof-r8a7790";
+               reg = <0 0xe6e20000 0 0x0064>;
+               interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7790_CLK_MSIOF0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof1: spi@e6e10000 {
+               compatible = "renesas,msiof-r8a7790";
+               reg = <0 0xe6e10000 0 0x0064>;
+               interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7790_CLK_MSIOF1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof2: spi@e6e00000 {
+               compatible = "renesas,msiof-r8a7790";
+               reg = <0 0xe6e00000 0 0x0064>;
+               interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7790_CLK_MSIOF2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof3: spi@e6c90000 {
+               compatible = "renesas,msiof-r8a7790";
+               reg = <0 0xe6c90000 0 0x0064>;
+               interrupts = <0 159 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7790_CLK_MSIOF3>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
 };
index de1b6977c69a4b009d3e658b8d9790b373278d49..0d69813def859eb1d235576acc565e9269a8e5d6 100644 (file)
@@ -13,6 +13,7 @@
 /dts-v1/;
 #include "r8a7791.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 
 / {
        model = "Koelsch";
        gpio-keys {
                compatible = "gpio-keys";
 
+               key-1 {
+                       gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_1>;
+                       label = "SW2-1";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+               };
+               key-2 {
+                       gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_2>;
+                       label = "SW2-2";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+               };
+               key-3 {
+                       gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_3>;
+                       label = "SW2-3";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+               };
+               key-4 {
+                       gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+                       linux,code = <KEY_4>;
+                       label = "SW2-4";
+                       gpio-key,wakeup;
+                       debounce-interval = <20>;
+               };
                key-a {
                        gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
-                       linux,code = <30>;
+                       linux,code = <KEY_A>;
                        label = "SW30";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-b {
                        gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
-                       linux,code = <48>;
+                       linux,code = <KEY_B>;
                        label = "SW31";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-c {
                        gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
-                       linux,code = <46>;
+                       linux,code = <KEY_C>;
                        label = "SW32";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-d {
                        gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
-                       linux,code = <32>;
+                       linux,code = <KEY_D>;
                        label = "SW33";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-e {
                        gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
-                       linux,code = <18>;
+                       linux,code = <KEY_E>;
                        label = "SW34";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-f {
                        gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
-                       linux,code = <33>;
+                       linux,code = <KEY_F>;
                        label = "SW35";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
                };
                key-g {
                        gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
-                       linux,code = <34>;
+                       linux,code = <KEY_G>;
                        label = "SW36";
                        gpio-key,wakeup;
                        debounce-interval = <20>;
        };
 };
 
+&i2c6 {
+       status = "okay";
+       clock-frequency = <100000>;
+};
+
 &pfc {
        pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
        pinctrl-names = "default";
 
-       i2c2_pins: i2c {
+       i2c2_pins: i2c2 {
                renesas,groups = "i2c2";
                renesas,function = "i2c2";
        };
                renesas,function = "sdhi2";
        };
 
-       qspi_pins: spi {
+       qspi_pins: spi0 {
                renesas,groups = "qspi_ctrl", "qspi_data4";
                renesas,function = "qspi";
        };
+
+       msiof0_pins: spi1 {
+               renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
+                                "msiof0_tx";
+               renesas,function = "msiof0";
+       };
 };
 
 &ether {
                reg = <1>;
                interrupt-parent = <&irqc0>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+               micrel,led-mode = <1>;
        };
 };
 
        status = "okay";
 };
 
-&spi {
+&qspi {
        pinctrl-0 = <&qspi_pins>;
        pinctrl-names = "default";
 
                compatible = "spansion,s25fl512s";
                reg = <0>;
                spi-max-frequency = <30000000>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
                m25p,fast-read;
 
                partition@0 {
                };
        };
 };
+
+&msiof0 {
+       pinctrl-0 = <&msiof0_pins>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       pmic: pmic@0 {
+               compatible = "renesas,r2a11302ft";
+               reg = <0>;
+               spi-max-frequency = <6000000>;
+               spi-cpol;
+               spi-cpha;
+       };
+};
index 46181708e59c5c7d7e558743983a88efa9622e13..98baff48e6cebfe6cf99b67c1cd18c5d3d38468f 100644 (file)
                i2c3 = &i2c3;
                i2c4 = &i2c4;
                i2c5 = &i2c5;
+               i2c6 = &i2c6;
+               i2c7 = &i2c7;
+               i2c8 = &i2c8;
+               spi0 = &qspi;
+               spi1 = &msiof0;
+               spi2 = &msiof1;
+               spi3 = &msiof2;
        };
 
        cpus {
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";
                        reg = <0>;
-                       clock-frequency = <1300000000>;
+                       clock-frequency = <1500000000>;
                };
 
                cpu1: cpu@1 {
                        device_type = "cpu";
                        compatible = "arm,cortex-a15";
                        reg = <1>;
-                       clock-frequency = <1300000000>;
+                       clock-frequency = <1500000000>;
                };
        };
 
                             <0 17 IRQ_TYPE_LEVEL_HIGH>;
        };
 
+       /* The memory map in the User's Manual maps the cores to bus numbers */
        i2c0: i2c@e6508000 {
                #address-cells = <1>;
                #size-cells = <0>;
        };
 
        i2c5: i2c@e6528000 {
+               /* doesn't need pinmux */
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "renesas,i2c-r8a7791";
                status = "disabled";
        };
 
+       i2c6: i2c@e60b0000 {
+               /* doesn't need pinmux */
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+               reg = <0 0xe60b0000 0 0x425>;
+               interrupts = <0 173 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp9_clks R8A7791_CLK_IICDVFS>;
+               status = "disabled";
+       };
+
+       i2c7: i2c@e6500000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+               reg = <0 0xe6500000 0 0x425>;
+               interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7791_CLK_IIC0>;
+               status = "disabled";
+       };
+
+       i2c8: i2c@e6510000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "renesas,iic-r8a7791", "renesas,rmobile-iic";
+               reg = <0 0xe6510000 0 0x425>;
+               interrupts = <0 175 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7791_CLK_IIC1>;
+               status = "disabled";
+       };
+
        pfc: pfc@e6060000 {
                compatible = "renesas,pfc-r8a7791";
                reg = <0 0xe6060000 0 0x250>;
                mstp3_clks: mstp3_clks@e615013c {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
-                       clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>,
-                               <&cpg_clocks R8A7791_CLK_SD0>, <&mmc0_clk>, <&rclk_clk>;
+                       clocks = <&cp_clk>, <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7791_CLK_SD0>,
+                                <&mmc0_clk>, <&hp_clk>, <&hp_clk>, <&rclk_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1
-                               R8A7791_CLK_SDHI0 R8A7791_CLK_MMCIF0 R8A7791_CLK_CMT1
+                               R8A7791_CLK_TPU0 R8A7791_CLK_SDHI2 R8A7791_CLK_SDHI1 R8A7791_CLK_SDHI0
+                               R8A7791_CLK_MMCIF0 R8A7791_CLK_IIC0 R8A7791_CLK_IIC1 R8A7791_CLK_CMT1
                        >;
                        clock-output-names =
-                               "tpu0", "sdhi2", "sdhi1", "sdhi0", "mmcif0", "cmt1";
+                               "tpu0", "sdhi2", "sdhi1", "sdhi0",
+                               "mmcif0", "i2c7", "i2c8", "cmt1";
                };
                mstp5_clks: mstp5_clks@e6150144 {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                mstp7_clks: mstp7_clks@e615014c {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe615014c 0 4>, <0 0xe61501c4 0 4>;
-                       clocks = <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
+                       clocks = <&mp_clk>,  <&mp_clk>, <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
                                 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
                                 <&zx_clk>, <&zx_clk>, <&zx_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
+                               R8A7791_CLK_EHCI R8A7791_CLK_HSUSB R8A7791_CLK_HSCIF2 R8A7791_CLK_SCIF5
                                R8A7791_CLK_SCIF4 R8A7791_CLK_HSCIF1 R8A7791_CLK_HSCIF0
                                R8A7791_CLK_SCIF3 R8A7791_CLK_SCIF2 R8A7791_CLK_SCIF1
                                R8A7791_CLK_SCIF0 R8A7791_CLK_DU1 R8A7791_CLK_DU0
                                R8A7791_CLK_LVDS0
                        >;
                        clock-output-names =
-                               "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
+                               "ehci", "hsusb", "hscif2", "scif5", "scif4", "hscif1", "hscif0",
                                "scif3", "scif2", "scif1", "scif0", "du1", "du0", "lvds0";
                };
                mstp8_clks: mstp8_clks@e6150990 {
                mstp9_clks: mstp9_clks@e6150994 {
                        compatible = "renesas,r8a7791-mstp-clocks", "renesas,cpg-mstp-clocks";
                        reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>;
-                       clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>,
-                                <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>,
-                                <&p_clk>;
+                       clocks = <&p_clk>, <&p_clk>, <&cpg_clocks R8A7791_CLK_QSPI>, <&hp_clk>,
+                                <&cp_clk>, <&hp_clk>, <&hp_clk>, <&hp_clk>,
+                                <&hp_clk>, <&hp_clk>;
                        #clock-cells = <1>;
                        renesas,clock-indices = <
-                               R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD
-                               R8A7791_CLK_I2C5 R8A7791_CLK_I2C4 R8A7791_CLK_I2C3
-                               R8A7791_CLK_I2C2 R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
+                               R8A7791_CLK_RCAN1 R8A7791_CLK_RCAN0 R8A7791_CLK_QSPI_MOD R8A7791_CLK_I2C5
+                               R8A7791_CLK_IICDVFS R8A7791_CLK_I2C4 R8A7791_CLK_I2C3 R8A7791_CLK_I2C2
+                               R8A7791_CLK_I2C1 R8A7791_CLK_I2C0
                        >;
                        clock-output-names =
-                               "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c4", "i2c3",
+                               "rcan1", "rcan0", "qspi_mod", "i2c5", "i2c6", "i2c4", "i2c3",
                                "i2c2", "i2c1", "i2c0";
                };
                mstp11_clks: mstp11_clks@e615099c {
                };
        };
 
-       spi: spi@e6b10000 {
+       qspi: spi@e6b10000 {
                compatible = "renesas,qspi-r8a7791", "renesas,qspi";
                reg = <0 0xe6b10000 0 0x2c>;
                interrupts = <0 184 IRQ_TYPE_LEVEL_HIGH>;
                #size-cells = <0>;
                status = "disabled";
        };
+
+       msiof0: spi@e6e20000 {
+               compatible = "renesas,msiof-r8a7791";
+               reg = <0 0xe6e20000 0 0x0064>;
+               interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof1: spi@e6e10000 {
+               compatible = "renesas,msiof-r8a7791";
+               reg = <0 0xe6e10000 0 0x0064>;
+               interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
+
+       msiof2: spi@e6e00000 {
+               compatible = "renesas,msiof-r8a7791";
+               reg = <0 0xe6e00000 0 0x0064>;
+               interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               status = "disabled";
+       };
 };
index eb8886b535e4a28345ac5ae848ce85de47fcbbe4..a99171c8a78222f97497b4d1de6f3897e2e5fca1 100644 (file)
@@ -14,6 +14,7 @@
 /dts-v1/;
 #include "sh73a0.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
 
                back-key {
                        gpios = <&pcf8575 8 GPIO_ACTIVE_LOW>;
-                       linux,code = <158>;
+                       linux,code = <KEY_BACK>;
                        label = "SW3";
                };
 
                right-key {
                        gpios = <&pcf8575 9 GPIO_ACTIVE_LOW>;
-                       linux,code = <106>;
+                       linux,code = <KEY_RIGHT>;
                        label = "SW2-R";
                };
 
                left-key {
                        gpios = <&pcf8575 10 GPIO_ACTIVE_LOW>;
-                       linux,code = <105>;
+                       linux,code = <KEY_LEFT>;
                        label = "SW2-L";
                };
 
                enter-key {
                        gpios = <&pcf8575 11 GPIO_ACTIVE_LOW>;
-                       linux,code = <28>;
+                       linux,code = <KEY_ENTER>;
                        label = "SW2-P";
                };
 
                up-key {
                        gpios = <&pcf8575 12 GPIO_ACTIVE_LOW>;
-                       linux,code = <103>;
+                       linux,code = <KEY_UP>;
                        label = "SW2-U";
                };
 
                down-key {
                        gpios = <&pcf8575 13 GPIO_ACTIVE_LOW>;
-                       linux,code = <108>;
+                       linux,code = <KEY_DOWN>;
                        label = "SW2-D";
                };
 
                home-key {
                        gpios = <&pcf8575 14 GPIO_ACTIVE_LOW>;
-                       linux,code = <102>;
+                       linux,code = <KEY_HOME>;
                        label = "SW1";
                };
        };
index 6548a5fbcf4a4854ec3afec3c8d1be5cf19952a1..4d3e935b3f1bc523ac29e685b55c0530ce54f603 100644 (file)
@@ -50,6 +50,7 @@
 #define R8A7790_CLK_SYS_DMAC0          19
 
 /* MSTP3 */
+#define R8A7790_CLK_IIC2               0
 #define R8A7790_CLK_TPU0               4
 #define R8A7790_CLK_MMCIF1             5
 #define R8A7790_CLK_SDHI3              11
@@ -57,6 +58,8 @@
 #define R8A7790_CLK_SDHI1              13
 #define R8A7790_CLK_SDHI0              14
 #define R8A7790_CLK_MMCIF0             15
+#define R8A7790_CLK_IIC0               18
+#define R8A7790_CLK_IIC1               23
 #define R8A7790_CLK_SSUSB              28
 #define R8A7790_CLK_CMT1               29
 #define R8A7790_CLK_USBDMAC0           30
index 30f82f286e295df3423dd6729ef48918c80683c2..602354365819611fc0f8c7982c9398e8067274f0 100644 (file)
@@ -51,6 +51,8 @@
 #define R8A7791_CLK_SDHI1              12
 #define R8A7791_CLK_SDHI0              14
 #define R8A7791_CLK_MMCIF0             15
+#define R8A7791_CLK_IIC0               18
+#define R8A7791_CLK_IIC1               23
 #define R8A7791_CLK_SSUSB              28
 #define R8A7791_CLK_CMT1               29
 #define R8A7791_CLK_USBDMAC0           30
@@ -61,6 +63,7 @@
 #define R8A7791_CLK_PWM                        23
 
 /* MSTP7 */
+#define R8A7791_CLK_EHCI               3
 #define R8A7791_CLK_HSUSB              4
 #define R8A7791_CLK_HSCIF2             13
 #define R8A7791_CLK_SCIF5              14
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