ANDROID DRIVERS
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-M: Arve Hj
ønnevåg <arve@android.com>
+M: Arve Hj
ønnevåg <arve@android.com>
M: Riley Andrews <riandrews@android.com>
T: git git://git.kernel.org/pub/scm/linux/kernel/gregkh/staging.git
L: devel@driverdev.osuosl.org
F: sound/soc/fsl/imx*
F: sound/soc/fsl/mpc8610_hpcd.c
+FREESCALE QORIQ MANAGEMENT COMPLEX DRIVER
+M: J. German Rivera <German.Rivera@freescale.com>
+L: linux-kernel@vger.kernel.org
+S: Maintained
+F: drivers/staging/fsl-mc/
+
FREEVXFS FILESYSTEM
M: Christoph Hellwig <hch@infradead.org>
W: ftp://ftp.openlinux.org/pub/people/hch/vxfs
S: Maintained
F: drivers/staging/sm7xxfb/
+STAGING - SILICON MOTION SM750 FRAME BUFFER DRIVER
+M: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+M: Teddy Wang <teddy.wang@siliconmotion.com>
+M: Sudip Mukherjee <sudip@vectorindia.org>
+L: linux-fbdev@vger.kernel.org
+S: Maintained
+F: drivers/staging/sm750fb/
+
STAGING - SLICOSS
M: Lior Dotan <liodot@gmail.com>
M: Christopher Harrer <charrer@alacritech.com>
if (!plat_data) {
if (np) {
- if(d40_of_probe(pdev, np)) {
+ if (d40_of_probe(pdev, np)) {
ret = -ENOMEM;
goto failure;
}
source "drivers/staging/sm7xxfb/Kconfig"
+source "drivers/staging/sm750fb/Kconfig"
+
source "drivers/staging/xgifb/Kconfig"
source "drivers/staging/emxx_udc/Kconfig"
source "drivers/staging/i2o/Kconfig"
+source "drivers/staging/fsl-mc/Kconfig"
+
endif # STAGING
obj-$(CONFIG_VME_BUS) += vme/
obj-$(CONFIG_IIO) += iio/
obj-$(CONFIG_FB_SM7XX) += sm7xxfb/
+obj-$(CONFIG_FB_SM7XX) += sm750fb/
obj-$(CONFIG_FB_XGI) += xgifb/
obj-$(CONFIG_USB_EMXX) += emxx_udc/
obj-$(CONFIG_FT1000) += ft1000/
obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clocking-wizard/
obj-$(CONFIG_FB_TFT) += fbtft/
obj-$(CONFIG_I2O) += i2o/
+obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/
buffer = handle->buffer;
if (!buffer->heap->ops->phys) {
- pr_err("%s: ion_phys is not implemented by this heap.\n",
- __func__);
+ pr_err("%s: ion_phys is not implemented by this heap (name=%s, type=%d).\n",
+ __func__, buffer->heap->name, buffer->heap->type);
mutex_unlock(&client->lock);
return -ENODEV;
}
size_t total_size = 0;
size_t total_orphaned_size = 0;
- seq_printf(s, "%16.s %16.s %16.s\n", "client", "pid", "size");
+ seq_printf(s, "%16s %16s %16s\n", "client", "pid", "size");
seq_puts(s, "----------------------------------------------------\n");
for (n = rb_first(&dev->clients); n; n = rb_next(n)) {
char task_comm[TASK_COMM_LEN];
get_task_comm(task_comm, client->task);
- seq_printf(s, "%16.s %16u %16zu\n", task_comm,
+ seq_printf(s, "%16s %16u %16zu\n", task_comm,
client->pid, size);
} else {
- seq_printf(s, "%16.s %16u %16zu\n", client->name,
+ seq_printf(s, "%16s %16u %16zu\n", client->name,
client->pid, size);
}
}
continue;
total_size += buffer->size;
if (!buffer->handle_count) {
- seq_printf(s, "%16.s %16u %16zu %d %d\n",
+ seq_printf(s, "%16s %16u %16zu %d %d\n",
buffer->task_comm, buffer->pid,
buffer->size, buffer->kmap_cnt,
atomic_read(&buffer->ref.refcount));
}
mutex_unlock(&dev->buffer_lock);
seq_puts(s, "----------------------------------------------------\n");
- seq_printf(s, "%16.s %16zu\n", "total orphaned",
+ seq_printf(s, "%16s %16zu\n", "total orphaned",
total_orphaned_size);
- seq_printf(s, "%16.s %16zu\n", "total ", total_size);
+ seq_printf(s, "%16s %16zu\n", "total ", total_size);
if (heap->flags & ION_HEAP_FLAG_DEFER_FREE)
- seq_printf(s, "%16.s %16zu\n", "deferred free",
+ seq_printf(s, "%16s %16zu\n", "deferred free",
heap->free_list_size);
seq_puts(s, "----------------------------------------------------\n");
config COMEDI_PCL711
tristate "Advantech PCL-711/711b and ADlink ACL-8112 ISA card support"
+ select COMEDI_8254
---help---
Enable support for Advantech PCL-711 and 711b, ADlink ACL-8112
config COMEDI_PCL812
tristate "Advantech PCL-812/813 and ADlink ACL-8112/8113/8113/8216"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for Advantech PCL-812/PG, PCL-813/B, ADLink
ACL-8112DG/HG/PG, ACL-8113, ACL-8216, ICP DAS A-821PGH/PGL/PGL-NDA,
config COMEDI_PCL816
tristate "Advantech PCL-814 and PCL-816 ISA card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for Advantech PCL-814 and PCL-816 ISA cards
config COMEDI_PCL818
tristate "Advantech PCL-718 and PCL-818 ISA card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for Advantech PCL-818 ISA cards
PCL-818L, PCL-818H, PCL-818HD, PCL-818HG, PCL-818 and PCL-718
config COMEDI_DAS16M1
tristate "MeasurementComputing CIO-DAS16/M1DAS-16 ISA card support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for Measurement Computing CIO-DAS16/M1 ISA cards.
config COMEDI_DAS16
tristate "DAS-16 compatible ISA and PC/104 card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for Keithley Metrabyte/ComputerBoards DAS16
config COMEDI_DAS800
tristate "DAS800 and compatible ISA card support"
+ select COMEDI_8254
---help---
Enable support for Keithley Metrabyte DAS800 and compatible ISA cards
Keithley Metrabyte DAS-800, DAS-801, DAS-802
config COMEDI_DAS1800
tristate "DAS1800 and compatible ISA card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for DAS1800 and compatible ISA cards
Keithley Metrabyte DAS-1701ST, DAS-1701ST-DA, DAS-1701/AO,
config COMEDI_DAS6402
tristate "DAS6402 and compatible ISA card support"
+ select COMEDI_8254
---help---
Enable support for DAS6402 and compatible ISA cards
Computerboards, Keithley Metrabyte DAS6402 and compatibles
config COMEDI_NI_AT_A2150
tristate "NI AT-A2150 ISA card support"
select COMEDI_ISADMA if ISA_DMA_API
+ select COMEDI_8254
---help---
Enable support for National Instruments AT-A2150 cards
config COMEDI_NI_AT_AO
tristate "NI AT-AO-6/10 EISA card support"
+ select COMEDI_8254
---help---
Enable support for National Instruments AT-AO-6/10 cards
config COMEDI_ADL_PCI9111
tristate "ADLink PCI-9111HR support"
+ select COMEDI_8254
---help---
Enable support for ADlink PCI9111 cards
config COMEDI_ADL_PCI9118
tristate "ADLink PCI-9118DG, PCI-9118HG, PCI-9118HR support"
depends on HAS_DMA
+ select COMEDI_8254
---help---
Enable support for ADlink PCI-9118DG, PCI-9118HG, PCI-9118HR cards
config COMEDI_ADV_PCI1710
tristate "Advantech PCI-171x, PCI-1720 and PCI-1731 support"
+ select COMEDI_8254
---help---
Enable support for Advantech PCI-1710, PCI-1710HG, PCI-1711,
PCI-1713, PCI-1720 and PCI-1731
config COMEDI_ADV_PCI_DIO
tristate "Advantech PCI DIO card support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for Advantech PCI DIO cards
config COMEDI_AMPLC_PCI224
tristate "Amplicon PCI224 and PCI234 support"
+ select COMEDI_8254
---help---
Enable support for Amplicon PCI224 and PCI234 AO boards
config COMEDI_AMPLC_PCI230
tristate "Amplicon PCI230 and PCI260 support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for Amplicon PCI230 and PCI260 Multifunction I/O
config COMEDI_CB_PCIDAS
tristate "MeasurementComputing PCI-DAS support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for ComputerBoards/MeasurementComputing PCI-DAS with
config COMEDI_CB_PCIMDAS
tristate "MeasurementComputing PCIM-DAS1602/16, PCIe-DAS1602/16 support"
+ select COMEDI_8254
select COMEDI_8255
---help---
Enable support for ComputerBoards/MeasurementComputing PCI Migration
config COMEDI_ME4000
tristate "Meilhaus ME-4000 support"
+ select COMEDI_8254
---help---
Enable support for Meilhaus PCI data acquisition cards
ME-4650, ME-4670i, ME-4680, ME-4680i and ME-4680is
config COMEDI_CB_DAS16_CS
tristate "CB DAS16 series PCMCIA support"
+ select COMEDI_8254
---help---
Enable support for the ComputerBoards/MeasurementComputing PCMCIA
cards DAS16/16, PCM-DAS16D/12 and PCM-DAS16s/16
endif # COMEDI_USB_DRIVERS
+config COMEDI_8254
+ tristate
+
config COMEDI_8255
tristate "Generic 8255 support"
---help---
called kcomedilib.
config COMEDI_AMPLC_DIO200
+ select COMEDI_8254
tristate
config COMEDI_AMPLC_PC236
config COMEDI_DAS08
tristate
+ select COMEDI_8254
select COMEDI_8255
config COMEDI_ISADMA
config COMEDI_NI_LABPC
tristate
+ select COMEDI_8254
select COMEDI_8255
config COMEDI_NI_LABPC_ISADMA
{
struct module *driver_module = NULL;
- if (dev == NULL)
+ if (!dev)
return;
mutex_lock(&dev->mutex);
if (dev->attached)
if (minor >= COMEDI_NUM_BOARD_MINORS) {
s = comedi_subdevice_from_minor(dev, minor);
- if (s == NULL || (s->subdev_flags & SDF_CMD_READ))
+ if (!s || (s->subdev_flags & SDF_CMD_READ))
return s;
}
return dev->read_subdev;
if (minor >= COMEDI_NUM_BOARD_MINORS) {
s = comedi_subdevice_from_minor(dev, minor);
- if (s == NULL || (s->subdev_flags & SDF_CMD_WRITE))
+ if (!s || (s->subdev_flags & SDF_CMD_WRITE))
return s;
}
return dev->write_subdev;
write_s = dev->write_subdev;
if (minor >= COMEDI_NUM_BOARD_MINORS) {
s = comedi_subdevice_from_minor(dev, minor);
- if (s == NULL || s->subdev_flags & SDF_CMD_READ)
+ if (!s || s->subdev_flags & SDF_CMD_READ)
read_s = s;
- if (s == NULL || s->subdev_flags & SDF_CMD_WRITE)
+ if (!s || s->subdev_flags & SDF_CMD_WRITE)
write_s = s;
}
cfp->last_attached = dev->attached;
if (!capable(CAP_SYS_ADMIN))
return -EPERM;
- if (arg == NULL) {
+ if (!arg) {
if (is_device_busy(dev))
return -EBUSY;
if (dev->attached) {
if (arg >= dev->n_subdevices)
return -EINVAL;
s = &dev->subdevices[arg];
- if (s->async == NULL)
+ if (!s->async)
return -EINVAL;
if (!s->busy)
unsigned i;
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
- if (dev == NULL)
+ if (!dev)
return ERR_PTR(-ENOMEM);
comedi_device_init(dev);
comedi_set_hw_dev(dev, hardware_device);
mutex_lock(&comedi_board_minor_table_lock);
for (i = hardware_device ? comedi_num_legacy_minors : 0;
i < COMEDI_NUM_BOARD_MINORS; ++i) {
- if (comedi_board_minor_table[i] == NULL) {
+ if (!comedi_board_minor_table[i]) {
comedi_board_minor_table[i] = dev;
break;
}
mutex_unlock(&dev->mutex);
comedi_device_cleanup(dev);
comedi_dev_put(dev);
- pr_err("ran out of minor numbers for board device files\n");
+ dev_err(hardware_device,
+ "ran out of minor numbers for board device files\n");
return ERR_PTR(-EBUSY);
}
dev->minor = i;
mutex_lock(&comedi_subdevice_minor_table_lock);
for (i = 0; i < COMEDI_NUM_SUBDEVICE_MINORS; ++i) {
- if (comedi_subdevice_minor_table[i] == NULL) {
+ if (!comedi_subdevice_minor_table[i]) {
comedi_subdevice_minor_table[i] = s;
break;
}
}
mutex_unlock(&comedi_subdevice_minor_table_lock);
if (i == COMEDI_NUM_SUBDEVICE_MINORS) {
- pr_err("ran out of minor numbers for subdevice files\n");
+ dev_err(dev->class_dev,
+ "ran out of minor numbers for subdevice files\n");
return -EBUSY;
}
i += COMEDI_NUM_BOARD_MINORS;
{
unsigned int i;
- if (s == NULL)
+ if (!s)
return;
if (s->minor < 0)
return;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "comedidev.h"
+#include "comedi_pci.h"
/**
* comedi_to_pci_dev() - comedi_device pointer to pci_dev pointer.
--- /dev/null
+/*
+ * comedi_pci.h
+ * header file for Comedi PCI drivers
+ *
+ * COMEDI - Linux Control and Measurement Device Interface
+ * Copyright (C) 1997-2000 David A. Schleef <ds@schleef.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _COMEDI_PCI_H
+#define _COMEDI_PCI_H
+
+#include <linux/pci.h>
+
+#include "comedidev.h"
+
+/*
+ * PCI Vendor IDs not in <linux/pci_ids.h>
+ */
+#define PCI_VENDOR_ID_KOLTER 0x1001
+#define PCI_VENDOR_ID_ICP 0x104c
+#define PCI_VENDOR_ID_DT 0x1116
+#define PCI_VENDOR_ID_IOTECH 0x1616
+#define PCI_VENDOR_ID_CONTEC 0x1221
+#define PCI_VENDOR_ID_RTD 0x1435
+#define PCI_VENDOR_ID_HUMUSOFT 0x186c
+
+struct pci_dev *comedi_to_pci_dev(struct comedi_device *);
+
+int comedi_pci_enable(struct comedi_device *);
+void comedi_pci_disable(struct comedi_device *);
+void comedi_pci_detach(struct comedi_device *);
+
+int comedi_pci_auto_config(struct pci_dev *, struct comedi_driver *,
+ unsigned long context);
+void comedi_pci_auto_unconfig(struct pci_dev *);
+
+int comedi_pci_driver_register(struct comedi_driver *, struct pci_driver *);
+void comedi_pci_driver_unregister(struct comedi_driver *, struct pci_driver *);
+
+/**
+ * module_comedi_pci_driver() - Helper macro for registering a comedi PCI driver
+ * @__comedi_driver: comedi_driver struct
+ * @__pci_driver: pci_driver struct
+ *
+ * Helper macro for comedi PCI drivers which do not do anything special
+ * in module init/exit. This eliminates a lot of boilerplate. Each
+ * module may only use this macro once, and calling it replaces
+ * module_init() and module_exit()
+ */
+#define module_comedi_pci_driver(__comedi_driver, __pci_driver) \
+ module_driver(__comedi_driver, comedi_pci_driver_register, \
+ comedi_pci_driver_unregister, &(__pci_driver))
+
+#endif /* _COMEDI_PCI_H */
struct comedi_device {
int use_count;
struct comedi_driver *driver;
+ struct comedi_8254 *pacer;
void *private;
struct device *class_dev;
module_driver(__comedi_driver, comedi_driver_register, \
comedi_driver_unregister)
-/* comedi_pci.c - comedi PCI driver specific functions */
-
-/*
- * PCI Vendor IDs not in <linux/pci_ids.h>
- */
-#define PCI_VENDOR_ID_KOLTER 0x1001
-#define PCI_VENDOR_ID_ICP 0x104c
-#define PCI_VENDOR_ID_DT 0x1116
-#define PCI_VENDOR_ID_IOTECH 0x1616
-#define PCI_VENDOR_ID_CONTEC 0x1221
-#define PCI_VENDOR_ID_RTD 0x1435
-#define PCI_VENDOR_ID_HUMUSOFT 0x186c
-
-struct pci_dev;
-struct pci_driver;
-
-struct pci_dev *comedi_to_pci_dev(struct comedi_device *);
-
-int comedi_pci_enable(struct comedi_device *);
-void comedi_pci_disable(struct comedi_device *);
-void comedi_pci_detach(struct comedi_device *);
-
-int comedi_pci_auto_config(struct pci_dev *, struct comedi_driver *,
- unsigned long context);
-void comedi_pci_auto_unconfig(struct pci_dev *);
-
-int comedi_pci_driver_register(struct comedi_driver *, struct pci_driver *);
-void comedi_pci_driver_unregister(struct comedi_driver *, struct pci_driver *);
-
-/**
- * module_comedi_pci_driver() - Helper macro for registering a comedi PCI driver
- * @__comedi_driver: comedi_driver struct
- * @__pci_driver: pci_driver struct
- *
- * Helper macro for comedi PCI drivers which do not do anything special
- * in module init/exit. This eliminates a lot of boilerplate. Each
- * module may only use this macro once, and calling it replaces
- * module_init() and module_exit()
- */
-#define module_comedi_pci_driver(__comedi_driver, __pci_driver) \
- module_driver(__comedi_driver, comedi_pci_driver_register, \
- comedi_pci_driver_unregister, &(__pci_driver))
-
#endif /* _COMEDIDEV_H */
{
if (hw_dev == dev->hw_dev)
return 0;
- if (dev->hw_dev != NULL)
+ if (dev->hw_dev)
return -EEXIST;
dev->hw_dev = get_device(hw_dev);
return 0;
dev->n_subdevices = 0;
}
kfree(dev->private);
+ kfree(dev->pacer);
dev->private = NULL;
+ dev->pacer = NULL;
dev->driver = NULL;
dev->board_name = NULL;
dev->board_ptr = NULL;
}
module_put(driv->module);
}
- if (driv == NULL) {
+ if (!driv) {
/* recognize has failed if we get here */
/* report valid board names before returning error */
for (driv = comedi_drivers; driv; driv = driv->next) {
ret = -EIO;
goto out;
}
- if (driv->attach == NULL) {
+ if (!driv->attach) {
/* driver does not support manual configuration */
dev_warn(dev->class_dev,
"driver '%s' does not support attach using comedi_config\n",
void comedi_auto_unconfig(struct device *hardware_device)
{
- if (hardware_device == NULL)
+ if (!hardware_device)
return;
comedi_release_hardware_device(hardware_device);
}
+++ /dev/null
-/*
- * comedi/drivers/8253.h
- * Header file for 8253
- *
- * COMEDI - Linux Control and Measurement Device Interface
- * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef _8253_H
-#define _8253_H
-
-#include "../comedi.h"
-
-/*
- * Common oscillator base values in nanoseconds
- */
-#define I8254_OSC_BASE_10MHZ 100
-#define I8254_OSC_BASE_5MHZ 200
-#define I8254_OSC_BASE_4MHZ 250
-#define I8254_OSC_BASE_2MHZ 500
-#define I8254_OSC_BASE_1MHZ 1000
-
-static inline void i8253_cascade_ns_to_timer(int i8253_osc_base,
- unsigned int *d1,
- unsigned int *d2,
- unsigned int *nanosec,
- unsigned int flags)
-{
- unsigned int divider;
- unsigned int div1, div2;
- unsigned int div1_glb, div2_glb, ns_glb;
- unsigned int div1_lub, div2_lub, ns_lub;
- unsigned int ns;
- unsigned int start;
- unsigned int ns_low, ns_high;
- static const unsigned int max_count = 0x10000;
- /*
- * exit early if everything is already correct (this can save time
- * since this function may be called repeatedly during command tests
- * and execution)
- */
- div1 = *d1 ? *d1 : max_count;
- div2 = *d2 ? *d2 : max_count;
- divider = div1 * div2;
- if (div1 * div2 * i8253_osc_base == *nanosec &&
- div1 > 1 && div1 <= max_count && div2 > 1 && div2 <= max_count &&
- /* check for overflow */
- divider > div1 && divider > div2 &&
- divider * i8253_osc_base > divider &&
- divider * i8253_osc_base > i8253_osc_base) {
- return;
- }
-
- divider = *nanosec / i8253_osc_base;
-
- div1_lub = div2_lub = 0;
- div1_glb = div2_glb = 0;
-
- ns_glb = 0;
- ns_lub = 0xffffffff;
-
- div2 = max_count;
- start = divider / div2;
- if (start < 2)
- start = 2;
- for (div1 = start; div1 <= divider / div1 + 1 && div1 <= max_count;
- div1++) {
- for (div2 = divider / div1;
- div1 * div2 <= divider + div1 + 1 && div2 <= max_count;
- div2++) {
- ns = i8253_osc_base * div1 * div2;
- if (ns <= *nanosec && ns > ns_glb) {
- ns_glb = ns;
- div1_glb = div1;
- div2_glb = div2;
- }
- if (ns >= *nanosec && ns < ns_lub) {
- ns_lub = ns;
- div1_lub = div1;
- div2_lub = div2;
- }
- }
- }
-
- switch (flags & CMDF_ROUND_MASK) {
- case CMDF_ROUND_NEAREST:
- default:
- ns_high = div1_lub * div2_lub * i8253_osc_base;
- ns_low = div1_glb * div2_glb * i8253_osc_base;
- if (ns_high - *nanosec < *nanosec - ns_low) {
- div1 = div1_lub;
- div2 = div2_lub;
- } else {
- div1 = div1_glb;
- div2 = div2_glb;
- }
- break;
- case CMDF_ROUND_UP:
- div1 = div1_lub;
- div2 = div2_lub;
- break;
- case CMDF_ROUND_DOWN:
- div1 = div1_glb;
- div2 = div2_glb;
- break;
- }
-
- *nanosec = div1 * div2 * i8253_osc_base;
- /* masking is done since counter maps zero to 0x10000 */
- *d1 = div1 & 0xffff;
- *d2 = div2 & 0xffff;
-}
-
-#ifndef CMDTEST
-/*
- * i8254_load programs 8254 counter chip. It should also work for the 8253.
- * base_address is the lowest io address
- * for the chip (the address of counter 0).
- * counter_number is the counter you want to load (0,1 or 2)
- * count is the number to load into the counter.
- *
- * You probably want to use mode 2.
- *
- * Use i8254_mm_load() if you board uses memory-mapped io, it is
- * the same as i8254_load() except it uses writeb() instead of outb().
- *
- * Neither i8254_load() or i8254_read() do their loading/reading
- * atomically. The 16 bit read/writes are performed with two successive
- * 8 bit read/writes. So if two parts of your driver do a load/read on
- * the same counter, it may be necessary to protect these functions
- * with a spinlock.
- *
- * FMH
- */
-
-#define i8254_control_reg 3
-
-static inline int i8254_load(unsigned long base_address, unsigned int regshift,
- unsigned int counter_number, unsigned int count,
- unsigned int mode)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return -1;
- if (count > 0xffff)
- return -1;
- if (mode > 5)
- return -1;
- if ((mode == 2 || mode == 3) && count == 1)
- return -1;
-
- byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= (mode << 1); /* set counter mode */
- outb(byte, base_address + (i8254_control_reg << regshift));
- byte = count & 0xff; /* lsb of counter value */
- outb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
- outb(byte, base_address + (counter_number << regshift));
-
- return 0;
-}
-
-static inline int i8254_mm_load(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number,
- unsigned int count,
- unsigned int mode)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return -1;
- if (count > 0xffff)
- return -1;
- if (mode > 5)
- return -1;
- if ((mode == 2 || mode == 3) && count == 1)
- return -1;
-
- byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= (mode << 1); /* set counter mode */
- writeb(byte, base_address + (i8254_control_reg << regshift));
- byte = count & 0xff; /* lsb of counter value */
- writeb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
- writeb(byte, base_address + (counter_number << regshift));
-
- return 0;
-}
-
-/* Returns 16 bit counter value, should work for 8253 also. */
-static inline int i8254_read(unsigned long base_address, unsigned int regshift,
- unsigned int counter_number)
-{
- unsigned int byte;
- int ret;
-
- if (counter_number > 2)
- return -1;
-
- /* latch counter */
- byte = counter_number << 6;
- outb(byte, base_address + (i8254_control_reg << regshift));
-
- /* read lsb */
- ret = inb(base_address + (counter_number << regshift));
- /* read msb */
- ret += inb(base_address + (counter_number << regshift)) << 8;
-
- return ret;
-}
-
-static inline int i8254_mm_read(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number)
-{
- unsigned int byte;
- int ret;
-
- if (counter_number > 2)
- return -1;
-
- /* latch counter */
- byte = counter_number << 6;
- writeb(byte, base_address + (i8254_control_reg << regshift));
-
- /* read lsb */
- ret = readb(base_address + (counter_number << regshift));
- /* read msb */
- ret += readb(base_address + (counter_number << regshift)) << 8;
-
- return ret;
-}
-
-/* Loads 16 bit initial counter value, should work for 8253 also. */
-static inline void i8254_write(unsigned long base_address,
- unsigned int regshift,
- unsigned int counter_number, unsigned int count)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return;
-
- byte = count & 0xff; /* lsb of counter value */
- outb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
- outb(byte, base_address + (counter_number << regshift));
-}
-
-static inline void i8254_mm_write(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number,
- unsigned int count)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return;
-
- byte = count & 0xff; /* lsb of counter value */
- writeb(byte, base_address + (counter_number << regshift));
- byte = (count >> 8) & 0xff; /* msb of counter value */
- writeb(byte, base_address + (counter_number << regshift));
-}
-
-/*
- * Set counter mode, should work for 8253 also.
- * Note: the 'mode' value is different to that for i8254_load() and comes
- * from the INSN_CONFIG_8254_SET_MODE command:
- * I8254_MODE0, I8254_MODE1, ..., I8254_MODE5
- * OR'ed with:
- * I8254_BCD, I8254_BINARY
- */
-static inline int i8254_set_mode(unsigned long base_address,
- unsigned int regshift,
- unsigned int counter_number, unsigned int mode)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return -1;
- if (mode > (I8254_MODE5 | I8254_BCD))
- return -1;
-
- byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= mode; /* set counter mode and BCD|binary */
- outb(byte, base_address + (i8254_control_reg << regshift));
-
- return 0;
-}
-
-static inline int i8254_mm_set_mode(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number,
- unsigned int mode)
-{
- unsigned int byte;
-
- if (counter_number > 2)
- return -1;
- if (mode > (I8254_MODE5 | I8254_BCD))
- return -1;
-
- byte = counter_number << 6;
- byte |= 0x30; /* load low then high byte */
- byte |= mode; /* set counter mode and BCD|binary */
- writeb(byte, base_address + (i8254_control_reg << regshift));
-
- return 0;
-}
-
-static inline int i8254_status(unsigned long base_address,
- unsigned int regshift,
- unsigned int counter_number)
-{
- outb(0xE0 | (2 << counter_number),
- base_address + (i8254_control_reg << regshift));
- return inb(base_address + (counter_number << regshift));
-}
-
-static inline int i8254_mm_status(void __iomem *base_address,
- unsigned int regshift,
- unsigned int counter_number)
-{
- writeb(0xE0 | (2 << counter_number),
- base_address + (i8254_control_reg << regshift));
- return readb(base_address + (counter_number << regshift));
-}
-
-#endif
-
-#endif
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "8255.h"
},
};
-/* ripped from mite.h and mite_setup2() to avoid mite dependancy */
+/* ripped from mite.h and mite_setup2() to avoid mite dependency */
#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */
#define WENAB (1 << 7) /* window enable */
ccflags-$(CONFIG_COMEDI_DEBUG) := -DDEBUG
# Comedi "helper" modules
+obj-$(CONFIG_COMEDI_8254) += comedi_8254.o
obj-$(CONFIG_COMEDI_ISADMA) += comedi_isadma.o
# Comedi misc drivers
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "amcc_s5933.h"
if (!devpriv->ctrl) {
dev_warn(dev->class_dev,
- "Interrupts disabled due to mode configuration!\n");
+ "Interrupts disabled due to mode configuration!\n");
return -EINVAL;
}
}
static int apci1032_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct apci1032_private *devpriv;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "amcc_s5933.h"
#include "z8536.h"
*
* Mask Meaning
* ---------- ------------------------------------------
- * 0x00000001 Event 1 has occured
- * 0x00000010 Event 2 has occured
+ * 0x00000001 Event 1 has occurred
+ * 0x00000010 Event 2 has occurred
* 0x00000100 Counter/timer 1 has run down (not implemented)
* 0x00001000 Counter/timer 2 has run down (not implemented)
* 0x00010000 Counter 3 has run down (not implemented)
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "addi_watchdog.h"
#include "comedi_fc.h"
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "addi_tcw.h"
#include "addi_watchdog.h"
if (!devpriv->ctrl) {
dev_warn(dev->class_dev,
- "Interrupts disabled due to mode configuration!\n");
+ "Interrupts disabled due to mode configuration!\n");
return -EINVAL;
}
}
static int apci1564_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct apci1564_private *devpriv;
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* Register I/O map
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "addi_watchdog.h"
#include "comedi_fc.h"
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "addi_watchdog.h"
/*
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "amcc_s5933.h"
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "amcc_s5933.h"
outb(NVCMD_LOAD_HIGH, iobase + AMCC_OP_REG_MCSR_NVCMD);
apci3501_eeprom_wait(iobase);
outb(((addr + i) >> 8) & 0xff,
- iobase + AMCC_OP_REG_MCSR_NVDATA);
+ iobase + AMCC_OP_REG_MCSR_NVDATA);
apci3501_eeprom_wait(iobase);
/* Read the eeprom data byte */
/* Disable Interrupt */
ul_Command1 = inl(dev->iobase + APCI3501_TIMER_CTRL_REG);
- ul_Command1 = (ul_Command1 & 0xFFFFF9FDul);
+ ul_Command1 = ul_Command1 & 0xFFFFF9FDul;
outl(ul_Command1, dev->iobase + APCI3501_TIMER_CTRL_REG);
ui_Timer_AOWatchdog = inl(dev->iobase + APCI3501_TIMER_IRQ_REG) & 0x1;
/* Enable Interrupt Send a signal to from kernel to user space */
send_sig(SIGIO, devpriv->tsk_Current, 0);
ul_Command1 = inl(dev->iobase + APCI3501_TIMER_CTRL_REG);
- ul_Command1 = ((ul_Command1 & 0xFFFFF9FDul) | 1 << 1);
+ ul_Command1 = (ul_Command1 & 0xFFFFF9FDul) | 1 << 1;
outl(ul_Command1, dev->iobase + APCI3501_TIMER_CTRL_REG);
inl(dev->iobase + APCI3501_TIMER_STATUS_REG);
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
/* Time base is 20ms, let the user know the timeout */
dev_info(dev->class_dev, "watchdog enabled, timeout:%dms\n",
- 20 * reload + 20);
+ 20 * reload + 20);
break;
case INSN_CONFIG_DISARM:
spriv->wdog_ctrl = 0;
/*
* Driver: adl_pci6208
* Description: ADLink PCI-6208/6216 Series Multi-channel Analog Output Cards
- * Devices: [ADLink] PCI-6208 (adl_pci6208), PCI-6216 (adl_pci6216)
+ * Devices: [ADLink] PCI-6208 (adl_pci6208), PCI-6216
* Author: nsyeow <nsyeow@pd.jaring.my>
- * Updated: Fri, 30 Jan 2004 14:44:27 +0800
+ * Updated: Wed, 11 Feb 2015 11:37:18 +0000
* Status: untested
*
* Configuration Options: not applicable, uses PCI auto config
+ *
+ * All supported devices share the same PCI device ID and are treated as a
+ * PCI-6216 with 16 analog output channels. On a PCI-6208, the upper 8
+ * channels exist in registers, but don't go to DAC chips.
*/
#include <linux/module.h>
#include <linux/delay.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* PCI-6208/6216-GL register map
#define PCI6208_DIO_DI_MASK (0xf0)
#define PCI6208_DIO_DI_SHIFT (4)
-enum pci6208_boardid {
- BOARD_PCI6208,
- BOARD_PCI6216,
-};
-
-struct pci6208_board {
- const char *name;
- int ao_chans;
-};
-
-static const struct pci6208_board pci6208_boards[] = {
- [BOARD_PCI6208] = {
- .name = "adl_pci6208",
- .ao_chans = 8,
- },
- [BOARD_PCI6216] = {
- .name = "adl_pci6216",
- .ao_chans = 16,
- },
-};
-
static int pci6208_ao_eoc(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn,
}
static int pci6208_auto_attach(struct comedi_device *dev,
- unsigned long context)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
- const struct pci6208_board *boardinfo = NULL;
struct comedi_subdevice *s;
unsigned int val;
int ret;
- if (context < ARRAY_SIZE(pci6208_boards))
- boardinfo = &pci6208_boards[context];
- if (!boardinfo)
- return -ENODEV;
- dev->board_ptr = boardinfo;
- dev->board_name = boardinfo->name;
-
ret = comedi_pci_enable(dev);
if (ret)
return ret;
/* analog output subdevice */
s->type = COMEDI_SUBD_AO;
s->subdev_flags = SDF_WRITABLE;
- s->n_chan = boardinfo->ao_chans;
+ s->n_chan = 16; /* Only 8 usable on PCI-6208 */
s->maxdata = 0xffff;
s->range_table = &range_bipolar10;
s->insn_write = pci6208_ao_insn_write;
}
static const struct pci_device_id adl_pci6208_pci_table[] = {
- { PCI_VDEVICE(ADLINK, 0x6208), BOARD_PCI6208 },
- { PCI_VDEVICE(ADLINK, 0x6216), BOARD_PCI6216 },
+ { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, 0x6208) },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050,
+ 0x9999, 0x6208) },
{ 0 }
};
MODULE_DEVICE_TABLE(pci, adl_pci6208_pci_table);
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* Register I/O map (32-bit access only)
#include <linux/kernel.h>
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define PCI8164_AXIS(x) ((x) * 0x08)
#define PCI8164_CMD_MSTS_REG 0x00
}
static int adl_pci8164_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct comedi_subdevice *s;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "8253.h"
#include "plx9052.h"
#include "comedi_fc.h"
+#include "comedi_8254.h"
#define PCI9111_FIFO_HALF_SIZE 512
unsigned int chunk_counter;
unsigned int chunk_num_samples;
- unsigned int div1;
- unsigned int div2;
-
unsigned short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
};
outb(flags, io_base + PLX9052_INTCSR);
}
-static void pci9111_timer_set(struct comedi_device *dev)
-{
- struct pci9111_private_data *dev_private = dev->private;
- unsigned long timer_base = dev->iobase + PCI9111_8254_BASE_REG;
-
- i8254_set_mode(timer_base, 1, 0, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
-
- udelay(1);
-
- i8254_write(timer_base, 1, 2, dev_private->div2);
- i8254_write(timer_base, 1, 1, dev_private->div1);
-}
-
enum pci9111_ISC0_sources {
irq_on_eoc,
irq_on_fifo_half_full
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- struct pci9111_private_data *dev_private = dev->private;
int err = 0;
unsigned int arg;
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &dev_private->div1,
- &dev_private->div2,
- &arg, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
return 5;
return 0;
-
}
static int pci9111_ai_do_cmd(struct comedi_device *dev,
/* This is the same gain on every channel */
outb(CR_RANGE(cmd->chanlist[0]) & PCI9111_AI_RANGE_MASK,
- dev->iobase + PCI9111_AI_RANGE_STAT_REG);
+ dev->iobase + PCI9111_AI_RANGE_STAT_REG);
/* Set timer pacer */
dev_private->scan_delay = 0;
if (cmd->convert_src == TRIG_TIMER) {
trig |= PCI9111_AI_TRIG_CTRL_TPST;
- pci9111_timer_set(dev);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
pci9111_fifo_reset(dev);
pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
irq_on_timer_tick);
status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
if ((status & PCI9111_AI_RANGE_MASK) != range) {
outb(range & PCI9111_AI_RANGE_MASK,
- dev->iobase + PCI9111_AI_RANGE_STAT_REG);
+ dev->iobase + PCI9111_AI_RANGE_STAT_REG);
}
pci9111_fifo_reset(dev);
/* disable A/D triggers (software trigger mode) and auto scan off */
outb(0, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
- /* Reset 8254 chip */
- dev_private->div1 = 0;
- dev_private->div2 = 0;
- pci9111_timer_set(dev);
-
return 0;
}
static int pci9111_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct pci9111_private_data *dev_private;
dev->irq = pcidev->irq;
}
+ dev->pacer = comedi_8254_init(dev->iobase + PCI9111_8254_BASE_REG,
+ I8254_OSC_BASE_2MHZ, I8254_IO16, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/gfp.h>
#include <linux/interrupt.h>
#include <linux/io.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "amcc_s5933.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "comedi_fc.h"
#define IORANGE_9118 64 /* I hope */
/*
* PCI BAR2 Register map (dev->iobase)
*/
-#define PCI9118_TIMER_REG(x) (0x00 + ((x) * 4))
-#define PCI9118_TIMER_CTRL_REG 0x0c
+#define PCI9118_TIMER_BASE 0x00
#define PCI9118_AI_FIFO_REG 0x10
#define PCI9118_AO_REG(x) (0x10 + ((x) * 4))
#define PCI9118_AI_STATUS_REG 0x18
* measure can start/stop
* on external trigger
*/
- unsigned int ai_divisor1, ai_divisor2; /*
- * divisors for start of measure
- * on external start
- */
unsigned int dma_actbuf; /* which buffer is used now */
struct pci9118_dmabuf dmabuf[2];
int softsshdelay; /*
outl(intcsr, devpriv->iobase_a + AMCC_OP_REG_INTCSR);
}
-static void pci9118_timer_write(struct comedi_device *dev,
- unsigned int timer, unsigned int val)
-{
- outl(val & 0xff, dev->iobase + PCI9118_TIMER_REG(timer));
- outl((val >> 8) & 0xff, dev->iobase + PCI9118_TIMER_REG(timer));
-}
-
-static void pci9118_timer_set_mode(struct comedi_device *dev,
- unsigned int timer, unsigned int mode)
-{
- unsigned int val;
-
- val = timer << 6; /* select timer */
- val |= 0x30; /* load low then high byte */
- val |= mode; /* set timer mode and BCD|binary */
- outl(val, dev->iobase + PCI9118_TIMER_CTRL_REG);
-}
-
static void pci9118_ai_reset_fifo(struct comedi_device *dev)
{
/* writing any value resets the A/D FIFO */
devpriv->ai_cfg = PCI9118_AI_CFG_PDTRG | PCI9118_AI_CFG_PETRG |
PCI9118_AI_CFG_AM;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
- pci9118_timer_set_mode(dev, 0, I8254_MODE0);
- pci9118_timer_write(dev, 0, dmabuf->hw >> 1);
+ comedi_8254_load(dev->pacer, 0, dmabuf->hw >> 1,
+ I8254_MODE0 | I8254_BINARY);
devpriv->ai_cfg |= PCI9118_AI_CFG_START;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
}
unsigned int *div1, unsigned int *div2,
unsigned int chnsshfront)
{
+ struct comedi_8254 *pacer = dev->pacer;
struct comedi_cmd *cmd = &s->async->cmd;
- *div1 = *tim2 / I8254_OSC_BASE_4MHZ; /* convert timer (burst) */
- *div2 = *tim1 / I8254_OSC_BASE_4MHZ; /* scan timer */
+ *div1 = *tim2 / pacer->osc_base; /* convert timer (burst) */
+ *div2 = *tim1 / pacer->osc_base; /* scan timer */
*div2 = *div2 / *div1; /* major timer is c1*c2 */
if (*div2 < chans)
*div2 = chans;
- *tim2 = *div1 * I8254_OSC_BASE_4MHZ; /* real convert timer */
+ *tim2 = *div1 * pacer->osc_base; /* real convert timer */
if (cmd->convert_src == TRIG_NOW && !chnsshfront) {
/* use BSSH signal */
*div2 = chans + 2;
}
- *tim1 = *div1 * *div2 * I8254_OSC_BASE_4MHZ;
+ *tim1 = *div1 * *div2 * pacer->osc_base;
}
static void pci9118_start_pacer(struct comedi_device *dev, int mode)
{
- struct pci9118_private *devpriv = dev->private;
-
- pci9118_timer_set_mode(dev, 1, I8254_MODE2);
- pci9118_timer_set_mode(dev, 2, I8254_MODE2);
- udelay(1);
-
- if ((mode == 1) || (mode == 2) || (mode == 4)) {
- pci9118_timer_write(dev, 2, devpriv->ai_divisor2);
- pci9118_timer_write(dev, 1, devpriv->ai_divisor1);
- }
+ if (mode == 1 || mode == 2 || mode == 4)
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
}
static int pci9118_ai_cancel(struct comedi_device *dev,
if (devpriv->usedma)
pci9118_amcc_dma_ena(dev, false);
pci9118_exttrg_enable(dev, false);
- pci9118_start_pacer(dev, 0); /* stop 8254 counters */
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
/* set default config (disable burst and triggers) */
devpriv->ai_cfg = PCI9118_AI_CFG_PDTRG | PCI9118_AI_CFG_PETRG;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
array[i] ^= 0x8000;
else
array[i] = (array[i] >> 4) & 0x0fff;
-
}
}
/* outl(0x02000000|AINT_WRITE_COMPL, devpriv->iobase_a+AMCC_OP_REG_INTCSR); */
pci9118_amcc_dma_ena(dev, true);
outl(inl(devpriv->iobase_a + AMCC_OP_REG_INTCSR) | EN_A2P_TRANSFERS,
- devpriv->iobase_a + AMCC_OP_REG_INTCSR);
+ devpriv->iobase_a + AMCC_OP_REG_INTCSR);
/* allow bus mastering */
return 0;
static int pci9118_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
struct pci9118_private *devpriv = dev->private;
+ struct comedi_8254 *pacer = dev->pacer;
struct comedi_cmd *cmd = &s->async->cmd;
unsigned int addchans = 0;
else
devpriv->ai_do = 1;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_4MHZ,
- &devpriv->ai_divisor1,
- &devpriv->ai_divisor2,
- &cmd->convert_arg,
- devpriv->ai_flags &
- CMDF_ROUND_NEAREST);
+ comedi_8254_cascade_ns_to_timer(pacer, &cmd->convert_arg,
+ devpriv->ai_flags &
+ CMDF_ROUND_NEAREST);
+ comedi_8254_update_divisors(pacer);
devpriv->ai_ctrl |= PCI9118_AI_CTRL_TMRTR;
devpriv->ai_cfg |= PCI9118_AI_CFG_AM;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
- pci9118_timer_set_mode(dev, 0, I8254_MODE0);
- pci9118_timer_write(dev, 0, dmabuf->hw >> 1);
+ comedi_8254_load(pacer, 0, dmabuf->hw >> 1,
+ I8254_MODE0 | I8254_BINARY);
devpriv->ai_cfg |= PCI9118_AI_CFG_START;
}
}
&cmd->scan_begin_arg, &cmd->convert_arg,
devpriv->ai_flags,
devpriv->ai_n_realscanlen,
- &devpriv->ai_divisor1,
- &devpriv->ai_divisor2,
+ &pacer->divisor1,
+ &pacer->divisor2,
devpriv->ai_add_front);
devpriv->ai_ctrl |= PCI9118_AI_CTRL_TMRTR;
if (devpriv->usedma)
devpriv->ai_ctrl |= PCI9118_AI_CTRL_DMA;
- pci9118_start_pacer(dev, -1); /* stop pacer */
-
/* set default config (disable burst and triggers) */
devpriv->ai_cfg = PCI9118_AI_CFG_PDTRG | PCI9118_AI_CFG_PETRG;
outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG);
int err = 0;
unsigned int flags;
unsigned int arg;
- unsigned int divisor1 = 0, divisor2 = 0;
/* Step 1 : check if triggers are trivially valid */
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_4MHZ,
- &divisor1, &divisor2,
- &arg, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src & (TRIG_TIMER | TRIG_NOW)) {
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_4MHZ,
- &divisor1, &divisor2,
- &arg, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
if (cmd->scan_begin_src == TRIG_TIMER &&
inl(dev->iobase + PCI9118_INT_CTRL_REG);
inl(dev->iobase + PCI9118_AI_STATUS_REG);
- /* reset and stop counters */
- pci9118_timer_set_mode(dev, 0, I8254_MODE0);
- pci9118_start_pacer(dev, 0);
-
/* reset DMA and scan queue */
outl(0, dev->iobase + PCI9118_AI_BURST_NUM_REG);
outl(1, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG);
devpriv->iobase_a = pci_resource_start(pcidev, 0);
dev->iobase = pci_resource_start(pcidev, 2);
+ dev->pacer = comedi_8254_init(dev->iobase + PCI9118_TIMER_BASE,
+ I8254_OSC_BASE_4MHZ, I8254_IO32, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
pci9118_reset(dev);
if (pcidev->irq) {
13-oct-2007
+ first try
-
-
*/
#include <linux/module.h>
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
-
/* only bits 0-4 have information about digital inputs */
data[1] = (inb(dev->iobase + ADQ12B_STINR) & ADQ12B_STINR_IN_MASK);
* Author: Michal Dobes <dobes@tesnet.cz>
*
* Thanks to ZhenGang Shang <ZhenGang.Shang@Advantech.com.cn>
- * for testing and informations.
+ * for testing and information.
*
* hardware driver for Advantech cards:
* card: PCI-1710, PCI-1710HG, PCI-1711, PCI-1713, PCI-1720, PCI-1731
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "amcc_s5933.h"
#define PCI171x_AD_DATA 0 /* R: A/D data */
#define PCI171X_TIMER_BASE 0x18
-#define PCI171x_CNT0 24 /* R/W: 8254 counter 0 */
-#define PCI171x_CNT1 26 /* R/W: 8254 counter 1 */
-#define PCI171x_CNT2 28 /* R/W: 8254 counter 2 */
-#define PCI171x_CNTCTRL 30 /* W: 8254 counter control */
-
/* upper bits from status register (PCI171x_STATUS) (lower is same with control
* reg) */
#define Status_FE 0x0100 /* 1=FIFO is empty */
#define Control_EXT 0x0004 /* 1=external trigger source */
#define Control_PACER 0x0002 /* 1=enable internal 8254 trigger source */
#define Control_SW 0x0001 /* 1=enable software trigger source */
-/* bits from counter control register (PCI171x_CNTCTRL) */
-#define Counter_BCD 0x0001 /* 0 = binary counter, 1 = BCD counter */
-#define Counter_M0 0x0002 /* M0-M2 select modes 0-5 */
-#define Counter_M1 0x0004 /* 000 = mode 0, 010 = mode 2 ... */
-#define Counter_M2 0x0008
-#define Counter_RW0 0x0010 /* RW0/RW1 select read/write mode */
-#define Counter_RW1 0x0020
-#define Counter_SC0 0x0040 /* Select Counter. Only 00 or 11 may */
-#define Counter_SC1 0x0080 /* be used, 00 for CNT0,
- * 11 for read-back command */
#define PCI1720_DA0 0 /* W: D/A register 0 */
#define PCI1720_DA1 2 /* W: D/A register 1 */
unsigned char ai_et;
unsigned int ai_et_CntrlReg;
unsigned int ai_et_MuxVal;
- unsigned int next_divisor1;
- unsigned int next_divisor2;
- unsigned int divisor1;
- unsigned int divisor2;
unsigned int act_chanlist[32]; /* list of scanned channel */
unsigned char saved_seglen; /* len of the non-repeating chanlist */
unsigned char da_ranges; /* copy of D/A outpit range register */
- unsigned int cnt0_write_wait; /* after a write, wait for update of the
- * internal state */
};
static int pci171x_ai_check_chanlist(struct comedi_device *dev,
return insn->n;
}
-static void pci171x_start_pacer(struct comedi_device *dev,
- bool load_counters)
-{
- struct pci1710_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCI171X_TIMER_BASE;
-
- i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
-
- if (load_counters) {
- i8254_write(timer_base, 1, 2, devpriv->divisor2);
- i8254_write(timer_base, 1, 1, devpriv->divisor1);
- }
-}
-
-static int pci171x_counter_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- unsigned int msb, lsb, ccntrl;
- int i;
-
- ccntrl = 0xD2; /* count only */
- for (i = 0; i < insn->n; i++) {
- outw(ccntrl, dev->iobase + PCI171x_CNTCTRL);
-
- lsb = inw(dev->iobase + PCI171x_CNT0) & 0xFF;
- msb = inw(dev->iobase + PCI171x_CNT0) & 0xFF;
-
- data[0] = lsb | (msb << 8);
- }
-
- return insn->n;
-}
-
-static int pci171x_counter_insn_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- struct pci1710_private *devpriv = dev->private;
- uint msb, lsb, ccntrl, status;
-
- lsb = data[0] & 0x00FF;
- msb = (data[0] & 0xFF00) >> 8;
-
- /* write lsb, then msb */
- outw(lsb, dev->iobase + PCI171x_CNT0);
- outw(msb, dev->iobase + PCI171x_CNT0);
-
- if (devpriv->cnt0_write_wait) {
- /* wait for the new count to be loaded */
- ccntrl = 0xE2;
- do {
- outw(ccntrl, dev->iobase + PCI171x_CNTCTRL);
- status = inw(dev->iobase + PCI171x_CNT0) & 0xFF;
- } while (status & 0x40);
- }
-
- return insn->n;
-}
-
-static int pci171x_counter_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
-#ifdef unused
- /* This doesn't work like a normal Comedi counter config */
- struct pci1710_private *devpriv = dev->private;
- uint ccntrl = 0;
-
- devpriv->cnt0_write_wait = data[0] & 0x20;
-
- /* internal or external clock? */
- if (!(data[0] & 0x10)) { /* internal */
- devpriv->CntrlReg &= ~Control_CNT0;
- } else {
- devpriv->CntrlReg |= Control_CNT0;
- }
- outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
-
- if (data[0] & 0x01)
- ccntrl |= Counter_M0;
- if (data[0] & 0x02)
- ccntrl |= Counter_M1;
- if (data[0] & 0x04)
- ccntrl |= Counter_M2;
- if (data[0] & 0x08)
- ccntrl |= Counter_BCD;
- ccntrl |= Counter_RW0; /* set read/write mode */
- ccntrl |= Counter_RW1;
- outw(ccntrl, dev->iobase + PCI171x_CNTCTRL);
-#endif
-
- return 1;
-}
-
static int pci1720_ao_insn_write(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn,
devpriv->CntrlReg |= Control_SW;
/* reset any operations */
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
- pci171x_start_pacer(dev, false);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
outb(0, dev->iobase + PCI171x_CLRFIFO);
outb(0, dev->iobase + PCI171x_CLRINT);
outb(0, dev->iobase + PCI171x_CLRINT);
outw(devpriv->ai_et_MuxVal, dev->iobase + PCI171x_MUX);
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
- pci171x_start_pacer(dev, true);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
return IRQ_HANDLED;
}
struct pci1710_private *devpriv = dev->private;
struct comedi_cmd *cmd = &s->async->cmd;
- pci171x_start_pacer(dev, false);
-
pci171x_ai_setup_chanlist(dev, s, cmd->chanlist, cmd->chanlist_len,
devpriv->saved_seglen);
if ((cmd->flags & CMDF_WAKE_EOS) == 0)
devpriv->CntrlReg |= Control_ONEFH;
- devpriv->divisor1 = devpriv->next_divisor1;
- devpriv->divisor2 = devpriv->next_divisor2;
-
if (cmd->convert_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
+
devpriv->CntrlReg |= Control_PACER | Control_IRQEN;
if (cmd->start_src == TRIG_EXT) {
devpriv->ai_et_CntrlReg = devpriv->CntrlReg;
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
if (cmd->start_src == TRIG_NOW)
- pci171x_start_pacer(dev, true);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
} else { /* TRIG_EXT */
devpriv->CntrlReg |= Control_EXT | Control_IRQEN;
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- struct pci1710_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->next_divisor1,
- &devpriv->next_divisor2,
- &arg, cmd->flags);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
return 0;
}
+static int pci171x_insn_counter_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct pci1710_private *devpriv = dev->private;
+
+ switch (data[0]) {
+ case INSN_CONFIG_SET_CLOCK_SRC:
+ switch (data[1]) {
+ case 0: /* internal */
+ devpriv->ai_et_CntrlReg &= ~Control_CNT0;
+ break;
+ case 1: /* external */
+ devpriv->ai_et_CntrlReg |= Control_CNT0;
+ break;
+ default:
+ return -EINVAL;
+ }
+ outw(devpriv->ai_et_CntrlReg, dev->iobase + PCI171x_CONTROL);
+ break;
+ case INSN_CONFIG_GET_CLOCK_SRC:
+ if (devpriv->ai_et_CntrlReg & Control_CNT0) {
+ data[1] = 1;
+ data[2] = 0;
+ } else {
+ data[1] = 0;
+ data[2] = I8254_OSC_BASE_10MHZ;
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return insn->n;
+}
+
static int pci171x_reset(struct comedi_device *dev)
{
const struct boardtype *board = dev->board_ptr;
struct pci1710_private *devpriv = dev->private;
- outw(0x30, dev->iobase + PCI171x_CNTCTRL);
/* Software trigger, CNT0=external */
devpriv->CntrlReg = Control_SW | Control_CNT0;
/* reset any operations */
outw(devpriv->CntrlReg, dev->iobase + PCI171x_CONTROL);
outb(0, dev->iobase + PCI171x_CLRFIFO); /* clear FIFO */
outb(0, dev->iobase + PCI171x_CLRINT); /* clear INT request */
- pci171x_start_pacer(dev, false);
devpriv->da_ranges = 0;
if (board->has_ao) {
/* set DACs to 0..5V */
return ret;
dev->iobase = pci_resource_start(pcidev, 2);
+ dev->pacer = comedi_8254_init(dev->iobase + PCI171X_TIMER_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO16, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
n_subdevices = 0;
if (board->n_aichan)
n_subdevices++;
subdev++;
}
+ /* Counter subdevice (8254) */
if (board->has_counter) {
s = &dev->subdevices[subdev];
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
- s->n_chan = 1;
- s->maxdata = 0xffff;
- s->range_table = &range_unknown;
- s->insn_read = pci171x_counter_insn_read;
- s->insn_write = pci171x_counter_insn_write;
- s->insn_config = pci171x_counter_insn_config;
+ comedi_8254_subdevice_init(s, dev->pacer);
+
+ dev->pacer->insn_config = pci171x_insn_counter_config;
+
+ /* counters 1 and 2 are used internally for the pacer */
+ comedi_8254_set_busy(dev->pacer, 1, true);
+ comedi_8254_set_busy(dev->pacer, 2, true);
+
subdev++;
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* PCI Bar 2 I/O Register map (dev->iobase)
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* PCI bar 2 Register I/O map (dev->iobase)
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "8255.h"
-#include "8253.h"
+#include "comedi_8254.h"
/* hardware types of the cards */
enum hw_cards_id {
#define MAX_DO_SUBDEVS 2 /* max number of DO subdevices per card */
#define MAX_DIO_SUBDEVG 2 /* max number of DIO subdevices group per
* card */
-#define MAX_8254_SUBDEVS 1 /* max number of 8254 counter subdevs per
- * card */
- /* (could be more than one 8254 per
- * subdevice) */
-
-#define SIZE_8254 4 /* 8254 IO space length */
#define PCIDIO_MAINREG 2 /* main I/O region for all Advantech cards? */
int chans; /* num of chans */
int addr; /* PCI address ofset */
int regs; /* number of registers to read or 8255
- subdevices or 8254 chips */
+ subdevices */
unsigned int specflags; /* addon subdevice flags */
};
struct diosubd_data sdo[MAX_DO_SUBDEVS]; /* DO chans */
struct diosubd_data sdio[MAX_DIO_SUBDEVG]; /* DIO 8255 chans */
struct diosubd_data boardid; /* card supports board ID switch */
- struct diosubd_data s8254[MAX_8254_SUBDEVS]; /* 8254 subdevices */
+ unsigned long timer_regbase;
enum hw_io_access io_access;
};
.sdi[0] = { 32, PCI1735_DI, 4, 0, },
.sdo[0] = { 32, PCI1735_DO, 4, 0, },
.boardid = { 4, PCI1735_BOARDID, 1, SDF_INTERNAL, },
- .s8254[0] = { 3, PCI1735_C8254, 1, 0, },
+ .timer_regbase = PCI1735_C8254,
.io_access = IO_8b,
},
[TYPE_PCI1736] = {
.cardtype = TYPE_PCI1751,
.nsubdevs = 3,
.sdio[0] = { 48, PCI1751_DIO, 2, 0, },
- .s8254[0] = { 3, PCI1751_CNT, 1, 0, },
+ .timer_regbase = PCI1751_CNT,
.io_access = IO_8b,
},
[TYPE_PCI1752] = {
for (i = 0; i < d->regs; i++)
data[1] |= inb(dev->iobase + d->addr + i) << (8 * i);
-
return insn->n;
}
return insn->n;
}
-/*
-==============================================================================
-*/
-static int pci_8254_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct diosubd_data *d = (const struct diosubd_data *)s->private;
- unsigned int chan, chip, chipchan;
- unsigned long flags;
-
- chan = CR_CHAN(insn->chanspec); /* channel on subdevice */
- chip = chan / 3; /* chip on subdevice */
- chipchan = chan - (3 * chip); /* channel on chip on subdevice */
- spin_lock_irqsave(&s->spin_lock, flags);
- data[0] = i8254_read(dev->iobase + d->addr + (SIZE_8254 * chip),
- 0, chipchan);
- spin_unlock_irqrestore(&s->spin_lock, flags);
- return 1;
-}
-
-/*
-==============================================================================
-*/
-static int pci_8254_insn_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct diosubd_data *d = (const struct diosubd_data *)s->private;
- unsigned int chan, chip, chipchan;
- unsigned long flags;
-
- chan = CR_CHAN(insn->chanspec); /* channel on subdevice */
- chip = chan / 3; /* chip on subdevice */
- chipchan = chan - (3 * chip); /* channel on chip on subdevice */
- spin_lock_irqsave(&s->spin_lock, flags);
- i8254_write(dev->iobase + d->addr + (SIZE_8254 * chip),
- 0, chipchan, data[0]);
- spin_unlock_irqrestore(&s->spin_lock, flags);
- return 1;
-}
-
-/*
-==============================================================================
-*/
-static int pci_8254_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct diosubd_data *d = (const struct diosubd_data *)s->private;
- unsigned int chan, chip, chipchan;
- unsigned long iobase;
- int ret = 0;
- unsigned long flags;
-
- chan = CR_CHAN(insn->chanspec); /* channel on subdevice */
- chip = chan / 3; /* chip on subdevice */
- chipchan = chan - (3 * chip); /* channel on chip on subdevice */
- iobase = dev->iobase + d->addr + (SIZE_8254 * chip);
- spin_lock_irqsave(&s->spin_lock, flags);
- switch (data[0]) {
- case INSN_CONFIG_SET_COUNTER_MODE:
- ret = i8254_set_mode(iobase, 0, chipchan, data[1]);
- if (ret < 0)
- ret = -EINVAL;
- break;
- case INSN_CONFIG_8254_READ_STATUS:
- data[1] = i8254_status(iobase, 0, chipchan);
- break;
- default:
- ret = -EINVAL;
- break;
- }
- spin_unlock_irqrestore(&s->spin_lock, flags);
- return ret < 0 ? ret : insn->n;
-}
-
/*
==============================================================================
*/
outb(0, dev->iobase + PCI1735_DO + 1);
outb(0, dev->iobase + PCI1735_DO + 2);
outb(0, dev->iobase + PCI1735_DO + 3);
- i8254_set_mode(dev->iobase + PCI1735_C8254, 0, 0, I8254_MODE0);
- i8254_set_mode(dev->iobase + PCI1735_C8254, 0, 1, I8254_MODE0);
- i8254_set_mode(dev->iobase + PCI1735_C8254, 0, 2, I8254_MODE0);
break;
case TYPE_PCI1736:
return 0;
}
-/*
-==============================================================================
-*/
-static int pci_dio_add_8254(struct comedi_device *dev,
- struct comedi_subdevice *s,
- const struct diosubd_data *d)
-{
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
- s->n_chan = d->chans;
- s->maxdata = 65535;
- s->len_chanlist = d->chans;
- s->insn_read = pci_8254_insn_read;
- s->insn_write = pci_8254_insn_write;
- s->insn_config = pci_8254_insn_config;
- s->private = (void *)d;
-
- return 0;
-}
-
static unsigned long pci_dio_override_cardtype(struct pci_dev *pcidev,
unsigned long cardtype)
{
subdev++;
}
- for (i = 0; i < MAX_8254_SUBDEVS; i++)
- if (this_board->s8254[i].chans) {
- s = &dev->subdevices[subdev];
- pci_dio_add_8254(dev, s, &this_board->s8254[i]);
- subdev++;
- }
+ if (this_board->timer_regbase) {
+ s = &dev->subdevices[subdev];
+
+ dev->pacer = comedi_8254_init(dev->iobase +
+ this_board->timer_regbase,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ comedi_8254_subdevice_init(s, dev->pacer);
+
+ subdev++;
+ }
if (this_board->cardtype == TYPE_PCI1760)
pci1760_attach(dev);
#include "amplc_dio200.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h" /* only for register defines */
/* 200 series registers */
#define DIO200_IO_SIZE 0x20
#define DIO200_PCIE_IO_SIZE 0x4000
-#define DIO200_XCLK_SCE 0x18 /* Group X clock selection register */
-#define DIO200_YCLK_SCE 0x19 /* Group Y clock selection register */
-#define DIO200_ZCLK_SCE 0x1a /* Group Z clock selection register */
-#define DIO200_XGAT_SCE 0x1b /* Group X gate selection register */
-#define DIO200_YGAT_SCE 0x1c /* Group Y gate selection register */
-#define DIO200_ZGAT_SCE 0x1d /* Group Z gate selection register */
+#define DIO200_CLK_SCE(x) (0x18 + (x)) /* Group X/Y/Z clock sel reg */
+#define DIO200_GAT_SCE(x) (0x1b + (x)) /* Group X/Y/Z gate sel reg */
#define DIO200_INT_SCE 0x1e /* Interrupt enable/status register */
/* Extra registers for new PCIe boards */
#define DIO200_ENHANCE 0x20 /* 1 to enable enhanced features */
1000000, /* 1 millisecond. */
};
-struct dio200_subdev_8254 {
- unsigned int ofs; /* Counter base offset */
- unsigned int clk_sce_ofs; /* CLK_SCE base address */
- unsigned int gat_sce_ofs; /* GAT_SCE base address */
- int which; /* Bit 5 of CLK_SCE or GAT_SCE */
- unsigned int clock_src[3]; /* Current clock sources */
- unsigned int gate_src[3]; /* Current gate sources */
- spinlock_t spinlock;
-};
-
struct dio200_subdev_8255 {
unsigned int ofs; /* DIO base offset */
};
outl(val, dev->iobase + offset);
}
+static unsigned int dio200_subdev_8254_offset(struct comedi_device *dev,
+ struct comedi_subdevice *s)
+{
+ const struct dio200_board *board = dev->board_ptr;
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int offset;
+
+ /* get the offset that was passed to comedi_8254_*_init() */
+ if (dev->mmio)
+ offset = i8254->mmio - dev->mmio;
+ else
+ offset = i8254->iobase - dev->iobase;
+
+ /* remove the shift that was added for PCIe boards */
+ if (board->is_pcie)
+ offset >>= 3;
+
+ /* this offset now works for the dio200_{read,write} helpers */
+ return offset;
+}
+
static int dio200_subdev_intr_insn_bits(struct comedi_device *dev,
struct comedi_subdevice *s,
struct comedi_insn *insn,
return IRQ_RETVAL(handled);
}
-static unsigned int dio200_subdev_8254_read_chan(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int chan)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned int val;
-
- /* latch counter */
- val = chan << 6;
- dio200_write8(dev, subpriv->ofs + i8254_control_reg, val);
- /* read lsb, msb */
- val = dio200_read8(dev, subpriv->ofs + chan);
- val += dio200_read8(dev, subpriv->ofs + chan) << 8;
- return val;
-}
-
-static void dio200_subdev_8254_write_chan(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int chan,
- unsigned int count)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
-
- /* write lsb, msb */
- dio200_write8(dev, subpriv->ofs + chan, count & 0xff);
- dio200_write8(dev, subpriv->ofs + chan, (count >> 8) & 0xff);
-}
-
-static void dio200_subdev_8254_set_mode(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int chan,
- unsigned int mode)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned int byte;
-
- byte = chan << 6;
- byte |= 0x30; /* access order: lsb, msb */
- byte |= (mode & 0xf); /* counter mode and BCD|binary */
- dio200_write8(dev, subpriv->ofs + i8254_control_reg, byte);
-}
-
-static unsigned int dio200_subdev_8254_status(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int chan)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
-
- /* latch status */
- dio200_write8(dev, subpriv->ofs + i8254_control_reg,
- 0xe0 | (2 << chan));
- /* read status */
- return dio200_read8(dev, subpriv->ofs + chan);
-}
-
-static int dio200_subdev_8254_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
- int chan = CR_CHAN(insn->chanspec);
- unsigned int n;
- unsigned long flags;
-
- for (n = 0; n < insn->n; n++) {
- spin_lock_irqsave(&subpriv->spinlock, flags);
- data[n] = dio200_subdev_8254_read_chan(dev, s, chan);
- spin_unlock_irqrestore(&subpriv->spinlock, flags);
- }
- return insn->n;
-}
-
-static int dio200_subdev_8254_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- struct dio200_subdev_8254 *subpriv = s->private;
- int chan = CR_CHAN(insn->chanspec);
- unsigned int n;
- unsigned long flags;
-
- for (n = 0; n < insn->n; n++) {
- spin_lock_irqsave(&subpriv->spinlock, flags);
- dio200_subdev_8254_write_chan(dev, s, chan, data[n]);
- spin_unlock_irqrestore(&subpriv->spinlock, flags);
- }
- return insn->n;
-}
-
-static int dio200_subdev_8254_set_gate_src(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int counter_number,
- unsigned int gate_src)
-{
- const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned char byte;
-
- if (!board->has_clk_gat_sce)
- return -1;
- if (counter_number > 2)
- return -1;
- if (gate_src > (board->is_pcie ? 31 : 7))
- return -1;
-
- subpriv->gate_src[counter_number] = gate_src;
- byte = gat_sce(subpriv->which, counter_number, gate_src);
- dio200_write8(dev, subpriv->gat_sce_ofs, byte);
-
- return 0;
-}
-
-static int dio200_subdev_8254_get_gate_src(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int counter_number)
-{
- const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv = s->private;
-
- if (!board->has_clk_gat_sce)
- return -1;
- if (counter_number > 2)
- return -1;
-
- return subpriv->gate_src[counter_number];
-}
-
-static int dio200_subdev_8254_set_clock_src(struct comedi_device *dev,
+static void dio200_subdev_8254_set_gate_src(struct comedi_device *dev,
struct comedi_subdevice *s,
- unsigned int counter_number,
- unsigned int clock_src)
+ unsigned int chan,
+ unsigned int src)
{
- const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned char byte;
-
- if (!board->has_clk_gat_sce)
- return -1;
- if (counter_number > 2)
- return -1;
- if (clock_src > (board->is_pcie ? 31 : 7))
- return -1;
-
- subpriv->clock_src[counter_number] = clock_src;
- byte = clk_sce(subpriv->which, counter_number, clock_src);
- dio200_write8(dev, subpriv->clk_sce_ofs, byte);
+ unsigned int offset = dio200_subdev_8254_offset(dev, s);
- return 0;
+ dio200_write8(dev, DIO200_GAT_SCE(offset >> 3),
+ gat_sce((offset >> 2) & 1, chan, src));
}
-static int dio200_subdev_8254_get_clock_src(struct comedi_device *dev,
- struct comedi_subdevice *s,
- unsigned int counter_number,
- unsigned int *period_ns)
+static void dio200_subdev_8254_set_clock_src(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ unsigned int chan,
+ unsigned int src)
{
- const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv = s->private;
- unsigned clock_src;
-
- if (!board->has_clk_gat_sce)
- return -1;
- if (counter_number > 2)
- return -1;
+ unsigned int offset = dio200_subdev_8254_offset(dev, s);
- clock_src = subpriv->clock_src[counter_number];
- *period_ns = clock_period[clock_src];
- return clock_src;
+ dio200_write8(dev, DIO200_CLK_SCE(offset >> 3),
+ clk_sce((offset >> 2) & 1, chan, src));
}
static int dio200_subdev_8254_config(struct comedi_device *dev,
struct comedi_insn *insn,
unsigned int *data)
{
- struct dio200_subdev_8254 *subpriv = s->private;
- int ret = 0;
- int chan = CR_CHAN(insn->chanspec);
- unsigned long flags;
+ const struct dio200_board *board = dev->board_ptr;
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ unsigned int max_src = board->is_pcie ? 31 : 7;
+ unsigned int src;
+
+ if (!board->has_clk_gat_sce)
+ return -EINVAL;
- spin_lock_irqsave(&subpriv->spinlock, flags);
switch (data[0]) {
- case INSN_CONFIG_SET_COUNTER_MODE:
- if (data[1] > (I8254_MODE5 | I8254_BCD))
- ret = -EINVAL;
- else
- dio200_subdev_8254_set_mode(dev, s, chan, data[1]);
- break;
- case INSN_CONFIG_8254_READ_STATUS:
- data[1] = dio200_subdev_8254_status(dev, s, chan);
- break;
case INSN_CONFIG_SET_GATE_SRC:
- ret = dio200_subdev_8254_set_gate_src(dev, s, chan, data[2]);
- if (ret < 0)
- ret = -EINVAL;
+ src = data[2];
+ if (src > max_src)
+ return -EINVAL;
+
+ dio200_subdev_8254_set_gate_src(dev, s, chan, src);
+ i8254->gate_src[chan] = src;
break;
case INSN_CONFIG_GET_GATE_SRC:
- ret = dio200_subdev_8254_get_gate_src(dev, s, chan);
- if (ret < 0) {
- ret = -EINVAL;
- break;
- }
- data[2] = ret;
+ data[2] = i8254->gate_src[chan];
break;
case INSN_CONFIG_SET_CLOCK_SRC:
- ret = dio200_subdev_8254_set_clock_src(dev, s, chan, data[1]);
- if (ret < 0)
- ret = -EINVAL;
+ src = data[1];
+ if (src > max_src)
+ return -EINVAL;
+
+ dio200_subdev_8254_set_clock_src(dev, s, chan, src);
+ i8254->clock_src[chan] = src;
break;
case INSN_CONFIG_GET_CLOCK_SRC:
- ret = dio200_subdev_8254_get_clock_src(dev, s, chan, &data[2]);
- if (ret < 0) {
- ret = -EINVAL;
- break;
- }
- data[1] = ret;
+ data[1] = i8254->clock_src[chan];
+ data[2] = clock_period[i8254->clock_src[chan]];
break;
default:
- ret = -EINVAL;
- break;
+ return -EINVAL;
}
- spin_unlock_irqrestore(&subpriv->spinlock, flags);
- return ret < 0 ? ret : insn->n;
+
+ return insn->n;
}
static int dio200_subdev_8254_init(struct comedi_device *dev,
unsigned int offset)
{
const struct dio200_board *board = dev->board_ptr;
- struct dio200_subdev_8254 *subpriv;
- unsigned int chan;
+ struct comedi_8254 *i8254;
+ unsigned int regshift;
+ int chan;
+
+ /*
+ * PCIe boards need the offset shifted in order to get the
+ * correct base address of the timer.
+ */
+ if (board->is_pcie) {
+ offset <<= 3;
+ regshift = 3;
+ } else {
+ regshift = 0;
+ }
- subpriv = comedi_alloc_spriv(s, sizeof(*subpriv));
- if (!subpriv)
+ if (dev->mmio)
+ i8254 = comedi_8254_mm_init(dev->mmio + offset,
+ 0, I8254_IO8, regshift);
+ else
+ i8254 = comedi_8254_init(dev->iobase + offset,
+ 0, I8254_IO8, regshift);
+ if (!i8254)
return -ENOMEM;
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
- s->n_chan = 3;
- s->maxdata = 0xFFFF;
- s->insn_read = dio200_subdev_8254_read;
- s->insn_write = dio200_subdev_8254_write;
- s->insn_config = dio200_subdev_8254_config;
+ comedi_8254_subdevice_init(s, i8254);
- spin_lock_init(&subpriv->spinlock);
- subpriv->ofs = offset;
- if (board->has_clk_gat_sce) {
- /* Derive CLK_SCE and GAT_SCE register offsets from
- * 8254 offset. */
- subpriv->clk_sce_ofs = DIO200_XCLK_SCE + (offset >> 3);
- subpriv->gat_sce_ofs = DIO200_XGAT_SCE + (offset >> 3);
- subpriv->which = (offset >> 2) & 1;
- }
+ i8254->insn_config = dio200_subdev_8254_config;
+
+ /*
+ * There could be multiple timers so this driver does not
+ * use dev->pacer to save the i8254 pointer. Instead,
+ * comedi_8254_subdevice_init() saved the i8254 pointer in
+ * s->private. Set the runflag bit so that the core will
+ * automatically free it when the driver is detached.
+ */
+ s->runflags |= COMEDI_SRF_FREE_SPRIV;
/* Initialize channels. */
- for (chan = 0; chan < 3; chan++) {
- dio200_subdev_8254_set_mode(dev, s, chan,
- I8254_MODE0 | I8254_BINARY);
- if (board->has_clk_gat_sce) {
+ if (board->has_clk_gat_sce) {
+ for (chan = 0; chan < 3; chan++) {
/* Gate source 0 is VCC (logic 1). */
dio200_subdev_8254_set_gate_src(dev, s, chan, 0);
/* Clock source 0 is the dedicated clock input. */
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "amplc_dio200.h"
}
module_exit(amplc_pc236_common_exit);
-
MODULE_AUTHOR("Comedi http://www.comedi.org");
MODULE_DESCRIPTION("Comedi helper for amplc_pc236 and amplc_pci236");
MODULE_LICENSE("GPL");
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* PCI224/234 i/o space 1 (PCIBAR2) registers.
*/
-#define PCI224_Z2_CT0 0x14 /* 82C54 counter/timer 0 */
-#define PCI224_Z2_CT1 0x15 /* 82C54 counter/timer 1 */
-#define PCI224_Z2_CT2 0x16 /* 82C54 counter/timer 2 */
-#define PCI224_Z2_CTC 0x17 /* 82C54 counter/timer control word */
+#define PCI224_Z2_BASE 0x14 /* 82C54 counter/timer */
#define PCI224_ZCLK_SCE 0x1A /* Group Z Clock Configuration Register */
#define PCI224_ZGAT_SCE 0x1D /* Group Z Gate Configuration Register */
#define PCI224_INT_SCE 0x1E /* ISR Interrupt source mask register */
int intr_cpuid;
short intr_running;
unsigned short daccon;
- unsigned int cached_div1;
- unsigned int cached_div2;
unsigned short ao_enab; /* max 16 channels so 'short' will do */
unsigned char intsce;
};
if (!test_and_clear_bit(AO_CMD_STARTED, &devpriv->state))
return;
-
spin_lock_irqsave(&devpriv->ao_spinlock, flags);
/* Kill the interrupts. */
devpriv->intsce = 0;
pci224_ao_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- struct pci224_private *devpriv = dev->private;
int err = 0;
unsigned int arg;
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
/* Use two timers. */
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->cached_div1,
- &devpriv->cached_div2,
- &arg, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
struct comedi_subdevice *s)
{
struct pci224_private *devpriv = dev->private;
- unsigned long timer_base = devpriv->iobase1 + PCI224_Z2_CT0;
/*
* The output of timer Z2-0 will be used as the scan trigger
outb(GAT_CONFIG(2, GAT_VCC), devpriv->iobase1 + PCI224_ZGAT_SCE);
/* Z2-2 needs 10 MHz clock. */
outb(CLK_CONFIG(2, CLK_10MHZ), devpriv->iobase1 + PCI224_ZCLK_SCE);
- /* Load Z2-2 mode (2) and counter (div1). */
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 2, devpriv->cached_div1);
/* Z2-0 is clocked from Z2-2's output. */
outb(CLK_CONFIG(0, CLK_OUTNM1), devpriv->iobase1 + PCI224_ZCLK_SCE);
- /* Load Z2-0 mode (2) and counter (div2). */
- i8254_set_mode(timer_base, 0, 0, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 0, devpriv->cached_div2);
+
+ comedi_8254_pacer_enable(dev->pacer, 2, 0, false);
}
static int pci224_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
unsigned long flags;
/* Cannot handle null/empty chanlist. */
- if (cmd->chanlist == NULL || cmd->chanlist_len == 0)
+ if (!cmd->chanlist || cmd->chanlist_len == 0)
return -EINVAL;
-
/* Determine which channels are enabled and their load order. */
devpriv->ao_enab = 0;
outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
dev->iobase + PCI224_DACCON);
- if (cmd->scan_begin_src == TRIG_TIMER)
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
pci224_ao_start_pacer(dev, s);
+ }
spin_lock_irqsave(&devpriv->ao_spinlock, flags);
if (cmd->start_src == TRIG_INT) {
if (!devpriv->ao_scan_vals)
return -ENOMEM;
-
/* Allocate buffer to hold AO channel scan order. */
devpriv->ao_scan_order = kmalloc(sizeof(devpriv->ao_scan_order[0]) *
thisboard->ao_chans, GFP_KERNEL);
if (!devpriv->ao_scan_order)
return -ENOMEM;
-
/* Disable interrupt sources. */
devpriv->intsce = 0;
outb(0, devpriv->iobase1 + PCI224_INT_SCE);
outw(devpriv->daccon | PCI224_DACCON_FIFORESET,
dev->iobase + PCI224_DACCON);
+ dev->pacer = comedi_8254_init(devpriv->iobase1 + PCI224_Z2_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 1);
if (ret)
return ret;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h"
/*
#define PCI230_PPI_X_C 0x02 /* User PPI (82C55) port C */
#define PCI230_PPI_X_CMD 0x03 /* User PPI (82C55) control word */
#define PCI230_Z2_CT_BASE 0x14 /* 82C54 counter/timer base */
-#define PCI230_Z2_CT0 0x14 /* 82C54 counter/timer 0 */
-#define PCI230_Z2_CT1 0x15 /* 82C54 counter/timer 1 */
-#define PCI230_Z2_CT2 0x16 /* 82C54 counter/timer 2 */
-#define PCI230_Z2_CTC 0x17 /* 82C54 counter/timer control word */
#define PCI230_ZCLK_SCE 0x1A /* Group Z Clock Configuration */
#define PCI230_ZGAT_SCE 0x1D /* Group Z Gate Configuration */
#define PCI230_INT_SCE 0x1E /* Interrupt source mask (w) */
#define CLK_EXT 7 /* external clock */
/* Macro to construct clock input configuration register value. */
#define CLK_CONFIG(chan, src) ((((chan) & 3) << 3) | ((src) & 7))
-/* Timebases in ns. */
-#define TIMEBASE_10MHZ 100
-#define TIMEBASE_1MHZ 1000
-#define TIMEBASE_100KHZ 10000
-#define TIMEBASE_10KHZ 100000
-#define TIMEBASE_1KHZ 1000000
/*
* Counter/timer gate input configuration sources.
/* PCI230 clock source periods in ns */
static const unsigned int pci230_timebase[8] = {
- [CLK_10MHZ] = TIMEBASE_10MHZ,
- [CLK_1MHZ] = TIMEBASE_1MHZ,
- [CLK_100KHZ] = TIMEBASE_100KHZ,
- [CLK_10KHZ] = TIMEBASE_10KHZ,
- [CLK_1KHZ] = TIMEBASE_1KHZ,
+ [CLK_10MHZ] = I8254_OSC_BASE_10MHZ,
+ [CLK_1MHZ] = I8254_OSC_BASE_1MHZ,
+ [CLK_100KHZ] = I8254_OSC_BASE_100KHZ,
+ [CLK_10KHZ] = I8254_OSC_BASE_10KHZ,
+ [CLK_1KHZ] = I8254_OSC_BASE_1KHZ,
};
/* PCI230 analogue input range table */
unsigned int count;
/* Set mode. */
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, ct, mode);
+ comedi_8254_set_mode(dev->pacer, ct, mode);
/* Determine clock source and count. */
clk_src = pci230_choose_clk_count(ns, &count, flags);
/* Program clock source. */
if (count >= 65536)
count = 0;
- i8254_write(dev->iobase + PCI230_Z2_CT_BASE, 0, ct, count);
+ comedi_8254_write(dev->pacer, ct, count);
}
static void pci230_cancel_ct(struct comedi_device *dev, unsigned int ct)
{
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, ct, I8254_MODE1);
/* Counter ct, 8254 mode 1, initial count not written. */
+ comedi_8254_set_mode(dev->pacer, ct, I8254_MODE1);
}
static int pci230_ai_eoc(struct comedi_device *dev,
*/
adccon = PCI230_ADC_TRIG_Z2CT2 | PCI230_ADC_FIFO_EN;
/* Set Z2-CT2 output low to avoid any false triggers. */
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE0);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE0);
devpriv->ai_bipolar = comedi_range_is_bipolar(s, range);
if (aref == AREF_DIFF) {
/* Differential. */
* Trigger conversion by toggling Z2-CT2 output
* (finish with output high).
*/
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0,
- 2, I8254_MODE0);
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0,
- 2, I8254_MODE1);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE0);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE1);
/* wait for conversion to end */
ret = comedi_timeout(dev, s, insn, pci230_ai_eoc, 0);
* Trigger conversion by toggling Z2-CT2 output.
* Finish with output high.
*/
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE0);
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE1);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE0);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE1);
/*
* Delay. Should driver be responsible for this? An
* alternative would be to wait until conversion is complete,
* Set counter/timer 2 output high for use as the initial start
* conversion source.
*/
- i8254_set_mode(dev->iobase + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE1);
+ comedi_8254_set_mode(dev->pacer, 2, I8254_MODE1);
/*
* Temporarily use CT2 output as conversion trigger source and
spin_lock_init(&devpriv->ao_stop_spinlock);
dev->board_ptr = pci230_find_pci_board(pci_dev);
- if (dev->board_ptr == NULL) {
+ if (!dev->board_ptr) {
dev_err(dev->class_dev,
"amplc_pci230: BUG! cannot determine board type!\n");
return -EINVAL;
dev->irq = pci_dev->irq;
}
+ dev->pacer = comedi_8254_init(dev->iobase + PCI230_Z2_CT_BASE,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
rc = comedi_alloc_subdevices(dev, 3);
if (rc)
return rc;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "amplc_pc236.h"
#include "plx9052.h"
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
static int pci263_do_insn_bits(struct comedi_device *dev,
struct comedi_subdevice *s,
Author: ds
Updated: Mon, 04 Nov 2002 20:04:21 -0800
Status: experimental
-
-
*/
#include <linux/module.h>
#include "../comedi_pcmcia.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#define DAS16CS_ADC_DATA 0
#define DAS16CS_DIO_MUX 2
#define DAS16CS_MISC1 4
#define DAS16CS_MISC2 6
-#define DAS16CS_CTR0 8
-#define DAS16CS_CTR1 10
-#define DAS16CS_CTR2 12
-#define DAS16CS_CTR_CONTROL 14
+#define DAS16CS_TIMER_BASE 8
#define DAS16CS_DIO 16
struct das16cs_board {
if (!devpriv)
return -ENOMEM;
+ dev->pacer = comedi_8254_init(dev->iobase + DAS16CS_TIMER_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO16, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 3);
if (ret)
return ret;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h"
#include "amcc_s5933.h"
#include "comedi_fc.h"
};
struct cb_pcidas_private {
+ struct comedi_8254 *ao_pacer;
/* base addresses */
unsigned long s5933_config;
unsigned long control_status;
unsigned long adc_fifo;
unsigned long ao_registers;
- /* divisors of master clock for analog input pacing */
- unsigned int divisor1;
- unsigned int divisor2;
/* bits to write to registers */
unsigned int adc_fifo_bits;
unsigned int s5933_intcsr_bits;
/* fifo buffers */
unsigned short ai_buffer[AI_BUFFER_SIZE];
unsigned short ao_buffer[AO_BUFFER_SIZE];
- /* divisors of master clock for analog output pacing */
- unsigned int ao_divisor1;
- unsigned int ao_divisor2;
unsigned int calibration_source;
};
}
static int nvram_read(struct comedi_device *dev, unsigned int address,
- uint8_t *data)
+ uint8_t *data)
{
struct cb_pcidas_private *devpriv = dev->private;
unsigned long iobase = devpriv->s5933_config;
struct comedi_cmd *cmd)
{
const struct cb_pcidas_board *thisboard = dev->board_ptr;
- struct cb_pcidas_private *devpriv = dev->private;
int err = 0;
unsigned int arg;
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
return 0;
}
-static void cb_pcidas_ai_load_counters(struct comedi_device *dev)
-{
- struct cb_pcidas_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + ADC8254;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
-}
-
static int cb_pcidas_ai_cmd(struct comedi_device *dev,
struct comedi_subdevice *s)
{
outw(bits, devpriv->control_status + ADCMUX_CONT);
/* load counters */
- if (cmd->scan_begin_src == TRIG_TIMER || cmd->convert_src == TRIG_TIMER)
- cb_pcidas_ai_load_counters(dev);
+ if (cmd->scan_begin_src == TRIG_TIMER ||
+ cmd->convert_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
+ }
/* enable interrupts */
spin_lock_irqsave(&dev->spinlock, flags);
const struct cb_pcidas_board *thisboard = dev->board_ptr;
struct cb_pcidas_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
/* step 4: fix up any arguments */
if (cmd->scan_begin_src == TRIG_TIMER) {
- arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->ao_divisor1,
- &devpriv->ao_divisor2,
- &arg, cmd->flags);
+ unsigned int arg = cmd->scan_begin_arg;
+
+ comedi_8254_cascade_ns_to_timer(devpriv->ao_pacer,
+ &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
return 0;
}
-static void cb_pcidas_ao_load_counters(struct comedi_device *dev)
-{
- struct cb_pcidas_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAC8254;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->ao_divisor1);
- i8254_write(timer_base, 0, 2, devpriv->ao_divisor2);
-}
-
static int cb_pcidas_ao_cmd(struct comedi_device *dev,
struct comedi_subdevice *s)
{
outw(0, devpriv->ao_registers + DACFIFOCLR);
/* load counters */
- if (cmd->scan_begin_src == TRIG_TIMER)
- cb_pcidas_ao_load_counters(dev);
+ if (cmd->scan_begin_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(devpriv->ao_pacer);
+ comedi_8254_pacer_enable(devpriv->ao_pacer, 1, 2, true);
+ }
/* set pacer source */
spin_lock_irqsave(&dev->spinlock, flags);
}
dev->irq = pcidev->irq;
+ dev->pacer = comedi_8254_init(dev->iobase + ADC8254,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ devpriv->ao_pacer = comedi_8254_init(dev->iobase + DAC8254,
+ I8254_OSC_BASE_10MHZ,
+ I8254_IO8, 0);
+ if (!devpriv->ao_pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 7);
if (ret)
return ret;
dac08_write(dev, s->maxdata / 2);
s->readback[i] = s->maxdata / 2;
}
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* make sure mailbox 4 is empty */
inl(devpriv->s5933_config + AMCC_OP_REG_IMB4);
{
struct cb_pcidas_private *devpriv = dev->private;
- if (devpriv && devpriv->s5933_config) {
- outl(INTCSR_INBOX_INTR_STATUS,
- devpriv->s5933_config + AMCC_OP_REG_INTCSR);
+ if (devpriv) {
+ if (devpriv->s5933_config)
+ outl(INTCSR_INBOX_INTR_STATUS,
+ devpriv->s5933_config + AMCC_OP_REG_INTCSR);
+ kfree(devpriv->ao_pacer);
}
comedi_pci_detach(dev);
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
-#include "8253.h"
#include "8255.h"
#include "plx9080.h"
#include "comedi_fc.h"
devpriv->ai_buffer[i] =
pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE,
&devpriv->ai_buffer_bus_addr[i]);
- if (devpriv->ai_buffer[i] == NULL)
+ if (!devpriv->ai_buffer[i])
return -ENOMEM;
-
}
for (i = 0; i < AO_DMA_RING_COUNT; i++) {
if (ao_cmd_is_supported(thisboard)) {
pci_alloc_consistent(pcidev, DMA_BUFFER_SIZE,
&devpriv->
ao_buffer_bus_addr[i]);
- if (devpriv->ao_buffer[i] == NULL)
+ if (!devpriv->ao_buffer[i])
return -ENOMEM;
-
}
}
/* allocate dma descriptors */
pci_alloc_consistent(pcidev, sizeof(struct plx_dma_desc) *
ai_dma_ring_count(thisboard),
&devpriv->ai_dma_desc_bus_addr);
- if (devpriv->ai_dma_desc == NULL)
+ if (!devpriv->ai_dma_desc)
return -ENOMEM;
if (ao_cmd_is_supported(thisboard)) {
sizeof(struct plx_dma_desc) *
AO_DMA_RING_COUNT,
&devpriv->ao_dma_desc_bus_addr);
- if (devpriv->ao_dma_desc == NULL)
+ if (!devpriv->ao_dma_desc)
return -ENOMEM;
}
/* initialize dma descriptors */
/* get acknowledge */
if (i2c_read_ack(dev) != 0) {
- dev_err(dev->class_dev, "%s failed: no acknowledge\n",
- __func__);
+ dev_err(dev->class_dev, "failed: no acknowledge\n");
i2c_stop(dev);
return;
}
for (i = 0; i < length; i++) {
i2c_write_byte(dev, data[i]);
if (i2c_read_ack(dev) != 0) {
- dev_err(dev->class_dev, "%s failed: no acknowledge\n",
- __func__);
+ dev_err(dev->class_dev, "failed: no acknowledge\n");
i2c_stop(dev);
return;
}
}
for (n = 0; n < insn->n; n++) {
-
/* clear adc buffer (inside loop for 4020 sake) */
writew(0, devpriv->main_iobase + ADC_BUFFER_CLEAR_REG);
retval = set_ai_fifo_size(dev, fifo_size);
if (retval < 0)
return retval;
-
}
block_size = ai_fifo_size(dev) / fifo->num_segments * bytes_in_sample;
static void check_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd)
{
const struct pcidas64_board *thisboard = dev->board_ptr;
- unsigned int convert_divisor = 0, scan_divisor;
+ unsigned long long convert_divisor = 0;
+ unsigned int scan_divisor;
static const int min_convert_divisor = 3;
static const int max_convert_divisor =
max_counter_value + min_convert_divisor;
if (cmd->scan_begin_src == TRIG_TIMER) {
scan_divisor = get_divisor(cmd->scan_begin_arg, cmd->flags);
if (cmd->convert_src == TRIG_TIMER) {
- /* XXX check for integer overflows */
min_scan_divisor = convert_divisor * cmd->chanlist_len;
max_scan_divisor =
(convert_divisor * cmd->chanlist_len - 1) +
bits |= ADC_START_TRIG_EXT_BITS;
if (cmd->start_arg & CR_INVERT)
bits |= ADC_START_TRIG_FALLING_BIT;
- } else if (cmd->start_src == TRIG_NOW)
+ } else if (cmd->start_src == TRIG_NOW) {
bits |= ADC_START_TRIG_SOFT_BITS;
+ }
if (use_hw_sample_counter(cmd))
bits |= ADC_SAMPLE_COUNTER_EN_BIT;
writew(bits, devpriv->main_iobase + ADC_CONTROL0_REG);
if (devpriv->ai_cmd_running) {
spin_unlock_irqrestore(&dev->spinlock, flags);
pio_drain_ai_fifo(dev);
- } else
+ } else {
spin_unlock_irqrestore(&dev->spinlock, flags);
+ }
}
/* if we are have all the data, then quit */
if ((cmd->stop_src == TRIG_COUNT &&
unsigned long flags;
/* board might not support ao, in which case write_subdev is NULL */
- if (s == NULL)
+ if (!s)
return;
async = s->async;
cmd = &async->cmd;
s->maxdata = 1;
s->range_table = &range_digital;
s->insn_bits = di_rbits;
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* digital output */
if (thisboard->layout == LAYOUT_64XX) {
s->maxdata = 1;
s->range_table = &range_digital;
s->insn_bits = do_wbits;
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* 8255 */
s = &dev->subdevices[4];
s->range_table = &range_digital;
s->insn_config = dio_60xx_config_insn;
s->insn_bits = dio_60xx_wbits;
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* caldac */
s = &dev->subdevices[6];
ad8402_write(dev, i, s->maxdata / 2);
s->readback[i] = s->maxdata / 2;
}
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* serial EEPROM, if present */
s = &dev->subdevices[8];
s->n_chan = 128;
s->maxdata = 0xffff;
s->insn_read = eeprom_read_insn;
- } else
+ } else {
s->type = COMEDI_SUBD_UNUSED;
+ }
/* user counter subd XXX */
s = &dev->subdevices[9];
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "8255.h"
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
+#include "comedi_8254.h"
#include "plx9052.h"
#include "8255.h"
-/* Registers for the PCIM-DAS1602/16 and PCIe-DAS1602/16 */
-
-/* DAC Offsets */
-#define ADC_TRIG 0
-#define DAC0_OFFSET 2
-#define DAC1_OFFSET 4
-
-/* AI and Counter Constants */
-#define MUX_LIMITS 0
-#define MAIN_CONN_DIO 1
-#define ADC_STAT 2
-#define ADC_CONV_STAT 3
-#define ADC_INT 4
-#define ADC_PACER 5
-#define BURST_MODE 6
-#define PROG_GAIN 7
-#define CLK8254_1_DATA 8
-#define CLK8254_2_DATA 9
-#define CLK8254_3_DATA 10
-#define CLK8254_CONTROL 11
-#define USER_COUNTER 12
-#define RESID_COUNT_H 13
-#define RESID_COUNT_L 14
+/*
+ * PCI Bar 1 Register map
+ * see plx9052.h for register and bit defines
+ */
+
+/*
+ * PCI Bar 2 Register map (devpriv->daqio)
+ */
+#define PCIMDAS_AI_REG 0x00
+#define PCIMDAS_AI_SOFTTRIG_REG 0x00
+#define PCIMDAS_AO_REG(x) (0x02 + ((x) * 2))
+
+/*
+ * PCI Bar 3 Register map (devpriv->BADR3)
+ */
+#define PCIMDAS_MUX_REG 0x00
+#define PCIMDAS_MUX(_lo, _hi) ((_lo) | ((_hi) << 4))
+#define PCIMDAS_DI_DO_REG 0x01
+#define PCIMDAS_STATUS_REG 0x02
+#define PCIMDAS_STATUS_EOC BIT(7)
+#define PCIMDAS_STATUS_UB BIT(6)
+#define PCIMDAS_STATUS_MUX BIT(5)
+#define PCIMDAS_STATUS_CLK BIT(4)
+#define PCIMDAS_STATUS_TO_CURR_MUX(x) ((x) & 0xf)
+#define PCIMDAS_CONV_STATUS_REG 0x03
+#define PCIMDAS_CONV_STATUS_EOC BIT(7)
+#define PCIMDAS_CONV_STATUS_EOB BIT(6)
+#define PCIMDAS_CONV_STATUS_EOA BIT(5)
+#define PCIMDAS_CONV_STATUS_FNE BIT(4)
+#define PCIMDAS_CONV_STATUS_FHF BIT(3)
+#define PCIMDAS_CONV_STATUS_OVERRUN BIT(2)
+#define PCIMDAS_IRQ_REG 0x04
+#define PCIMDAS_IRQ_INTE BIT(7)
+#define PCIMDAS_IRQ_INT BIT(6)
+#define PCIMDAS_IRQ_OVERRUN BIT(4)
+#define PCIMDAS_IRQ_EOA BIT(3)
+#define PCIMDAS_IRQ_EOA_INT_SEL BIT(2)
+#define PCIMDAS_IRQ_INTSEL(x) ((x) << 0)
+#define PCIMDAS_IRQ_INTSEL_EOC PCIMDAS_IRQ_INTSEL(0)
+#define PCIMDAS_IRQ_INTSEL_FNE PCIMDAS_IRQ_INTSEL(1)
+#define PCIMDAS_IRQ_INTSEL_EOB PCIMDAS_IRQ_INTSEL(2)
+#define PCIMDAS_IRQ_INTSEL_FHF_EOA PCIMDAS_IRQ_INTSEL(3)
+#define PCIMDAS_PACER_REG 0x05
+#define PCIMDAS_PACER_GATE_STATUS BIT(6)
+#define PCIMDAS_PACER_GATE_POL BIT(5)
+#define PCIMDAS_PACER_GATE_LATCH BIT(4)
+#define PCIMDAS_PACER_GATE_EN BIT(3)
+#define PCIMDAS_PACER_EXT_PACER_POL BIT(2)
+#define PCIMDAS_PACER_SRC(x) ((x) << 0)
+#define PCIMDAS_PACER_SRC_POLLED PCIMDAS_PACER_SRC(0)
+#define PCIMDAS_PACER_SRC_EXT PCIMDAS_PACER_SRC(2)
+#define PCIMDAS_PACER_SRC_INT PCIMDAS_PACER_SRC(3)
+#define PCIMDAS_PACER_SRC_MASK (3 << 0)
+#define PCIMDAS_BURST_REG 0x06
+#define PCIMDAS_BURST_BME BIT(1)
+#define PCIMDAS_BURST_CONV_EN BIT(0)
+#define PCIMDAS_GAIN_REG 0x07
+#define PCIMDAS_8254_BASE 0x08
+#define PCIMDAS_USER_CNTR_REG 0x0c
+#define PCIMDAS_USER_CNTR_CTR1_CLK_SEL BIT(0)
+#define PCIMDAS_RESIDUE_MSB_REG 0x0d
+#define PCIMDAS_RESIDUE_LSB_REG 0x0e
+
+/*
+ * PCI Bar 4 Register map (dev->iobase)
+ */
+#define PCIMDAS_8255_BASE 0x00
+
+static const struct comedi_lrange cb_pcimdas_ai_bip_range = {
+ 4, {
+ BIP_RANGE(10),
+ BIP_RANGE(5),
+ BIP_RANGE(2.5),
+ BIP_RANGE(1.25)
+ }
+};
+
+static const struct comedi_lrange cb_pcimdas_ai_uni_range = {
+ 4, {
+ UNI_RANGE(10),
+ UNI_RANGE(5),
+ UNI_RANGE(2.5),
+ UNI_RANGE(1.25)
+ }
+};
+
+/*
+ * The Analog Output range is not programmable. The DAC ranges are
+ * jumper-settable on the board. The settings are not software-readable.
+ */
+static const struct comedi_lrange cb_pcimdas_ao_range = {
+ 4, {
+ BIP_RANGE(10),
+ BIP_RANGE(5),
+ UNI_RANGE(10),
+ UNI_RANGE(5)
+ }
+};
/*
* this structure is for data unique to this hardware driver. If
struct cb_pcimdas_private *devpriv = dev->private;
unsigned int status;
- status = inb(devpriv->BADR3 + 2);
- if ((status & 0x80) == 0)
+ status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
+ if ((status & PCIMDAS_STATUS_EOC) == 0)
return 0;
return -EBUSY;
}
-static int cb_pcimdas_ai_rinsn(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+static int cb_pcimdas_ai_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ unsigned int range = CR_RANGE(insn->chanspec);
int n;
unsigned int d;
- int chan = CR_CHAN(insn->chanspec);
- unsigned short chanlims;
- int maxchans;
int ret;
/* only support sw initiated reads from a single channel */
- /* check channel number */
- if ((inb(devpriv->BADR3 + 2) & 0x20) == 0) /* differential mode */
- maxchans = s->n_chan / 2;
- else
- maxchans = s->n_chan;
-
- if (chan > (maxchans - 1))
- return -ETIMEDOUT; /* *** Wrong error code. Fixme. */
-
/* configure for sw initiated read */
- d = inb(devpriv->BADR3 + 5);
- if ((d & 0x03) > 0) { /* only reset if needed. */
- d = d & 0xfd;
- outb(d, devpriv->BADR3 + 5);
+ d = inb(devpriv->BADR3 + PCIMDAS_PACER_REG);
+ if ((d & PCIMDAS_PACER_SRC_MASK) != PCIMDAS_PACER_SRC_POLLED) {
+ d &= ~PCIMDAS_PACER_SRC_MASK;
+ d |= PCIMDAS_PACER_SRC_POLLED;
+ outb(d, devpriv->BADR3 + PCIMDAS_PACER_REG);
}
/* set bursting off, conversions on */
- outb(0x01, devpriv->BADR3 + 6);
+ outb(PCIMDAS_BURST_CONV_EN, devpriv->BADR3 + PCIMDAS_BURST_REG);
- /* set range to 10V. UP/BP is controlled by a switch on the board */
- outb(0x00, devpriv->BADR3 + 7);
+ /* set range */
+ outb(range, devpriv->BADR3 + PCIMDAS_GAIN_REG);
- /*
- * write channel limits to multiplexer, set Low (bits 0-3) and
- * High (bits 4-7) channels to chan.
- */
- chanlims = chan | (chan << 4);
- outb(chanlims, devpriv->BADR3 + 0);
+ /* set mux for single channel scan */
+ outb(PCIMDAS_MUX(chan, chan), devpriv->BADR3 + PCIMDAS_MUX_REG);
/* convert n samples */
for (n = 0; n < insn->n; n++) {
/* trigger conversion */
- outw(0, devpriv->daqio + 0);
+ outw(0, devpriv->daqio + PCIMDAS_AI_SOFTTRIG_REG);
/* wait for conversion to end */
ret = comedi_timeout(dev, s, insn, cb_pcimdas_ai_eoc, 0);
return ret;
/* read data */
- data[n] = inw(devpriv->daqio + 0);
+ data[n] = inw(devpriv->daqio + PCIMDAS_AI_REG);
}
/* return the number of samples read/written */
struct cb_pcimdas_private *devpriv = dev->private;
unsigned int chan = CR_CHAN(insn->chanspec);
unsigned int val = s->readback[chan];
- unsigned int reg = (chan) ? DAC1_OFFSET : DAC0_OFFSET;
int i;
for (i = 0; i < insn->n; i++) {
val = data[i];
- outw(val, devpriv->daqio + reg);
+ outw(val, devpriv->daqio + PCIMDAS_AO_REG(chan));
}
s->readback[chan] = val;
return insn->n;
}
+static int cb_pcimdas_di_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int val;
+
+ val = inb(devpriv->BADR3 + PCIMDAS_DI_DO_REG);
+
+ data[1] = val & 0x0f;
+
+ return insn->n;
+}
+
+static int cb_pcimdas_do_insn_write(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+
+ if (comedi_dio_update_state(s, data))
+ outb(s->state, devpriv->BADR3 + PCIMDAS_DI_DO_REG);
+
+ data[1] = s->state;
+
+ return insn->n;
+}
+
+static int cb_pcimdas_counter_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int ctrl;
+
+ switch (data[0]) {
+ case INSN_CONFIG_SET_CLOCK_SRC:
+ switch (data[1]) {
+ case 0: /* internal 100 kHz clock */
+ ctrl = PCIMDAS_USER_CNTR_CTR1_CLK_SEL;
+ break;
+ case 1: /* external clk on pin 21 */
+ ctrl = 0;
+ break;
+ default:
+ return -EINVAL;
+ }
+ outb(ctrl, devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
+ break;
+ case INSN_CONFIG_GET_CLOCK_SRC:
+ ctrl = inb(devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
+ if (ctrl & PCIMDAS_USER_CNTR_CTR1_CLK_SEL) {
+ data[1] = 0;
+ data[2] = I8254_OSC_BASE_100KHZ;
+ } else {
+ data[1] = 1;
+ data[2] = 0;
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return insn->n;
+}
+
+static unsigned int cb_pcimdas_pacer_clk(struct comedi_device *dev)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int status;
+
+ /* The Pacer Clock jumper selects a 10 MHz or 1 MHz clock */
+ status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
+ if (status & PCIMDAS_STATUS_CLK)
+ return I8254_OSC_BASE_10MHZ;
+ return I8254_OSC_BASE_1MHZ;
+}
+
+static bool cb_pcimdas_is_ai_se(struct comedi_device *dev)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int status;
+
+ /*
+ * The number of Analog Input channels is set with the
+ * Analog Input Mode Switch on the board. The board can
+ * have 16 single-ended or 8 differential channels.
+ */
+ status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
+ return status & PCIMDAS_STATUS_MUX;
+}
+
+static bool cb_pcimdas_is_ai_uni(struct comedi_device *dev)
+{
+ struct cb_pcimdas_private *devpriv = dev->private;
+ unsigned int status;
+
+ /*
+ * The Analog Input range polarity is set with the
+ * Analog Input Polarity Switch on the board. The
+ * inputs can be set to Unipolar or Bipolar ranges.
+ */
+ status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
+ return status & PCIMDAS_STATUS_UB;
+}
+
static int cb_pcimdas_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct cb_pcimdas_private *devpriv;
devpriv->BADR3 = pci_resource_start(pcidev, 3);
dev->iobase = pci_resource_start(pcidev, 4);
- ret = comedi_alloc_subdevices(dev, 3);
+ dev->pacer = comedi_8254_init(devpriv->BADR3 + PCIMDAS_8254_BASE,
+ cb_pcimdas_pacer_clk(dev),
+ I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ ret = comedi_alloc_subdevices(dev, 6);
if (ret)
return ret;
+ /* Analog Input subdevice */
s = &dev->subdevices[0];
- /* dev->read_subdev=s; */
- /* analog input subdevice */
- s->type = COMEDI_SUBD_AI;
- s->subdev_flags = SDF_READABLE | SDF_GROUND;
- s->n_chan = 16;
- s->maxdata = 0xffff;
- s->range_table = &range_unknown;
- s->len_chanlist = 1; /* This is the maximum chanlist length that */
- /* the board can handle */
- s->insn_read = cb_pcimdas_ai_rinsn;
+ s->type = COMEDI_SUBD_AI;
+ s->subdev_flags = SDF_READABLE;
+ if (cb_pcimdas_is_ai_se(dev)) {
+ s->subdev_flags |= SDF_GROUND;
+ s->n_chan = 16;
+ } else {
+ s->subdev_flags |= SDF_DIFF;
+ s->n_chan = 8;
+ }
+ s->maxdata = 0xffff;
+ s->range_table = cb_pcimdas_is_ai_uni(dev) ? &cb_pcimdas_ai_uni_range
+ : &cb_pcimdas_ai_bip_range;
+ s->insn_read = cb_pcimdas_ai_insn_read;
+ /* Analog Output subdevice */
s = &dev->subdevices[1];
- /* analog output subdevice */
- s->type = COMEDI_SUBD_AO;
- s->subdev_flags = SDF_WRITABLE;
- s->n_chan = 2;
- s->maxdata = 0xfff;
- /* ranges are hardware settable, but not software readable. */
- s->range_table = &range_unknown;
- s->insn_write = cb_pcimdas_ao_insn_write;
+ s->type = COMEDI_SUBD_AO;
+ s->subdev_flags = SDF_WRITABLE;
+ s->n_chan = 2;
+ s->maxdata = 0xfff;
+ s->range_table = &cb_pcimdas_ao_range;
+ s->insn_write = cb_pcimdas_ao_insn_write;
ret = comedi_alloc_subdev_readback(s);
if (ret)
return ret;
+ /* Digital I/O subdevice */
s = &dev->subdevices[2];
- /* digital i/o subdevice */
- ret = subdev_8255_init(dev, s, NULL, 0x00);
+ ret = subdev_8255_init(dev, s, NULL, PCIMDAS_8255_BASE);
if (ret)
return ret;
+ /* Digital Input subdevice (main connector) */
+ s = &dev->subdevices[3];
+ s->type = COMEDI_SUBD_DI;
+ s->subdev_flags = SDF_READABLE;
+ s->n_chan = 4;
+ s->maxdata = 1;
+ s->range_table = &range_digital;
+ s->insn_read = cb_pcimdas_di_insn_read;
+
+ /* Digital Output subdevice (main connector) */
+ s = &dev->subdevices[4];
+ s->type = COMEDI_SUBD_DO;
+ s->subdev_flags = SDF_WRITABLE;
+ s->n_chan = 4;
+ s->maxdata = 1;
+ s->range_table = &range_digital;
+ s->insn_write = cb_pcimdas_do_insn_write;
+
+ /* Counter subdevice (8254) */
+ s = &dev->subdevices[5];
+ comedi_8254_subdevice_init(s, dev->pacer);
+
+ dev->pacer->insn_config = cb_pcimdas_counter_insn_config;
+
+ /* counters 1 and 2 are used internally for the pacer */
+ comedi_8254_set_busy(dev->pacer, 1, true);
+ comedi_8254_set_busy(dev->pacer, 2, true);
+
return 0;
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "8255.h"
}
static int cb_pcimdda_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct comedi_subdevice *s;
--- /dev/null
+/*
+ * comedi_8254.c
+ * Generic 8254 timer/counter support
+ * Copyright (C) 2014 H Hartley Sweeten <hsweeten@visionengravers.com>
+ *
+ * Based on 8253.h and various subdevice implementations in comedi drivers.
+ *
+ * COMEDI - Linux Control and Measurement Device Interface
+ * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * Module: comedi_8254
+ * Description: Generic 8254 timer/counter support
+ * Author: H Hartley Sweeten <hsweeten@visionengravers.com>
+ * Updated: Thu Jan 8 16:45:45 MST 2015
+ * Status: works
+ *
+ * This module is not used directly by end-users. Rather, it is used by other
+ * drivers to provide support for an 8254 Programmable Interval Timer. These
+ * counters are typically used to generate the pacer clock used for data
+ * acquisition. Some drivers also expose the counters for general purpose use.
+ *
+ * This module provides the following basic functions:
+ *
+ * comedi_8254_init() / comedi_8254_mm_init()
+ * Initializes this module to access the 8254 registers. The _mm version
+ * sets up the module for MMIO register access the other for PIO access.
+ * The pointer returned from these functions is normally stored in the
+ * comedi_device dev->pacer and will be freed by the comedi core during
+ * the driver (*detach). If a driver has multiple 8254 devices, they need
+ * to be stored in the drivers private data and freed when the driver is
+ * detached.
+ *
+ * NOTE: The counters are reset by setting them to I8254_MODE0 as part of
+ * this initialization.
+ *
+ * comedi_8254_set_mode()
+ * Sets a counters operation mode:
+ * I8254_MODE0 Interrupt on terminal count
+ * I8254_MODE1 Hardware retriggerable one-shot
+ * I8254_MODE2 Rate generator
+ * I8254_MODE3 Square wave mode
+ * I8254_MODE4 Software triggered strobe
+ * I8254_MODE5 Hardware triggered strobe (retriggerable)
+ *
+ * In addition I8254_BCD and I8254_BINARY specify the counting mode:
+ * I8254_BCD BCD counting
+ * I8254_BINARY Binary counting
+ *
+ * comedi_8254_write()
+ * Writes an initial value to a counter.
+ *
+ * The largest possible initial count is 0; this is equivalent to 2^16
+ * for binary counting and 10^4 for BCD counting.
+ *
+ * NOTE: The counter does not stop when it reaches zero. In Mode 0, 1, 4,
+ * and 5 the counter "wraps around" to the highest count, either 0xffff
+ * for binary counting or 9999 for BCD counting, and continues counting.
+ * Modes 2 and 3 are periodic; the counter reloads itself with the initial
+ * count and continues counting from there.
+ *
+ * comedi_8254_read()
+ * Reads the current value from a counter.
+ *
+ * comedi_8254_status()
+ * Reads the status of a counter.
+ *
+ * comedi_8254_load()
+ * Sets a counters operation mode and writes the initial value.
+ *
+ * Typically the pacer clock is created by cascading two of the 16-bit counters
+ * to create a 32-bit rate generator (I8254_MODE2). These functions are
+ * provided to handle the cascaded counters:
+ *
+ * comedi_8254_ns_to_timer()
+ * Calculates the divisor value needed for a single counter to generate
+ * ns timing.
+ *
+ * comedi_8254_cascade_ns_to_timer()
+ * Calculates the two divisor values needed to the generate the pacer
+ * clock (in ns).
+ *
+ * comedi_8254_update_divisors()
+ * Transfers the intermediate divisor values to the current divisors.
+ *
+ * comedi_8254_pacer_enable()
+ * Programs the mode of the cascaded counters and writes the current
+ * divisor values.
+ *
+ * To expose the counters as a subdevice for general purpose use the following
+ * functions a provided:
+ *
+ * comedi_8254_subdevice_init()
+ * Initializes a comedi_subdevice to use the 8254 timer.
+ *
+ * comedi_8254_set_busy()
+ * Internally flags a counter as "busy". This is done to protect the
+ * counters that are used for the cascaded 32-bit pacer.
+ *
+ * The subdevice provides (*insn_read) and (*insn_write) operations to read
+ * the current value and write an initial value to a counter. A (*insn_config)
+ * operation is also provided to handle the following comedi instructions:
+ *
+ * INSN_CONFIG_SET_COUNTER_MODE calls comedi_8254_set_mode()
+ * INSN_CONFIG_8254_READ_STATUS calls comedi_8254_status()
+ *
+ * The (*insn_config) member of comedi_8254 can be initialized by the external
+ * driver to handle any additional instructions.
+ *
+ * NOTE: Gate control, clock routing, and any interrupt handling for the
+ * counters is not handled by this module. These features are driver dependent.
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+
+#include "../comedidev.h"
+
+#include "comedi_8254.h"
+
+static unsigned int __i8254_read(struct comedi_8254 *i8254, unsigned int reg)
+{
+ unsigned int reg_offset = (reg * i8254->iosize) << i8254->regshift;
+ unsigned int val;
+
+ switch (i8254->iosize) {
+ default:
+ case I8254_IO8:
+ if (i8254->mmio)
+ val = readb(i8254->mmio + reg_offset);
+ else
+ val = inb(i8254->iobase + reg_offset);
+ break;
+ case I8254_IO16:
+ if (i8254->mmio)
+ val = readw(i8254->mmio + reg_offset);
+ else
+ val = inw(i8254->iobase + reg_offset);
+ break;
+ case I8254_IO32:
+ if (i8254->mmio)
+ val = readl(i8254->mmio + reg_offset);
+ else
+ val = inl(i8254->iobase + reg_offset);
+ break;
+ }
+ return val & 0xff;
+}
+
+static void __i8254_write(struct comedi_8254 *i8254,
+ unsigned int val, unsigned int reg)
+{
+ unsigned int reg_offset = (reg * i8254->iosize) << i8254->regshift;
+
+ switch (i8254->iosize) {
+ default:
+ case I8254_IO8:
+ if (i8254->mmio)
+ writeb(val, i8254->mmio + reg_offset);
+ else
+ outb(val, i8254->iobase + reg_offset);
+ break;
+ case I8254_IO16:
+ if (i8254->mmio)
+ writew(val, i8254->mmio + reg_offset);
+ else
+ outw(val, i8254->iobase + reg_offset);
+ break;
+ case I8254_IO32:
+ if (i8254->mmio)
+ writel(val, i8254->mmio + reg_offset);
+ else
+ outl(val, i8254->iobase + reg_offset);
+ break;
+ }
+}
+
+/**
+ * comedi_8254_status - return the status of a counter
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ */
+unsigned int comedi_8254_status(struct comedi_8254 *i8254, unsigned int counter)
+{
+ unsigned int cmd;
+
+ if (counter > 2)
+ return 0;
+
+ cmd = I8254_CTRL_READBACK_STATUS | I8254_CTRL_READBACK_SEL_CTR(counter);
+ __i8254_write(i8254, cmd, I8254_CTRL_REG);
+
+ return __i8254_read(i8254, counter);
+}
+EXPORT_SYMBOL_GPL(comedi_8254_status);
+
+/**
+ * comedi_8254_read - read the current counter value
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ */
+unsigned int comedi_8254_read(struct comedi_8254 *i8254, unsigned int counter)
+{
+ unsigned int val;
+
+ if (counter > 2)
+ return 0;
+
+ /* latch counter */
+ __i8254_write(i8254, I8254_CTRL_SEL_CTR(counter) | I8254_CTRL_LATCH,
+ I8254_CTRL_REG);
+
+ /* read LSB then MSB */
+ val = __i8254_read(i8254, counter);
+ val |= (__i8254_read(i8254, counter) << 8);
+
+ return val;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_read);
+
+/**
+ * comedi_8254_write - load a 16-bit initial counter value
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ * @val: the initial value
+ */
+void comedi_8254_write(struct comedi_8254 *i8254,
+ unsigned int counter, unsigned int val)
+{
+ unsigned int byte;
+
+ if (counter > 2)
+ return;
+ if (val > 0xffff)
+ return;
+
+ /* load LSB then MSB */
+ byte = val & 0xff;
+ __i8254_write(i8254, byte, counter);
+ byte = (val >> 8) & 0xff;
+ __i8254_write(i8254, byte, counter);
+}
+EXPORT_SYMBOL_GPL(comedi_8254_write);
+
+/**
+ * comedi_8254_set_mode - set the mode of a counter
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ * @mode: the I8254_MODEx and I8254_BCD|I8254_BINARY
+ */
+int comedi_8254_set_mode(struct comedi_8254 *i8254, unsigned int counter,
+ unsigned int mode)
+{
+ unsigned int byte;
+
+ if (counter > 2)
+ return -EINVAL;
+ if (mode > (I8254_MODE5 | I8254_BCD))
+ return -EINVAL;
+
+ byte = I8254_CTRL_SEL_CTR(counter) | /* select counter */
+ I8254_CTRL_LSB_MSB | /* load LSB then MSB */
+ mode; /* mode and BCD|binary */
+ __i8254_write(i8254, byte, I8254_CTRL_REG);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_set_mode);
+
+/**
+ * comedi_8254_load - program the mode and initial count of a counter
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ * @mode: the I8254_MODEx and I8254_BCD|I8254_BINARY
+ * @val: the initial value
+ */
+int comedi_8254_load(struct comedi_8254 *i8254, unsigned int counter,
+ unsigned int val, unsigned int mode)
+{
+ if (counter > 2)
+ return -EINVAL;
+ if (val > 0xffff)
+ return -EINVAL;
+ if (mode > (I8254_MODE5 | I8254_BCD))
+ return -EINVAL;
+
+ comedi_8254_set_mode(i8254, counter, mode);
+ comedi_8254_write(i8254, counter, val);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_load);
+
+/**
+ * comedi_8254_pacer_enable - set the mode and load the cascaded counters
+ * @i8254: comedi_8254 struct for the timer
+ * @counter1: the counter number for the first divisor
+ * @counter2: the counter number for the second divisor
+ * @enable: flag to enable (load) the counters
+ */
+void comedi_8254_pacer_enable(struct comedi_8254 *i8254,
+ unsigned int counter1,
+ unsigned int counter2,
+ bool enable)
+{
+ unsigned int mode;
+
+ if (counter1 > 2 || counter2 > 2 || counter1 == counter2)
+ return;
+
+ if (enable)
+ mode = I8254_MODE2 | I8254_BINARY;
+ else
+ mode = I8254_MODE0 | I8254_BINARY;
+
+ comedi_8254_set_mode(i8254, counter1, mode);
+ comedi_8254_set_mode(i8254, counter2, mode);
+
+ if (enable) {
+ /*
+ * Divisors are loaded second counter then first counter to
+ * avoid possible issues with the first counter expiring
+ * before the second counter is loaded.
+ */
+ comedi_8254_write(i8254, counter2, i8254->divisor2);
+ comedi_8254_write(i8254, counter1, i8254->divisor1);
+ }
+}
+EXPORT_SYMBOL_GPL(comedi_8254_pacer_enable);
+
+/**
+ * comedi_8254_update_divisors - update the divisors for the cascaded counters
+ * @i8254: comedi_8254 struct for the timer
+ */
+void comedi_8254_update_divisors(struct comedi_8254 *i8254)
+{
+ /* masking is done since counter maps zero to 0x10000 */
+ i8254->divisor = i8254->next_div & 0xffff;
+ i8254->divisor1 = i8254->next_div1 & 0xffff;
+ i8254->divisor2 = i8254->next_div2 & 0xffff;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_update_divisors);
+
+/**
+ * comedi_8254_cascade_ns_to_timer - calculate the cascaded divisor values
+ * @i8254: comedi_8254 struct for the timer
+ * @nanosec: the desired ns time
+ * @flags: comedi_cmd flags
+ */
+void comedi_8254_cascade_ns_to_timer(struct comedi_8254 *i8254,
+ unsigned int *nanosec,
+ unsigned int flags)
+{
+ unsigned int d1 = i8254->next_div1 ? i8254->next_div1 : I8254_MAX_COUNT;
+ unsigned int d2 = i8254->next_div2 ? i8254->next_div2 : I8254_MAX_COUNT;
+ unsigned int div = d1 * d2;
+ unsigned int ns_lub = 0xffffffff;
+ unsigned int ns_glb = 0;
+ unsigned int d1_lub = 0;
+ unsigned int d1_glb = 0;
+ unsigned int d2_lub = 0;
+ unsigned int d2_glb = 0;
+ unsigned int start;
+ unsigned int ns;
+ unsigned int ns_low;
+ unsigned int ns_high;
+
+ /* exit early if everything is already correct */
+ if (div * i8254->osc_base == *nanosec &&
+ d1 > 1 && d1 <= I8254_MAX_COUNT &&
+ d2 > 1 && d2 <= I8254_MAX_COUNT &&
+ /* check for overflow */
+ div > d1 && div > d2 &&
+ div * i8254->osc_base > div &&
+ div * i8254->osc_base > i8254->osc_base)
+ return;
+
+ div = *nanosec / i8254->osc_base;
+ d2 = I8254_MAX_COUNT;
+ start = div / d2;
+ if (start < 2)
+ start = 2;
+ for (d1 = start; d1 <= div / d1 + 1 && d1 <= I8254_MAX_COUNT; d1++) {
+ for (d2 = div / d1;
+ d1 * d2 <= div + d1 + 1 && d2 <= I8254_MAX_COUNT; d2++) {
+ ns = i8254->osc_base * d1 * d2;
+ if (ns <= *nanosec && ns > ns_glb) {
+ ns_glb = ns;
+ d1_glb = d1;
+ d2_glb = d2;
+ }
+ if (ns >= *nanosec && ns < ns_lub) {
+ ns_lub = ns;
+ d1_lub = d1;
+ d2_lub = d2;
+ }
+ }
+ }
+
+ switch (flags & CMDF_ROUND_MASK) {
+ case CMDF_ROUND_NEAREST:
+ default:
+ ns_high = d1_lub * d2_lub * i8254->osc_base;
+ ns_low = d1_glb * d2_glb * i8254->osc_base;
+ if (ns_high - *nanosec < *nanosec - ns_low) {
+ d1 = d1_lub;
+ d2 = d2_lub;
+ } else {
+ d1 = d1_glb;
+ d2 = d2_glb;
+ }
+ break;
+ case CMDF_ROUND_UP:
+ d1 = d1_lub;
+ d2 = d2_lub;
+ break;
+ case CMDF_ROUND_DOWN:
+ d1 = d1_glb;
+ d2 = d2_glb;
+ break;
+ }
+
+ *nanosec = d1 * d2 * i8254->osc_base;
+ i8254->next_div1 = d1;
+ i8254->next_div2 = d2;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_cascade_ns_to_timer);
+
+/**
+ * comedi_8254_ns_to_timer - calculate the divisor value for nanosec timing
+ * @i8254: comedi_8254 struct for the timer
+ * @nanosec: the desired ns time
+ * @flags: comedi_cmd flags
+ */
+void comedi_8254_ns_to_timer(struct comedi_8254 *i8254,
+ unsigned int *nanosec, unsigned int flags)
+{
+ unsigned int divisor;
+
+ switch (flags & CMDF_ROUND_MASK) {
+ default:
+ case CMDF_ROUND_NEAREST:
+ divisor = DIV_ROUND_CLOSEST(*nanosec, i8254->osc_base);
+ break;
+ case CMDF_ROUND_UP:
+ divisor = DIV_ROUND_UP(*nanosec, i8254->osc_base);
+ break;
+ case CMDF_ROUND_DOWN:
+ divisor = *nanosec / i8254->osc_base;
+ break;
+ }
+ if (divisor < 2)
+ divisor = 2;
+ if (divisor > I8254_MAX_COUNT)
+ divisor = I8254_MAX_COUNT;
+
+ *nanosec = divisor * i8254->osc_base;
+ i8254->next_div = divisor;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_ns_to_timer);
+
+/**
+ * comedi_8254_set_busy - set/clear the "busy" flag for a given counter
+ * @i8254: comedi_8254 struct for the timer
+ * @counter: the counter number
+ * @busy: set/clear flag
+ */
+void comedi_8254_set_busy(struct comedi_8254 *i8254,
+ unsigned int counter, bool busy)
+{
+ if (counter < 3)
+ i8254->busy[counter] = busy;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_set_busy);
+
+static int comedi_8254_insn_read(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ int i;
+
+ if (i8254->busy[chan])
+ return -EBUSY;
+
+ for (i = 0; i < insn->n; i++)
+ data[i] = comedi_8254_read(i8254, chan);
+
+ return insn->n;
+}
+
+static int comedi_8254_insn_write(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+
+ if (i8254->busy[chan])
+ return -EBUSY;
+
+ if (insn->n)
+ comedi_8254_write(i8254, chan, data[insn->n - 1]);
+
+ return insn->n;
+}
+
+static int comedi_8254_insn_config(struct comedi_device *dev,
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
+{
+ struct comedi_8254 *i8254 = s->private;
+ unsigned int chan = CR_CHAN(insn->chanspec);
+ int ret;
+
+ if (i8254->busy[chan])
+ return -EBUSY;
+
+ switch (data[0]) {
+ case INSN_CONFIG_RESET:
+ ret = comedi_8254_set_mode(i8254, chan,
+ I8254_MODE0 | I8254_BINARY);
+ if (ret)
+ return ret;
+ break;
+ case INSN_CONFIG_SET_COUNTER_MODE:
+ ret = comedi_8254_set_mode(i8254, chan, data[1]);
+ if (ret)
+ return ret;
+ break;
+ case INSN_CONFIG_8254_READ_STATUS:
+ data[1] = comedi_8254_status(i8254, chan);
+ break;
+ default:
+ /*
+ * If available, call the driver provided (*insn_config)
+ * to handle any driver implemented instructions.
+ */
+ if (i8254->insn_config)
+ return i8254->insn_config(dev, s, insn, data);
+
+ return -EINVAL;
+ }
+
+ return insn->n;
+}
+
+/**
+ * comedi_8254_subdevice_init - initialize a comedi_subdevice for the 8254 timer
+ * @s: comedi_subdevice struct
+ */
+void comedi_8254_subdevice_init(struct comedi_subdevice *s,
+ struct comedi_8254 *i8254)
+{
+ s->type = COMEDI_SUBD_COUNTER;
+ s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
+ s->n_chan = 3;
+ s->maxdata = 0xffff;
+ s->range_table = &range_unknown;
+ s->insn_read = comedi_8254_insn_read;
+ s->insn_write = comedi_8254_insn_write;
+ s->insn_config = comedi_8254_insn_config;
+
+ s->private = i8254;
+}
+EXPORT_SYMBOL_GPL(comedi_8254_subdevice_init);
+
+static struct comedi_8254 *__i8254_init(unsigned long iobase,
+ void __iomem *mmio,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift)
+{
+ struct comedi_8254 *i8254;
+ int i;
+
+ /* sanity check that the iosize is valid */
+ if (!(iosize == I8254_IO8 || iosize == I8254_IO16 ||
+ iosize == I8254_IO32))
+ return NULL;
+
+ i8254 = kzalloc(sizeof(*i8254), GFP_KERNEL);
+ if (!i8254)
+ return NULL;
+
+ i8254->iobase = iobase;
+ i8254->mmio = mmio;
+ i8254->iosize = iosize;
+ i8254->regshift = regshift;
+
+ /* default osc_base to the max speed of a generic 8254 timer */
+ i8254->osc_base = osc_base ? osc_base : I8254_OSC_BASE_10MHZ;
+
+ /* reset all the counters by setting them to I8254_MODE0 */
+ for (i = 0; i < 3; i++)
+ comedi_8254_set_mode(i8254, i, I8254_MODE0 | I8254_BINARY);
+
+ return i8254;
+}
+
+/**
+ * comedi_8254_init - allocate and initialize the 8254 device for pio access
+ * @mmio: port I/O base address
+ * @osc_base: base time of the counter in ns
+ * OPTIONAL - only used by comedi_8254_cascade_ns_to_timer()
+ * @iosize: I/O register size
+ * @regshift: register gap shift
+ */
+struct comedi_8254 *comedi_8254_init(unsigned long iobase,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift)
+{
+ return __i8254_init(iobase, NULL, osc_base, iosize, regshift);
+}
+EXPORT_SYMBOL_GPL(comedi_8254_init);
+
+/**
+ * comedi_8254_mm_init - allocate and initialize the 8254 device for mmio access
+ * @mmio: memory mapped I/O base address
+ * @osc_base: base time of the counter in ns
+ * OPTIONAL - only used by comedi_8254_cascade_ns_to_timer()
+ * @iosize: I/O register size
+ * @regshift: register gap shift
+ */
+struct comedi_8254 *comedi_8254_mm_init(void __iomem *mmio,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift)
+{
+ return __i8254_init(0, mmio, osc_base, iosize, regshift);
+}
+EXPORT_SYMBOL_GPL(comedi_8254_mm_init);
+
+static int __init comedi_8254_module_init(void)
+{
+ return 0;
+}
+module_init(comedi_8254_module_init);
+
+static void __exit comedi_8254_module_exit(void)
+{
+}
+module_exit(comedi_8254_module_exit);
+
+MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
+MODULE_DESCRIPTION("Comedi: Generic 8254 timer/counter support");
+MODULE_LICENSE("GPL");
--- /dev/null
+/*
+ * comedi_8254.h
+ * Generic 8254 timer/counter support
+ * Copyright (C) 2014 H Hartley Sweeten <hsweeten@visionengravers.com>
+ *
+ * COMEDI - Linux Control and Measurement Device Interface
+ * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _COMEDI_8254_H
+#define _COMEDI_8254_H
+
+/*
+ * Common oscillator base values in nanoseconds
+ */
+#define I8254_OSC_BASE_10MHZ 100
+#define I8254_OSC_BASE_5MHZ 200
+#define I8254_OSC_BASE_4MHZ 250
+#define I8254_OSC_BASE_2MHZ 500
+#define I8254_OSC_BASE_1MHZ 1000
+#define I8254_OSC_BASE_100KHZ 10000
+#define I8254_OSC_BASE_10KHZ 100000
+#define I8254_OSC_BASE_1KHZ 1000000
+
+/*
+ * I/O access size used to read/write registers
+ */
+#define I8254_IO8 1
+#define I8254_IO16 2
+#define I8254_IO32 4
+
+/*
+ * Register map for generic 8254 timer (I8254_IO8 with 0 regshift)
+ */
+#define I8254_COUNTER0_REG 0x00
+#define I8254_COUNTER1_REG 0x01
+#define I8254_COUNTER2_REG 0x02
+#define I8254_CTRL_REG 0x03
+#define I8254_CTRL_SEL_CTR(x) ((x) << 6)
+#define I8254_CTRL_READBACK_COUNT ((3 << 6) | (1 << 4))
+#define I8254_CTRL_READBACK_STATUS ((3 << 6) | (1 << 5))
+#define I8254_CTRL_READBACK_SEL_CTR(x) (2 << (x))
+#define I8254_CTRL_LATCH (0 << 4)
+#define I8254_CTRL_LSB_ONLY (1 << 4)
+#define I8254_CTRL_MSB_ONLY (2 << 4)
+#define I8254_CTRL_LSB_MSB (3 << 4)
+
+/* counter maps zero to 0x10000 */
+#define I8254_MAX_COUNT 0x10000
+
+/**
+ * struct comedi_8254 - private data used by this module
+ * @iobase: PIO base address of the registers (in/out)
+ * @mmio: MMIO base address of the registers (read/write)
+ * @iosize: I/O size used to access the registers (b/w/l)
+ * @regshift: register gap shift
+ * @osc_base: cascaded oscillator speed in ns
+ * @divisor: divisor for single counter
+ * @divisor1: divisor loaded into first cascaded counter
+ * @divisor2: divisor loaded into second cascaded counter
+ * #next_div: next divisor for single counter
+ * @next_div1: next divisor to use for first cascaded counter
+ * @next_div2: next divisor to use for second cascaded counter
+ * @clock_src; current clock source for each counter (driver specific)
+ * @gate_src; current gate source for each counter (driver specific)
+ * @busy: flags used to indicate that a counter is "busy"
+ * @insn_config: driver specific (*insn_config) callback
+ */
+struct comedi_8254 {
+ unsigned long iobase;
+ void __iomem *mmio;
+ unsigned int iosize;
+ unsigned int regshift;
+ unsigned int osc_base;
+ unsigned int divisor;
+ unsigned int divisor1;
+ unsigned int divisor2;
+ unsigned int next_div;
+ unsigned int next_div1;
+ unsigned int next_div2;
+ unsigned int clock_src[3];
+ unsigned int gate_src[3];
+ bool busy[3];
+
+ int (*insn_config)(struct comedi_device *, struct comedi_subdevice *s,
+ struct comedi_insn *, unsigned int *data);
+};
+
+unsigned int comedi_8254_status(struct comedi_8254 *, unsigned int counter);
+unsigned int comedi_8254_read(struct comedi_8254 *, unsigned int counter);
+void comedi_8254_write(struct comedi_8254 *,
+ unsigned int counter, unsigned int val);
+
+int comedi_8254_set_mode(struct comedi_8254 *,
+ unsigned int counter, unsigned int mode);
+int comedi_8254_load(struct comedi_8254 *,
+ unsigned int counter, unsigned int val, unsigned int mode);
+
+void comedi_8254_pacer_enable(struct comedi_8254 *,
+ unsigned int counter1, unsigned int counter2,
+ bool enable);
+void comedi_8254_update_divisors(struct comedi_8254 *);
+void comedi_8254_cascade_ns_to_timer(struct comedi_8254 *,
+ unsigned int *nanosec, unsigned int flags);
+void comedi_8254_ns_to_timer(struct comedi_8254 *,
+ unsigned int *nanosec, unsigned int flags);
+
+void comedi_8254_set_busy(struct comedi_8254 *,
+ unsigned int counter, bool busy);
+
+void comedi_8254_subdevice_init(struct comedi_subdevice *,
+ struct comedi_8254 *);
+
+struct comedi_8254 *comedi_8254_init(unsigned long iobase,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift);
+struct comedi_8254 *comedi_8254_mm_init(void __iomem *mmio,
+ unsigned int osc_base,
+ unsigned int iosize,
+ unsigned int regshift);
+
+#endif /* _COMEDI_8254_H */
strlcat(devpriv->name, buf,
sizeof(devpriv->name));
}
-
}
}
s->insn_config = bonding_dio_insn_config;
dev_info(dev->class_dev,
- "%s: %s attached, %u channels from %u devices\n",
- dev->driver->driver_name, dev->board_name,
- devpriv->nchans, devpriv->ndevs);
+ "%s: %s attached, %u channels from %u devices\n",
+ dev->driver->driver_name, dev->board_name,
+ devpriv->nchans, devpriv->ndevs);
return 0;
}
desc = &dma->desc[i];
if (desc->virt_addr)
dma_free_coherent(NULL, desc->maxsize,
- desc->virt_addr, desc->hw_addr);
+ desc->virt_addr,
+ desc->hw_addr);
}
kfree(dma->desc);
}
for (i = 0; i < s->n_chan; i++)
devpriv->ao_loopbacks[i] = s->maxdata / 2;
- init_timer(&devpriv->timer);
- devpriv->timer.function = waveform_ai_interrupt;
- devpriv->timer.data = (unsigned long)dev;
+ setup_timer(&devpriv->timer, waveform_ai_interrupt,
+ (unsigned long)dev);
dev_info(dev->class_dev,
"%s: %i microvolt, %li microsecond waveform attached\n",
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* Register map
}
static int contec_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct comedi_subdevice *s;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "8255.h"
}
static int daqboard2000_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
const struct daq200_boardtype *board;
#include "../comedidev.h"
#include "8255.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "das08.h"
/*
return insn->n;
}
-static void i8254_initialize(struct comedi_device *dev)
-{
- const struct das08_board_struct *thisboard = dev->board_ptr;
- unsigned long i8254_iobase = dev->iobase + thisboard->i8254_offset;
- unsigned int mode = I8254_MODE0 | I8254_BINARY;
- int i;
-
- for (i = 0; i < 3; ++i)
- i8254_set_mode(i8254_iobase, 0, i, mode);
-}
-
-static int das08_counter_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct das08_board_struct *thisboard = dev->board_ptr;
- unsigned long i8254_iobase = dev->iobase + thisboard->i8254_offset;
- int chan = insn->chanspec;
-
- data[0] = i8254_read(i8254_iobase, 0, chan);
- return 1;
-}
-
-static int das08_counter_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct das08_board_struct *thisboard = dev->board_ptr;
- unsigned long i8254_iobase = dev->iobase + thisboard->i8254_offset;
- int chan = insn->chanspec;
-
- i8254_write(i8254_iobase, 0, chan, data[0]);
- return 1;
-}
-
-static int das08_counter_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- const struct das08_board_struct *thisboard = dev->board_ptr;
- unsigned long i8254_iobase = dev->iobase + thisboard->i8254_offset;
- int chan = insn->chanspec;
-
- switch (data[0]) {
- case INSN_CONFIG_SET_COUNTER_MODE:
- i8254_set_mode(i8254_iobase, 0, chan, data[1]);
- break;
- case INSN_CONFIG_8254_READ_STATUS:
- data[1] = i8254_status(i8254_iobase, 0, chan);
- break;
- default:
- return -EINVAL;
- }
- return 2;
-}
-
int das08_common_attach(struct comedi_device *dev, unsigned long iobase)
{
const struct das08_board_struct *thisboard = dev->board_ptr;
if (ret)
return ret;
- /* intialize all channels to 0V */
+ /* initialize all channels to 0V */
for (i = 0; i < s->n_chan; i++) {
s->readback[i] = s->maxdata / 2;
das08_ao_set_data(dev, i, s->readback[i]);
s->type = COMEDI_SUBD_UNUSED;
}
+ /* Counter subdevice (8254) */
s = &dev->subdevices[5];
- /* 8254 */
- if (thisboard->i8254_offset != 0) {
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
- s->n_chan = 3;
- s->maxdata = 0xFFFF;
- s->insn_read = das08_counter_read;
- s->insn_write = das08_counter_write;
- s->insn_config = das08_counter_config;
- i8254_initialize(dev);
+ if (thisboard->i8254_offset) {
+ dev->pacer = comedi_8254_init(dev->iobase +
+ thisboard->i8254_offset,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ comedi_8254_subdevice_init(s, dev->pacer);
} else {
s->type = COMEDI_SUBD_UNUSED;
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "das08.h"
#include "comedi_isadma.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h"
#define DAS16_DMA_SIZE 0xff00 /* size in bytes of allocated dma buffer */
/* step 4: fix up arguments */
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(devpriv->clockbase,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
if (cmd->convert_src == TRIG_TIMER) {
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(devpriv->clockbase,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
static unsigned int das16_set_pacer(struct comedi_device *dev, unsigned int ns,
unsigned int flags)
{
- struct das16_private_struct *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAS16_TIMER_BASE_REG;
-
- i8253_cascade_ns_to_timer(devpriv->clockbase,
- &devpriv->divisor1, &devpriv->divisor2,
- &ns, flags);
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &ns, flags);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
return ns;
}
if (cmd->flags & CMDF_PRIORITY) {
dev_err(dev->class_dev,
- "isa dma transfers cannot be performed with CMDF_PRIORITY, aborting\n");
+ "isa dma transfers cannot be performed with CMDF_PRIORITY, aborting\n");
return -1;
}
outb(0, dev->iobase + DAS16_STATUS_REG);
outb(0, dev->iobase + DAS16_CTRL_REG);
outb(0, dev->iobase + DAS16_PACER_REG);
- outb(0, dev->iobase + DAS16_TIMER_BASE_REG + i8254_control_reg);
}
static void das16_alloc_dma(struct comedi_device *dev, unsigned int dma_chan)
devpriv->dma = comedi_isadma_alloc(dev, 2, dma_chan, dma_chan,
DAS16_DMA_SIZE, COMEDI_ISADMA_READ);
if (devpriv->dma) {
- init_timer(&devpriv->timer);
- devpriv->timer.function = das16_timer_interrupt;
- devpriv->timer.data = (unsigned long)dev;
+ setup_timer(&devpriv->timer, das16_timer_interrupt,
+ (unsigned long)dev);
}
}
const struct das16_board *board = dev->board_ptr;
struct das16_private_struct *devpriv;
struct comedi_subdevice *s;
+ unsigned int osc_base;
unsigned int status;
int ret;
return -EINVAL;
/* get master clock speed */
+ osc_base = I8254_OSC_BASE_1MHZ;
if (devpriv->can_burst) {
status = inb(dev->iobase + DAS1600_STATUS_REG);
-
if (status & DAS1600_STATUS_CLK_10MHZ)
- devpriv->clockbase = I8254_OSC_BASE_10MHZ;
- else
- devpriv->clockbase = I8254_OSC_BASE_1MHZ;
+ osc_base = I8254_OSC_BASE_10MHZ;
} else {
if (it->options[3])
- devpriv->clockbase = I8254_OSC_BASE_1MHZ /
- it->options[3];
- else
- devpriv->clockbase = I8254_OSC_BASE_1MHZ;
+ osc_base = I8254_OSC_BASE_1MHZ / it->options[3];
}
+ dev->pacer = comedi_8254_init(dev->iobase + DAS16_TIMER_BASE_REG,
+ osc_base, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
das16_alloc_dma(dev, it->options[2]);
ret = comedi_alloc_subdevices(dev, 4 + board->has_8255);
*/
#include <linux/module.h>
+#include <linux/slab.h>
#include <linux/interrupt.h>
#include "../comedidev.h"
#include "8255.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "comedi_fc.h"
#define DAS16M1_SIZE2 8
#define Q_RANGE(x) (((x) & 0xf) << 4)
#define UNIPOLAR 0x40
#define DAS16M1_8254_FIRST 0x8
-#define DAS16M1_8254_FIRST_CNTRL 0xb
-#define TOTAL_CLEAR 0x30
#define DAS16M1_8254_SECOND 0xc
#define DAS16M1_82C55 0x400
#define DAS16M1_8254_THIRD 0x404
};
struct das16m1_private_struct {
+ struct comedi_8254 *counter;
unsigned int control_state;
unsigned int adc_count; /* number of samples completed */
/* initial value in lower half of hardware conversion counter,
* counter yet (loaded by first sample conversion) */
u16 initial_hw_count;
unsigned short ai_buffer[FIFO_SIZE];
- unsigned int divisor1; /* divides master clock to obtain conversion speed */
- unsigned int divisor2; /* divides master clock to obtain conversion speed */
unsigned long extra_iobase;
};
if ((i % 2) != (chan % 2)) {
dev_dbg(dev->class_dev,
- "even/odd channels must go have even/odd chanlist indices\n");
+ "even/odd channels must go have even/odd chanlist indices\n");
return -EINVAL;
}
}
static int das16m1_cmd_test(struct comedi_device *dev,
struct comedi_subdevice *s, struct comedi_cmd *cmd)
{
- struct das16m1_private_struct *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
/* step 4: fix up arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
return 0;
}
-static void das16m1_set_pacer(struct comedi_device *dev)
-{
- struct das16m1_private_struct *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAS16M1_8254_SECOND;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
-}
-
static int das16m1_cmd_exec(struct comedi_device *dev,
struct comedi_subdevice *s)
{
struct das16m1_private_struct *devpriv = dev->private;
struct comedi_async *async = s->async;
struct comedi_cmd *cmd = &async->cmd;
- unsigned long timer_base = dev->iobase + DAS16M1_8254_FIRST;
unsigned int byte, i;
/* disable interrupts and internal pacer */
/* set software count */
devpriv->adc_count = 0;
- /* Initialize lower half of hardware counter, used to determine how
+
+ /*
+ * Initialize lower half of hardware counter, used to determine how
* many samples are in fifo. Value doesn't actually load into counter
- * until counter's next clock (the next a/d conversion) */
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 1, 0);
- /* remember current reading of counter so we know when counter has
- * actually been loaded */
- devpriv->initial_hw_count = i8254_read(timer_base, 0, 1);
+ * until counter's next clock (the next a/d conversion).
+ */
+ comedi_8254_set_mode(devpriv->counter, 1, I8254_MODE2 | I8254_BINARY);
+ comedi_8254_write(devpriv->counter, 1, 0);
+
+ /*
+ * Remember current reading of counter so we know when counter has
+ * actually been loaded.
+ */
+ devpriv->initial_hw_count = comedi_8254_read(devpriv->counter, 1);
+
/* setup channel/gain queue */
for (i = 0; i < cmd->chanlist_len; i++) {
outb(i, dev->iobase + DAS16M1_QUEUE_ADDR);
/* enable interrupts and set internal pacer counter mode and counts */
devpriv->control_state &= ~PACER_MASK;
if (cmd->convert_src == TRIG_TIMER) {
- das16m1_set_pacer(dev);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
devpriv->control_state |= INT_PACER;
} else { /* TRIG_EXT */
devpriv->control_state |= EXT_PACER;
async = s->async;
cmd = &async->cmd;
- /* figure out how many samples are in fifo */
- hw_counter = i8254_read(dev->iobase + DAS16M1_8254_FIRST, 0, 1);
+ /* figure out how many samples are in fifo */
+ hw_counter = comedi_8254_read(devpriv->counter, 1);
/* make sure hardware counter reading is not bogus due to initial value
* not having been loaded yet */
if (devpriv->adc_count == 0 && hw_counter == devpriv->initial_hw_count) {
dev->irq = it->options[1];
}
+ dev->pacer = comedi_8254_init(dev->iobase + DAS16M1_8254_SECOND,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ devpriv->counter = comedi_8254_init(dev->iobase + DAS16M1_8254_FIRST,
+ 0, I8254_IO8, 0);
+ if (!devpriv->counter)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
if (ret)
return ret;
- /* disable upper half of hardware conversion counter so it doesn't mess with us */
- outb(TOTAL_CLEAR, dev->iobase + DAS16M1_8254_FIRST_CNTRL);
-
/* initialize digital output lines */
outb(0, dev->iobase + DAS16M1_DIO);
{
struct das16m1_private_struct *devpriv = dev->private;
- if (devpriv && devpriv->extra_iobase)
- release_region(devpriv->extra_iobase, DAS16M1_SIZE2);
+ if (devpriv) {
+ if (devpriv->extra_iobase)
+ release_region(devpriv->extra_iobase, DAS16M1_SIZE2);
+ kfree(devpriv->counter);
+ }
comedi_legacy_detach(dev);
}
#include "comedi_isadma.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/* misc. defines */
#define DAS1800_SIZE 16 /* uses 16 io addresses */
struct das1800_private {
struct comedi_isadma *dma;
- unsigned int divisor1; /* value to load into board's counter 1 for timed conversions */
- unsigned int divisor2; /* value to load into board's counter 2 for timed conversions */
int irq_dma_bits; /* bits for control register b */
/* dma bits for control register b, stored so that dma can be
* turned on and off */
while (inb(dev->iobase + DAS1800_STATUS) & FNE) {
dpnt = inw(dev->iobase + DAS1800_FIFO);
- /* convert to unsigned type if we are in a bipolar mode */
- if (!unipolar)
- ;
+ /* convert to unsigned type */
dpnt = munge_bipolar_sample(dev, dpnt);
comedi_buf_write_samples(s, &dpnt, 1);
struct comedi_cmd *cmd)
{
const struct das1800_board *thisboard = dev->board_ptr;
- struct das1800_private *devpriv = dev->private;
int err = 0;
unsigned int arg;
cmd->convert_src == TRIG_TIMER) {
/* we are not in burst mode */
arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_5MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &cmd->convert_arg, cmd->flags);
- if (arg != cmd->convert_arg)
- err++;
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
} else if (cmd->convert_src == TRIG_TIMER) {
/* we are in burst mode */
- arg = cmd->convert_arg;
- cmd->convert_arg = burst_convert_arg(cmd->convert_arg,
- cmd->flags);
- if (arg != cmd->convert_arg)
- err++;
+ arg = burst_convert_arg(cmd->convert_arg, cmd->flags);
+ err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
if (cmd->scan_begin_src == TRIG_TIMER) {
arg = cmd->convert_arg * cmd->chanlist_len;
- if (arg > cmd->scan_begin_arg) {
- cmd->scan_begin_arg = arg;
- err++;
- }
+ err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
+ arg);
arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_5MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &cmd->scan_begin_arg,
- cmd->flags);
- if (arg != cmd->scan_begin_arg)
- err++;
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg,
+ cmd->flags);
+ err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg,
+ arg);
}
}
return control_c;
}
-static void das1800_setup_counters(struct comedi_device *dev,
- const struct comedi_cmd *cmd)
-{
- struct das1800_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAS1800_COUNTER;
-
- /* setup cascaded counters for conversion/scan frequency */
- if ((cmd->scan_begin_src == TRIG_FOLLOW ||
- cmd->scan_begin_src == TRIG_TIMER) &&
- cmd->convert_src == TRIG_TIMER) {
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
- }
-
- /* setup counter 0 for 'about triggering' */
- if (cmd->stop_src == TRIG_EXT) {
- i8254_set_mode(timer_base, 0, 0, I8254_MODE0 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 0, 1);
- }
-}
-
static unsigned int das1800_ai_transfer_size(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int maxbytes,
/* setup card and start */
program_chanlist(dev, cmd);
- das1800_setup_counters(dev, cmd);
+
+ /* setup cascaded counters for conversion/scan frequency */
+ if ((cmd->scan_begin_src == TRIG_FOLLOW ||
+ cmd->scan_begin_src == TRIG_TIMER) &&
+ cmd->convert_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
+ }
+
+ /* setup counter 0 for 'about triggering' */
+ if (cmd->stop_src == TRIG_EXT)
+ comedi_8254_load(dev->pacer, 0, 1, I8254_MODE0 | I8254_BINARY);
+
das1800_ai_setup_dma(dev, s);
outb(control_c, dev->iobase + DAS1800_CONTROL_C);
/* set conversion rate and length for burst mode */
struct comedi_subdevice *s,
struct comedi_insn *insn, unsigned int *data)
{
-
data[1] = inb(dev->iobase + DAS1800_DIGITAL) & 0xf;
data[0] = 0;
if (!devpriv->fifo_buf)
return -ENOMEM;
+ dev->pacer = comedi_8254_init(dev->iobase + DAS1800_COUNTER,
+ I8254_OSC_BASE_5MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
#include <linux/interrupt.h>
#include "../comedidev.h"
+
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* Register I/O map
struct das6402_private {
unsigned int irq;
-
- unsigned int count;
- unsigned int divider1;
- unsigned int divider2;
-
unsigned int ao_range;
};
outb(DAS6402_STATUS_W_CLRINT, dev->iobase + DAS6402_STATUS_REG);
}
-static void das6402_enable_counter(struct comedi_device *dev, bool load)
-{
- struct das6402_private *devpriv = dev->private;
- unsigned long timer_iobase = dev->iobase + DAS6402_TIMER_BASE;
-
- if (load) {
- i8254_set_mode(timer_iobase, 0, 0, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_iobase, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_iobase, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_iobase, 0, 0, devpriv->count);
- i8254_write(timer_iobase, 0, 1, devpriv->divider1);
- i8254_write(timer_iobase, 0, 2, devpriv->divider2);
-
- } else {
- i8254_set_mode(timer_iobase, 0, 0, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_iobase, 0, 1, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_iobase, 0, 2, I8254_MODE0 | I8254_BINARY);
- }
-}
-
static unsigned int das6402_ai_read_sample(struct comedi_device *dev,
struct comedi_subdevice *s)
{
outw(DAS6402_AI_MUX_HI(chan_hi) | DAS6402_AI_MUX_LO(chan_lo),
dev->iobase + DAS6402_AI_MUX_REG);
- das6402_enable_counter(dev, true);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
/* enable interrupt and pacer trigger */
outb(DAS6402_CTRL_INTE |
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
- struct das6402_private *devpriv = dev->private;
int err = 0;
unsigned int arg;
/* step 4: fix up any arguments */
- if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divider1,
- &devpriv->divider2,
- &arg, cmd->flags);
- err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
- }
+ arg = cmd->convert_arg;
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
+ err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
if (err)
return 4;
outw(0, dev->iobase + DAS6402_AO_DATA_REG(0));
inw(dev->iobase + DAS6402_AO_LSB_REG(0));
- das6402_enable_counter(dev, false);
-
/* set all digital outputs low */
outb(0, dev->iobase + DAS6402_DI_DO_REG);
}
}
+ dev->pacer = comedi_8254_init(dev->iobase + DAS6402_TIMER_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
The cio-das802/16 does not have a fifo-empty status bit! Therefore
only fifo-half-full transfers are possible with this card.
-*/
-/*
cmd triggers supported:
start_src: TRIG_NOW | TRIG_EXT
scan_end_src: TRIG_COUNT
convert_src: TRIG_TIMER | TRIG_EXT
stop_src: TRIG_NONE | TRIG_COUNT
-
-
*/
#include <linux/module.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
-
#include <linux/delay.h>
-#include "8253.h"
+#include "../comedidev.h"
+
#include "comedi_fc.h"
+#include "comedi_8254.h"
#define N_CHAN_AI 8 /* number of analog input channels */
};
struct das800_private {
- unsigned int divisor1; /* counter 1 value for timed conversions */
- unsigned int divisor2; /* counter 2 value for timed conversions */
unsigned int do_bits; /* digital output bits */
};
spin_unlock_irqrestore(&dev->spinlock, irq_flags);
}
-static void das800_set_frequency(struct comedi_device *dev)
-{
- struct das800_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + DAS800_8254;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
-}
-
static int das800_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
{
das800_disable(dev);
struct comedi_cmd *cmd)
{
const struct das800_board *thisboard = dev->board_ptr;
- struct das800_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_1MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
conv_bits |= DTEN;
if (cmd->convert_src == TRIG_TIMER) {
conv_bits |= CASC | ITE;
- /* set conversion frequency */
- das800_set_frequency(dev);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
}
spin_lock_irqsave(&dev->spinlock, irq_flags);
dev->irq = irq;
}
+ dev->pacer = comedi_8254_init(dev->iobase + DAS800_8254,
+ I8254_OSC_BASE_1MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 3);
if (ret)
return ret;
* This driver is for the Diamond Systems MM-32-AT board
* http://www.diamondsystems.com/products/diamondmm32at
*
- * It is being used on serveral projects inside NASA, without
+ * It is being used on several projects inside NASA, without
* problems so far. For analog input commands, TRIG_EXT is not
* yet supported.
*/
/* start the clock and enable the interrupts */
dmm32at_setaitimer(dev, cmd->scan_begin_arg);
} else {
- /* start the interrups and initiate a single scan */
+ /* start the interrupts and initiate a single scan */
outb(DMM32AT_INTCLK_ADINT, dev->iobase + DMM32AT_INTCLK_REG);
outb(0xff, dev->iobase + DMM32AT_AI_START_CONV_REG);
}
return 0;
-
}
static int dmm32at_ai_cancel(struct comedi_device *dev,
};
struct dt2801_board {
-
const char *name;
int boardcode;
int ad_diff;
ret = dt2801_writedata(dev, data & 0xff);
if (ret < 0)
return ret;
- ret = dt2801_writedata(dev, (data >> 8));
+ ret = dt2801_writedata(dev, data >> 8);
if (ret < 0)
return ret;
#define DT2811_ADMODE 0x03
struct dt2811_board {
-
const char *name;
const struct comedi_lrange *bip_5;
const struct comedi_lrange *bip_2_5;
#define DT2814_CHANMASK 0x0f
struct dt2814_private {
-
int ntrig;
int curadchan;
};
outb(chan | DT2814_ENB | (trigvar << 5), dev->iobase + DT2814_CSR);
return 0;
-
}
static irqreturn_t dt2814_interrupt(int irq, void *d)
#define DT2815_STATUS 1
struct dt2815_private {
-
const struct comedi_lrange *range_type_list[8];
unsigned int ao_readback[8];
};
if (cmd->scan_begin_src == TRIG_FOLLOW) {
outw(devpriv->supcsr | DT2821_SUPCSR_STRIG,
- dev->iobase + DT2821_SUPCSR_REG);
+ dev->iobase + DT2821_SUPCSR_REG);
} else {
devpriv->supcsr |= DT2821_SUPCSR_XTRIG;
outw(devpriv->supcsr, dev->iobase + DT2821_SUPCSR_REG);
return 4;
return 0;
-
}
static int dt282x_ao_inttrig(struct comedi_device *dev,
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include <linux/module.h>
#include <linux/delay.h>
-#include <linux/pci.h>
#include <linux/mutex.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define READ_TIMEOUT 50
}
static int dyna_pci10xx_insn_read_ai(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct dyna_pci10xx_private *devpriv = dev->private;
int n;
/* analog output callback */
static int dyna_pci10xx_insn_write_ao(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct dyna_pci10xx_private *devpriv = dev->private;
int n;
/* digital input bit interface */
static int dyna_pci10xx_di_insn_bits(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned int *data)
{
struct dyna_pci10xx_private *devpriv = dev->private;
u16 d = 0;
}
static int dyna_pci10xx_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct dyna_pci10xx_private *devpriv;
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "plx9080.h"
#include "comedi_fc.h"
return 5;
return 0;
-
}
/* setup dma descriptors so a link completes every 'len' bytes */
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define ICP_MULTI_ADC_CSR 0 /* R/W: ADC command/status register */
#define ICP_MULTI_AI 2 /* R: Analogue input data */
break;
default:
break;
-
}
return IRQ_HANDLED;
}
static int icp_multi_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct icp_multi_private *devpriv;
#include <linux/kernel.h>
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/ctype.h>
#include <linux/jiffies.h>
#include <linux/slab.h>
#include <linux/timer.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "jr3_pci.h"
if (!devpriv)
return -ENOMEM;
- init_timer(&devpriv->timer);
-
ret = comedi_pci_enable(dev);
if (ret)
return ret;
spriv->next_time_max = jiffies + msecs_to_jiffies(2000);
}
- devpriv->timer.data = (unsigned long)dev;
- devpriv->timer.function = jr3_pci_poll_dev;
+ setup_timer(&devpriv->timer, jr3_pci_poll_dev, (unsigned long)dev);
devpriv->timer.expires = jiffies + msecs_to_jiffies(1000);
add_timer(&devpriv->timer);
*/
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
/*
* PCI BAR 0 Register I/O map
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "plx9052.h"
#define ME4000_FIRMWARE "me4000_firmware.bin"
struct me4000_info {
unsigned long plx_regbase;
- unsigned long timer_regbase;
};
enum me4000_boardid {
/* Set both stop bits in the analog input control register */
outl(ME4000_AI_CTRL_BIT_IMMEDIATE_STOP | ME4000_AI_CTRL_BIT_STOP,
- dev->iobase + ME4000_AI_CTRL_REG);
+ dev->iobase + ME4000_AI_CTRL_REG);
/* Set both stop bits in the analog output control register */
val = ME4000_AO_CTRL_BIT_IMMEDIATE_STOP | ME4000_AO_CTRL_BIT_STOP;
/* Set the adustment register for AO demux */
outl(ME4000_AO_DEMUX_ADJUST_VALUE,
- dev->iobase + ME4000_AO_DEMUX_ADJUST_REG);
+ dev->iobase + ME4000_AO_DEMUX_ADJUST_REG);
/*
* Set digital I/O direction for port 0
if (!comedi_range_is_bipolar(s, range)) {
dev_dbg(dev->class_dev,
- "Bipolar is not selected in differential mode\n");
+ "Bipolar is not selected in differential mode\n");
return -EINVAL;
}
}
unsigned int *init_ticks,
unsigned int *scan_ticks, unsigned int *chan_ticks)
{
-
int rest;
*init_ticks = 0;
unsigned int init_ticks,
unsigned int scan_ticks, unsigned int chan_ticks)
{
-
unsigned int tmp = 0;
/* Write timer arguments */
/* Stop triggers */
if (cmd->stop_src == TRIG_COUNT) {
outl(cmd->chanlist_len * cmd->stop_arg,
- dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG);
+ dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG);
tmp |= ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ;
} else if (cmd->stop_src == TRIG_NONE &&
cmd->scan_end_src == TRIG_COUNT) {
outl(cmd->scan_end_arg,
- dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG);
+ dev->iobase + ME4000_AI_SAMPLE_COUNTER_REG);
tmp |= ME4000_AI_CTRL_BIT_HF_IRQ | ME4000_AI_CTRL_BIT_SC_IRQ;
} else {
tmp |= ME4000_AI_CTRL_BIT_HF_IRQ;
struct comedi_subdevice *s,
struct comedi_cmd *cmd)
{
-
unsigned int init_ticks;
unsigned int chan_ticks;
unsigned int scan_ticks;
if (cmd->start_src == TRIG_NOW &&
cmd->scan_begin_src == TRIG_TIMER &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_NOW &&
cmd->scan_begin_src == TRIG_FOLLOW &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_EXT &&
cmd->scan_begin_src == TRIG_TIMER &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_EXT &&
cmd->scan_begin_src == TRIG_FOLLOW &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_EXT &&
cmd->scan_begin_src == TRIG_EXT &&
cmd->convert_src == TRIG_TIMER) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
} else if (cmd->start_src == TRIG_EXT &&
cmd->scan_begin_src == TRIG_EXT &&
cmd->convert_src == TRIG_EXT) {
-
/* Check timer arguments */
if (init_ticks < ME4000_AI_MIN_TICKS) {
dev_err(dev->class_dev, "Invalid start arg\n");
{
if (comedi_dio_update_state(s, data)) {
outl((s->state >> 0) & 0xFF,
- dev->iobase + ME4000_DIO_PORT_0_REG);
+ dev->iobase + ME4000_DIO_PORT_0_REG);
outl((s->state >> 8) & 0xFF,
- dev->iobase + ME4000_DIO_PORT_1_REG);
+ dev->iobase + ME4000_DIO_PORT_1_REG);
outl((s->state >> 16) & 0xFF,
- dev->iobase + ME4000_DIO_PORT_2_REG);
+ dev->iobase + ME4000_DIO_PORT_2_REG);
outl((s->state >> 24) & 0xFF,
- dev->iobase + ME4000_DIO_PORT_3_REG);
+ dev->iobase + ME4000_DIO_PORT_3_REG);
}
data[1] = ((inl(dev->iobase + ME4000_DIO_PORT_0_REG) & 0xFF) << 0) |
return insn->n;
}
-/*=============================================================================
- Counter section
- ===========================================================================*/
-
-static int me4000_cnt_insn_config(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned int *data)
-{
- struct me4000_info *info = dev->private;
- unsigned int chan = CR_CHAN(insn->chanspec);
- int err;
-
- switch (data[0]) {
- case GPCT_RESET:
- if (insn->n != 1)
- return -EINVAL;
-
- err = i8254_set_mode(info->timer_regbase, 0, chan,
- I8254_MODE0 | I8254_BINARY);
- if (err)
- return err;
- i8254_write(info->timer_regbase, 0, chan, 0);
- break;
- case GPCT_SET_OPERATION:
- if (insn->n != 2)
- return -EINVAL;
-
- err = i8254_set_mode(info->timer_regbase, 0, chan,
- (data[1] << 1) | I8254_BINARY);
- if (err)
- return err;
- break;
- default:
- return -EINVAL;
- }
-
- return insn->n;
-}
-
-static int me4000_cnt_insn_read(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- struct me4000_info *info = dev->private;
-
- if (insn->n == 0)
- return 0;
-
- if (insn->n > 1) {
- dev_err(dev->class_dev, "Invalid instruction length %d\n",
- insn->n);
- return -EINVAL;
- }
-
- data[0] = i8254_read(info->timer_regbase, 0, insn->chanspec);
-
- return 1;
-}
-
-static int me4000_cnt_insn_write(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn, unsigned int *data)
-{
- struct me4000_info *info = dev->private;
-
- if (insn->n == 0) {
- return 0;
- } else if (insn->n > 1) {
- dev_err(dev->class_dev, "Invalid instruction length %d\n",
- insn->n);
- return -EINVAL;
- }
-
- i8254_write(info->timer_regbase, 0, insn->chanspec, data[0]);
-
- return 1;
-}
-
static int me4000_auto_attach(struct comedi_device *dev,
unsigned long context)
{
info->plx_regbase = pci_resource_start(pcidev, 1);
dev->iobase = pci_resource_start(pcidev, 2);
- info->timer_regbase = pci_resource_start(pcidev, 3);
- if (!info->plx_regbase || !dev->iobase || !info->timer_regbase)
+ if (!info->plx_regbase || !dev->iobase)
return -ENODEV;
result = comedi_load_firmware(dev, &pcidev->dev, ME4000_FIRMWARE,
if (pcidev->irq > 0) {
result = request_irq(pcidev->irq, me4000_ai_isr, IRQF_SHARED,
- dev->board_name, dev);
+ dev->board_name, dev);
if (result == 0)
dev->irq = pcidev->irq;
}
if (!inl(dev->iobase + ME4000_DIO_DIR_REG)) {
s->io_bits |= 0xFF;
outl(ME4000_DIO_CTRL_BIT_MODE_0,
- dev->iobase + ME4000_DIO_DIR_REG);
+ dev->iobase + ME4000_DIO_DIR_REG);
}
- /*=========================================================================
- Counter subdevice
- ========================================================================*/
-
+ /* Counter subdevice (8254) */
s = &dev->subdevices[3];
-
if (thisboard->has_counter) {
- s->type = COMEDI_SUBD_COUNTER;
- s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
- s->n_chan = 3;
- s->maxdata = 0xFFFF; /* 16 bit counters */
- s->insn_read = me4000_cnt_insn_read;
- s->insn_write = me4000_cnt_insn_write;
- s->insn_config = me4000_cnt_insn_config;
+ unsigned long timer_base = pci_resource_start(pcidev, 3);
+
+ if (!timer_base)
+ return -ENODEV;
+
+ dev->pacer = comedi_8254_init(timer_base, 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ comedi_8254_subdevice_init(s, dev->pacer);
} else {
s->type = COMEDI_SUBD_UNUSED;
}
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "plx9052.h"
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
-#include "../comedidev.h"
+
+#include "../comedi_pci.h"
/* Registers present in BAR0 memory region */
#define MF624_GPIOC_R 0x54
else
devpriv->gpioc_R = devpriv->bar0_mem + MF624_GPIOC_R;
-
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "mite.h"
struct mite_dma_descriptor_ring *ring =
kmalloc(sizeof(struct mite_dma_descriptor_ring), GFP_KERNEL);
- if (ring == NULL)
- return ring;
+ if (!ring)
+ return NULL;
ring->hw_dev = get_device(&mite->pcidev->dev);
- if (ring->hw_dev == NULL) {
+ if (!ring->hw_dev) {
kfree(ring);
return NULL;
}
#ifndef _MITE_H_
#define _MITE_H_
-#include <linux/pci.h>
#include <linux/log2.h>
#include <linux/slab.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define PCIMIO_COMPAT
(MPC624_OSR4 | MPC624_OSR3 | MPC624_OSR2 | MPC624_OSR1 | MPC624_OSR0)
/* -------------------------------------------------------------------------- */
struct mpc624_private {
-
/* set by mpc624_attach() from driver's parameters */
unsigned long int ulConvertionRate;
};
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
return insn->n;
}
-/* ripped from mite.h and mite_setup2() to avoid mite dependancy */
+/* ripped from mite.h and mite_setup2() to avoid mite dependency */
#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */
#define WENAB (1 << 7) /* window enable */
}
dev_info(dev->class_dev, "board: %s, ID=0x%02x", dev->board_name,
- readb(dev->mmio + NI_65XX_ID_REG));
+ readb(dev->mmio + NI_65XX_ID_REG));
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "mite.h"
}
struct NI_660xRegisterData {
-
const char *name; /* Register Name */
int offset; /* Offset from base address from GPCT chip */
enum ni_660x_register_direction direction;
BUG_ON(counter->mite_chan);
mite_chan = mite_request_channel(devpriv->mite,
mite_ring(devpriv, counter));
- if (mite_chan == NULL) {
+ if (!mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for counter\n");
for (j = 0; j < counters_per_chip; ++j) {
devpriv->mite_rings[i][j] =
mite_alloc_ring(devpriv->mite);
- if (devpriv->mite_rings[i][j] == NULL)
+ if (!devpriv->mite_rings[i][j])
return -ENOMEM;
}
}
ni_gpct_variant_660x,
ni_660x_num_counters
(dev));
- if (devpriv->counter_dev == NULL)
+ if (!devpriv->counter_dev)
return -ENOMEM;
for (i = 0; i < NI_660X_MAX_NUM_COUNTERS; ++i) {
s = &dev->subdevices[NI_660X_GPCT_SUBDEV(i)];
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/slab.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#define AO_VALUE_OFFSET 0x00
#define AO_CHAN_OFFSET 0x0c
return insn->n;
}
-/* ripped from mite.h and mite_setup2() to avoid mite dependancy */
+/* ripped from mite.h and mite_setup2() to avoid mite dependency */
#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */
#define WENAB (1 << 7) /* window enable */
#include "comedi_isadma.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
#define A2150_DMA_BUFFER_SIZE 0xff00 /* size in bytes of dma buffer */
#define DMA_INTR_EN_BIT 0x800 /* enable interrupt on dma terminal count */
#define DMA_DEM_EN_BIT 0x1000 /* enables demand mode dma */
#define I8253_BASE_REG 0x14
-#define I8253_MODE_REG 0x17
-#define HW_COUNT_DISABLE 0x30 /* disable hardware counting of conversions */
struct a2150_board {
const char *name;
struct comedi_isadma_desc *desc = &dma->desc[0];
struct comedi_async *async = s->async;
struct comedi_cmd *cmd = &async->cmd;
- unsigned long timer_base = dev->iobase + I8253_BASE_REG;
unsigned int old_config_bits = devpriv->config_bits;
unsigned int trigger_bits;
outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
/* may need to wait 72 sampling periods if timing was changed */
- i8254_set_mode(timer_base, 0, 2, I8254_MODE0 | I8254_BINARY);
- i8254_write(timer_base, 0, 2, 72);
+ comedi_8254_load(dev->pacer, 2, 72, I8254_MODE0 | I8254_BINARY);
/* setup start triggering */
trigger_bits = 0;
/* an IRQ and DMA are required to support async commands */
a2150_alloc_irq_and_dma(dev, it);
+ dev->pacer = comedi_8254_init(dev->iobase + I8253_BASE_REG,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 1);
if (ret)
return ret;
s->cancel = a2150_cancel;
}
- /* need to do this for software counting of completed conversions, to
- * prevent hardware count from stopping acquisition */
- outw(HW_COUNT_DISABLE, dev->iobase + I8253_MODE_REG);
-
/* set card's irq and dma levels */
outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
#include "../comedidev.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* Register map
static void atao_reset(struct comedi_device *dev)
{
struct atao_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + ATAO_82C53_BASE;
/* This is the reset sequence described in the manual */
outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
/* Put outputs of counter 1 and counter 2 in a high state */
- i8254_set_mode(timer_base, 0, 0, I8254_MODE4 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE4 | I8254_BINARY);
- i8254_write(timer_base, 0, 0, 0x0003);
+ comedi_8254_set_mode(dev->pacer, 0, I8254_MODE4 | I8254_BINARY);
+ comedi_8254_set_mode(dev->pacer, 1, I8254_MODE4 | I8254_BINARY);
+ comedi_8254_write(dev->pacer, 0, 0x0003);
outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG);
if (!devpriv)
return -ENOMEM;
+ dev->pacer = comedi_8254_init(dev->iobase + ATAO_82C53_BASE,
+ 0, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
ISAPNP_FUNCTION(ni_boards[i].
isapnp_id), NULL);
- if (isapnp_dev == NULL || isapnp_dev->card == NULL)
+ if (!isapnp_dev || !isapnp_dev->card)
continue;
if (pnp_device_attach(isapnp_dev) < 0)
for (i = 0; i < ARRAY_SIZE(ni_boards); i++) {
if (ni_boards[i].device_id == device_id)
return i;
-
}
if (device_id == 255)
dev_err(dev->class_dev, "can't find board\n");
if (ret < 0)
return ret;
-
return 0;
}
#define CLOCK_100_HZ 0x8F25
struct atmio16_board_t {
-
const char *name;
int has_8255;
};
static void labpc_detach(struct comedi_device *dev)
{
labpc_free_dma_chan(dev);
+ labpc_common_detach(dev);
comedi_legacy_detach(dev);
}
struct labpc_private {
struct comedi_isadma *dma;
+ struct comedi_8254 *counter;
/* number of data points left to be taken */
unsigned long long count;
/* store last read of board status registers */
unsigned int stat1;
unsigned int stat2;
- /*
- * value to load into board's counter a0 (conversion pacing) for timed
- * conversions
- */
- unsigned int divisor_a0;
- /*
- * value to load into board's counter b0 (master) for timed conversions
- */
- unsigned int divisor_b0;
- /*
- * value to load into board's counter b1 (scan pacing) for timed
- * conversions
- */
- unsigned int divisor_b1;
/* we are using dma/fifo-half-full/etc. */
enum transfer_type current_transfer;
int labpc_common_attach(struct comedi_device *dev,
unsigned int irq, unsigned long isr_flags);
+void labpc_common_detach(struct comedi_device *dev);
#endif /* _NI_LABPC_H */
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/delay.h>
+#include <linux/slab.h>
#include "../comedidev.h"
-#include "8253.h"
+#include "comedi_8254.h"
#include "8255.h"
#include "comedi_fc.h"
#include "ni_labpc.h"
writeb(byte, dev->mmio + reg);
}
-static void labpc_counter_load(struct comedi_device *dev,
- unsigned long reg,
- unsigned int counter_number,
- unsigned int count,
- unsigned int mode)
-{
- if (dev->mmio) {
- i8254_mm_set_mode(dev->mmio + reg, 0, counter_number, mode);
- i8254_mm_write(dev->mmio + reg, 0, counter_number, count);
- } else {
- i8254_set_mode(dev->iobase + reg, 0, counter_number, mode);
- i8254_write(dev->iobase + reg, 0, counter_number, count);
- }
-}
-
-static void labpc_counter_set_mode(struct comedi_device *dev,
- unsigned long reg,
- unsigned int counter_number,
- unsigned int mode)
-{
- if (dev->mmio)
- i8254_mm_set_mode(dev->mmio + reg, 0, counter_number, mode);
- else
- i8254_set_mode(dev->iobase + reg, 0, counter_number, mode);
-}
-
static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
{
struct labpc_private *devpriv = dev->private;
devpriv->write_byte(dev, devpriv->cmd4, CMD4_REG);
/* initialize pacer counter to prevent any problems */
- labpc_counter_set_mode(dev, COUNTER_A_BASE_REG, 0, I8254_MODE2);
+ comedi_8254_set_mode(devpriv->counter, 0, I8254_MODE2 | I8254_BINARY);
labpc_clear_adc_fifo(dev);
static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
enum scan_mode mode)
{
- struct labpc_private *devpriv = dev->private;
+ struct comedi_8254 *pacer = dev->pacer;
+ unsigned int convert_period = labpc_ai_convert_period(cmd, mode);
+ unsigned int scan_period = labpc_ai_scan_period(cmd, mode);
unsigned int base_period;
- unsigned int scan_period;
- unsigned int convert_period;
/*
- * if both convert and scan triggers are TRIG_TIMER, then they
- * both rely on counter b0
+ * If both convert and scan triggers are TRIG_TIMER, then they
+ * both rely on counter b0. If only one TRIG_TIMER is used, we
+ * can use the generic cascaded timing functions.
*/
- convert_period = labpc_ai_convert_period(cmd, mode);
- scan_period = labpc_ai_scan_period(cmd, mode);
if (convert_period && scan_period) {
/*
- * pick the lowest b0 divisor value we can (for maximum input
+ * pick the lowest divisor value we can (for maximum input
* clock speed on convert and scan counters)
*/
- devpriv->divisor_b0 = (scan_period - 1) /
- (I8254_OSC_BASE_2MHZ * 0x10000) + 1;
+ pacer->next_div1 = (scan_period - 1) /
+ (pacer->osc_base * I8254_MAX_COUNT) + 1;
- cfc_check_trigger_arg_min(&devpriv->divisor_b0, 2);
- cfc_check_trigger_arg_max(&devpriv->divisor_b0, 0x10000);
+ cfc_check_trigger_arg_min(&pacer->next_div1, 2);
+ cfc_check_trigger_arg_max(&pacer->next_div1, I8254_MAX_COUNT);
- base_period = I8254_OSC_BASE_2MHZ * devpriv->divisor_b0;
+ base_period = pacer->osc_base * pacer->next_div1;
/* set a0 for conversion frequency and b1 for scan frequency */
switch (cmd->flags & CMDF_ROUND_MASK) {
default:
case CMDF_ROUND_NEAREST:
- devpriv->divisor_a0 = DIV_ROUND_CLOSEST(convert_period,
- base_period);
- devpriv->divisor_b1 = DIV_ROUND_CLOSEST(scan_period,
- base_period);
+ pacer->next_div = DIV_ROUND_CLOSEST(convert_period,
+ base_period);
+ pacer->next_div2 = DIV_ROUND_CLOSEST(scan_period,
+ base_period);
break;
case CMDF_ROUND_UP:
- devpriv->divisor_a0 = DIV_ROUND_UP(convert_period,
- base_period);
- devpriv->divisor_b1 = DIV_ROUND_UP(scan_period,
- base_period);
+ pacer->next_div = DIV_ROUND_UP(convert_period,
+ base_period);
+ pacer->next_div2 = DIV_ROUND_UP(scan_period,
+ base_period);
break;
case CMDF_ROUND_DOWN:
- devpriv->divisor_a0 = convert_period / base_period;
- devpriv->divisor_b1 = scan_period / base_period;
+ pacer->next_div = convert_period / base_period;
+ pacer->next_div2 = scan_period / base_period;
break;
}
/* make sure a0 and b1 values are acceptable */
- cfc_check_trigger_arg_min(&devpriv->divisor_a0, 2);
- cfc_check_trigger_arg_max(&devpriv->divisor_a0, 0x10000);
- cfc_check_trigger_arg_min(&devpriv->divisor_b1, 2);
- cfc_check_trigger_arg_max(&devpriv->divisor_b1, 0x10000);
+ cfc_check_trigger_arg_min(&pacer->next_div, 2);
+ cfc_check_trigger_arg_max(&pacer->next_div, I8254_MAX_COUNT);
+ cfc_check_trigger_arg_min(&pacer->next_div2, 2);
+ cfc_check_trigger_arg_max(&pacer->next_div2, I8254_MAX_COUNT);
+
/* write corrected timings to command */
labpc_set_ai_convert_period(cmd, mode,
- base_period * devpriv->divisor_a0);
+ base_period * pacer->next_div);
labpc_set_ai_scan_period(cmd, mode,
- base_period * devpriv->divisor_b1);
- /*
- * if only one TRIG_TIMER is used, we can employ the generic
- * cascaded timing functions
- */
+ base_period * pacer->next_div2);
} else if (scan_period) {
/*
* calculate cascaded counter values
* that give desired scan timing
+ * (pacer->next_div2 / pacer->next_div1)
*/
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &devpriv->divisor_b1,
- &devpriv->divisor_b0,
- &scan_period, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(pacer, &scan_period,
+ cmd->flags);
labpc_set_ai_scan_period(cmd, mode, scan_period);
} else if (convert_period) {
/*
* calculate cascaded counter values
* that give desired conversion timing
+ * (pacer->next_div / pacer->next_div1)
*/
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &devpriv->divisor_a0,
- &devpriv->divisor_b0,
- &convert_period, cmd->flags);
+ comedi_8254_cascade_ns_to_timer(pacer, &convert_period,
+ cmd->flags);
+ /* transfer div2 value so correct timer gets updated */
+ pacer->next_div = pacer->next_div2;
labpc_set_ai_convert_period(cmd, mode, convert_period);
}
}
return MODE_SINGLE_CHAN;
/* chanlist may be NULL during cmdtest */
- if (cmd->chanlist == NULL)
+ if (!cmd->chanlist)
return MODE_MULT_CHAN_UP;
chan0 = CR_CHAN(cmd->chanlist[0]);
unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
int i;
- if (mode == MODE_SINGLE_CHAN)
- return 0;
-
for (i = 0; i < cmd->chanlist_len; i++) {
unsigned int chan = CR_CHAN(cmd->chanlist[i]);
unsigned int range = CR_RANGE(cmd->chanlist[i]);
* load counter a1 with count of 3
* (pc+ manual says this is minimum allowed) using mode 0
*/
- labpc_counter_load(dev, COUNTER_A_BASE_REG,
- 1, 3, I8254_MODE0);
+ comedi_8254_load(devpriv->counter, 1,
+ 3, I8254_MODE0 | I8254_BINARY);
} else {
/* just put counter a1 in mode 0 to set its output low */
- labpc_counter_set_mode(dev, COUNTER_A_BASE_REG, 1, I8254_MODE0);
+ comedi_8254_set_mode(devpriv->counter, 1,
+ I8254_MODE0 | I8254_BINARY);
}
/* figure out what method we will use to transfer data */
if (cmd->convert_src == TRIG_TIMER ||
cmd->scan_begin_src == TRIG_TIMER) {
- /* set up pacing */
- labpc_adc_timing(dev, cmd, mode);
- /* load counter b0 in mode 3 */
- labpc_counter_load(dev, COUNTER_B_BASE_REG,
- 0, devpriv->divisor_b0, I8254_MODE3);
- }
- /* set up conversion pacing */
- if (labpc_ai_convert_period(cmd, mode)) {
- /* load counter a0 in mode 2 */
- labpc_counter_load(dev, COUNTER_A_BASE_REG,
- 0, devpriv->divisor_a0, I8254_MODE2);
- } else {
- /* initialize pacer counter to prevent any problems */
- labpc_counter_set_mode(dev, COUNTER_A_BASE_REG, 0, I8254_MODE2);
- }
+ struct comedi_8254 *pacer = dev->pacer;
+ struct comedi_8254 *counter = devpriv->counter;
+
+ comedi_8254_update_divisors(pacer);
- /* set up scan pacing */
- if (labpc_ai_scan_period(cmd, mode)) {
- /* load counter b1 in mode 2 */
- labpc_counter_load(dev, COUNTER_B_BASE_REG,
- 1, devpriv->divisor_b1, I8254_MODE2);
+ /* set up pacing */
+ comedi_8254_load(pacer, 0, pacer->divisor1,
+ I8254_MODE3 | I8254_BINARY);
+
+ /* set up conversion pacing */
+ comedi_8254_set_mode(counter, 0, I8254_MODE2 | I8254_BINARY);
+ if (labpc_ai_convert_period(cmd, mode))
+ comedi_8254_write(counter, 0, pacer->divisor);
+
+ /* set up scan pacing */
+ if (labpc_ai_scan_period(cmd, mode))
+ comedi_8254_load(pacer, 1, pacer->divisor2,
+ I8254_MODE2 | I8254_BINARY);
}
labpc_clear_adc_fifo(dev);
dev->irq = irq;
}
+ if (dev->mmio) {
+ dev->pacer = comedi_8254_mm_init(dev->mmio + COUNTER_B_BASE_REG,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ devpriv->counter = comedi_8254_mm_init(dev->mmio +
+ COUNTER_A_BASE_REG,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ } else {
+ dev->pacer = comedi_8254_init(dev->iobase + COUNTER_B_BASE_REG,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ devpriv->counter = comedi_8254_init(dev->iobase +
+ COUNTER_A_BASE_REG,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ }
+ if (!dev->pacer || !devpriv->counter)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 5);
if (ret)
return ret;
}
EXPORT_SYMBOL_GPL(labpc_common_attach);
+void labpc_common_detach(struct comedi_device *dev)
+{
+ struct labpc_private *devpriv = dev->private;
+
+ if (devpriv)
+ kfree(devpriv->counter);
+}
+EXPORT_SYMBOL_GPL(labpc_common_detach);
+
static int __init labpc_common_init(void)
{
return 0;
},
};
-static int labpc_auto_attach(struct comedi_device *dev,
- unsigned long context)
+static int labpc_cs_auto_attach(struct comedi_device *dev,
+ unsigned long context)
{
struct pcmcia_device *link = comedi_to_pcmcia_dev(dev);
int ret;
return labpc_common_attach(dev, link->irq, IRQF_SHARED);
}
+static void labpc_cs_detach(struct comedi_device *dev)
+{
+ labpc_common_detach(dev);
+ comedi_pcmcia_disable(dev);
+}
+
static struct comedi_driver driver_labpc_cs = {
.driver_name = "ni_labpc_cs",
.module = THIS_MODULE,
- .auto_attach = labpc_auto_attach,
- .detach = comedi_pcmcia_disable,
+ .auto_attach = labpc_cs_auto_attach,
+ .detach = labpc_cs_detach,
};
static int labpc_cs_attach(struct pcmcia_device *link)
#include <linux/module.h>
#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "ni_labpc.h"
},
};
-/* ripped from mite.h and mite_setup2() to avoid mite dependancy */
+/* ripped from mite.h and mite_setup2() to avoid mite dependency */
#define MITE_IODWBSR 0xc0 /* IO Device Window Base Size Register */
#define WENAB (1 << 7) /* window enable */
return labpc_common_attach(dev, pcidev->irq, IRQF_SHARED);
}
+static void labpc_pci_detach(struct comedi_device *dev)
+{
+ labpc_common_detach(dev);
+ comedi_pci_detach(dev);
+}
+
static struct comedi_driver labpc_pci_comedi_driver = {
.driver_name = "labpc_pci",
.module = THIS_MODULE,
.auto_attach = labpc_pci_auto_attach,
- .detach = comedi_pci_detach,
+ .detach = labpc_pci_detach,
};
static const struct pci_device_id labpc_pci_table[] = {
ni_writeb(dev, devpriv->g0_g1_select_reg, G0_G1_Select);
break;
default:
- dev_err(dev->class_dev,
- "%s called with invalid register %d\n", __func__, reg);
+ dev_err(dev->class_dev, "called with invalid register %d\n",
+ reg);
break;
}
mmiowb();
BUG_ON(devpriv->ai_mite_chan);
devpriv->ai_mite_chan =
mite_request_channel(devpriv->mite, devpriv->ai_mite_ring);
- if (devpriv->ai_mite_chan == NULL) {
+ if (!devpriv->ai_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for analog input\n");
BUG_ON(devpriv->ao_mite_chan);
devpriv->ao_mite_chan =
mite_request_channel(devpriv->mite, devpriv->ao_mite_ring);
- if (devpriv->ao_mite_chan == NULL) {
+ if (!devpriv->ao_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for analog outut\n");
mite_chan =
mite_request_channel(devpriv->mite,
devpriv->gpct_mite_ring[gpct_index]);
- if (mite_chan == NULL) {
+ if (!mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for counter\n");
BUG_ON(devpriv->cdo_mite_chan);
devpriv->cdo_mite_chan =
mite_request_channel(devpriv->mite, devpriv->cdo_mite_ring);
- if (devpriv->cdo_mite_chan == NULL) {
+ if (!devpriv->cdo_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev,
"failed to reserve mite dma channel for correlated digital output\n");
udelay(5);
}
if (i == timeout) {
- dev_err(dev->class_dev, "%s timed out\n", __func__);
+ dev_err(dev->class_dev, "timed out\n");
dev_err(dev->class_dev,
"mite_bytes_in_transit=%i, AI_Status1_Register=0x%x\n",
mite_bytes_in_transit(devpriv->ai_mite_chan),
/* Check if there's a single sample stuck in the FIFO */
if (ni_readb(dev, XXX_Status) & 0x80) {
dl = ni_readl(dev, ADC_FIFO_Data_611x);
- data = (dl & 0xffff);
+ data = dl & 0xffff;
comedi_buf_write_samples(s, &data, 1);
}
}
comedi_buf_write_alloc(s, s->async->prealloc_bufsz);
spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
- if (devpriv->ai_mite_chan == NULL) {
+ if (!devpriv->ai_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
return -EIO;
}
mite_prep_dma(devpriv->ao_mite_chan, 16, 32);
}
mite_dma_arm(devpriv->ao_mite_chan);
- } else
+ } else {
retval = -EIO;
+ }
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
return retval;
chan = CR_CHAN(list[0]);
range = CR_RANGE(list[0]);
range_code = ni_gainlkup[board->gainlkup][range];
- dither = ((list[0] & CR_ALT_FILTER) != 0);
+ dither = (list[0] & CR_ALT_FILTER) != 0;
bypass_bits = MSeries_AI_Bypass_Config_FIFO_Bit;
bypass_bits |= chan;
bypass_bits |=
chan = CR_CHAN(list[i]);
aref = CR_AREF(list[i]);
range = CR_RANGE(list[i]);
- dither = ((list[i] & CR_ALT_FILTER) != 0);
+ dither = (list[i] & CR_ALT_FILTER) != 0;
range_code = ni_gainlkup[board->gainlkup][range];
devpriv->ai_offset[i] = 0;
chan = CR_CHAN(list[i]);
aref = CR_AREF(list[i]);
range = CR_RANGE(list[i]);
- dither = ((list[i] & CR_ALT_FILTER) != 0);
+ dither = (list[i] & CR_ALT_FILTER) != 0;
/* fix the external/internal range differences */
range = ni_gainlkup[board->gainlkup][range];
}
}
if (i == NI_TIMEOUT) {
- dev_err(dev->class_dev, "%s timeout\n",
- __func__);
+ dev_err(dev->class_dev, "timeout\n");
return -ETIME;
}
d += signbits;
}
}
if (i == NI_TIMEOUT) {
- dev_err(dev->class_dev, "%s timeout\n",
- __func__);
+ dev_err(dev->class_dev, "timeout\n");
return -ETIME;
}
data[n] = (((dl >> 16) & 0xFFFF) + signbits) & 0xFFFF;
break;
}
if (i == NI_TIMEOUT) {
- dev_err(dev->class_dev, "%s timeout\n",
- __func__);
+ dev_err(dev->class_dev, "timeout\n");
return -ETIME;
}
if (devpriv->is_m_series) {
start_stop_select |=
AI_START_Select(1 + CR_CHAN(cmd->scan_begin_arg));
ni_stc_writew(dev, start_stop_select,
- AI_START_STOP_Select_Register);
+ AI_START_STOP_Select_Register);
break;
}
}
if (dev->irq) {
-
/* interrupt on FIFO, errors, SC_TC */
interrupt_a_enable |= AI_Error_Interrupt_Enable |
AI_SC_TC_Interrupt_Enable;
break;
default:
dev_err(dev->class_dev,
- "%s: bug! unhandled ao reference voltage\n",
- __func__);
+ "bug! unhandled ao reference voltage\n");
break;
}
switch (krange->max + krange->min) {
break;
default:
dev_err(dev->class_dev,
- "%s: bug! unhandled ao offset voltage\n",
- __func__);
+ "bug! unhandled ao offset voltage\n");
break;
}
if (timed)
udelay((devpriv->serial_interval_ns + 999) / 1000);
if (--count < 0) {
dev_err(dev->class_dev,
- "%s: SPI serial I/O didn't finish in time!\n",
- __func__);
+ "SPI serial I/O didn't finish in time!\n");
err = -ETIME;
goto Error;
}
DIO_Serial_IO_In_Progress_St goes high one bit too early. */
udelay((devpriv->serial_interval_ns + 999) / 1000);
- if (data_in != NULL)
+ if (data_in)
*data_in = ni_stc_readw(dev, DIO_Serial_Input_Register);
Error:
Clock_and_FOUT_Register);
return 1;
- break;
-
case INSN_CONFIG_BIDIRECTIONAL_DATA:
if (devpriv->serial_interval_ns == 0)
err = ni_serial_sw_readwrite8(dev, s, byte_out,
&byte_in);
} else {
- dev_err(dev->class_dev, "%s: serial disabled!\n",
- __func__);
+ dev_err(dev->class_dev, "serial disabled!\n");
return -EINVAL;
}
if (err < 0)
default:
return -EINVAL;
}
-
}
static void init_ao_67xx(struct comedi_device *dev, struct comedi_subdevice *s)
case 9:
return NI_PFI_OUTPUT_G_GATE0;
default:
- dev_err(dev->class_dev,
- "%s: bug, unhandled case in switch.\n", __func__);
+ dev_err(dev->class_dev, "bug, unhandled case in switch.\n");
break;
}
return 0;
return -EIO;
}
if (i == timeout) {
- dev_err(dev->class_dev, "%s timeout\n", __func__);
+ dev_err(dev->class_dev, "timeout\n");
return -ETIME;
}
return 0;
&devpriv->clock_ns);
if (retval < 0) {
dev_err(dev->class_dev,
- "%s: bug, failed to find pll parameters\n", __func__);
+ "bug, failed to find pll parameters\n");
return retval;
}
RTSI_Trig_Direction_Register);
if (period_ns == 0) {
dev_err(dev->class_dev,
- "%s: we don't handle an unspecified clock period correctly yet, returning error\n",
- __func__);
+ "we don't handle an unspecified clock period correctly yet, returning error\n");
return -EINVAL;
}
devpriv->clock_ns = period_ns;
devpriv->clock_source = source;
- } else
+ } else {
return -EINVAL;
+ }
}
}
return 3;
} else {
if (chan == old_RTSI_clock_channel)
return NI_RTSI_OUTPUT_RTSI_OSC;
- dev_err(dev->class_dev, "%s: bug! should never get here?\n",
- __func__);
+ dev_err(dev->class_dev, "bug! should never get here?\n");
return 0;
}
}
#include <linux/interrupt.h>
#include <linux/sched.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "mite.h"
devpriv->di_mite_chan =
mite_request_channel_in_range(devpriv->mite,
devpriv->di_mite_ring, 1, 2);
- if (devpriv->di_mite_chan == NULL) {
+ if (!devpriv->di_mite_chan) {
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
dev_err(dev->class_dev, "failed to reserve mite dma channel\n");
return -EBUSY;
if (devpriv->di_mite_chan) {
mite_prep_dma(devpriv->di_mite_chan, 32, 32);
mite_dma_arm(devpriv->di_mite_chan);
- } else
+ } else {
retval = -EIO;
+ }
spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
return retval;
return ret;
devpriv->di_mite_ring = mite_alloc_ring(devpriv->mite);
- if (devpriv->di_mite_ring == NULL)
+ if (!devpriv->di_mite_ring)
return -ENOMEM;
if (board->uses_firmware) {
#include <linux/module.h>
#include <linux/delay.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include <asm/byteorder.h>
return 0;
}
-
static void m_series_init_eeprom_buffer(struct comedi_device *dev)
{
struct ni_private *devpriv = dev->private;
return ret;
devpriv->ai_mite_ring = mite_alloc_ring(devpriv->mite);
- if (devpriv->ai_mite_ring == NULL)
+ if (!devpriv->ai_mite_ring)
return -ENOMEM;
devpriv->ao_mite_ring = mite_alloc_ring(devpriv->mite);
- if (devpriv->ao_mite_ring == NULL)
+ if (!devpriv->ao_mite_ring)
return -ENOMEM;
devpriv->cdo_mite_ring = mite_alloc_ring(devpriv->mite);
- if (devpriv->cdo_mite_ring == NULL)
+ if (!devpriv->cdo_mite_ring)
return -ENOMEM;
devpriv->gpct_mite_ring[0] = mite_alloc_ring(devpriv->mite);
- if (devpriv->gpct_mite_ring[0] == NULL)
+ if (!devpriv->gpct_mite_ring[0])
return -ENOMEM;
devpriv->gpct_mite_ring[1] = mite_alloc_ring(devpriv->mite);
- if (devpriv->gpct_mite_ring[1] == NULL)
+ if (!devpriv->gpct_mite_ring[1])
return -ENOMEM;
if (devpriv->is_m_series)
unsigned long flags;
spin_lock_irqsave(&counter->lock, flags);
- if (counter->mite_chan == NULL) {
+ if (!counter->mite_chan) {
dev_err(counter->counter_dev->dev->class_dev,
"commands only supported with DMA. ");
dev_err(counter->counter_dev->dev->class_dev,
case ni_gpct_variant_e_series:
spin_lock_irqsave(&counter->lock, flags);
{
- if (counter->mite_chan == NULL ||
+ if (!counter->mite_chan ||
counter->mite_chan->dir != COMEDI_INPUT ||
(mite_done(counter->mite_chan))) {
retval = 1;
if (gxx_status & GI_GATE_ERROR(cidx)) {
ack |= GI_GATE_ERROR_CONFIRM(cidx);
if (gate_error) {
- /*660x don't support automatic acknowledgement
+ /*660x don't support automatic acknowledgment
of gate interrupt via dma read/write
and report bogus gate errors */
if (counter->counter_dev->variant !=
break;
}
spin_lock_irqsave(&counter->lock, flags);
- if (counter->mite_chan == NULL) {
+ if (!counter->mite_chan) {
spin_unlock_irqrestore(&counter->lock, flags);
return;
}
#include "../comedidev.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* I/O port register map
},
};
-struct pcl711_private {
- unsigned int divisor1;
- unsigned int divisor2;
-};
-
static void pcl711_ai_set_mode(struct comedi_device *dev, unsigned int mode)
{
/*
static int pcl711_ai_cmdtest(struct comedi_device *dev,
struct comedi_subdevice *s, struct comedi_cmd *cmd)
{
- struct pcl711_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
/* step 4 */
if (cmd->scan_begin_src == TRIG_TIMER) {
- arg = cmd->scan_begin_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ unsigned int arg = cmd->scan_begin_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
}
return 0;
}
-static void pcl711_ai_load_counters(struct comedi_device *dev)
-{
- struct pcl711_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCL711_TIMER_BASE;
-
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
-
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
-}
-
static int pcl711_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
{
struct comedi_cmd *cmd = &s->async->cmd;
pcl711_set_changain(dev, s, cmd->chanlist[0]);
if (cmd->scan_begin_src == TRIG_TIMER) {
- pcl711_ai_load_counters(dev);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
outb(PCL711_INT_STAT_CLR, dev->iobase + PCL711_INT_STAT_REG);
pcl711_ai_set_mode(dev, PCL711_MODE_PACER_IRQ);
} else {
static int pcl711_attach(struct comedi_device *dev, struct comedi_devconfig *it)
{
const struct pcl711_board *board = dev->board_ptr;
- struct pcl711_private *devpriv;
struct comedi_subdevice *s;
int ret;
- devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
- if (!devpriv)
- return -ENOMEM;
-
ret = comedi_request_region(dev, it->options[0], 0x10);
if (ret)
return ret;
dev->irq = it->options[1];
}
+ dev->pacer = comedi_8254_init(dev->iobase + PCL711_TIMER_BASE,
+ I8254_OSC_BASE_2MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
#include "comedi_isadma.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/* hardware types of the cards */
#define boardPCL812PG 0 /* and ACL-8112PG */
unsigned char mode_reg_int; /* there is stored INT number for some card */
unsigned int ai_poll_ptr; /* how many sampes transfer poll */
unsigned int max_812_ai_mode0_rangewait; /* setling time for gain */
- unsigned int divisor1;
- unsigned int divisor2;
unsigned int use_diff:1;
unsigned int use_mpc508:1;
unsigned int use_ext_trg:1;
unsigned int ai_eos:1;
};
-static void pcl812_start_pacer(struct comedi_device *dev, bool load_timers)
-{
- struct pcl812_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCL812_TIMER_BASE;
-
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- udelay(1);
-
- if (load_timers) {
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- }
-}
-
static void pcl812_ai_setup_dma(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int unread_samples)
struct pcl812_private *devpriv = dev->private;
int err = 0;
unsigned int flags;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
unsigned int ctrl = 0;
unsigned int i;
- pcl812_start_pacer(dev, false);
-
pcl812_ai_set_chan_range(dev, cmd->chanlist[0], 1);
if (dma) { /* check if we can use DMA transfer */
switch (cmd->convert_src) {
case TRIG_TIMER:
- pcl812_start_pacer(dev, true);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
break;
}
outb(devpriv->mode_reg_int | PCL812_CTRL_DISABLE_TRIG,
dev->iobase + PCL812_CTRL_REG);
- pcl812_start_pacer(dev, false);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
pcl812_ai_clear_eoc(dev);
return 0;
}
dev->iobase + PCL812_CTRL_REG);
pcl812_ai_clear_eoc(dev);
- /* stop pacer */
- if (board->IRQbits)
- pcl812_start_pacer(dev, false);
-
/*
* Invalidate last_ai_chanspec then set analog input to
* known channel/range.
if (ret)
return ret;
- if ((1 << it->options[1]) & board->IRQbits) {
- ret = request_irq(it->options[1], pcl812_interrupt, 0,
- dev->board_name, dev);
- if (ret == 0)
- dev->irq = it->options[1];
+ if (board->IRQbits) {
+ dev->pacer = comedi_8254_init(dev->iobase + PCL812_TIMER_BASE,
+ I8254_OSC_BASE_2MHZ,
+ I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ if ((1 << it->options[1]) & board->IRQbits) {
+ ret = request_irq(it->options[1], pcl812_interrupt, 0,
+ dev->board_name, dev);
+ if (ret == 0)
+ dev->irq = it->options[1];
+ }
}
/* we need an IRQ to do DMA on channel 3 or 1 */
#include "comedi_isadma.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/*
* Register I/O map
struct pcl816_private {
struct comedi_isadma *dma;
unsigned int ai_poll_ptr; /* how many sampes transfer poll */
- unsigned int divisor1;
- unsigned int divisor2;
unsigned int ai_cmd_running:1;
unsigned int ai_cmd_canceled:1;
};
-static void pcl816_start_pacer(struct comedi_device *dev, bool load_counters)
-{
- struct pcl816_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCL816_TIMER_BASE;
-
- i8254_set_mode(timer_base, 0, 0, I8254_MODE1 | I8254_BINARY);
- i8254_write(timer_base, 0, 0, 0x00ff);
- udelay(1);
-
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- udelay(1);
-
- if (load_counters) {
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- }
-}
-
static void pcl816_ai_setup_dma(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int unread_samples)
static int pcl816_ai_cmdtest(struct comedi_device *dev,
struct comedi_subdevice *s, struct comedi_cmd *cmd)
{
- struct pcl816_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
if (err)
return 2;
-
/* Step 3: check if arguments are trivially valid */
err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
if (err)
return 3;
-
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (err)
return 4;
-
/* step 5: complain about special chanlist considerations */
if (cmd->chanlist) {
if (devpriv->ai_cmd_running)
return -EBUSY;
- pcl816_start_pacer(dev, false);
-
seglen = check_channel_list(dev, s, cmd->chanlist, cmd->chanlist_len);
if (seglen < 1)
return -EINVAL;
dma->cur_dma = 0;
pcl816_ai_setup_dma(dev, s, 0);
- pcl816_start_pacer(dev, true);
+ comedi_8254_set_mode(dev->pacer, 0, I8254_MODE1 | I8254_BINARY);
+ comedi_8254_write(dev->pacer, 0, 0x0ff);
+ udelay(1);
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
ctrl = PCL816_CTRL_INTEN | PCL816_CTRL_DMAEN | PCL816_CTRL_DMASRC_SLOT0;
if (cmd->convert_src == TRIG_TIMER)
outb(PCL816_CTRL_DISABLE_TRIG, dev->iobase + PCL816_CTRL_REG);
pcl816_ai_clear_eoc(dev);
- /* Stop pacer */
- i8254_set_mode(dev->iobase + PCL816_TIMER_BASE, 0,
- 2, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(dev->iobase + PCL816_TIMER_BASE, 0,
- 1, I8254_MODE0 | I8254_BINARY);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
devpriv->ai_cmd_running = 0;
devpriv->ai_cmd_canceled = 1;
static void pcl816_reset(struct comedi_device *dev)
{
- unsigned long timer_base = dev->iobase + PCL816_TIMER_BASE;
-
outb(PCL816_CTRL_DISABLE_TRIG, dev->iobase + PCL816_CTRL_REG);
pcl816_ai_set_chan_range(dev, 0, 0);
pcl816_ai_clear_eoc(dev);
- /* Stop pacer */
- i8254_set_mode(timer_base, 0, 2, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 0, I8254_MODE0 | I8254_BINARY);
-
/* set all digital outputs low */
outb(0, dev->iobase + PCL816_DO_DI_LSB_REG);
outb(0, dev->iobase + PCL816_DO_DI_MSB_REG);
/* an IRQ and DMA are required to support async commands */
pcl816_alloc_irq_and_dma(dev, it);
+ dev->pacer = comedi_8254_init(dev->iobase + PCL816_TIMER_BASE,
+ I8254_OSC_BASE_10MHZ, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
#include "comedi_isadma.h"
#include "comedi_fc.h"
-#include "8253.h"
+#include "comedi_8254.h"
/* boards constants */
struct comedi_isadma *dma;
/* manimal allowed delay between samples (in us) for actual card */
unsigned int ns_min;
- int i8253_osc_base; /* 1/frequency of on board oscilator in ns */
/* MUX setting for actual AI operations */
unsigned int act_chanlist[16];
unsigned int act_chanlist_len; /* how long is actual MUX list */
unsigned int act_chanlist_pos; /* actual position in MUX list */
- unsigned int divisor1;
- unsigned int divisor2;
unsigned int usefifo:1;
unsigned int ai_cmd_running:1;
unsigned int ai_cmd_canceled:1;
};
-static void pcl818_start_pacer(struct comedi_device *dev, bool load_counters)
-{
- struct pcl818_private *devpriv = dev->private;
- unsigned long timer_base = dev->iobase + PCL818_TIMER_BASE;
-
- i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
- udelay(1);
-
- if (load_counters) {
- i8254_write(timer_base, 0, 2, devpriv->divisor2);
- i8254_write(timer_base, 0, 1, devpriv->divisor1);
- }
-}
-
static void pcl818_ai_setup_dma(struct comedi_device *dev,
struct comedi_subdevice *s,
unsigned int unread_samples)
struct comedi_cmd *cmd)
{
const struct pcl818_board *board = dev->board_ptr;
- struct pcl818_private *devpriv = dev->private;
int err = 0;
- unsigned int arg;
/* Step 1 : check if triggers are trivially valid */
/* step 4: fix up any arguments */
if (cmd->convert_src == TRIG_TIMER) {
- arg = cmd->convert_arg;
- i8253_cascade_ns_to_timer(devpriv->i8253_osc_base,
- &devpriv->divisor1,
- &devpriv->divisor2,
- &arg, cmd->flags);
+ unsigned int arg = cmd->convert_arg;
+
+ comedi_8254_cascade_ns_to_timer(dev->pacer, &arg, cmd->flags);
err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
}
if (devpriv->ai_cmd_running)
return -EBUSY;
- pcl818_start_pacer(dev, false);
-
seglen = check_channel_list(dev, s, cmd->chanlist, cmd->chanlist_len);
if (seglen < 1)
return -EINVAL;
}
outb(ctrl, dev->iobase + PCL818_CTRL_REG);
- if (cmd->convert_src == TRIG_TIMER)
- pcl818_start_pacer(dev, true);
+ if (cmd->convert_src == TRIG_TIMER) {
+ comedi_8254_update_divisors(dev->pacer);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, true);
+ }
return 0;
}
}
outb(PCL818_CTRL_DISABLE_TRIG, dev->iobase + PCL818_CTRL_REG);
- pcl818_start_pacer(dev, false);
+ comedi_8254_pacer_enable(dev->pacer, 1, 2, false);
pcl818_ai_clear_eoc(dev);
if (devpriv->usefifo) { /* FIFO shutdown */
static void pcl818_reset(struct comedi_device *dev)
{
const struct pcl818_board *board = dev->board_ptr;
- unsigned long timer_base = dev->iobase + PCL818_TIMER_BASE;
unsigned int chan;
/* flush and disable the FIFO */
/* stop pacer */
outb(PCL818_CNTENABLE_PACER_ENA, dev->iobase + PCL818_CNTENABLE_REG);
- i8254_set_mode(timer_base, 0, 2, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 1, I8254_MODE0 | I8254_BINARY);
- i8254_set_mode(timer_base, 0, 0, I8254_MODE0 | I8254_BINARY);
/* set analog output channels to 0V */
for (chan = 0; chan < board->n_aochan; chan++) {
const struct pcl818_board *board = dev->board_ptr;
struct pcl818_private *devpriv;
struct comedi_subdevice *s;
+ unsigned int osc_base;
int ret;
devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
if (dev->irq && board->has_dma)
pcl818_alloc_dma(dev, it->options[2]);
+ /* use 1MHz or 10MHz oscilator */
+ if ((it->options[3] == 0) || (it->options[3] == 10))
+ osc_base = I8254_OSC_BASE_10MHZ;
+ else
+ osc_base = I8254_OSC_BASE_1MHZ;
+
+ dev->pacer = comedi_8254_init(dev->iobase + PCL818_TIMER_BASE,
+ osc_base, I8254_IO8, 0);
+ if (!dev->pacer)
+ return -ENOMEM;
+
+ /* max sampling speed */
+ devpriv->ns_min = board->ns_min;
+ if (!board->is_818) {
+ /* extended PCL718 to 100kHz DAC */
+ if ((it->options[6] == 1) || (it->options[6] == 100))
+ devpriv->ns_min = 10000;
+ }
+
ret = comedi_alloc_subdevices(dev, 4);
if (ret)
return ret;
s->range_table = &range_digital;
s->insn_bits = pcl818_do_insn_bits;
- /* select 1/10MHz oscilator */
- if ((it->options[3] == 0) || (it->options[3] == 10))
- devpriv->i8253_osc_base = I8254_OSC_BASE_10MHZ;
- else
- devpriv->i8253_osc_base = I8254_OSC_BASE_1MHZ;
-
- /* max sampling speed */
- devpriv->ns_min = board->ns_min;
-
- if (!board->is_818) {
- if ((it->options[6] == 1) || (it->options[6] == 100)) {
- /* extended PCL718 to 100kHz DAC */
- devpriv->ns_min = 10000;
- }
- }
-
pcl818_reset(dev);
return 0;
} else if (it->options[2]) {
/* request the irq for the 2nd asic */
ret = request_irq(it->options[2], pcmuio_interrupt, 0,
- dev->board_name, dev);
+ dev->board_name, dev);
if (ret == 0)
devpriv->irq2 = it->options[2];
}
s->insn_bits = pcmuio_dio_insn_bits;
s->insn_config = pcmuio_dio_insn_config;
- /* subdevices 0 and 2 can suppport interrupts */
+ /* subdevices 0 and 2 can support interrupts */
if ((i == 0 && dev->irq) || (i == 2 && devpriv->irq2)) {
/* setup the interrupt subdevice */
dev->read_subdev = s;
devpriv->interrupt_mode = semaphore;
for (i = 0; i < insn->n; i++) {
-
/* Start conversion */
outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA,
dev->iobase + DAQP_COMMAND);
*/
#include <linux/module.h>
-#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "plx9080.h"
/* read data */
d = readw(devpriv->las1 + LAS1_ADC_FIFO);
- d = d >> 3; /* low 3 bits are marker lines */
+ d >>= 3; /* low 3 bits are marker lines */
/* convert bipolar data to comedi unsigned data */
if (comedi_range_is_bipolar(s, range))
}
d = readw(devpriv->las1 + LAS1_ADC_FIFO);
- d = d >> 3; /* low 3 bits are marker lines */
+ d >>= 3; /* low 3 bits are marker lines */
/* convert bipolar data to comedi unsigned data */
if (comedi_range_is_bipolar(s, range))
if (err)
return 3;
-
/* step 4: fix up any arguments */
if (cmd->scan_begin_src == TRIG_TIMER) {
pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency);
if (pci_latency < 32) {
dev_info(dev->class_dev,
- "PCI latency changed from %d to %d\n",
- pci_latency, 32);
+ "PCI latency changed from %d to %d\n",
+ pci_latency, 32);
pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, 32);
}
}
/* Shut down any board ops by resetting it */
if (dev->mmio && devpriv->lcfg)
rtd_reset(dev);
- if (dev->irq) {
- writel(readl(devpriv->lcfg + PLX_INTRCS_REG) &
- ~(ICS_PLIE | ICS_DMA0_E | ICS_DMA1_E),
- devpriv->lcfg + PLX_INTRCS_REG);
+ if (dev->irq)
free_irq(dev->irq, dev);
- }
if (dev->mmio)
iounmap(dev->mmio);
if (devpriv->las1)
#include <linux/module.h>
#include <linux/delay.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/types.h>
-#include "../comedidev.h"
+#include "../comedi_pci.h"
#include "comedi_fc.h"
#include "s626.h"
/* ************** EEPROM ACCESS FUNCTIONS ************** */
static int s626_i2c_handshake_eoc(struct comedi_device *dev,
- struct comedi_subdevice *s,
- struct comedi_insn *insn,
- unsigned long context)
+ struct comedi_subdevice *s,
+ struct comedi_insn *insn,
+ unsigned long context)
{
bool status;
* Byte0 = Not sent.
*/
if (s626_i2c_handshake(dev, S626_I2C_B2(S626_I2C_ATTRSTART,
- (devpriv->i2c_adrs | 1)) |
+ (devpriv->i2c_adrs | 1)) |
S626_I2C_B1(S626_I2C_ATTRSTOP, 0) |
S626_I2C_B0(S626_I2C_ATTRNOP, 0)))
/* Abort function and declare error if handshake failed. */
/*
* Private helper function: Write setpoint to an application DAC channel.
*/
-static int s626_set_dac(struct comedi_device *dev, uint16_t chan,
- int16_t dacdata)
+static int s626_set_dac(struct comedi_device *dev,
+ uint16_t chan, int16_t dacdata)
{
struct s626_private *devpriv = dev->private;
uint16_t signmask;
return s626_send_dac(dev, val);
}
-static int s626_write_trim_dac(struct comedi_device *dev, uint8_t logical_chan,
- uint8_t dac_data)
+static int s626_write_trim_dac(struct comedi_device *dev,
+ uint8_t logical_chan, uint8_t dac_data)
{
struct s626_private *devpriv = dev->private;
uint32_t chan;
/* Copy TrimDac setpoint values from EEPROM to TrimDacs. */
for (i = 0; i < ARRAY_SIZE(s626_trimchan); i++) {
ret = s626_write_trim_dac(dev, i,
- s626_i2c_read(dev, s626_trimadrs[i]));
+ s626_i2c_read(dev, s626_trimadrs[i]));
if (ret)
return ret;
}
dev->mmio + S626_P_RPSADDR1);
/* Construct RPS program in rps_buf DMA buffer */
- if (cmd != NULL && cmd->scan_begin_src != TRIG_FOLLOW) {
+ if (cmd->scan_begin_src != TRIG_FOLLOW) {
/* Wait for Start trigger. */
*rps++ = S626_RPS_PAUSE | S626_RPS_SIGADC;
*rps++ = S626_RPS_CLRSIGNAL | S626_RPS_SIGADC;
*rps++ = jmp_adrs;
}
- if (cmd != NULL && cmd->convert_src != TRIG_NOW) {
+ if (cmd->convert_src != TRIG_NOW) {
/* Wait for Start trigger. */
*rps++ = S626_RPS_PAUSE | S626_RPS_SIGADC;
*rps++ = S626_RPS_CLRSIGNAL | S626_RPS_SIGADC;
/* reset ai_cmd_running flag */
devpriv->ai_cmd_running = 0;
- /* test if cmd is valid */
- if (cmd == NULL)
- return -EINVAL;
-
s626_ai_load_polllist(ppl, cmd);
devpriv->ai_cmd_running = 1;
devpriv->ai_convert_count = 0;
}
static int s626_auto_attach(struct comedi_device *dev,
- unsigned long context_unused)
+ unsigned long context_unused)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
struct s626_private *devpriv;
#include <linux/poll.h>
struct serial2002_range_table_t {
-
/* HACK... */
int length;
struct comedi_krange range;
};
struct serial2002_private {
-
int port; /* /dev/ttyS<port> */
int speed; /* baudrate */
struct file *tty;
break;
}
do_gettimeofday(&now);
- elapsed = (1000000 * (now.tv_sec - start.tv_sec) +
- now.tv_usec - start.tv_usec);
+ elapsed = 1000000 * (now.tv_sec - start.tv_sec) +
+ now.tv_usec - start.tv_usec;
if (elapsed > timeout)
break;
set_current_state(TASK_INTERRUPTIBLE);
}
}
return result;
-
}
static void serial2002_write(struct file *f, struct serial_data data)
outb(val, CSCDR);
return insn->n;
-
}
static int dnp_attach(struct comedi_device *dev, struct comedi_devconfig *it)
*/
-
#include <linux/module.h>
#include <linux/delay.h>
#include "../comedidev.h"
static int __unioxx5_define_chan_offset(int chan_num)
{
-
if (chan_num < 0 || chan_num > 23)
return -1;
/* sending for bytes to module(one byte per cycle iteration) */
for (i = 0; i < 4; i++) {
while (!((inb(usp->usp_iobase + 0)) & TxBE))
- ; /* waits while writting will be allowed */
+ ; /* waits while writing will be allowed */
outb(usp->usp_extra_data[module][i], usp->usp_iobase + 6);
}
outb(i + 1, iobase + 5);
outb('H', iobase + 6); /* requests EEPROM world */
while (!(inb(iobase + 0) & TxBE))
- ; /* waits while writting will be allowed */
+ ; /* waits while writing will be allowed */
outb(0, iobase + 6);
/* waits while reading of two bytes will be allowed */
if (ndef_flag) {
usp->usp_module_type[i] = 0;
ndef_flag = 0;
- } else
+ } else {
usp->usp_module_type[i] = inb(iobase + 6);
+ }
udelay(1);
}
for (i = 0; i < RETRIES; i++) {
ret = usb_bulk_msg(usb, usb_rcvbulkpipe(usb, 8),
- devpriv->insn_buf, SIZEINSNBUF,
- &nrec, BULK_TIMEOUT);
+ devpriv->insn_buf, SIZEINSNBUF,
+ &nrec, BULK_TIMEOUT);
if (ret < 0)
return ret;
if (le16_to_cpu(devpriv->insn_buf[0]) == command)
struct comedi_insn *insn,
unsigned int *data)
{
-
struct usbdux_private *devpriv = dev->private;
int ret;
/* step 4: fix up any arguments */
return 0;
-
}
static int usbduxfast_ai_inttrig(struct comedi_device *dev,
urb->dev = comedi_to_usb_dev(dev);
ret = usb_submit_urb(urb, GFP_ATOMIC);
if (ret < 0) {
- dev_err(dev->class_dev,
- "%s: urb resubmit failed (%d)\n",
- __func__, ret);
+ dev_err(dev->class_dev, "urb resubmit failed (%d)\n",
+ ret);
if (ret == -EL2NSYNC)
dev_err(dev->class_dev,
"buggy USB host controller or bug in IRQ handler\n");
default:
/* a real error */
- dev_err(dev->class_dev, "%s: non-zero urb status (%d)\n",
- __func__, urb->status);
+ dev_err(dev->class_dev, "non-zero urb status (%d)\n",
+ urb->status);
async->events |= COMEDI_CB_ERROR;
break;
}
urb->iso_frame_desc[0].status = 0;
ret = usb_submit_urb(urb, GFP_ATOMIC);
if (ret < 0) {
- dev_err(dev->class_dev,
- "%s: urb resubmit failed (%d)\n",
- __func__, ret);
+ dev_err(dev->class_dev, "urb resubmit failed (%d)\n",
+ ret);
if (ret == -EL2NSYNC)
dev_err(dev->class_dev,
"buggy USB host controller or bug in IRQ handler\n");
default:
/* a real error */
- dev_err(dev->class_dev, "%s: non-zero urb status (%d)\n",
- __func__, urb->status);
+ dev_err(dev->class_dev, "non-zero urb status (%d)\n",
+ urb->status);
async->events |= COMEDI_CB_ERROR;
break;
}
default:
/* a real error */
if (devpriv->pwm_cmd_running) {
- dev_err(dev->class_dev,
- "%s: non-zero urb status (%d)\n",
- __func__, urb->status);
+ dev_err(dev->class_dev, "non-zero urb status (%d)\n",
+ urb->status);
usbduxsigma_pwm_stop(dev, 0); /* w/o unlink */
}
return;
urb->status = 0;
ret = usb_submit_urb(urb, GFP_ATOMIC);
if (ret < 0) {
- dev_err(dev->class_dev, "%s: urb resubmit failed (%d)\n",
- __func__, ret);
+ dev_err(dev->class_dev, "urb resubmit failed (%d)\n", ret);
if (ret == -EL2NSYNC)
dev_err(dev->class_dev,
"buggy USB host controller or bug in IRQ handler\n");
retval = NULL;
up_read(&dev->attach_lock);
- if (retval == NULL)
+ if (!retval)
comedi_dev_put(dev);
return retval;
{
u8 __iomem *vaddr;
ulong offset;
- uint value;
if (!ch || ch->magic != DGAP_CHANNEL_MAGIC)
return 0;
offset = (ioread16(vaddr + ECS_SEG) << 4) + (ch->ch_portnum * 0x28)
+ LINE_SPEED;
- value = readw(vaddr + offset);
- return value;
+ return readw(vaddr + offset);
}
/*
* will be mapped into the low 2MB of the 4MB memory space
*/
brd->port = brd->membase + PCI_IO_OFFSET;
- brd->port_end = brd->port + PCI_IO_SIZE;
+ brd->port_end = brd->port + PCI_IO_SIZE_DGAP;
/*
* Special initialization for non-PLX boards
int result;
u8 mstat;
ulong lock_flags;
- int rc;
spin_lock_irqsave(&ch->ch_lock, lock_flags);
if (mstat & D_CD(ch))
result |= TIOCM_CD;
- rc = put_user(result, value);
-
- return rc;
+ return put_user(result, value);
}
/*
/* Start the poller */
spin_lock_irqsave(&dgap_poll_lock, flags);
- init_timer(&dgap_poll_timer);
- dgap_poll_timer.function = dgap_poll_handler;
+ setup_timer(&dgap_poll_timer, dgap_poll_handler, 0);
dgap_poll_timer.data = 0;
dgap_poll_time = jiffies + dgap_jiffies_from_ms(dgap_poll_tick);
dgap_poll_timer.expires = dgap_poll_time;
#define PCI_IO_OFFSET 0x00200000
/* Size of IO (2MB) */
-#define PCI_IO_SIZE 0x00200000
+#define PCI_IO_SIZE_DGAP 0x00200000
/* Number of boards we support at once. */
#define MAXBOARDS 32
-EXTRA_CFLAGS += -DDG_NAME=\"dgnc-1.3-16\" -DDG_PART=\"40002369_F\"
-
obj-$(CONFIG_DGNC) += dgnc.o
dgnc-objs := dgnc_cls.o dgnc_driver.o\
* checkpatch fixes
* remove unecessary comments
-* remove unecessary error messages. Example kzalloc() has its
+* remove unecessary error messages. Example kzalloc() has its
own error message. Adding an extra one is useless.
* use goto statements for error handling when appropriate
-* there is a lot of unecessary code in the driver. It was
+* there is a lot of unecessary code in the driver. It was
originally a standalone driver. Remove uneeded code.
-Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
+Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
Cc: Lidza Louina <lidza.louina@gmail.com>
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
#include <linux/kernel.h>
.send_immediate_char = cls_send_immediate_char
};
-
static inline void cls_set_cts_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
static inline void cls_set_ixon_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
static inline void cls_set_no_output_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
static inline void cls_set_rts_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
UART_16654_FCR_TXTRIGGER_16 | UART_FCR_CLEAR_RCVR),
&ch->ch_cls_uart->isr_fcr);
-
ch->ch_r_watermark = 4;
ch->ch_r_tlevel = 8;
}
-
static inline void cls_set_ixoff_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
static inline void cls_set_no_input_flow_control(struct channel_t *ch)
{
unsigned char lcrb = readb(&ch->ch_cls_uart->lcr);
unsigned char ier = readb(&ch->ch_cls_uart->ier);
unsigned char isr_fcr = 0;
-
/*
* The Enhanced Register Set may only be accessed when
* the Line Control Register is set to 0xBFh.
}
-
/*
* cls_clear_break.
* Determines whether its time to shut off break condition.
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
-
/* Parse the ISR register for the specific port */
static inline void cls_parse_isr(struct dgnc_board *brd, uint port)
{
}
}
-
/*
* cls_param()
* Send any/all changes to the line to the UART.
cls_parse_modem(ch, readb(&ch->ch_cls_uart->msr));
}
-
/*
* Our board poller function.
*/
}
-
/*
* cls_intr()
*
return IRQ_HANDLED;
}
-
static void cls_disable_receiver(struct channel_t *ch)
{
unsigned char tmp = readb(&ch->ch_cls_uart->ier);
writeb(tmp, &ch->ch_cls_uart->ier);
}
-
static void cls_enable_receiver(struct channel_t *ch)
{
unsigned char tmp = readb(&ch->ch_cls_uart->ier);
writeb(tmp, &ch->ch_cls_uart->ier);
}
-
static void cls_copy_data_from_uart_to_queue(struct channel_t *ch)
{
int qleft = 0;
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
-
/*
* This function basically goes to sleep for secs, or until
* it gets signalled that the port has fully drained.
((un->un_flags & UN_EMPTY) == 0));
}
-
/* Channel lock MUST be held before calling this function! */
static void cls_flush_uart_write(struct channel_t *ch)
{
ch->ch_flags |= (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
}
-
/* Channel lock MUST be held before calling this function! */
static void cls_flush_uart_read(struct channel_t *ch)
{
udelay(10);
}
-
static void cls_copy_data_from_queue_to_uart(struct channel_t *ch)
{
ushort head;
spin_lock_irqsave(&ch->ch_lock, flags);
/* No data to write to the UART */
- if (ch->ch_w_tail == ch->ch_w_head) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (ch->ch_w_tail == ch->ch_w_head)
+ goto exit_unlock;
/* If port is "stopped", don't send any data to the UART */
if ((ch->ch_flags & CH_FORCED_STOP) ||
- (ch->ch_flags & CH_BREAK_SENDING)) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ (ch->ch_flags & CH_BREAK_SENDING))
+ goto exit_unlock;
- if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM))) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM)))
+ goto exit_unlock;
n = 32;
if (len_written > 0)
ch->ch_flags &= ~(CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
+exit_unlock:
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
-
static void cls_parse_modem(struct channel_t *ch, unsigned char signals)
{
unsigned char msignals = signals;
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
-
/* Make the UART raise any of the output signals we want up */
static void cls_assert_modem_signals(struct channel_t *ch)
{
udelay(10);
}
-
static void cls_send_start_character(struct channel_t *ch)
{
if (!ch || ch->magic != DGNC_CHANNEL_MAGIC)
}
}
-
static void cls_send_stop_character(struct channel_t *ch)
{
if (!ch || ch->magic != DGNC_CHANNEL_MAGIC)
}
}
-
/* Inits UART */
static void cls_uart_init(struct channel_t *ch)
{
readb(&ch->ch_cls_uart->msr);
}
-
/*
* Turns off UART.
*/
writeb(0, &ch->ch_cls_uart->ier);
}
-
/*
* cls_get_uarts_bytes_left.
* Returns 0 is nothing left in the FIFO, returns 1 otherwise.
return left;
}
-
/*
* cls_send_break.
* Starts sending a break thru the UART.
}
}
-
/*
* cls_send_immediate_char.
* Sends a specific character as soon as possible to the UART,
u8 __iomem *re_map_vpdbase;/* Remapped memory of the card */
int i = 0;
-
vpdbase = pci_resource_start(brd->pdev, 3);
/* No VPD */
if (re_map_vpdbase)
iounmap(re_map_vpdbase);
}
-
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- *
*/
#ifndef __DGNC_CLS_H
* U = Unused. *
************************************************************************/
+/*
+ * txrx : WR RHR/THR - Holding reg
+ * ier : WR IER - Interrupt Enable Reg
+ * isr_fcr : WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg
+ * lcr : WR LCR - Line Control Reg
+ * mcr : WR MCR - Modem Control Reg
+ * lsr : WR LSR - Line Status Reg
+ * msr : WR MSG - Modem Status Reg
+ * spr : WR SPR - Scratch pad Reg
+ */
struct cls_uart_struct {
- u8 txrx; /* WR RHR/THR - Holding Reg */
- u8 ier; /* WR IER - Interrupt Enable Reg */
- u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
- u8 lcr; /* WR LCR - Line Control Reg */
- u8 mcr; /* WR MCR - Modem Control Reg */
- u8 lsr; /* WR LSR - Line Status Reg */
- u8 msr; /* WR MSR - Modem Status Reg */
- u8 spr; /* WR SPR - Scratch Pad Reg */
+ u8 txrx;
+ u8 ier;
+ u8 isr_fcr;
+ u8 lcr;
+ u8 mcr;
+ u8 lsr;
+ u8 msr;
+ u8 spr;
};
/* Where to read the interrupt register (8bits) */
#define UART_16654_FCR_RXTRIGGER_56 0x80
#define UART_16654_FCR_RXTRIGGER_60 0xC0
-#define UART_IIR_CTSRTS 0x20 /* Received CTS/RTS change of state */
-#define UART_IIR_RDI_TIMEOUT 0x0C /* Receiver data TIMEOUT */
+/* Received CTS/RTS change of state */
+#define UART_IIR_CTSRTS 0x20
+
+/* Receiver data TIMEOUT */
+#define UART_IIR_RDI_TIMEOUT 0x0C
/*
* These are the EXTENDED definitions for the Exar 654's Interrupt
#define UART_EXAR654_EFR_RTSDTR 0x40 /* Auto RTS/DTR Flow Control Enable */
#define UART_EXAR654_EFR_CTSDSR 0x80 /* Auto CTS/DSR Flow COntrol Enable */
-#define UART_EXAR654_XOFF_DETECT 0x1 /* Indicates whether chip saw an incoming XOFF char */
-#define UART_EXAR654_XON_DETECT 0x2 /* Indicates whether chip saw an incoming XON char */
+/* Indicates whether chip saw an incoming XOFF char */
+#define UART_EXAR654_XOFF_DETECT 0x1
+
+/* Indicates whether chip saw an incoming XON char */
+#define UART_EXAR654_XON_DETECT 0x2
#define UART_EXAR654_IER_XOFF 0x20 /* Xoff Interrupt Enable */
#define UART_EXAR654_IER_RTSDTR 0x40 /* Output Interrupt Enable */
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
static int dgnc_found_board(struct pci_dev *pdev, int id);
static void dgnc_cleanup_board(struct dgnc_board *brd);
static void dgnc_poll_handler(ulong dummy);
-static int dgnc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
+static int dgnc_init_one(struct pci_dev *pdev,
+ const struct pci_device_id *ent);
static void dgnc_do_remap(struct dgnc_board *brd);
/*
* Poller stuff
*/
static DEFINE_SPINLOCK(dgnc_poll_lock); /* Poll scheduling lock */
-static ulong dgnc_poll_time; /* Time of next poll */
-static uint dgnc_poll_stop; /* Used to tell poller to stop */
+static ulong dgnc_poll_time; /* Time of next poll */
+static uint dgnc_poll_stop; /* Used to tell poller to stop */
static struct timer_list dgnc_poll_timer;
.id_table = dgnc_pci_tbl,
};
-
-char *dgnc_state_text[] = {
- "Board Failed",
- "Board Found",
- "Board READY",
-};
-
-
/************************************************************************
*
* Driver load/unload functions
* If something went wrong in the scan, bail out of driver.
*/
if (rc < 0) {
- /* Only unregister the pci driver if it was actually registered. */
+ /* Only unregister if it was actually registered. */
if (dgnc_NumBoards)
pci_unregister_driver(&dgnc_driver);
else
* Register management/dpa devices
*/
rc = register_chrdev(0, "dgnc", &dgnc_BoardFops);
- if (rc <= 0) {
+ if (rc < 0) {
pr_err(DRVSTR ": Can't register dgnc driver device (%d)\n", rc);
- return -ENXIO;
+ return rc;
}
dgnc_Major = rc;
/* Start the poller */
spin_lock_irqsave(&dgnc_poll_lock, flags);
- init_timer(&dgnc_poll_timer);
- dgnc_poll_timer.function = dgnc_poll_handler;
- dgnc_poll_timer.data = 0;
+ setup_timer(&dgnc_poll_timer, dgnc_poll_handler, 0);
dgnc_poll_time = jiffies + dgnc_jiffies_from_ms(dgnc_poll_tick);
dgnc_poll_timer.expires = dgnc_poll_time;
spin_unlock_irqrestore(&dgnc_poll_lock, flags);
spin_lock_irqsave(&dgnc_global_lock, flags);
brd->msgbuf = NULL;
- printk("%s", brd->msgbuf_head);
+ dev_dbg(&brd->pdev->dev, "%s\n", brd->msgbuf_head);
kfree(brd->msgbuf_head);
brd->msgbuf_head = NULL;
spin_unlock_irqrestore(&dgnc_global_lock, flags);
return -ENOMEM;
/* make a temporary message buffer for the boot messages */
- brd->msgbuf_head = kzalloc(sizeof(u8) * 8192, GFP_KERNEL);
+ brd->msgbuf_head = kcalloc(8192, sizeof(u8), GFP_KERNEL);
brd->msgbuf = brd->msgbuf_head;
if (!brd->msgbuf) {
if (brd->re_map_membase) {
- /* After remap is complete, we need to read and store the dvid */
+ /* Read and store the dvid after remapping */
brd->dvid = readb(brd->re_map_membase + 0x8D);
/* Get and store the board VPD, if it exists */
rc = dgnc_tty_register(brd);
if (rc < 0) {
- dgnc_tty_uninit(brd);
pr_err(DRVSTR ": Can't register tty devices (%d)\n", rc);
- brd->state = BOARD_FAILED;
- brd->dpastatus = BD_NOFEP;
goto failed;
}
rc = dgnc_finalize_board_init(brd);
if (rc < 0) {
pr_err(DRVSTR ": Can't finalize board init (%d)\n", rc);
- brd->state = BOARD_FAILED;
- brd->dpastatus = BD_NOFEP;
-
goto failed;
}
rc = dgnc_tty_init(brd);
if (rc < 0) {
- dgnc_tty_uninit(brd);
pr_err(DRVSTR ": Can't init tty devices (%d)\n", rc);
- brd->state = BOARD_FAILED;
- brd->dpastatus = BD_NOFEP;
-
goto failed;
}
dgnc_create_ports_sysfiles(brd);
/* init our poll helper tasklet */
- tasklet_init(&brd->helper_tasklet, brd->bd_ops->tasklet, (unsigned long) brd);
+ tasklet_init(&brd->helper_tasklet,
+ brd->bd_ops->tasklet,
+ (unsigned long) brd);
spin_lock_irqsave(&dgnc_global_lock, flags);
brd->msgbuf = NULL;
- printk("%s", brd->msgbuf_head);
+ dev_dbg(&brd->pdev->dev, "%s\n", brd->msgbuf_head);
kfree(brd->msgbuf_head);
brd->msgbuf_head = NULL;
spin_unlock_irqrestore(&dgnc_global_lock, flags);
return 0;
failed:
+ dgnc_tty_uninit(brd);
+ brd->state = BOARD_FAILED;
+ brd->dpastatus = BD_NOFEP;
return -ENXIO;
spin_lock_irqsave(&brd->bd_lock, flags);
- /* If board is in a failed state, don't bother scheduling a tasklet */
+ /* If board is in a failed state don't schedule a tasklet */
if (brd->state == BOARD_FAILED) {
spin_unlock_irqrestore(&brd->bd_lock, flags);
continue;
new_time = dgnc_poll_time - jiffies;
if ((ulong) new_time >= 2 * dgnc_poll_tick)
- dgnc_poll_time = jiffies + dgnc_jiffies_from_ms(dgnc_poll_tick);
+ dgnc_poll_time = jiffies + dgnc_jiffies_from_ms(dgnc_poll_tick);
- init_timer(&dgnc_poll_timer);
- dgnc_poll_timer.function = dgnc_poll_handler;
- dgnc_poll_timer.data = 0;
+ setup_timer(&dgnc_poll_timer, dgnc_poll_handler, 0);
dgnc_poll_timer.expires = dgnc_poll_time;
spin_unlock_irqrestore(&dgnc_poll_lock, flags);
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- *
*************************************************************************
*
* Driver includes
#define PROCSTR "dgnc" /* /proc entries */
#define DEVSTR "/dev/dg/dgnc" /* /dev entries */
#define DRVSTR "dgnc" /* Driver name string */
+#define DG_PART "40002369_F" /* RPM part number */
#define TRC_TO_CONSOLE 1
/*
* Our Global Variables.
*/
-extern uint dgnc_Major; /* Our driver/mgmt major */
-extern int dgnc_poll_tick; /* Poll interval - 20 ms */
-extern spinlock_t dgnc_global_lock; /* Driver global spinlock */
-extern uint dgnc_NumBoards; /* Total number of boards */
-extern struct dgnc_board *dgnc_Board[MAXBOARDS]; /* Array of board structs */
-extern char *dgnc_state_text[]; /* Array of state text */
+extern uint dgnc_Major; /* Our driver/mgmt major */
+extern int dgnc_poll_tick; /* Poll interval - 20 ms */
+extern spinlock_t dgnc_global_lock; /* Driver global spinlock */
+extern uint dgnc_NumBoards; /* Total number of boards */
+extern struct dgnc_board *dgnc_Board[MAXBOARDS]; /* Array of board structs */
#endif
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
*
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- *
*************************************************************************
*
* This file is intended to contain all the kernel "differences" between the
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
/************************************************************************
if (copy_from_user(&brd, uarg, sizeof(int)))
return -EFAULT;
- if ((brd < 0) || (brd > dgnc_NumBoards) ||
- (dgnc_NumBoards == 0))
+ if (brd < 0 || brd >= dgnc_NumBoards)
return -ENODEV;
memset(&di, 0, sizeof(di));
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DGNC_MGMT_H
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
/* Turn on auto CTS flow control */
#if 1
- ier |= (UART_17158_IER_CTSDSR);
+ ier |= UART_17158_IER_CTSDSR;
#else
ier &= ~(UART_17158_IER_CTSDSR);
#endif
efr |= (UART_17158_EFR_ECB | UART_17158_EFR_CTSDSR);
/* Turn off auto Xon flow control */
- efr &= ~(UART_17158_EFR_IXON);
+ efr &= ~UART_17158_EFR_IXON;
/* Why? Becuz Exar's spec says we have to zero it out before setting it */
writeb(0, &ch->ch_neo_uart->efr);
/* Turn on auto RTS flow control */
#if 1
- ier |= (UART_17158_IER_RTSDTR);
+ ier |= UART_17158_IER_RTSDTR;
#else
ier &= ~(UART_17158_IER_RTSDTR);
#endif
efr |= (UART_17158_EFR_ECB | UART_17158_EFR_RTSDTR);
/* Turn off auto Xoff flow control */
- ier &= ~(UART_17158_IER_XOFF);
- efr &= ~(UART_17158_EFR_IXOFF);
+ ier &= ~UART_17158_IER_XOFF;
+ efr &= ~UART_17158_EFR_IXOFF;
/* Why? Becuz Exar's spec says we have to zero it out before setting it */
writeb(0, &ch->ch_neo_uart->efr);
* RTS/DTR# output pin (MCR bit-0 or 1 to logic 1 after
* it is enabled.
*/
- ch->ch_mostat |= (UART_MCR_RTS);
+ ch->ch_mostat |= UART_MCR_RTS;
neo_pci_posting_flush(ch->ch_bd);
}
unsigned char efr = readb(&ch->ch_neo_uart->efr);
/* Turn off auto CTS flow control */
- ier &= ~(UART_17158_IER_CTSDSR);
- efr &= ~(UART_17158_EFR_CTSDSR);
+ ier &= ~UART_17158_IER_CTSDSR;
+ efr &= ~UART_17158_EFR_CTSDSR;
/* Turn on auto Xon flow control */
efr |= (UART_17158_EFR_ECB | UART_17158_EFR_IXON);
unsigned char efr = readb(&ch->ch_neo_uart->efr);
/* Turn off auto RTS flow control */
- ier &= ~(UART_17158_IER_RTSDTR);
- efr &= ~(UART_17158_EFR_RTSDTR);
+ ier &= ~UART_17158_IER_RTSDTR;
+ efr &= ~UART_17158_EFR_RTSDTR;
/* Turn on auto Xoff flow control */
- ier |= (UART_17158_IER_XOFF);
+ ier |= UART_17158_IER_XOFF;
efr |= (UART_17158_EFR_ECB | UART_17158_EFR_IXOFF);
/* Why? Becuz Exar's spec says we have to zero it out before setting it */
unsigned char efr = readb(&ch->ch_neo_uart->efr);
/* Turn off auto RTS flow control */
- ier &= ~(UART_17158_IER_RTSDTR);
- efr &= ~(UART_17158_EFR_RTSDTR);
+ ier &= ~UART_17158_IER_RTSDTR;
+ efr &= ~UART_17158_EFR_RTSDTR;
/* Turn off auto Xoff flow control */
- ier &= ~(UART_17158_IER_XOFF);
+ ier &= ~UART_17158_IER_XOFF;
if (ch->ch_c_iflag & IXON)
efr &= ~(UART_17158_EFR_IXOFF);
else
unsigned char efr = readb(&ch->ch_neo_uart->efr);
/* Turn off auto CTS flow control */
- ier &= ~(UART_17158_IER_CTSDSR);
- efr &= ~(UART_17158_EFR_CTSDSR);
+ ier &= ~UART_17158_IER_CTSDSR;
+ efr &= ~UART_17158_EFR_CTSDSR;
/* Turn off auto Xon flow control */
if (ch->ch_c_iflag & IXOFF)
- efr &= ~(UART_17158_EFR_IXON);
+ efr &= ~UART_17158_EFR_IXON;
else
efr &= ~(UART_17158_EFR_ECB | UART_17158_EFR_IXON);
* IBM pSeries platform.
* 15 bytes max appears to be the magic number.
*/
- n = min((uint) n, (uint) 12);
+ n = min_t(uint, n, 12);
/*
* Since we are grabbing the linestatus register, which
spin_lock_irqsave(&ch->ch_lock, flags);
/* No data to write to the UART */
- if (ch->ch_w_tail == ch->ch_w_head) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (ch->ch_w_tail == ch->ch_w_head)
+ goto exit_unlock;
/* If port is "stopped", don't send any data to the UART */
- if ((ch->ch_flags & CH_FORCED_STOP) || (ch->ch_flags & CH_BREAK_SENDING)) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if ((ch->ch_flags & CH_FORCED_STOP) ||
+ (ch->ch_flags & CH_BREAK_SENDING))
+ goto exit_unlock;
/*
* If FIFOs are disabled. Send data directly to txrx register
ch->ch_w_tail &= WQUEUEMASK;
ch->ch_txcount++;
}
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
+
+ goto exit_unlock;
}
/*
* We have to do it this way, because of the EXAR TXFIFO count bug.
*/
if ((ch->ch_bd->dvid & 0xf0) < UART_XR17E158_DVID) {
- if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM))) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (!(ch->ch_flags & (CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM)))
+ goto exit_unlock;
len_written = 0;
n = readb(&ch->ch_neo_uart->tfifo);
- if ((unsigned int) n > ch->ch_t_tlevel) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if ((unsigned int) n > ch->ch_t_tlevel)
+ goto exit_unlock;
n = UART_17158_TX_FIFOSIZE - ch->ch_t_tlevel;
} else {
ch->ch_flags &= ~(CH_TX_FIFO_EMPTY | CH_TX_FIFO_LWM);
}
+exit_unlock:
spin_unlock_irqrestore(&ch->ch_lock, flags);
}
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
- *
*/
#ifndef __DGNC_NEO_H
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DGNC_PCI_H
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
- *
*/
rc |= device_create_file(&(bd->pdev->dev), &dev_attr_vpd);
rc |= device_create_file(&(bd->pdev->dev), &dev_attr_serial_number);
if (rc)
- printk(KERN_ERR "DGNC: sysfs device_create_file failed!\n");
+ dev_err(&bd->pdev->dev, "dgnc: sysfs device_create_file failed!\n");
}
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DGNC_SYSFS_H
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *
- * NOTE TO LINUX KERNEL HACKERS: DO NOT REFORMAT THIS CODE!
- *
- * This is shared code between Digi's CVS archive and the
- * Linux Kernel sources.
- * Changing the source just for reformatting needlessly breaks
- * our CVS diff history.
- *
- * Send any bug fixes/changes to: Eng.Linux at digi dot com.
- * Thank you.
*/
/************************************************************************
{
struct dgnc_board *bd;
struct tty_struct *tp;
- struct tty_ldisc *ld;
+ struct tty_ldisc *ld = NULL;
uint rmask;
ushort head;
ushort tail;
tail = ch->ch_r_tail & rmask;
data_len = (head - tail) & rmask;
- if (data_len == 0) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (data_len == 0)
+ goto exit_unlock;
/*
* If the device is not open, or CREAD is off,
/* Force queue flow control to be released, if needed */
dgnc_check_queue_flow_control(ch);
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
+ goto exit_unlock;
}
/*
* If we are throttled, simply don't read any data.
*/
- if (ch->ch_flags & CH_FORCED_STOPI) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return;
- }
+ if (ch->ch_flags & CH_FORCED_STOPI)
+ goto exit_unlock;
flip_len = TTY_FLIPBUF_SIZE;
}
}
- if (len <= 0) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- if (ld)
- tty_ldisc_deref(ld);
- return;
- }
+ if (len <= 0)
+ goto exit_unlock;
/*
* The tty layer in the kernel has changed in 2.6.16+.
/* Tell the tty layer its okay to "eat" the data now */
tty_flip_buffer_push(tp->port);
+ if (ld)
+ tty_ldisc_deref(ld);
+ return;
+
+exit_unlock:
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
if (ld)
tty_ldisc_deref(ld);
}
ch->ch_stops_sent++;
}
}
- /* No FLOW */
- else {
- /* Empty... Can't do anything about the impending overflow... */
- }
}
/*
/*
* Bail if no space left.
*/
- if (count <= 0) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return 0;
- }
+ if (count <= 0)
+ goto exit_retry;
/*
* Output the printer ON string, if we are in terminal mode, but
/*
* If there is nothing left to copy, or I can't handle any more data, leave.
*/
- if (count <= 0) {
- spin_unlock_irqrestore(&ch->ch_lock, flags);
- return 0;
- }
+ if (count <= 0)
+ goto exit_retry;
if (from_user) {
}
return count;
+
+exit_retry:
+
+ spin_unlock_irqrestore(&ch->ch_lock, flags);
+ return 0;
}
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DGNC_TTY_H
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DGNC_TYPES_H
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
#ifndef __DIGI_H
* but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
* implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
* PURPOSE. See the GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
*/
pr_info("=== %s()\n", __func__);
if (udc == NULL) {
- ERR("%s udc == NULL\n", __func__);
+ pr_err("%s udc == NULL\n", __func__);
return;
}
u32 num, buf_type;
u32 data, last_ram_adr, use_ram_size;
- PT_EP_REGS p_ep_regs;
+ struct ep_regs *p_ep_regs;
last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
use_ram_size = 0;
{
u32 num;
u32 data;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (udc->vbus_active == 0)
return; /* VBUS OFF */
/* Abort DMA */
static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
{
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
_nbu2ss_bitclr(&preg->EP_DCR[ep->epnum-1].EP_DCR1, DCR1_EPn_REQEN);
mdelay(DMA_DISABLE_TIME); /* DCR1_EPn_REQEN Clear */
{
u32 data;
u32 num;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (length >= sizeof(u32))
return;
u32 i;
int nret = 0;
u32 iWordLength = 0;
- USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
+ union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
/*------------------------------------------------------------*/
/* Read Length */
{
u32 i;
u32 iReadSize = 0;
- USB_REG_ACCESS Temp32;
- USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
+ union usb_reg_access Temp32;
+ union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
if ((0 < length) && (length < sizeof(u32))) {
Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
u32 iMaxLength = EP0_PACKETSIZE;
u32 iWordLength = 0;
u32 iWriteLength = 0;
- USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
+ union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
/*------------------------------------------------------------*/
/* Transfer Length */
static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
{
u32 i;
- USB_REG_ACCESS Temp32;
- USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
+ union usb_reg_access Temp32;
+ union usb_reg_access *pBuf32 = (union usb_reg_access *)pBuf;
if ((0 < iRemainSize) && (iRemainSize < sizeof(u32))) {
for (i = 0 ; i < iRemainSize ; i++)
return 0; /* Short Packet Transfer End */
if (req->req.actual > req->req.length) {
- ERR(" *** Overrun Error\n");
+ dev_err(udc->dev, " *** Overrun Error\n");
return -EOVERFLOW;
}
u32 burst = 1;
u32 data;
int result = -EINVAL;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return 1; /* DMA is forwarded */
u32 i;
u32 data;
u32 iWordLength;
- USB_REG_ACCESS Temp32;
- USB_REG_ACCESS *pBuf32;
+ union usb_reg_access Temp32;
+ union usb_reg_access *pBuf32;
int result = 0;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return 1; /* DMA is forwarded */
return 0;
pBuffer = (u8 *)req->req.buf;
- pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
+ pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
iWordLength = length / sizeof(u32);
if (iWordLength > 0) {
u32 num;
u32 iRecvLength;
int result = 1;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (ep->epnum == 0)
return -EINVAL;
}
if (req->req.actual > req->req.length) {
- ERR(" *** Overrun Error\n");
- ERR(" *** actual = %d, length = %d\n",
+ dev_err(udc->dev, " Overrun Error\n");
+ dev_err(udc->dev, " actual = %d, length = %d\n",
req->req.actual, req->req.length);
result = -EOVERFLOW;
}
u32 iWriteLength;
u32 data;
int result = -EINVAL;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return 1; /* DMA is forwarded */
u32 i;
u32 data;
u32 iWordLength;
- USB_REG_ACCESS Temp32;
- USB_REG_ACCESS *pBuf32 = NULL;
+ union usb_reg_access Temp32;
+ union usb_reg_access *pBuf32 = NULL;
int result = 0;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return 1; /* DMA is forwarded */
if (length > 0) {
pBuffer = (u8 *)req->req.buf;
- pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
+ pBuf32 = (union usb_reg_access *)(pBuffer + req->req.actual);
iWordLength = length / sizeof(u32);
if (iWordLength > 0) {
u8 num, epnum;
u32 data;
struct nbu2ss_ep *ep;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
if (bstall) {
if (mode > MAX_TEST_MODE_NUM)
return;
- pr_info("SET FEATURE : test mode = %d\n", mode);
+ dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
data &= ~TEST_FORCE_ENABLE;
break;
case USB_DEVICE_TEST_MODE:
- wIndex = wIndex >> 8;
+ wIndex >>= 8;
if (wIndex <= MAX_TEST_MODE_NUM)
result = 0;
break;
{
u8 epnum;
u32 data = 0, bit_data;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
if (epnum == 0) {
u32 regdata;
int limit_cnt = 0;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (ep->direct == USB_DIR_IN) {
for (limit_cnt = 0
_nbu2ss_ep0_in_transfer(udc, &udc->ep[0], &udc->ep0_req);
} else {
- ERR("*** Error GET_STATUS\n");
+ dev_err(udc->dev, " Error GET_STATUS\n");
}
return result;
if (wValue != (wValue & 0x007F))
return -EINVAL;
- wValue = wValue << USB_ADRS_SHIFT;
+ wValue <<= USB_ADRS_SHIFT;
_nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
_nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
| STG_END_INT | EP0_OUT_NULL_INT);
if (status == 0) {
- pr_info("--- %s Not Decode Interrupt\n", __func__);
- pr_info("--- EP0_STATUS = 0x%08x\n", intr);
+ dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
+ dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
return;
}
int result = 0;
u32 status;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (req->dma_flag)
return; /* DMA is forwarded */
u32 num;
u32 dmacnt, ep_dmacnt;
u32 mpkt;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
num = ep->epnum - 1;
return 0;
/* called with irqs blocked */
- while (!list_empty(&ep->queue)) {
- req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
+ list_for_each_entry(req, &ep->queue, queue) {
_nbu2ss_ep_done(ep, req, status);
}
{
u32 reg_dt;
- if (!udc) {
- ERR("%s, bad param\n", __func__);
- return -EINVAL;
- }
-
if (udc->vbus_active == 0)
return -ESHUTDOWN;
/*-------------------------------------------------------------------------*/
static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
{
- PT_FC_REGS p = udc->p_regs;
+ struct fc_regs *p = udc->p_regs;
if (udc->vbus_active == 0)
return;
waitcnt++;
udelay(1); /* 1us wait */
if (waitcnt == EPC_PLL_LOCK_COUNT) {
- ERR("*** Reset Cancel failed\n");
+ dev_err(udc->dev, "*** Reset Cancel failed\n");
return -EINVAL;
}
};
udc->linux_suspended = 0;
_nbu2ss_reset_controller(udc);
- pr_info(" ----- VBUS OFF\n");
+ dev_info(udc->dev, " ----- VBUS OFF\n");
if (udc->vbus_active == 1) {
/* VBUS OFF */
if (reg_dt == 0)
return;
- pr_info(" ----- VBUS ON\n");
+ dev_info(udc->dev, " ----- VBUS ON\n");
if (udc->linux_suspended)
return;
u32 epnum, int_bit;
struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
- PT_FC_REGS preg = udc->p_regs;
+ struct fc_regs *preg = udc->p_regs;
if (gpio_get_value(VBUS_VALUE) == 0) {
_nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
struct nbu2ss_udc *udc;
if ((_ep == NULL) || (desc == NULL)) {
- ERR(" *** %s, bad param\n", __func__);
+ pr_err(" *** %s, bad param\n", __func__);
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if ((ep == NULL) || (ep->udc == NULL)) {
- ERR(" *** %s, ep == NULL !!\n", __func__);
+ pr_err(" *** %s, ep == NULL !!\n", __func__);
return -EINVAL;
}
if ((ep_type == USB_ENDPOINT_XFER_CONTROL)
|| (ep_type == USB_ENDPOINT_XFER_ISOC)) {
- ERR(" *** %s, bat bmAttributes\n", __func__);
+ pr_err(" *** %s, bat bmAttributes\n", __func__);
return -EINVAL;
}
if ((udc->driver == NULL)
|| (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
- ERR(" *** %s, udc !!\n", __func__);
+ dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
return -ESHUTDOWN;
}
unsigned long flags;
if (_ep == NULL) {
- ERR(" *** %s, bad param\n", __func__);
+ pr_err(" *** %s, bad param\n", __func__);
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if ((ep == NULL) || (ep->udc == NULL)) {
- ERR(" *** %s, ep == NULL !!\n", __func__);
+ pr_err("udc: *** %s, ep == NULL !!\n", __func__);
return -EINVAL;
}
/* catch various bogus parameters */
if ((_ep == NULL) || (_req == NULL)) {
if (_ep == NULL)
- ERR("*** %s --- _ep == NULL\n", __func__);
+ pr_err("udc: %s --- _ep == NULL\n", __func__);
if (_req == NULL)
- ERR("*** %s --- _req == NULL\n", __func__);
+ pr_err("udc: %s --- _req == NULL\n", __func__);
return -EINVAL;
}
|| !list_empty(&req->queue))) {
if (!_req->complete)
- ERR("*** %s --- !_req->complete\n", __func__);
+ pr_err("udc: %s --- !_req->complete\n", __func__);
if (!_req->buf)
- ERR("*** %s --- !_req->buf\n", __func__);
+ pr_err("udc:%s --- !_req->buf\n", __func__);
if (!list_empty(&req->queue))
- ERR("*** %s --- !list_empty(&req->queue)\n", __func__);
+ pr_err("%s --- !list_empty(&req->queue)\n", __func__);
return -EINVAL;
}
/* INFO("=== %s(ep%d), zero=%d\n", __func__, ep->epnum, _req->zero); */
if (udc->vbus_active == 0) {
- pr_info("Can't ep_queue (VBUS OFF)\n");
+ dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
return -ESHUTDOWN;
}
if (unlikely(!udc->driver)) {
- ERR("%s, bogus device state %p\n", __func__, udc->driver);
+ dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
+ udc->driver);
return -ESHUTDOWN;
}
if (ep->virt_buf == NULL)
ep->virt_buf = (u8 *)dma_alloc_coherent(
NULL, PAGE_SIZE,
- &ep->phys_buf, GFP_KERNEL | GFP_DMA);
+ &ep->phys_buf, GFP_ATOMIC | GFP_DMA);
if (ep->epnum > 0) {
if (ep->direct == USB_DIR_IN)
memcpy(ep->virt_buf, req->req.buf,
result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
if (result < 0) {
- ERR(" *** %s, result = %d\n", __func__, result);
+ dev_err(udc->dev, " *** %s, result = %d\n", __func__,
+ result);
list_del(&req->queue);
} else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
#ifdef USE_DMA
/* catch various bogus parameters */
if ((_ep == NULL) || (_req == NULL)) {
- /* ERR("%s, bad param(1)\n", __func__); */
+ /* pr_err("%s, bad param(1)\n", __func__); */
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if (!ep) {
- ERR("%s, ep == NULL !!\n", __func__);
+ pr_err("%s, ep == NULL !!\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (!_ep) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if (!ep) {
- ERR("%s, bad ep\n", __func__);
+ pr_err("%s, bad ep\n", __func__);
return -EINVAL;
}
udc = ep->udc;
if (!udc) {
- ERR(" *** %s, bad udc\n", __func__);
+ dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
return -EINVAL;
}
struct nbu2ss_ep *ep;
struct nbu2ss_udc *udc;
unsigned long flags;
- PT_FC_REGS preg;
+ struct fc_regs *preg;
/* INFO("=== %s()\n", __func__); */
if (!_ep) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if (!ep) {
- ERR("%s, bad ep\n", __func__);
+ pr_err("%s, bad ep\n", __func__);
return -EINVAL;
}
udc = ep->udc;
if (!udc) {
- ERR("%s, bad udc\n", __func__);
+ dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (!_ep) {
- ERR("%s, bad param\n", __func__);
+ pr_err("udc: %s, bad param\n", __func__);
return;
}
ep = container_of(_ep, struct nbu2ss_ep, ep);
if (!_ep) {
- ERR("%s, bad ep\n", __func__);
+ pr_err("udc: %s, bad ep\n", __func__);
return;
}
udc = ep->udc;
if (!udc) {
- ERR("%s, bad udc\n", __func__);
+ dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
return;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("udc: %s, bad param\n", __func__);
return -EINVAL;
}
udc = container_of(pgadget, struct nbu2ss_udc, gadget);
if (udc == NULL) {
- ERR("%s, udc == NULL\n", __func__);
+ dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
udc = container_of(pgadget, struct nbu2ss_udc, gadget);
if (udc == NULL) {
- ERR("%s, udc == NULL\n", __func__);
+ dev_err(&pgadget->dev, "%s, udc == NULL\n", __func__);
return -EINVAL;
}
data = gpio_get_value(VBUS_VALUE);
if (data == 0) {
- pr_warn("VBUS LEVEL = %d\n", data);
+ dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
/* INFO("=== %s()\n", __func__); */
if (pgadget == NULL) {
- ERR("%s, bad param\n", __func__);
+ pr_err("%s, bad param\n", __func__);
return -EINVAL;
}
0, driver_name, udc);
/* IO Memory */
- udc->p_regs = (PT_FC_REGS)mmio_base;
+ udc->p_regs = (struct fc_regs *)mmio_base;
/* USB Function Controller Interrupt */
if (status != 0) {
- ERR("request_irq(USB_UDC_IRQ_1) failed\n");
+ dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
goto cleanup1;
}
udc);
if (status != 0) {
- ERR("request_irq(INT_VBUS) failed\n");
+ dev_err(udc->dev, "request_irq(INT_VBUS) failed\n");
goto cleanup1;
}
/*===========================================================================*/
/* Struct */
-/*------- T_EP_REGS */
-typedef struct _T_EP_REGS {
+/*------- ep_regs */
+struct ep_regs {
u32 EP_CONTROL; /* EP Control */
u32 EP_STATUS; /* EP Status */
u32 EP_INT_ENA; /* EP Interrupt Enable */
u32 EP_LEN_DCNT; /* EP Length & DMA count */
u32 EP_READ; /* EP Read */
u32 EP_WRITE; /* EP Write */
-} T_EP_REGS, *PT_EP_REGS;
+};
-/*------- T_EP_DCR */
-typedef struct _T_EP_DCR {
+/*------- ep_dcr */
+struct ep_dcr {
u32 EP_DCR1; /* EP_DCR1 */
u32 EP_DCR2; /* EP_DCR2 */
u32 EP_TADR; /* EP_TADR */
u32 Reserved; /* Reserved */
-} T_EP_DCR, *PT_EP_DCR;
+};
/*------- Function Registers */
-typedef struct _T_FC_REGS {
+struct fc_regs {
u32 USB_CONTROL; /* (0x0000) USB Control */
u32 USB_STATUS; /* (0x0004) USB Status */
u32 USB_ADDRESS; /* (0x0008) USB Address */
u32 EP0_READ; /* (0x0038) EP0 Read */
u32 EP0_WRITE; /* (0x003C) EP0 Write */
- T_EP_REGS EP_REGS[REG_EP_NUM]; /* Endpoint Register */
+ struct ep_regs EP_REGS[REG_EP_NUM]; /* Endpoint Register */
u8 Reserved220[0x1000-0x220]; /* (0x0220:0x0FFF) Reserved */
u8 Reserved1028[0x110-0x28]; /* (0x1028:0x110F) Reserved */
- T_EP_DCR EP_DCR[REG_EP_NUM]; /* */
+ struct ep_dcr EP_DCR[REG_EP_NUM]; /* */
u8 Reserved1200[0x1000-0x200]; /* Reserved */
-
-} __attribute__ ((aligned(32))) T_FC_REGS, *PT_FC_REGS;
+} __aligned(32);
u32 curr_config; /* Current Configuration Number */
- PT_FC_REGS p_regs;
+ struct fc_regs *p_regs;
};
/* USB register access structure */
-typedef volatile union {
+union usb_reg_access {
struct {
unsigned char DATA[4];
} byte;
unsigned int dw;
-} USB_REG_ACCESS;
+};
/*-------------------------------------------------------------------------*/
-#define ERR(stuff...) printk(KERN_ERR "udc: " stuff)
#endif /* _LINUX_EMXX_H */
INSTALLATION
Download kernel sources
- From Linux 3.15
+ From Linux 3.15
cd drivers/video/fbdev/fbtft
git clone https://github.com/notro/fbtft.git
-
+
Add to drivers/video/fbdev/Kconfig: source "drivers/video/fbdev/fbtft/Kconfig"
Add to drivers/video/fbdev/Makefile: obj-y += fbtft/
-
- Before Linux 3.15
+
+ Before Linux 3.15
cd drivers/video
git clone https://github.com/notro/fbtft.git
-
+
Add to drivers/video/Kconfig: source "drivers/video/fbtft/Kconfig"
Add to drivers/video/Makefile: obj-y += fbtft/
-
+
Enable driver(s) in menuconfig and build the kernel
if (*buf > 1) {
va_end(args);
- dev_err(par->info->device, "%s: Incorrect chip sellect request (%d)\n",
- __func__, *buf);
+ dev_err(par->info->device,
+ "Incorrect chip sellect request (%d)\n", *buf);
return;
}
ret = par->fbtftops.write(par, par->buf, len * (sizeof(u8)));
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %d\n",
- __func__, ret);
+ dev_err(par->info->device,
+ "write() failed and returned %d\n", ret);
return;
}
}
signed short *convert_buf = kmalloc(par->info->var.xres *
par->info->var.yres * sizeof(signed short), GFP_NOIO);
+ if (!convert_buf)
+ return -ENOMEM;
+
fbtft_par_dbg(DEBUG_WRITE_VMEM, par, "%s()\n", __func__);
/* converting to grayscale16 */
ret = par->fbtftops.write(par, buf, len);
if (ret < 0)
dev_err(par->info->device,
- "%s: write failed and returned: %d\n",
- __func__, ret);
+ "write failed and returned: %d\n",
+ ret);
}
/* right half of display */
if (addr_win.xe >= par->info->var.xres / 2) {
/* select right side (sc1)
* set addr
*/
- write_reg(par, 0x01, (1 << 6));
+ write_reg(par, 0x01, 1 << 6);
write_reg(par, 0x01, (0x17 << 3) | (u8)y);
/* write bitmap */
par->fbtftops.write(par, buf, len);
if (ret < 0)
dev_err(par->info->device,
- "%s: write failed and returned: %d\n",
- __func__, ret);
+ "write failed and returned: %d\n",
+ ret);
}
}
kfree(convert_buf);
/* Initialization sequence from Lib_UTFT */
/* oscillator start */
- write_reg(par, 0x000,0x0001); /*oscillator 0: stop, 1: operation */
+ write_reg(par, 0x000, 0x0001); /*oscillator 0: stop, 1: operation */
mdelay(10);
/* Power settings */
- write_reg(par, 0x100, 0x0000 ); /* power supply setup */
- write_reg(par, 0x101, 0x0000 );
- write_reg(par, 0x102, 0x3110 );
- write_reg(par, 0x103, 0xe200 );
- write_reg(par, 0x110, 0x009d );
- write_reg(par, 0x111, 0x0022 );
- write_reg(par, 0x100, 0x0120 );
- mdelay( 20 );
-
- write_reg(par, 0x100, 0x3120 );
- mdelay( 80 );
+ write_reg(par, 0x100, 0x0000); /* power supply setup */
+ write_reg(par, 0x101, 0x0000);
+ write_reg(par, 0x102, 0x3110);
+ write_reg(par, 0x103, 0xe200);
+ write_reg(par, 0x110, 0x009d);
+ write_reg(par, 0x111, 0x0022);
+ write_reg(par, 0x100, 0x0120);
+ mdelay(20);
+
+ write_reg(par, 0x100, 0x3120);
+ mdelay(80);
/* Display control */
- write_reg(par, 0x001, 0x0100 );
- write_reg(par, 0x002, 0x0000 );
- write_reg(par, 0x003, 0x1230 );
- write_reg(par, 0x006, 0x0000 );
- write_reg(par, 0x007, 0x0101 );
- write_reg(par, 0x008, 0x0808 );
- write_reg(par, 0x009, 0x0000 );
- write_reg(par, 0x00b, 0x0000 );
- write_reg(par, 0x00c, 0x0000 );
- write_reg(par, 0x00d, 0x0018 );
+ write_reg(par, 0x001, 0x0100);
+ write_reg(par, 0x002, 0x0000);
+ write_reg(par, 0x003, 0x1230);
+ write_reg(par, 0x006, 0x0000);
+ write_reg(par, 0x007, 0x0101);
+ write_reg(par, 0x008, 0x0808);
+ write_reg(par, 0x009, 0x0000);
+ write_reg(par, 0x00b, 0x0000);
+ write_reg(par, 0x00c, 0x0000);
+ write_reg(par, 0x00d, 0x0018);
/* LTPS control settings */
- write_reg(par, 0x012, 0x0000 );
- write_reg(par, 0x013, 0x0000 );
- write_reg(par, 0x018, 0x0000 );
- write_reg(par, 0x019, 0x0000 );
-
- write_reg(par, 0x203, 0x0000 );
- write_reg(par, 0x204, 0x0000 );
-
- write_reg(par, 0x210, 0x0000 );
- write_reg(par, 0x211, 0x00ef );
- write_reg(par, 0x212, 0x0000 );
- write_reg(par, 0x213, 0x013f );
- write_reg(par, 0x214, 0x0000 );
- write_reg(par, 0x215, 0x0000 );
- write_reg(par, 0x216, 0x0000 );
- write_reg(par, 0x217, 0x0000 );
+ write_reg(par, 0x012, 0x0000);
+ write_reg(par, 0x013, 0x0000);
+ write_reg(par, 0x018, 0x0000);
+ write_reg(par, 0x019, 0x0000);
+
+ write_reg(par, 0x203, 0x0000);
+ write_reg(par, 0x204, 0x0000);
+
+ write_reg(par, 0x210, 0x0000);
+ write_reg(par, 0x211, 0x00ef);
+ write_reg(par, 0x212, 0x0000);
+ write_reg(par, 0x213, 0x013f);
+ write_reg(par, 0x214, 0x0000);
+ write_reg(par, 0x215, 0x0000);
+ write_reg(par, 0x216, 0x0000);
+ write_reg(par, 0x217, 0x0000);
/* Gray scale settings */
write_reg(par, 0x300, 0x5343);
write_reg(par, 0x309, 0x050a);
/* RAM access settings */
- write_reg(par, 0x400, 0x4027 );
- write_reg(par, 0x401, 0x0000 );
- write_reg(par, 0x402, 0x0000 ); /* First screen drive position (1) */
- write_reg(par, 0x403, 0x013f ); /* First screen drive position (2) */
- write_reg(par, 0x404, 0x0000 );
-
- write_reg(par, 0x200, 0x0000 );
- write_reg(par, 0x201, 0x0000 );
- write_reg(par, 0x100, 0x7120 );
- write_reg(par, 0x007, 0x0103 );
- mdelay( 10 );
- write_reg(par, 0x007, 0x0113 );
+ write_reg(par, 0x400, 0x4027);
+ write_reg(par, 0x401, 0x0000);
+ write_reg(par, 0x402, 0x0000); /* First screen drive position (1) */
+ write_reg(par, 0x403, 0x013f); /* First screen drive position (2) */
+ write_reg(par, 0x404, 0x0000);
+
+ write_reg(par, 0x200, 0x0000);
+ write_reg(par, 0x201, 0x0000);
+ write_reg(par, 0x100, 0x7120);
+ write_reg(par, 0x007, 0x0103);
+ mdelay(10);
+ write_reg(par, 0x007, 0x0113);
return 0;
}
static int init_display(struct fbtft_par *par)
{
- fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
-
par->fbtftops.reset(par);
/* BTL221722-276L startup sequence, from datasheet */
return 0;
}
-void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
- fbtft_par_dbg(DEBUG_SET_ADDR_WIN, par,
- "%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
-
write_reg(par, FBTFT_CASET, 0x00, xs, 0x00, xe);
write_reg(par, FBTFT_RASET, 0x00, ys, 0x00, ye);
write_reg(par, FBTFT_RAMWR);
static int set_var(struct fbtft_par *par)
{
- fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
-
/* MADCTL - Memory data access control */
/* RGB/BGR can be set with H/W pin SRGB and MADCTL BGR bit */
#define MY (1 << 7)
#define MV (1 << 5)
switch (par->info->var.rotate) {
case 0:
- write_reg(par, 0x36, (par->bgr << 3));
+ write_reg(par, 0x36, par->bgr << 3);
break;
case 270:
write_reg(par, 0x36, MX | MV | (par->bgr << 3));
0b111, 0b111, 0b111, 0b111, 0b111, 0b111, 0b0, 0b0 };
int i, j;
- fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
-
/* apply mask */
for (i = 0; i < par->gamma.num_curves; i++)
for (j = 0; j < par->gamma.num_values; j++)
write_reg(par, 0x36, my | mv | (par->bgr << 3));
break;
case 180:
- write_reg(par, 0x36, (par->bgr << 3));
+ write_reg(par, 0x36, par->bgr << 3);
break;
case 90:
write_reg(par, 0x36, mx | mv | (par->bgr << 3));
static int init_display(struct fbtft_par *par)
{
unsigned devcode;
+
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
par->fbtftops.reset(par);
par->fbtftops.reset(par);
write_reg(par, 0xEF, 0x03, 0x80, 0x02);
- write_reg(par, 0xCF, 0x00 , 0XC1 , 0X30);
- write_reg(par, 0xED, 0x64 , 0x03 , 0X12 , 0X81);
- write_reg(par, 0xE8, 0x85 , 0x00 , 0x78);
- write_reg(par, 0xCB, 0x39 , 0x2C , 0x00 , 0x34 , 0x02);
+ write_reg(par, 0xCF, 0x00, 0XC1, 0X30);
+ write_reg(par, 0xED, 0x64, 0x03, 0X12, 0X81);
+ write_reg(par, 0xE8, 0x85, 0x00, 0x78);
+ write_reg(par, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02);
write_reg(par, 0xF7, 0x20);
- write_reg(par, 0xEA, 0x00 , 0x00);
+ write_reg(par, 0xEA, 0x00, 0x00);
/* Power Control 1 */
write_reg(par, 0xC0, 0x23);
-1, 0xC5, 0x00, 0x00, 0x00, 0x00,
/* PGAMCTRL(Positive Gamma Control) */
-1, 0xE0, 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
- 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00,
+ 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x00,
/* NGAMCTRL(Negative Gamma Control) */
-1, 0xE1, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
- 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
+ 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
/* Digital Gamma Control 1 */
-1, 0xE2, 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
- 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
+ 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00,
/* Sleep OUT */
-1, 0x11,
/* Display ON */
for (x = 0; x < 84; x++) {
for (y = 0; y < 6; y++) {
*buf = 0x00;
- for (i = 0; i < 8; i++) {
+ for (i = 0; i < 8; i++)
*buf |= (vmem16[(y*8+i)*84+x] ? 1 : 0) << i;
- }
buf++;
}
}
gpio_set_value(par->gpio.dc, 1);
ret = par->fbtftops.write(par, par->txbuf.buf, 6*84);
if (ret < 0)
- dev_err(par->info->device, "%s: write failed and returned: %d\n", __func__, ret);
+ dev_err(par->info->device, "write failed and returned: %d\n",
+ ret);
return ret;
}
if ((par->info->var.xres == 320) && (par->info->var.yres == 240)) {
/* PLL clock frequency */
- write_reg(par, 0x88 , 0x0A);
- write_reg(par, 0x89 , 0x02);
+ write_reg(par, 0x88, 0x0A);
+ write_reg(par, 0x89, 0x02);
mdelay(10);
/* color deep / MCU Interface */
- write_reg(par, 0x10 , 0x0C);
+ write_reg(par, 0x10, 0x0C);
/* pixel clock period */
- write_reg(par, 0x04 , 0x03);
+ write_reg(par, 0x04, 0x03);
mdelay(1);
/* horizontal settings */
- write_reg(par, 0x14 , 0x27);
- write_reg(par, 0x15 , 0x00);
- write_reg(par, 0x16 , 0x05);
- write_reg(par, 0x17 , 0x04);
- write_reg(par, 0x18 , 0x03);
+ write_reg(par, 0x14, 0x27);
+ write_reg(par, 0x15, 0x00);
+ write_reg(par, 0x16, 0x05);
+ write_reg(par, 0x17, 0x04);
+ write_reg(par, 0x18, 0x03);
/* vertical settings */
- write_reg(par, 0x19 , 0xEF);
- write_reg(par, 0x1A , 0x00);
- write_reg(par, 0x1B , 0x05);
- write_reg(par, 0x1C , 0x00);
- write_reg(par, 0x1D , 0x0E);
- write_reg(par, 0x1E , 0x00);
- write_reg(par, 0x1F , 0x02);
+ write_reg(par, 0x19, 0xEF);
+ write_reg(par, 0x1A, 0x00);
+ write_reg(par, 0x1B, 0x05);
+ write_reg(par, 0x1C, 0x00);
+ write_reg(par, 0x1D, 0x0E);
+ write_reg(par, 0x1E, 0x00);
+ write_reg(par, 0x1F, 0x02);
} else if ((par->info->var.xres == 480) && (par->info->var.yres == 272)) {
/* PLL clock frequency */
- write_reg(par, 0x88 , 0x0A);
- write_reg(par, 0x89 , 0x02);
+ write_reg(par, 0x88, 0x0A);
+ write_reg(par, 0x89, 0x02);
mdelay(10);
/* color deep / MCU Interface */
- write_reg(par, 0x10 , 0x0C);
+ write_reg(par, 0x10, 0x0C);
/* pixel clock period */
- write_reg(par, 0x04 , 0x82);
+ write_reg(par, 0x04, 0x82);
mdelay(1);
/* horizontal settings */
- write_reg(par, 0x14 , 0x3B);
- write_reg(par, 0x15 , 0x00);
- write_reg(par, 0x16 , 0x01);
- write_reg(par, 0x17 , 0x00);
- write_reg(par, 0x18 , 0x05);
+ write_reg(par, 0x14, 0x3B);
+ write_reg(par, 0x15, 0x00);
+ write_reg(par, 0x16, 0x01);
+ write_reg(par, 0x17, 0x00);
+ write_reg(par, 0x18, 0x05);
/* vertical settings */
- write_reg(par, 0x19 , 0x0F);
- write_reg(par, 0x1A , 0x01);
- write_reg(par, 0x1B , 0x02);
- write_reg(par, 0x1C , 0x00);
- write_reg(par, 0x1D , 0x07);
- write_reg(par, 0x1E , 0x00);
- write_reg(par, 0x1F , 0x09);
+ write_reg(par, 0x19, 0x0F);
+ write_reg(par, 0x1A, 0x01);
+ write_reg(par, 0x1B, 0x02);
+ write_reg(par, 0x1C, 0x00);
+ write_reg(par, 0x1D, 0x07);
+ write_reg(par, 0x1E, 0x00);
+ write_reg(par, 0x1F, 0x09);
} else if ((par->info->var.xres == 640) && (par->info->var.yres == 480)) {
/* PLL clock frequency */
- write_reg(par, 0x88 , 0x0B);
- write_reg(par, 0x89 , 0x02);
+ write_reg(par, 0x88, 0x0B);
+ write_reg(par, 0x89, 0x02);
mdelay(10);
/* color deep / MCU Interface */
- write_reg(par, 0x10 , 0x0C);
+ write_reg(par, 0x10, 0x0C);
/* pixel clock period */
- write_reg(par, 0x04 , 0x01);
+ write_reg(par, 0x04, 0x01);
mdelay(1);
/* horizontal settings */
- write_reg(par, 0x14 , 0x4F);
- write_reg(par, 0x15 , 0x05);
- write_reg(par, 0x16 , 0x0F);
- write_reg(par, 0x17 , 0x01);
- write_reg(par, 0x18 , 0x00);
+ write_reg(par, 0x14, 0x4F);
+ write_reg(par, 0x15, 0x05);
+ write_reg(par, 0x16, 0x0F);
+ write_reg(par, 0x17, 0x01);
+ write_reg(par, 0x18, 0x00);
/* vertical settings */
- write_reg(par, 0x19 , 0xDF);
- write_reg(par, 0x1A , 0x01);
- write_reg(par, 0x1B , 0x0A);
- write_reg(par, 0x1C , 0x00);
- write_reg(par, 0x1D , 0x0E);
- write_reg(par, 0x1E , 0x00);
- write_reg(par, 0x1F , 0x01);
+ write_reg(par, 0x19, 0xDF);
+ write_reg(par, 0x1A, 0x01);
+ write_reg(par, 0x1B, 0x0A);
+ write_reg(par, 0x1C, 0x00);
+ write_reg(par, 0x1D, 0x0E);
+ write_reg(par, 0x1E, 0x00);
+ write_reg(par, 0x1F, 0x01);
} else if ((par->info->var.xres == 800) && (par->info->var.yres == 480)) {
/* PLL clock frequency */
- write_reg(par, 0x88 , 0x0B);
- write_reg(par, 0x89 , 0x02);
+ write_reg(par, 0x88, 0x0B);
+ write_reg(par, 0x89, 0x02);
mdelay(10);
/* color deep / MCU Interface */
- write_reg(par, 0x10 , 0x0C);
+ write_reg(par, 0x10, 0x0C);
/* pixel clock period */
- write_reg(par, 0x04 , 0x81);
+ write_reg(par, 0x04, 0x81);
mdelay(1);
/* horizontal settings */
- write_reg(par, 0x14 , 0x63);
- write_reg(par, 0x15 , 0x03);
- write_reg(par, 0x16 , 0x03);
- write_reg(par, 0x17 , 0x02);
- write_reg(par, 0x18 , 0x00);
+ write_reg(par, 0x14, 0x63);
+ write_reg(par, 0x15, 0x03);
+ write_reg(par, 0x16, 0x03);
+ write_reg(par, 0x17, 0x02);
+ write_reg(par, 0x18, 0x00);
/* vertical settings */
- write_reg(par, 0x19 , 0xDF);
- write_reg(par, 0x1A , 0x01);
- write_reg(par, 0x1B , 0x14);
- write_reg(par, 0x1C , 0x00);
- write_reg(par, 0x1D , 0x06);
- write_reg(par, 0x1E , 0x00);
- write_reg(par, 0x1F , 0x01);
+ write_reg(par, 0x19, 0xDF);
+ write_reg(par, 0x1A, 0x01);
+ write_reg(par, 0x1B, 0x14);
+ write_reg(par, 0x1C, 0x00);
+ write_reg(par, 0x1D, 0x06);
+ write_reg(par, 0x1E, 0x00);
+ write_reg(par, 0x1F, 0x01);
} else {
dev_err(par->info->device, "display size is not supported!!");
return -1;
}
/* PWM clock */
- write_reg(par, 0x8a , 0x81);
- write_reg(par, 0x8b , 0xFF);
+ write_reg(par, 0x8a, 0x81);
+ write_reg(par, 0x8b, 0xFF);
mdelay(10);
/* Display ON */
- write_reg(par, 0x01 , 0x80);
+ write_reg(par, 0x01, 0x80);
mdelay(10);
return 0;
"%s(xs=%d, ys=%d, xe=%d, ye=%d)\n", __func__, xs, ys, xe, ye);
/* Set_Active_Window */
- write_reg(par, 0x30 , xs & 0x00FF);
- write_reg(par, 0x31 , (xs & 0xFF00) >> 8);
- write_reg(par, 0x32 , ys & 0x00FF);
- write_reg(par, 0x33 , (ys & 0xFF00) >> 8);
- write_reg(par, 0x34 , (xs+xe) & 0x00FF);
- write_reg(par, 0x35 , ((xs+xe) & 0xFF00) >> 8);
- write_reg(par, 0x36 , (ys+ye) & 0x00FF);
- write_reg(par, 0x37 , ((ys+ye) & 0xFF00) >> 8);
+ write_reg(par, 0x30, xs & 0x00FF);
+ write_reg(par, 0x31, (xs & 0xFF00) >> 8);
+ write_reg(par, 0x32, ys & 0x00FF);
+ write_reg(par, 0x33, (ys & 0xFF00) >> 8);
+ write_reg(par, 0x34, (xs+xe) & 0x00FF);
+ write_reg(par, 0x35, ((xs+xe) & 0xFF00) >> 8);
+ write_reg(par, 0x36, (ys+ye) & 0x00FF);
+ write_reg(par, 0x37, ((ys+ye) & 0xFF00) >> 8);
/* Set_Memory_Write_Cursor */
write_reg(par, 0x46, xs & 0xff);
ret = par->fbtftops.write(par, par->buf, 2);
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %dn",
- __func__, ret);
+ dev_err(par->info->device, "write() failed and returned %dn",
+ ret);
return;
}
len--;
ret = par->fbtftops.write(par, par->buf, len + 1);
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %dn",
- __func__, ret);
+ dev_err(par->info->device,
+ "write() failed and returned %dn", ret);
return;
}
}
write_reg(par, 0x36, MY | MV | (par->bgr << 3));
break;
case 180:
- write_reg(par, 0x36, (par->bgr << 3));
+ write_reg(par, 0x36, par->bgr << 3);
break;
case 90:
write_reg(par, 0x36, MX | MV | (par->bgr << 3));
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
unsigned long mask[] = {
- 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111,
+ 0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111,
0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111,
0b11111, 0b11111,
0b111111, 0b111111, 0b111111, 0b111111, 0b111111, 0b111111,
ret = par->fbtftops.write(par, par->txbuf.buf,
par->info->var.xres*par->info->var.yres/8);
if (ret < 0)
- dev_err(par->info->device,
- "%s: write failed and returned: %d\n", __func__, ret);
+ dev_err(par->info->device, "write failed and returned: %d\n",
+ ret);
return ret;
}
write_reg(par, 0xae); /* Display Off */
write_reg(par, 0xa0, 0x70 | (par->bgr << 2)); /* Set Colour Depth */
- write_reg(par, 0x72); // RGB colour
+ write_reg(par, 0x72); /* RGB colour */
write_reg(par, 0xa1, 0x00); /* Set Display Start Line */
write_reg(par, 0xa2, 0x00); /* Set Display Offset */
write_reg(par, 0xa4); /* NORMALDISPLAY */
- write_reg(par, 0xa8, 0x3f); // Set multiplex
- write_reg(par, 0xad, 0x8e); // Set master
- // write_reg(par, 0xb0, 0x0b); // Set power mode
- write_reg(par, 0xb1, 0x31); // Precharge
- write_reg(par, 0xb3, 0xf0); // Clock div
- write_reg(par, 0x8a, 0x64); // Precharge A
- write_reg(par, 0x8b, 0x78); // Precharge B
- write_reg(par, 0x8c, 0x64); // Precharge C
- write_reg(par, 0xbb, 0x3a); // Precharge level
- write_reg(par, 0xbe, 0x3e); // vcomh
- write_reg(par, 0x87, 0x06); // Master current
- write_reg(par, 0x81, 0x91); // Contrast A
- write_reg(par, 0x82, 0x50); // Contrast B
- write_reg(par, 0x83, 0x7d); // Contrast C
+ write_reg(par, 0xa8, 0x3f); /* Set multiplex */
+ write_reg(par, 0xad, 0x8e); /* Set master */
+ /* write_reg(par, 0xb0, 0x0b); Set power mode */
+ write_reg(par, 0xb1, 0x31); /* Precharge */
+ write_reg(par, 0xb3, 0xf0); /* Clock div */
+ write_reg(par, 0x8a, 0x64); /* Precharge A */
+ write_reg(par, 0x8b, 0x78); /* Precharge B */
+ write_reg(par, 0x8c, 0x64); /* Precharge C */
+ write_reg(par, 0xbb, 0x3a); /* Precharge level */
+ write_reg(par, 0xbe, 0x3e); /* vcomh */
+ write_reg(par, 0x87, 0x06); /* Master current */
+ write_reg(par, 0x81, 0x91); /* Contrast A */
+ write_reg(par, 0x82, 0x50); /* Contrast B */
+ write_reg(par, 0x83, 0x7d); /* Contrast C */
write_reg(par, 0xaf); /* Set Sleep Mode Display On */
return 0;
if (unlikely(par->debug & DEBUG_WRITE_REGISTER)) {
va_start(args, len);
- for (i = 0; i < len; i++) {
+ for (i = 0; i < len; i++)
buf[i] = (u8)va_arg(args, unsigned int);
- }
va_end(args);
fbtft_par_dbg_hex(DEBUG_WRITE_REGISTER, par, par->info->device, u8, buf, len, "%s: ", __func__);
}
ret = par->fbtftops.write(par, par->buf, sizeof(u8));
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %d\n", __func__, ret);
+ dev_err(par->info->device,
+ "write() failed and returned %d\n", ret);
return;
}
len--;
if (len) {
i = len;
- while (i--) {
+ while (i--)
*buf++ = (u8)va_arg(args, unsigned int);
- }
ret = par->fbtftops.write(par, par->buf, len * (sizeof(u8)));
if (ret < 0) {
va_end(args);
- dev_err(par->info->device, "%s: write() failed and returned %d\n", __func__, ret);
+ dev_err(par->info->device,
+ "write() failed and returned %d\n", ret);
return;
}
}
static int set_var(struct fbtft_par *par)
{
unsigned remap;
+
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
if (par->fbtftops.init_display != init_display) {
bl_ops = devm_kzalloc(par->info->device, sizeof(struct backlight_ops),
GFP_KERNEL);
- if (!bl_ops) {
- dev_err(par->info->device,
- "%s: could not allocate memory for backlight operations.\n",
- __func__);
+ if (!bl_ops)
return;
- }
bl_ops->update_status = update_onboard_backlight;
bl_props.type = BACKLIGHT_RAW;
/* PWCTR4 - Power Control
BCLK/2, Opamp current small & Medium low */
- -1, 0xC3,0x8A,0x2A,
+ -1, 0xC3, 0x8A, 0x2A,
/* PWCTR5 - Power Control */
-1, 0xC4, 0x8A, 0xEE,
write_reg(par, 0x36, MY | MV | (par->bgr << 3));
break;
case 180:
- write_reg(par, 0x36, (par->bgr << 3));
+ write_reg(par, 0x36, par->bgr << 3);
break;
case 90:
write_reg(par, 0x36, MX | MV | (par->bgr << 3));
#define CURVE(num, idx) curves[num*par->gamma.num_values + idx]
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
- int i,j;
+ int i, j;
fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
/* apply mask */
for (i = 0; i < par->gamma.num_curves; i++)
for (j = 0; j < par->gamma.num_values; j++)
- CURVE(i,j) &= 0b111111;
+ CURVE(i, j) &= 0b111111;
for (i = 0; i < par->gamma.num_curves; i++)
write_reg(par, 0xE0 + i,
CURVE(i, 0), CURVE(i, 1), CURVE(i, 2), CURVE(i, 3),
CURVE(i, 4), CURVE(i, 5), CURVE(i, 6), CURVE(i, 7),
CURVE(i, 8), CURVE(i, 9), CURVE(i, 10), CURVE(i, 11),
- CURVE(i, 12), CURVE(i, 13), CURVE(i, 14), CURVE(i,15));
+ CURVE(i, 12), CURVE(i, 13), CURVE(i, 14), CURVE(i, 15));
return 0;
}
ret = par->fbtftops.write(par, par->txbuf.buf, WIDTH);
if (ret < 0) {
dev_err(par->info->device,
- "%s: write failed and returned: %d\n", __func__, ret);
+ "write failed and returned: %d\n", ret);
break;
}
}
}
if (ret < 0)
- dev_err(par->info->device, "%s: write failed and returned: %d\n", __func__, ret);
+ dev_err(par->info->device, "write failed and returned: %d\n",
+ ret);
return ret;
}
/* Initialization sequence from Lib_UTFT */
/* register reset */
- write_reg(par, 0x0003,0x0001); /* Soft reset */
+ write_reg(par, 0x0003, 0x0001); /* Soft reset */
/* oscillator start */
- write_reg(par, 0x003A,0x0001); /*Oscillator 0: stop, 1: operation */
+ write_reg(par, 0x003A, 0x0001); /*Oscillator 0: stop, 1: operation */
udelay(100);
/* y-setting */
- write_reg(par, 0x0024,0x007B); /* amplitude setting */
+ write_reg(par, 0x0024, 0x007B); /* amplitude setting */
udelay(10);
- write_reg(par, 0x0025,0x003B); /* amplitude setting */
- write_reg(par, 0x0026,0x0034); /* amplitude setting */
+ write_reg(par, 0x0025, 0x003B); /* amplitude setting */
+ write_reg(par, 0x0026, 0x0034); /* amplitude setting */
udelay(10);
- write_reg(par, 0x0027,0x0004); /* amplitude setting */
- write_reg(par, 0x0052,0x0025); /* circuit setting 1 */
+ write_reg(par, 0x0027, 0x0004); /* amplitude setting */
+ write_reg(par, 0x0052, 0x0025); /* circuit setting 1 */
udelay(10);
- write_reg(par, 0x0053,0x0033); /* circuit setting 2 */
- write_reg(par, 0x0061,0x001C); /* adjustment V10 positive polarity */
+ write_reg(par, 0x0053, 0x0033); /* circuit setting 2 */
+ write_reg(par, 0x0061, 0x001C); /* adjustment V10 positive polarity */
udelay(10);
- write_reg(par, 0x0062,0x002C); /* adjustment V9 negative polarity */
- write_reg(par, 0x0063,0x0022); /* adjustment V34 positive polarity */
+ write_reg(par, 0x0062, 0x002C); /* adjustment V9 negative polarity */
+ write_reg(par, 0x0063, 0x0022); /* adjustment V34 positive polarity */
udelay(10);
- write_reg(par, 0x0064,0x0027); /* adjustment V31 negative polarity */
+ write_reg(par, 0x0064, 0x0027); /* adjustment V31 negative polarity */
udelay(10);
- write_reg(par, 0x0065,0x0014); /* adjustment V61 negative polarity */
+ write_reg(par, 0x0065, 0x0014); /* adjustment V61 negative polarity */
udelay(10);
- write_reg(par, 0x0066,0x0010); /* adjustment V61 negative polarity */
-
+ write_reg(par, 0x0066, 0x0010); /* adjustment V61 negative polarity */
+
/* Basical clock for 1 line (BASECOUNT[7:0]) number specified */
- write_reg(par, 0x002E,0x002D);
-
+ write_reg(par, 0x002E, 0x002D);
+
/* Power supply setting */
- write_reg(par, 0x0019,0x0000); /* DC/DC output setting */
+ write_reg(par, 0x0019, 0x0000); /* DC/DC output setting */
udelay(200);
- write_reg(par, 0x001A,0x1000); /* DC/DC frequency setting */
- write_reg(par, 0x001B,0x0023); /* DC/DC rising setting */
- write_reg(par, 0x001C,0x0C01); /* Regulator voltage setting */
- write_reg(par, 0x001D,0x0000); /* Regulator current setting */
- write_reg(par, 0x001E,0x0009); /* VCOM output setting */
- write_reg(par, 0x001F,0x0035); /* VCOM amplitude setting */
- write_reg(par, 0x0020,0x0015); /* VCOMM cencter setting */
- write_reg(par, 0x0018,0x1E7B); /* DC/DC operation setting */
+ write_reg(par, 0x001A, 0x1000); /* DC/DC frequency setting */
+ write_reg(par, 0x001B, 0x0023); /* DC/DC rising setting */
+ write_reg(par, 0x001C, 0x0C01); /* Regulator voltage setting */
+ write_reg(par, 0x001D, 0x0000); /* Regulator current setting */
+ write_reg(par, 0x001E, 0x0009); /* VCOM output setting */
+ write_reg(par, 0x001F, 0x0035); /* VCOM amplitude setting */
+ write_reg(par, 0x0020, 0x0015); /* VCOMM cencter setting */
+ write_reg(par, 0x0018, 0x1E7B); /* DC/DC operation setting */
/* windows setting */
- write_reg(par, 0x0008,0x0000); /* Minimum X address */
- write_reg(par, 0x0009,0x00EF); /* Maximum X address */
- write_reg(par, 0x000a,0x0000); /* Minimum Y address */
- write_reg(par, 0x000b,0x013F); /* Maximum Y address */
+ write_reg(par, 0x0008, 0x0000); /* Minimum X address */
+ write_reg(par, 0x0009, 0x00EF); /* Maximum X address */
+ write_reg(par, 0x000a, 0x0000); /* Minimum Y address */
+ write_reg(par, 0x000b, 0x013F); /* Maximum Y address */
/* LCD display area setting */
- write_reg(par, 0x0029,0x0000); /* [LCDSIZE] X MIN. size set */
- write_reg(par, 0x002A,0x0000); /* [LCDSIZE] Y MIN. size set */
- write_reg(par, 0x002B,0x00EF); /* [LCDSIZE] X MAX. size set */
- write_reg(par, 0x002C,0x013F); /* [LCDSIZE] Y MAX. size set */
+ write_reg(par, 0x0029, 0x0000); /* [LCDSIZE] X MIN. size set */
+ write_reg(par, 0x002A, 0x0000); /* [LCDSIZE] Y MIN. size set */
+ write_reg(par, 0x002B, 0x00EF); /* [LCDSIZE] X MAX. size set */
+ write_reg(par, 0x002C, 0x013F); /* [LCDSIZE] Y MAX. size set */
/* Gate scan setting */
- write_reg(par, 0x0032,0x0002);
-
+ write_reg(par, 0x0032, 0x0002);
+
/* n line inversion line number */
- write_reg(par, 0x0033,0x0000);
+ write_reg(par, 0x0033, 0x0000);
/* Line inversion/frame inversion/interlace setting */
- write_reg(par, 0x0037,0x0000);
-
+ write_reg(par, 0x0037, 0x0000);
+
/* Gate scan operation setting register */
- write_reg(par, 0x003B,0x0001);
-
+ write_reg(par, 0x003B, 0x0001);
+
/* Color mode */
/*GS = 0: 260-k color (64 gray scale), GS = 1: 8 color (2 gray scale) */
- write_reg(par, 0x0004,0x0000);
+ write_reg(par, 0x0004, 0x0000);
/* RAM control register */
- write_reg(par, 0x0005,0x0000); /*Window access 00:Normal, 10:Window */
+ write_reg(par, 0x0005, 0x0000); /*Window access 00:Normal, 10:Window */
/* Display setting register 2 */
- write_reg(par, 0x0001,0x0000);
+ write_reg(par, 0x0001, 0x0000);
/* display setting */
- write_reg(par, 0x0000,0x0000); /* display on */
+ write_reg(par, 0x0000, 0x0000); /* display on */
return 0;
}
ret = par->fbtftops.write(par, par->buf, len);
if (ret < 0) {
dev_err(par->info->device,
- "%s: write() failed and returned %d\n", __func__, ret);
+ "write() failed and returned %d\n", ret);
return;
}
}
ret = par->fbtftops.write(par, par->buf, (len + pad) * sizeof(u16));
if (ret < 0) {
dev_err(par->info->device,
- "%s: write() failed and returned %d\n", __func__, ret);
+ "write() failed and returned %d\n", ret);
return;
}
}
#include <linux/of_gpio.h>
#include "fbtft.h"
-
-extern void fbtft_sysfs_init(struct fbtft_par *par);
-extern void fbtft_sysfs_exit(struct fbtft_par *par);
-extern void fbtft_expand_debug_value(unsigned long *debug);
-extern int fbtft_gamma_parse_str(struct fbtft_par *par, unsigned long *curves,
- const char *str, int size);
+#include "internal.h"
static unsigned long debug;
-module_param(debug, ulong , 0);
+module_param(debug, ulong, 0);
MODULE_PARM_DESC(debug, "override device debug level");
static bool dma = true;
bl_ops = devm_kzalloc(par->info->device, sizeof(struct backlight_ops),
GFP_KERNEL);
- if (!bl_ops) {
- dev_err(par->info->device,
- "%s: could not allocate memeory for backlight operations.\n",
- __func__);
+ if (!bl_ops)
return;
- }
bl_ops->get_brightness = fbtft_backlight_get_brightness;
bl_ops->update_status = fbtft_backlight_update_status;
int ret = 0;
if (unlikely(par->debug & (DEBUG_TIME_FIRST_UPDATE | DEBUG_TIME_EACH_UPDATE))) {
- if ((par->debug & DEBUG_TIME_EACH_UPDATE) || \
+ if ((par->debug & DEBUG_TIME_EACH_UPDATE) ||
((par->debug & DEBUG_TIME_FIRST_UPDATE) && !par->first_update_done)) {
getnstimeofday(&ts_start);
timeit = true;
/* sanity check */
if (display->gamma_num * display->gamma_len > FBTFT_GAMMA_MAX_VALUES_TOTAL) {
- dev_err(dev,
- "%s: FBTFT_GAMMA_MAX_VALUES_TOTAL=%d is exceeded\n",
- __func__, FBTFT_GAMMA_MAX_VALUES_TOTAL);
+ dev_err(dev, "FBTFT_GAMMA_MAX_VALUES_TOTAL=%d is exceeded\n",
+ FBTFT_GAMMA_MAX_VALUES_TOTAL);
return NULL;
}
fbtft_sysfs_init(par);
if (par->txbuf.buf)
- sprintf(text1, ", %d KiB %sbuffer memory",
+ sprintf(text1, ", %zu KiB %sbuffer memory",
par->txbuf.len >> 10, par->txbuf.dma ? "DMA " : "");
if (spi)
sprintf(text2, ", spi%d.%d at %d MHz", spi->master->bus_num,
{
struct fbtft_par *par = fb_info->par;
struct spi_device *spi = par->spi;
- int ret;
if (spi)
spi_set_drvdata(spi, NULL);
if (par->fbtftops.unregister_backlight)
par->fbtftops.unregister_backlight(par);
fbtft_sysfs_exit(par);
- ret = unregister_framebuffer(fb_info);
- return ret;
+ return unregister_framebuffer(fb_info);
}
EXPORT_SYMBOL(fbtft_unregister_framebuffer);
fbtft_par_dbg(DEBUG_VERIFY_GPIOS, par, "%s()\n", __func__);
pdata = par->info->device->platform_data;
- if (pdata->display.buswidth != 9 && par->startbyte == 0 && \
+ if (pdata->display.buswidth != 9 && par->startbyte == 0 &&
par->gpio.dc < 0) {
dev_err(par->info->device,
"Missing info about 'dc' gpio. Aborting.\n");
}
if ((len % 8) != 0) {
dev_err(par->info->device,
- "%s: error: len=%d must be divisible by 8\n",
- __func__, len);
+ "error: len=%zu must be divisible by 8\n", len);
return -EINVAL;
}
if (par->startbyte) {
if (len > 32) {
dev_err(par->info->device,
- "%s: len=%d can't be larger than 32 when using 'startbyte'\n",
- __func__, len);
+ "len=%zu can't be larger than 32 when using 'startbyte'\n",
+ len);
return -EINVAL;
}
txbuf[0] = par->startbyte | 0x3;
for (i = 0; i < 8; i++) {
if ((data & 1) != (prev_data & 1))
gpio_set_value(par->gpio.db[i],
- (data & 1));
+ data & 1);
data >>= 1;
prev_data >>= 1;
}
}
#else
for (i = 0; i < 8; i++) {
- gpio_set_value(par->gpio.db[i], (data & 1));
+ gpio_set_value(par->gpio.db[i], data & 1);
data >>= 1;
}
#endif
for (i = 0; i < 16; i++) {
if ((data & 1) != (prev_data & 1))
gpio_set_value(par->gpio.db[i],
- (data & 1));
+ data & 1);
data >>= 1;
prev_data >>= 1;
}
}
#else
for (i = 0; i < 16; i++) {
- gpio_set_value(par->gpio.db[i], (data & 1));
+ gpio_set_value(par->gpio.db[i], data & 1);
data >>= 1;
}
#endif
#include "fbtft.h"
-
+#include "internal.h"
static int get_next_ulong(char **str_p, unsigned long *val, char *sep, int base)
{
fbtft_par_dbg(DEBUG_SYSFS, par, "%s\n", str);
- tmp = kmalloc(size+1, GFP_KERNEL);
+ tmp = kmemdup(str, size + 1, GFP_KERNEL);
if (!tmp)
return -ENOMEM;
- memcpy(tmp, str, size+1);
/* replace optional separators */
str_p = tmp;
#define MAX_GPIOS 32
-struct spi_device *spi_device;
-struct platform_device *p_device;
+static struct spi_device *spi_device;
+static struct platform_device *p_device;
static char *name;
module_param(name, charp, 0);
MODULE_PARM_DESC(init, "Init sequence, used with the custom argument");
static unsigned long debug;
-module_param(debug, ulong , 0);
+module_param(debug, ulong, 0);
MODULE_PARM_DESC(debug,
"level: 0-7 (the remaining 29 bits is for advanced usage)");
"03 1d 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10"
static int hy28b_init_sequence[] = {
- -1,0x00e7,0x0010,-1,0x0000,0x0001,-1,0x0001,0x0100,-1,0x0002,0x0700,
- -1,0x0003,0x1030,-1,0x0004,0x0000,-1,0x0008,0x0207,-1,0x0009,0x0000,
- -1,0x000a,0x0000,-1,0x000c,0x0001,-1,0x000d,0x0000,-1,0x000f,0x0000,
- -1,0x0010,0x0000,-1,0x0011,0x0007,-1,0x0012,0x0000,-1,0x0013,0x0000,
- -2,50,-1,0x0010,0x1590,-1,0x0011,0x0227,-2,50,-1,0x0012,0x009c,-2,50,
- -1,0x0013,0x1900,-1,0x0029,0x0023,-1,0x002b,0x000e,-2,50,
- -1,0x0020,0x0000,-1,0x0021,0x0000,-2,50,-1,0x0050,0x0000,
- -1,0x0051,0x00ef,-1,0x0052,0x0000,-1,0x0053,0x013f,-1,0x0060,0xa700,
- -1,0x0061,0x0001,-1,0x006a,0x0000,-1,0x0080,0x0000,-1,0x0081,0x0000,
- -1,0x0082,0x0000,-1,0x0083,0x0000,-1,0x0084,0x0000,-1,0x0085,0x0000,
- -1,0x0090,0x0010,-1,0x0092,0x0000,-1,0x0093,0x0003,-1,0x0095,0x0110,
- -1,0x0097,0x0000,-1,0x0098,0x0000,-1,0x0007,0x0133,-1,0x0020,0x0000,
- -1,0x0021,0x0000,-2,100,-3 };
+ -1, 0x00e7, 0x0010, -1, 0x0000, 0x0001,
+ -1, 0x0001, 0x0100, -1, 0x0002, 0x0700,
+ -1, 0x0003, 0x1030, -1, 0x0004, 0x0000,
+ -1, 0x0008, 0x0207, -1, 0x0009, 0x0000,
+ -1, 0x000a, 0x0000, -1, 0x000c, 0x0001,
+ -1, 0x000d, 0x0000, -1, 0x000f, 0x0000,
+ -1, 0x0010, 0x0000, -1, 0x0011, 0x0007,
+ -1, 0x0012, 0x0000, -1, 0x0013, 0x0000,
+ -2, 50, -1, 0x0010, 0x1590, -1, 0x0011,
+ 0x0227, -2, 50, -1, 0x0012, 0x009c, -2, 50,
+ -1, 0x0013, 0x1900, -1, 0x0029, 0x0023,
+ -1, 0x002b, 0x000e, -2, 50,
+ -1, 0x0020, 0x0000, -1, 0x0021, 0x0000,
+ -2, 50, -1, 0x0050, 0x0000,
+ -1, 0x0051, 0x00ef, -1, 0x0052, 0x0000,
+ -1, 0x0053, 0x013f, -1, 0x0060, 0xa700,
+ -1, 0x0061, 0x0001, -1, 0x006a, 0x0000,
+ -1, 0x0080, 0x0000, -1, 0x0081, 0x0000,
+ -1, 0x0082, 0x0000, -1, 0x0083, 0x0000,
+ -1, 0x0084, 0x0000, -1, 0x0085, 0x0000,
+ -1, 0x0090, 0x0010, -1, 0x0092, 0x0000,
+ -1, 0x0093, 0x0003, -1, 0x0095, 0x0110,
+ -1, 0x0097, 0x0000, -1, 0x0098, 0x0000,
+ -1, 0x0007, 0x0133, -1, 0x0020, 0x0000,
+ -1, 0x0021, 0x0000, -2, 100, -3 };
#define HY28B_GAMMA \
"04 1F 4 7 7 0 7 7 6 0\n" \
"0F 00 1 7 4 0 0 0 6 7"
static int pitft_init_sequence[] = {
- -1,0x01,-2,5,-1,0x28,-1,0xEF,0x03,0x80,0x02,-1,0xCF,0x00,0xC1,0x30,
- -1,0xED,0x64,0x03,0x12,0x81,-1,0xE8,0x85,0x00,0x78,
- -1,0xCB,0x39,0x2C,0x00,0x34,0x02,-1,0xF7,0x20,-1,0xEA,0x00,0x00,
- -1,0xC0,0x23,-1,0xC1,0x10,-1,0xC5,0x3e,0x28,-1,0xC7,0x86,-1,0x3A,0x55,
- -1,0xB1,0x00,0x18,-1,0xB6,0x08,0x82,0x27,-1,0xF2,0x00,-1,0x26,0x01,
- -1,0xE0,0x0F,0x31,0x2B,0x0C,0x0E,0x08,0x4E,0xF1,0x37,0x07,0x10,0x03,
- 0x0E,0x09,0x00,-1,0xE1,0x00,0x0E,0x14,0x03,0x11,0x07,0x31,0xC1,0x48,
- 0x08,0x0F,0x0C,0x31,0x36,0x0F,-1,0x11,-2,100,-1,0x29,-2,20,-3 };
+ -1, 0x01, -2, 5, -1, 0x28, -1, 0xEF,
+ 0x03, 0x80, 0x02, -1, 0xCF, 0x00, 0xC1, 0x30,
+ -1, 0xED, 0x64, 0x03, 0x12, 0x81,
+ -1, 0xE8, 0x85, 0x00, 0x78,
+ -1, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02,
+ -1, 0xF7, 0x20, -1, 0xEA, 0x00, 0x00,
+ -1, 0xC0, 0x23, -1, 0xC1, 0x10, -1, 0xC5,
+ 0x3e, 0x28, -1, 0xC7, 0x86, -1, 0x3A, 0x55,
+ -1, 0xB1, 0x00, 0x18, -1, 0xB6, 0x08, 0x82,
+ 0x27, -1, 0xF2, 0x00, -1, 0x26, 0x01,
+ -1, 0xE0, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08,
+ 0x4E, 0xF1, 0x37, 0x07, 0x10, 0x03,
+ 0x0E, 0x09, 0x00, -1, 0xE1, 0x00, 0x0E, 0x14,
+ 0x03, 0x11, 0x07, 0x31, 0xC1, 0x48,
+ 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, -1,
+ 0x11, -2, 100, -1, 0x29, -2, 20, -3 };
static int waveshare32b_init_sequence[] = {
- -1,0xCB,0x39,0x2C,0x00,0x34,0x02,-1,0xCF,0x00,0xC1,0x30,
- -1,0xE8,0x85,0x00,0x78,-1,0xEA,0x00,0x00,-1,0xED,0x64,0x03,0x12,0x81,
- -1,0xF7,0x20,-1,0xC0,0x23,-1,0xC1,0x10,-1,0xC5,0x3e,0x28,-1,0xC7,0x86,
- -1,0x36,0x28,-1,0x3A,0x55,-1,0xB1,0x00,0x18,-1,0xB6,0x08,0x82,0x27,
- -1,0xF2,0x00,-1,0x26,0x01,
- -1,0xE0,0x0F,0x31,0x2B,0x0C,0x0E,0x08,0x4E,0xF1,0x37,0x07,0x10,0x03,0x0E,0x09,0x00,
- -1,0xE1,0x00,0x0E,0x14,0x03,0x11,0x07,0x31,0xC1,0x48,0x08,0x0F,0x0C,0x31,0x36,0x0F,
- -1,0x11,-2,120,-1,0x29,-1,0x2c,-3 };
+ -1, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02,
+ -1, 0xCF, 0x00, 0xC1, 0x30,
+ -1, 0xE8, 0x85, 0x00, 0x78, -1, 0xEA, 0x00,
+ 0x00, -1, 0xED, 0x64, 0x03, 0x12, 0x81,
+ -1, 0xF7, 0x20, -1, 0xC0, 0x23, -1, 0xC1,
+ 0x10, -1, 0xC5, 0x3e, 0x28, -1, 0xC7, 0x86,
+ -1, 0x36, 0x28, -1, 0x3A, 0x55, -1, 0xB1, 0x00,
+ 0x18, -1, 0xB6, 0x08, 0x82, 0x27,
+ -1, 0xF2, 0x00, -1, 0x26, 0x01,
+ -1, 0xE0, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E,
+ 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00,
+ -1, 0xE1, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31,
+ 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F,
+ -1, 0x11, -2, 120, -1, 0x29, -1, 0x2c, -3 };
/* Supported displays in alphabetical order */
static struct fbtft_device_display displays[] = {
},
.startbyte = 0b01110000,
.bgr = true,
- .fps= 50,
+ .fps = 50,
.gpios = (const struct fbtft_gpio []) {
{ "reset", 25 },
{ "led", 18 },
for (i = 0; i < 16; i++) {
if ((data & 1) != (prev_data & 1))
gpio_set_value(par->gpio.db[i],
- (data & 1));
+ data & 1);
data >>= 1;
prev_data >>= 1;
}
}
#else
for (i = 0; i < 16; i++) {
- gpio_set_value(par->gpio.db[i], (data & 1));
+ gpio_set_value(par->gpio.db[i], data & 1);
data >>= 1;
}
#endif
--- /dev/null
+/*
+ * Copyright (C) 2013 Noralf Tronnes
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __LINUX_FBTFT__INTERNAL_H
+#define __LINUX_FBTFT_INTERNAL_H
+
+void fbtft_sysfs_init(struct fbtft_par *par);
+void fbtft_sysfs_exit(struct fbtft_par *par);
+void fbtft_expand_debug_value(unsigned long *debug);
+int fbtft_gamma_parse_str(struct fbtft_par *par, unsigned long *curves,
+ const char *str, int size);
+
+#endif /* __LINUX_FBTFT_INTERNAL_H */
--- /dev/null
+source "drivers/staging/fsl-mc/bus/Kconfig"
--- /dev/null
+# Freescale Management Complex (MC) bus drivers
+obj-$(CONFIG_FSL_MC_BUS) += bus/
--- /dev/null
+* Add README file (with ASCII art) describing relationships between
+ DPAA2 objects and how combine them to make a NIC, an LS2 switch, etc.
+ Also, define all acronyms used.
+
+* Decide if multiple root fsl-mc buses will be supported per Linux instance,
+ and if so add support for this.
+
+* Add at least one device driver for a DPAA2 object (child device of the
+ fsl-mc bus).
+
+Please send any patches to Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
+german.rivera@freescale.com, devel@driverdev.osuosl.org,
+linux-kernel@vger.kernel.org
--- /dev/null
+#
+# Freescale Management Complex (MC) bus drivers
+#
+# Copyright (C) 2014 Freescale Semiconductor, Inc.
+#
+# This file is released under the GPLv2
+#
+
+config FSL_MC_BUS
+ tristate "Freescale Management Complex (MC) bus driver"
+ depends on OF && ARM64
+ help
+ Driver to enable the bus infrastructure for the Freescale
+ QorIQ Management Complex (fsl-mc). The fsl-mc is a hardware
+ module of the QorIQ LS2 SoCs, that does resource management
+ for hardware building-blocks in the SoC that can be used
+ to dynamically create networking hardware objects such as
+ network interfaces (NICs), crypto accelerator instances,
+ or L2 switches.
+
+ Only enable this option when building the kernel for
+ Freescale QorQIQ LS2xxxx SoCs.
+
+
--- /dev/null
+#
+# Freescale Management Complex (MC) bus drivers
+#
+# Copyright (C) 2014 Freescale Semiconductor, Inc.
+#
+# This file is released under the GPLv2
+#
+obj-$(CONFIG_FSL_MC_BUS) += mc-bus-driver.o \
+ mc-allocator-driver.o
+
+mc-bus-driver-objs := mc-bus.o \
+ mc-sys.o \
+ dprc.o \
+ dpmng.o \
+ dprc-driver.o
+
+mc-allocator-driver-objs := mc-allocator.o \
+ dpmcp.o \
+ dpbp.o
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include "../include/dpbp.h"
+#include "../include/dpbp-cmd.h"
+
+int dpbp_open(struct fsl_mc_io *mc_io, int dpbp_id, uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_OPEN,
+ MC_CMD_PRI_LOW, 0);
+ cmd.params[0] |= mc_enc(0, 32, dpbp_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return err;
+}
+EXPORT_SYMBOL(dpbp_open);
+
+int dpbp_close(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_CLOSE, MC_CMD_PRI_HIGH,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+EXPORT_SYMBOL(dpbp_close);
+
+int dpbp_create(struct fsl_mc_io *mc_io,
+ const struct dpbp_cfg *cfg,
+ uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ (void)(cfg); /* unused */
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_CREATE,
+ MC_CMD_PRI_LOW, 0);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return 0;
+}
+
+int dpbp_destroy(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_DESTROY,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_enable(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_ENABLE, MC_CMD_PRI_LOW,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+EXPORT_SYMBOL(dpbp_enable);
+
+int dpbp_disable(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_DISABLE,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+EXPORT_SYMBOL(dpbp_disable);
+
+int dpbp_is_enabled(struct fsl_mc_io *mc_io, uint16_t token, int *en)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_IS_ENABLED, MC_CMD_PRI_LOW,
+ token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *en = (int)mc_dec(cmd.params[0], 0, 1);
+
+ return 0;
+}
+
+int dpbp_reset(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_RESET,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_paddr,
+ uint32_t irq_val,
+ int user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, irq_index);
+ cmd.params[0] |= mc_enc(32, 32, irq_val);
+ cmd.params[1] |= mc_enc(0, 64, irq_paddr);
+ cmd.params[2] |= mc_enc(0, 32, user_irq_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_paddr,
+ uint32_t *irq_val,
+ int *user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *irq_val = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ *irq_paddr = (uint64_t)mc_dec(cmd.params[1], 0, 64);
+ *user_irq_id = (int)mc_dec(cmd.params[2], 0, 32);
+ *type = (int)mc_dec(cmd.params[2], 32, 32);
+ return 0;
+}
+
+int dpbp_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, en);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *en = (uint8_t)mc_dec(cmd.params[0], 0, 8);
+ return 0;
+}
+
+int dpbp_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_SET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, mask);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *mask = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ return 0;
+}
+
+int dpbp_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *status = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ return 0;
+}
+
+int dpbp_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_CLEAR_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, status);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpbp_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dpbp_attr *attr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_ATTR,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ attr->bpid = (uint16_t)mc_dec(cmd.params[0], 16, 16);
+ attr->id = (int)mc_dec(cmd.params[0], 32, 32);
+ attr->version.major = (uint16_t)mc_dec(cmd.params[1], 0, 16);
+ attr->version.minor = (uint16_t)mc_dec(cmd.params[1], 16, 16);
+ return 0;
+}
+EXPORT_SYMBOL(dpbp_get_attributes);
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef _FSL_DPMCP_CMD_H
+#define _FSL_DPMCP_CMD_H
+
+/* DPMCP Version */
+#define DPMCP_VER_MAJOR 2
+#define DPMCP_VER_MINOR 0
+
+/* Command IDs */
+#define DPMCP_CMDID_CLOSE 0x800
+#define DPMCP_CMDID_OPEN 0x80b
+#define DPMCP_CMDID_CREATE 0x90b
+#define DPMCP_CMDID_DESTROY 0x900
+
+#define DPMCP_CMDID_GET_ATTR 0x004
+#define DPMCP_CMDID_RESET 0x005
+
+#define DPMCP_CMDID_SET_IRQ 0x010
+#define DPMCP_CMDID_GET_IRQ 0x011
+#define DPMCP_CMDID_SET_IRQ_ENABLE 0x012
+#define DPMCP_CMDID_GET_IRQ_ENABLE 0x013
+#define DPMCP_CMDID_SET_IRQ_MASK 0x014
+#define DPMCP_CMDID_GET_IRQ_MASK 0x015
+#define DPMCP_CMDID_GET_IRQ_STATUS 0x016
+#define DPMCP_CMDID_CLEAR_IRQ_STATUS 0x017
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_CREATE(cmd, cfg) \
+ MC_CMD_OP(cmd, 0, 0, 32, int, cfg->portal_id)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_SET_IRQ(cmd, irq_index, irq_addr, irq_val, user_irq_id) \
+do { \
+ MC_CMD_OP(cmd, 0, 0, 8, uint8_t, irq_index);\
+ MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_val);\
+ MC_CMD_OP(cmd, 1, 0, 64, uint64_t, irq_addr); \
+ MC_CMD_OP(cmd, 2, 0, 32, int, user_irq_id); \
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_GET_IRQ(cmd, irq_index) \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_IRQ(cmd, type, irq_addr, irq_val, user_irq_id) \
+do { \
+ MC_RSP_OP(cmd, 0, 0, 32, uint32_t, irq_val); \
+ MC_RSP_OP(cmd, 1, 0, 64, uint64_t, irq_addr); \
+ MC_RSP_OP(cmd, 2, 0, 32, int, user_irq_id); \
+ MC_RSP_OP(cmd, 2, 32, 32, int, type); \
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
+do { \
+ MC_CMD_OP(cmd, 0, 0, 8, uint8_t, en); \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_IRQ_ENABLE(cmd, en) \
+ MC_RSP_OP(cmd, 0, 0, 8, uint8_t, en)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
+do { \
+ MC_CMD_OP(cmd, 0, 0, 32, uint32_t, mask);\
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_GET_IRQ_MASK(cmd, irq_index) \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_IRQ_MASK(cmd, mask) \
+ MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mask)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_GET_IRQ_STATUS(cmd, irq_index) \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_IRQ_STATUS(cmd, status) \
+ MC_RSP_OP(cmd, 0, 0, 32, uint32_t, status)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
+do { \
+ MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status); \
+ MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
+} while (0)
+
+/* cmd, param, offset, width, type, arg_name */
+#define DPMCP_RSP_GET_ATTRIBUTES(cmd, attr) \
+do { \
+ MC_RSP_OP(cmd, 0, 32, 32, int, attr->id);\
+ MC_RSP_OP(cmd, 1, 0, 16, uint16_t, attr->version.major);\
+ MC_RSP_OP(cmd, 1, 16, 16, uint16_t, attr->version.minor);\
+} while (0)
+
+#endif /* _FSL_DPMCP_CMD_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include "dpmcp.h"
+#include "dpmcp-cmd.h"
+
+int dpmcp_open(struct fsl_mc_io *mc_io, int dpmcp_id, uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_OPEN,
+ MC_CMD_PRI_LOW, 0);
+ cmd.params[0] |= mc_enc(0, 32, dpmcp_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return err;
+}
+
+int dpmcp_close(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CLOSE, MC_CMD_PRI_HIGH,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_create(struct fsl_mc_io *mc_io,
+ const struct dpmcp_cfg *cfg,
+ uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CREATE,
+ MC_CMD_PRI_LOW, 0);
+ cmd.params[0] |= mc_enc(0, 32, cfg->portal_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return 0;
+}
+
+int dpmcp_destroy(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_DESTROY,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_reset(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_RESET,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_addr,
+ uint32_t irq_val,
+ int user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, irq_index);
+ cmd.params[0] |= mc_enc(32, 32, irq_val);
+ cmd.params[1] |= mc_enc(0, 64, irq_addr);
+ cmd.params[2] |= mc_enc(0, 32, user_irq_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_addr,
+ uint32_t *irq_val,
+ int *user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *irq_val = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ *irq_addr = (uint64_t)mc_dec(cmd.params[1], 0, 64);
+ *user_irq_id = (int)mc_dec(cmd.params[2], 0, 32);
+ *type = (int)mc_dec(cmd.params[2], 32, 32);
+ return 0;
+}
+
+int dpmcp_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, en);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *en = (uint8_t)mc_dec(cmd.params[0], 0, 8);
+ return 0;
+}
+
+int dpmcp_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_SET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, mask);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *mask = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ return 0;
+}
+
+int dpmcp_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *status = (uint32_t)mc_dec(cmd.params[0], 0, 32);
+ return 0;
+}
+
+int dpmcp_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CLEAR_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, status);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dpmcp_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dpmcp_attr *attr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMCP_CMDID_GET_ATTR,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ attr->id = (int)mc_dec(cmd.params[0], 32, 32);
+ attr->version.major = (uint16_t)mc_dec(cmd.params[1], 0, 16);
+ attr->version.minor = (uint16_t)mc_dec(cmd.params[1], 16, 16);
+ return 0;
+}
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_DPMCP_H
+#define __FSL_DPMCP_H
+
+/* Data Path Management Command Portal API
+ * Contains initialization APIs and runtime control APIs for DPMCP
+ */
+
+struct fsl_mc_io;
+
+/**
+ * dpmcp_open() - Open a control session for the specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dpmcp_id: DPMCP unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpmcp_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_open(struct fsl_mc_io *mc_io, int dpmcp_id, uint16_t *token);
+
+/* Get portal ID from pool */
+#define DPMCP_GET_PORTAL_ID_FROM_POOL (-1)
+
+/**
+ * dpmcp_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_close(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * struct dpmcp_cfg() - Structure representing DPMCP configuration
+ * @portal_id: Portal ID; 'DPMCP_GET_PORTAL_ID_FROM_POOL' to get the portal ID
+ * from pool
+ */
+struct dpmcp_cfg {
+ int portal_id;
+};
+
+/**
+ * dpmcp_create() - Create the DPMCP object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cfg: Configuration structure
+ * @token: Returned token; use in subsequent API calls
+ *
+ * Create the DPMCP object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent calls to
+ * this specific object. For objects that are created using the
+ * DPL file, call dpmcp_open function to get an authentication
+ * token first.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_create(struct fsl_mc_io *mc_io,
+ const struct dpmcp_cfg *cfg,
+ uint16_t *token);
+
+/**
+ * dpmcp_destroy() - Destroy the DPMCP object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
+int dpmcp_destroy(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpmcp_reset() - Reset the DPMCP, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_reset(struct fsl_mc_io *mc_io, uint16_t token);
+
+/* IRQ */
+/*!
+ * @name dpmcp IRQ Index and Events
+ */
+#define DPMCP_IRQ_INDEX 0
+/*!< Irq index */
+#define DPMCP_IRQ_EVENT_CMD_DONE 0x00000001
+/*!< irq event - Indicates that the link state changed */
+/* @} */
+
+/**
+ * dpmcp_set_irq() - Set IRQ information for the DPMCP to trigger an interrupt.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: Identifies the interrupt index to configure
+ * @irq_addr: Address that must be written to
+ * signal a message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_addr,
+ uint32_t irq_val,
+ int user_irq_id);
+
+/**
+ * dpmcp_get_irq() - Get IRQ information from the DPMCP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @type: Interrupt type: 0 represents message interrupt
+ * type (both irq_addr and irq_val are valid)
+ * @irq_addr: Returned address that must be written to
+ * signal the message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_addr,
+ uint32_t *irq_val,
+ int *user_irq_id);
+
+/**
+ * dpmcp_set_irq_enable() - Set overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @en: Interrupt state - enable = 1, disable = 0
+ *
+ * Allows GPP software to control when interrupts are generated.
+ * Each interrupt can have up to 32 causes. The enable/disable control's the
+ * overall interrupt state. if the interrupt is disabled no causes will cause
+ * an interrupt.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+/**
+ * dpmcp_get_irq_enable() - Get overall interrupt state
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @en: Returned interrupt state - enable = 1, disable = 0
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+/**
+ * dpmcp_set_irq_mask() - Set interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @mask: Event mask to trigger interrupt;
+ * each bit:
+ * 0 = ignore event
+ * 1 = consider event for asserting IRQ
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+/**
+ * dpmcp_get_irq_mask() - Get interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @mask: Returned event mask to trigger interrupt
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+/**
+ * dpmcp_get_irq_status() - Get the current status of any pending interrupts.
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @status: Returned interrupts status - one bit per cause:
+ * 0 = no interrupt pending
+ * 1 = interrupt pending
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+/**
+ * dpmcp_clear_irq_status() - Clear a pending interrupt's status
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @irq_index: The interrupt index to configure
+ * @status: Bits to clear (W1C) - one bit per cause:
+ * 0 = don't change
+ * 1 = clear status bit
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
+ * struct dpmcp_attr - Structure representing DPMCP attributes
+ * @id: DPMCP object ID
+ * @version: DPMCP version
+ */
+struct dpmcp_attr {
+ int id;
+ /**
+ * struct version - Structure representing DPMCP version
+ * @major: DPMCP major version
+ * @minor: DPMCP minor version
+ */
+ struct {
+ uint16_t major;
+ uint16_t minor;
+ } version;
+};
+
+/**
+ * dpmcp_get_attributes - Retrieve DPMCP attributes.
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPMCP object
+ * @attr: Returned object's attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmcp_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dpmcp_attr *attr);
+
+#endif /* __FSL_DPMCP_H */
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*************************************************************************//*
+ dpmng-cmd.h
+
+ defines portal commands
+
+ *//**************************************************************************/
+
+#ifndef __FSL_DPMNG_CMD_H
+#define __FSL_DPMNG_CMD_H
+
+/* Command IDs */
+#define DPMNG_CMDID_GET_CONT_ID 0x830
+#define DPMNG_CMDID_GET_VERSION 0x831
+
+#endif /* __FSL_DPMNG_CMD_H */
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include "../include/dpmng.h"
+#include "dpmng-cmd.h"
+
+int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_VERSION,
+ MC_CMD_PRI_LOW, 0);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ mc_ver_info->revision = mc_dec(cmd.params[0], 0, 32);
+ mc_ver_info->major = mc_dec(cmd.params[0], 32, 32);
+ mc_ver_info->minor = mc_dec(cmd.params[1], 0, 32);
+
+ return 0;
+}
+
+int dpmng_get_container_id(struct fsl_mc_io *mc_io, int *container_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPMNG_CMDID_GET_CONT_ID,
+ MC_CMD_PRI_LOW, 0);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *container_id = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*************************************************************************//*
+ dprc-cmd.h
+
+ defines dprc portal commands
+
+ *//**************************************************************************/
+
+#ifndef _FSL_DPRC_CMD_H
+#define _FSL_DPRC_CMD_H
+
+/* DPRC Version */
+#define DPRC_VER_MAJOR 3
+#define DPRC_VER_MINOR 0
+
+/* Command IDs */
+#define DPRC_CMDID_CLOSE 0x800
+#define DPRC_CMDID_OPEN 0x805
+#define DPRC_CMDID_CREATE 0x905
+
+#define DPRC_CMDID_GET_ATTR 0x004
+#define DPRC_CMDID_RESET_CONT 0x005
+
+#define DPRC_CMDID_SET_IRQ 0x010
+#define DPRC_CMDID_GET_IRQ 0x011
+#define DPRC_CMDID_SET_IRQ_ENABLE 0x012
+#define DPRC_CMDID_GET_IRQ_ENABLE 0x013
+#define DPRC_CMDID_SET_IRQ_MASK 0x014
+#define DPRC_CMDID_GET_IRQ_MASK 0x015
+#define DPRC_CMDID_GET_IRQ_STATUS 0x016
+#define DPRC_CMDID_CLEAR_IRQ_STATUS 0x017
+
+#define DPRC_CMDID_CREATE_CONT 0x151
+#define DPRC_CMDID_DESTROY_CONT 0x152
+#define DPRC_CMDID_SET_RES_QUOTA 0x155
+#define DPRC_CMDID_GET_RES_QUOTA 0x156
+#define DPRC_CMDID_ASSIGN 0x157
+#define DPRC_CMDID_UNASSIGN 0x158
+#define DPRC_CMDID_GET_OBJ_COUNT 0x159
+#define DPRC_CMDID_GET_OBJ 0x15A
+#define DPRC_CMDID_GET_RES_COUNT 0x15B
+#define DPRC_CMDID_GET_RES_IDS 0x15C
+#define DPRC_CMDID_GET_OBJ_REG 0x15E
+
+#define DPRC_CMDID_CONNECT 0x167
+#define DPRC_CMDID_DISCONNECT 0x168
+#define DPRC_CMDID_GET_POOL 0x169
+#define DPRC_CMDID_GET_POOL_COUNT 0x16A
+#define DPRC_CMDID_GET_PORTAL_PADDR 0x16B
+
+#define DPRC_CMDID_GET_CONNECTION 0x16C
+
+#endif /* _FSL_DPRC_CMD_H */
--- /dev/null
+/*
+ * Freescale data path resource container (DPRC) driver
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Author: German Rivera <German.Rivera@freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "../include/mc-private.h"
+#include "../include/mc-sys.h"
+#include <linux/module.h>
+#include <linux/slab.h>
+#include "dprc-cmd.h"
+
+struct dprc_child_objs {
+ int child_count;
+ struct dprc_obj_desc *child_array;
+};
+
+static int __fsl_mc_device_remove_if_not_in_mc(struct device *dev, void *data)
+{
+ int i;
+ struct dprc_child_objs *objs;
+ struct fsl_mc_device *mc_dev;
+
+ WARN_ON(!dev);
+ WARN_ON(!data);
+ mc_dev = to_fsl_mc_device(dev);
+ objs = data;
+
+ for (i = 0; i < objs->child_count; i++) {
+ struct dprc_obj_desc *obj_desc = &objs->child_array[i];
+
+ if (strlen(obj_desc->type) != 0 &&
+ FSL_MC_DEVICE_MATCH(mc_dev, obj_desc))
+ break;
+ }
+
+ if (i == objs->child_count)
+ fsl_mc_device_remove(mc_dev);
+
+ return 0;
+}
+
+static int __fsl_mc_device_remove(struct device *dev, void *data)
+{
+ WARN_ON(!dev);
+ WARN_ON(data);
+ fsl_mc_device_remove(to_fsl_mc_device(dev));
+ return 0;
+}
+
+/**
+ * dprc_remove_devices - Removes devices for objects removed from a DPRC
+ *
+ * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
+ * @obj_desc_array: array of object descriptors for child objects currently
+ * present in the DPRC in the MC.
+ * @num_child_objects_in_mc: number of entries in obj_desc_array
+ *
+ * Synchronizes the state of the Linux bus driver with the actual state of
+ * the MC by removing devices that represent MC objects that have
+ * been dynamically removed in the physical DPRC.
+ */
+static void dprc_remove_devices(struct fsl_mc_device *mc_bus_dev,
+ struct dprc_obj_desc *obj_desc_array,
+ int num_child_objects_in_mc)
+{
+ if (num_child_objects_in_mc != 0) {
+ /*
+ * Remove child objects that are in the DPRC in Linux,
+ * but not in the MC:
+ */
+ struct dprc_child_objs objs;
+
+ objs.child_count = num_child_objects_in_mc;
+ objs.child_array = obj_desc_array;
+ device_for_each_child(&mc_bus_dev->dev, &objs,
+ __fsl_mc_device_remove_if_not_in_mc);
+ } else {
+ /*
+ * There are no child objects for this DPRC in the MC.
+ * So, remove all the child devices from Linux:
+ */
+ device_for_each_child(&mc_bus_dev->dev, NULL,
+ __fsl_mc_device_remove);
+ }
+}
+
+static int __fsl_mc_device_match(struct device *dev, void *data)
+{
+ struct dprc_obj_desc *obj_desc = data;
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+
+ return FSL_MC_DEVICE_MATCH(mc_dev, obj_desc);
+}
+
+static struct fsl_mc_device *fsl_mc_device_lookup(struct dprc_obj_desc
+ *obj_desc,
+ struct fsl_mc_device
+ *mc_bus_dev)
+{
+ struct device *dev;
+
+ dev = device_find_child(&mc_bus_dev->dev, obj_desc,
+ __fsl_mc_device_match);
+
+ return dev ? to_fsl_mc_device(dev) : NULL;
+}
+
+/**
+ * dprc_add_new_devices - Adds devices to the logical bus for a DPRC
+ *
+ * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
+ * @obj_desc_array: array of device descriptors for child devices currently
+ * present in the physical DPRC.
+ * @num_child_objects_in_mc: number of entries in obj_desc_array
+ *
+ * Synchronizes the state of the Linux bus driver with the actual
+ * state of the MC by adding objects that have been newly discovered
+ * in the physical DPRC.
+ */
+static void dprc_add_new_devices(struct fsl_mc_device *mc_bus_dev,
+ struct dprc_obj_desc *obj_desc_array,
+ int num_child_objects_in_mc)
+{
+ int error;
+ int i;
+
+ for (i = 0; i < num_child_objects_in_mc; i++) {
+ struct fsl_mc_device *child_dev;
+ struct fsl_mc_io *mc_io = NULL;
+ struct dprc_obj_desc *obj_desc = &obj_desc_array[i];
+
+ if (strlen(obj_desc->type) == 0)
+ continue;
+
+ /*
+ * Check if device is already known to Linux:
+ */
+ child_dev = fsl_mc_device_lookup(obj_desc, mc_bus_dev);
+ if (child_dev)
+ continue;
+
+ error = fsl_mc_device_add(obj_desc, mc_io, &mc_bus_dev->dev,
+ &child_dev);
+ if (error < 0) {
+ if (mc_io)
+ fsl_destroy_mc_io(mc_io);
+
+ continue;
+ }
+ }
+}
+
+static void dprc_init_all_resource_pools(struct fsl_mc_device *mc_bus_dev)
+{
+ int pool_type;
+ struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
+
+ for (pool_type = 0; pool_type < FSL_MC_NUM_POOL_TYPES; pool_type++) {
+ struct fsl_mc_resource_pool *res_pool =
+ &mc_bus->resource_pools[pool_type];
+
+ res_pool->type = pool_type;
+ res_pool->max_count = 0;
+ res_pool->free_count = 0;
+ res_pool->mc_bus = mc_bus;
+ INIT_LIST_HEAD(&res_pool->free_list);
+ mutex_init(&res_pool->mutex);
+ }
+}
+
+static void dprc_cleanup_resource_pool(struct fsl_mc_device *mc_bus_dev,
+ enum fsl_mc_pool_type pool_type)
+{
+ struct fsl_mc_resource *resource;
+ struct fsl_mc_resource *next;
+ struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ struct fsl_mc_resource_pool *res_pool =
+ &mc_bus->resource_pools[pool_type];
+ int free_count = 0;
+
+ WARN_ON(res_pool->type != pool_type);
+ WARN_ON(res_pool->free_count != res_pool->max_count);
+
+ list_for_each_entry_safe(resource, next, &res_pool->free_list, node) {
+ free_count++;
+ WARN_ON(resource->type != res_pool->type);
+ WARN_ON(resource->parent_pool != res_pool);
+ devm_kfree(&mc_bus_dev->dev, resource);
+ }
+
+ WARN_ON(free_count != res_pool->free_count);
+}
+
+static void dprc_cleanup_all_resource_pools(struct fsl_mc_device *mc_bus_dev)
+{
+ int pool_type;
+
+ for (pool_type = 0; pool_type < FSL_MC_NUM_POOL_TYPES; pool_type++)
+ dprc_cleanup_resource_pool(mc_bus_dev, pool_type);
+}
+
+static void reorder_obj_desc_array(struct dprc_obj_desc *obj_desc_array,
+ int num_devs)
+{
+ struct dprc_obj_desc tmp;
+ struct dprc_obj_desc *top_cursor = &obj_desc_array[0];
+ struct dprc_obj_desc *bottom_cursor = &obj_desc_array[num_devs - 1];
+
+ /*
+ * Reorder entries in obj_desc_array so that all allocatable devices
+ * are placed before all non-allocatable devices:
+ *
+ * Loop Invariant: everything before top_cursor is allocatable and
+ * everything after bottom_cursor is non-allocatable.
+ */
+ while (top_cursor < bottom_cursor) {
+ if (FSL_MC_IS_ALLOCATABLE(top_cursor->type)) {
+ top_cursor++;
+ } else {
+ if (FSL_MC_IS_ALLOCATABLE(bottom_cursor->type)) {
+ tmp = *bottom_cursor;
+ *bottom_cursor = *top_cursor;
+ *top_cursor = tmp;
+ top_cursor++;
+ }
+
+ bottom_cursor--;
+ }
+ }
+}
+
+/**
+ * dprc_scan_objects - Discover objects in a DPRC
+ *
+ * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
+ *
+ * Detects objects added and removed from a DPRC and synchronizes the
+ * state of the Linux bus driver, MC by adding and removing
+ * devices accordingly.
+ * Two types of devices can be found in a DPRC: allocatable objects (e.g.,
+ * dpbp, dpmcp) and non-allocatable devices (e.g., dprc, dpni).
+ * All allocatable devices needed to be probed before all non-allocatable
+ * devices, to ensure that device drivers for non-allocatable
+ * devices can allocate any type of allocatable devices.
+ * That is, we need to ensure that the corresponding resource pools are
+ * populated before they can get allocation requests from probe callbacks
+ * of the device drivers for the non-allocatable devices.
+ */
+int dprc_scan_objects(struct fsl_mc_device *mc_bus_dev)
+{
+ int num_child_objects;
+ int dprc_get_obj_failures;
+ int error;
+ struct dprc_obj_desc *child_obj_desc_array = NULL;
+
+ error = dprc_get_obj_count(mc_bus_dev->mc_io,
+ mc_bus_dev->mc_handle,
+ &num_child_objects);
+ if (error < 0) {
+ dev_err(&mc_bus_dev->dev, "dprc_get_obj_count() failed: %d\n",
+ error);
+ return error;
+ }
+
+ if (num_child_objects != 0) {
+ int i;
+
+ child_obj_desc_array =
+ devm_kmalloc_array(&mc_bus_dev->dev, num_child_objects,
+ sizeof(*child_obj_desc_array),
+ GFP_KERNEL);
+ if (!child_obj_desc_array)
+ return -ENOMEM;
+
+ /*
+ * Discover objects currently present in the physical DPRC:
+ */
+ dprc_get_obj_failures = 0;
+ for (i = 0; i < num_child_objects; i++) {
+ struct dprc_obj_desc *obj_desc =
+ &child_obj_desc_array[i];
+
+ error = dprc_get_obj(mc_bus_dev->mc_io,
+ mc_bus_dev->mc_handle,
+ i, obj_desc);
+ if (error < 0) {
+ dev_err(&mc_bus_dev->dev,
+ "dprc_get_obj(i=%d) failed: %d\n",
+ i, error);
+ /*
+ * Mark the obj entry as "invalid", by using the
+ * empty string as obj type:
+ */
+ obj_desc->type[0] = '\0';
+ obj_desc->id = error;
+ dprc_get_obj_failures++;
+ continue;
+ }
+
+ dev_dbg(&mc_bus_dev->dev,
+ "Discovered object: type %s, id %d\n",
+ obj_desc->type, obj_desc->id);
+ }
+
+ if (dprc_get_obj_failures != 0) {
+ dev_err(&mc_bus_dev->dev,
+ "%d out of %d devices could not be retrieved\n",
+ dprc_get_obj_failures, num_child_objects);
+ }
+
+ reorder_obj_desc_array(child_obj_desc_array, num_child_objects);
+ }
+
+ dprc_remove_devices(mc_bus_dev, child_obj_desc_array,
+ num_child_objects);
+
+ dprc_add_new_devices(mc_bus_dev, child_obj_desc_array,
+ num_child_objects);
+
+ if (child_obj_desc_array)
+ devm_kfree(&mc_bus_dev->dev, child_obj_desc_array);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(dprc_scan_objects);
+
+/**
+ * dprc_scan_container - Scans a physical DPRC and synchronizes Linux bus state
+ *
+ * @mc_bus_dev: pointer to the fsl-mc device that represents a DPRC object
+ *
+ * Scans the physical DPRC and synchronizes the state of the Linux
+ * bus driver with the actual state of the MC by adding and removing
+ * devices as appropriate.
+ */
+int dprc_scan_container(struct fsl_mc_device *mc_bus_dev)
+{
+ int error;
+ struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev);
+
+ dprc_init_all_resource_pools(mc_bus_dev);
+
+ /*
+ * Discover objects in the DPRC:
+ */
+ mutex_lock(&mc_bus->scan_mutex);
+ error = dprc_scan_objects(mc_bus_dev);
+ mutex_unlock(&mc_bus->scan_mutex);
+ if (error < 0)
+ goto error;
+
+ return 0;
+error:
+ dprc_cleanup_all_resource_pools(mc_bus_dev);
+ return error;
+}
+EXPORT_SYMBOL_GPL(dprc_scan_container);
+
+/**
+ * dprc_probe - callback invoked when a DPRC is being bound to this driver
+ *
+ * @mc_dev: Pointer to fsl-mc device representing a DPRC
+ *
+ * It opens the physical DPRC in the MC.
+ * It scans the DPRC to discover the MC objects contained in it.
+ * It creates the interrupt pool for the MC bus associated with the DPRC.
+ * It configures the interrupts for the DPRC device itself.
+ */
+static int dprc_probe(struct fsl_mc_device *mc_dev)
+{
+ int error;
+ size_t region_size;
+ struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_dev);
+
+ if (WARN_ON(strcmp(mc_dev->obj_desc.type, "dprc") != 0))
+ return -EINVAL;
+
+ if (!mc_dev->mc_io) {
+ /*
+ * This is a child DPRC:
+ */
+ if (WARN_ON(mc_dev->obj_desc.region_count == 0))
+ return -EINVAL;
+
+ region_size = mc_dev->regions[0].end -
+ mc_dev->regions[0].start + 1;
+
+ error = fsl_create_mc_io(&mc_dev->dev,
+ mc_dev->regions[0].start,
+ region_size,
+ NULL, 0, &mc_dev->mc_io);
+ if (error < 0)
+ return error;
+ }
+
+ error = dprc_open(mc_dev->mc_io, mc_dev->obj_desc.id,
+ &mc_dev->mc_handle);
+ if (error < 0) {
+ dev_err(&mc_dev->dev, "dprc_open() failed: %d\n", error);
+ goto error_cleanup_mc_io;
+ }
+
+ mutex_init(&mc_bus->scan_mutex);
+
+ /*
+ * Discover MC objects in DPRC object:
+ */
+ error = dprc_scan_container(mc_dev);
+ if (error < 0)
+ goto error_cleanup_open;
+
+ dev_info(&mc_dev->dev, "DPRC device bound to driver");
+ return 0;
+
+error_cleanup_open:
+ (void)dprc_close(mc_dev->mc_io, mc_dev->mc_handle);
+
+error_cleanup_mc_io:
+ fsl_destroy_mc_io(mc_dev->mc_io);
+ return error;
+}
+
+/**
+ * dprc_remove - callback invoked when a DPRC is being unbound from this driver
+ *
+ * @mc_dev: Pointer to fsl-mc device representing the DPRC
+ *
+ * It removes the DPRC's child objects from Linux (not from the MC) and
+ * closes the DPRC device in the MC.
+ * It tears down the interrupts that were configured for the DPRC device.
+ * It destroys the interrupt pool associated with this MC bus.
+ */
+static int dprc_remove(struct fsl_mc_device *mc_dev)
+{
+ int error;
+
+ if (WARN_ON(strcmp(mc_dev->obj_desc.type, "dprc") != 0))
+ return -EINVAL;
+ if (WARN_ON(!mc_dev->mc_io))
+ return -EINVAL;
+
+ device_for_each_child(&mc_dev->dev, NULL, __fsl_mc_device_remove);
+ dprc_cleanup_all_resource_pools(mc_dev);
+ error = dprc_close(mc_dev->mc_io, mc_dev->mc_handle);
+ if (error < 0)
+ dev_err(&mc_dev->dev, "dprc_close() failed: %d\n", error);
+
+ dev_info(&mc_dev->dev, "DPRC device unbound from driver");
+ return 0;
+}
+
+static const struct fsl_mc_device_match_id match_id_table[] = {
+ {
+ .vendor = FSL_MC_VENDOR_FREESCALE,
+ .obj_type = "dprc",
+ .ver_major = DPRC_VER_MAJOR,
+ .ver_minor = DPRC_VER_MINOR},
+ {.vendor = 0x0},
+};
+
+static struct fsl_mc_driver dprc_driver = {
+ .driver = {
+ .name = FSL_MC_DPRC_DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .pm = NULL,
+ },
+ .match_id_table = match_id_table,
+ .probe = dprc_probe,
+ .remove = dprc_remove,
+};
+
+int __init dprc_driver_init(void)
+{
+ return fsl_mc_driver_register(&dprc_driver);
+}
+
+void __exit dprc_driver_exit(void)
+{
+ fsl_mc_driver_unregister(&dprc_driver);
+}
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include "../include/dprc.h"
+#include "dprc-cmd.h"
+
+int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_OPEN, MC_CMD_PRI_LOW,
+ 0);
+ cmd.params[0] |= mc_enc(0, 32, container_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_open);
+
+int dprc_close(struct fsl_mc_io *mc_io, uint16_t token)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLOSE, MC_CMD_PRI_HIGH,
+ token);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+EXPORT_SYMBOL(dprc_close);
+
+int dprc_create_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dprc_cfg *cfg,
+ int *child_container_id,
+ uint64_t *child_portal_paddr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.params[0] |= mc_enc(32, 16, cfg->icid);
+ cmd.params[0] |= mc_enc(0, 32, cfg->options);
+ cmd.params[1] |= mc_enc(32, 32, cfg->portal_id);
+
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_CREATE_CONT,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *child_container_id = mc_dec(cmd.params[1], 0, 32);
+ *child_portal_paddr = mc_dec(cmd.params[2], 0, 64);
+
+ return 0;
+}
+
+int dprc_destroy_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_DESTROY_CONT,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_reset_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_RESET_CONT,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_paddr,
+ uint32_t *irq_val,
+ int *user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *irq_val = mc_dec(cmd.params[0], 0, 32);
+ *irq_paddr = mc_dec(cmd.params[1], 0, 64);
+ *user_irq_id = mc_dec(cmd.params[2], 0, 32);
+ *type = mc_dec(cmd.params[2], 32, 32);
+
+ return 0;
+}
+
+int dprc_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_paddr,
+ uint32_t irq_val,
+ int user_irq_id)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+ cmd.params[0] |= mc_enc(0, 32, irq_val);
+ cmd.params[1] |= mc_enc(0, 64, irq_paddr);
+ cmd.params[2] |= mc_enc(0, 32, user_irq_id);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *en = mc_dec(cmd.params[0], 0, 8);
+
+ return 0;
+}
+
+int dprc_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ_ENABLE,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 8, en);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *mask = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+
+int dprc_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_IRQ_MASK,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, mask);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *status = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+
+int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_CLEAR_IRQ_STATUS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, status);
+ cmd.params[0] |= mc_enc(32, 8, irq_index);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dprc_attributes *attr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_ATTR,
+ MC_CMD_PRI_LOW,
+ token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ attr->container_id = mc_dec(cmd.params[0], 0, 32);
+ attr->icid = mc_dec(cmd.params[0], 32, 16);
+ attr->options = mc_dec(cmd.params[1], 0, 32);
+ attr->portal_id = mc_dec(cmd.params[1], 32, 32);
+ attr->version.major = mc_dec(cmd.params[2], 0, 16);
+ attr->version.minor = mc_dec(cmd.params[2], 16, 16);
+
+ return 0;
+}
+
+int dprc_set_res_quota(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ char *type,
+ uint16_t quota)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_SET_RES_QUOTA,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+ cmd.params[0] |= mc_enc(32, 16, quota);
+ cmd.params[1] |= mc_enc(0, 8, type[0]);
+ cmd.params[1] |= mc_enc(8, 8, type[1]);
+ cmd.params[1] |= mc_enc(16, 8, type[2]);
+ cmd.params[1] |= mc_enc(24, 8, type[3]);
+ cmd.params[1] |= mc_enc(32, 8, type[4]);
+ cmd.params[1] |= mc_enc(40, 8, type[5]);
+ cmd.params[1] |= mc_enc(48, 8, type[6]);
+ cmd.params[1] |= mc_enc(56, 8, type[7]);
+ cmd.params[2] |= mc_enc(0, 8, type[8]);
+ cmd.params[2] |= mc_enc(8, 8, type[9]);
+ cmd.params[2] |= mc_enc(16, 8, type[10]);
+ cmd.params[2] |= mc_enc(24, 8, type[11]);
+ cmd.params[2] |= mc_enc(32, 8, type[12]);
+ cmd.params[2] |= mc_enc(40, 8, type[13]);
+ cmd.params[2] |= mc_enc(48, 8, type[14]);
+ cmd.params[2] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_res_quota(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ char *type,
+ uint16_t *quota)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_QUOTA,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+ cmd.params[1] |= mc_enc(0, 8, type[0]);
+ cmd.params[1] |= mc_enc(8, 8, type[1]);
+ cmd.params[1] |= mc_enc(16, 8, type[2]);
+ cmd.params[1] |= mc_enc(24, 8, type[3]);
+ cmd.params[1] |= mc_enc(32, 8, type[4]);
+ cmd.params[1] |= mc_enc(40, 8, type[5]);
+ cmd.params[1] |= mc_enc(48, 8, type[6]);
+ cmd.params[1] |= mc_enc(56, 8, type[7]);
+ cmd.params[2] |= mc_enc(0, 8, type[8]);
+ cmd.params[2] |= mc_enc(8, 8, type[9]);
+ cmd.params[2] |= mc_enc(16, 8, type[10]);
+ cmd.params[2] |= mc_enc(24, 8, type[11]);
+ cmd.params[2] |= mc_enc(32, 8, type[12]);
+ cmd.params[2] |= mc_enc(40, 8, type[13]);
+ cmd.params[2] |= mc_enc(48, 8, type[14]);
+ cmd.params[2] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *quota = mc_dec(cmd.params[0], 32, 16);
+
+ return 0;
+}
+
+int dprc_assign(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int container_id,
+ struct dprc_res_req *res_req)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_ASSIGN,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, container_id);
+ cmd.params[0] |= mc_enc(32, 32, res_req->options);
+ cmd.params[1] |= mc_enc(0, 32, res_req->num);
+ cmd.params[1] |= mc_enc(32, 32, res_req->id_base_align);
+ cmd.params[2] |= mc_enc(0, 8, res_req->type[0]);
+ cmd.params[2] |= mc_enc(8, 8, res_req->type[1]);
+ cmd.params[2] |= mc_enc(16, 8, res_req->type[2]);
+ cmd.params[2] |= mc_enc(24, 8, res_req->type[3]);
+ cmd.params[2] |= mc_enc(32, 8, res_req->type[4]);
+ cmd.params[2] |= mc_enc(40, 8, res_req->type[5]);
+ cmd.params[2] |= mc_enc(48, 8, res_req->type[6]);
+ cmd.params[2] |= mc_enc(56, 8, res_req->type[7]);
+ cmd.params[3] |= mc_enc(0, 8, res_req->type[8]);
+ cmd.params[3] |= mc_enc(8, 8, res_req->type[9]);
+ cmd.params[3] |= mc_enc(16, 8, res_req->type[10]);
+ cmd.params[3] |= mc_enc(24, 8, res_req->type[11]);
+ cmd.params[3] |= mc_enc(32, 8, res_req->type[12]);
+ cmd.params[3] |= mc_enc(40, 8, res_req->type[13]);
+ cmd.params[3] |= mc_enc(48, 8, res_req->type[14]);
+ cmd.params[3] |= mc_enc(56, 8, res_req->type[15]);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_unassign(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ struct dprc_res_req *res_req)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_UNASSIGN,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, child_container_id);
+ cmd.params[0] |= mc_enc(32, 32, res_req->options);
+ cmd.params[1] |= mc_enc(0, 32, res_req->num);
+ cmd.params[1] |= mc_enc(32, 32, res_req->id_base_align);
+ cmd.params[2] |= mc_enc(0, 8, res_req->type[0]);
+ cmd.params[2] |= mc_enc(8, 8, res_req->type[1]);
+ cmd.params[2] |= mc_enc(16, 8, res_req->type[2]);
+ cmd.params[2] |= mc_enc(24, 8, res_req->type[3]);
+ cmd.params[2] |= mc_enc(32, 8, res_req->type[4]);
+ cmd.params[2] |= mc_enc(40, 8, res_req->type[5]);
+ cmd.params[2] |= mc_enc(48, 8, res_req->type[6]);
+ cmd.params[2] |= mc_enc(56, 8, res_req->type[7]);
+ cmd.params[3] |= mc_enc(0, 8, res_req->type[8]);
+ cmd.params[3] |= mc_enc(8, 8, res_req->type[9]);
+ cmd.params[3] |= mc_enc(16, 8, res_req->type[10]);
+ cmd.params[3] |= mc_enc(24, 8, res_req->type[11]);
+ cmd.params[3] |= mc_enc(32, 8, res_req->type[12]);
+ cmd.params[3] |= mc_enc(40, 8, res_req->type[13]);
+ cmd.params[3] |= mc_enc(48, 8, res_req->type[14]);
+ cmd.params[3] |= mc_enc(56, 8, res_req->type[15]);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_pool_count(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int *pool_count)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL_COUNT,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *pool_count = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+
+int dprc_get_pool(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int pool_index,
+ char *type)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_POOL,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, pool_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ type[0] = mc_dec(cmd.params[1], 0, 8);
+ type[1] = mc_dec(cmd.params[1], 8, 8);
+ type[2] = mc_dec(cmd.params[1], 16, 8);
+ type[3] = mc_dec(cmd.params[1], 24, 8);
+ type[4] = mc_dec(cmd.params[1], 32, 8);
+ type[5] = mc_dec(cmd.params[1], 40, 8);
+ type[6] = mc_dec(cmd.params[1], 48, 8);
+ type[7] = mc_dec(cmd.params[1], 56, 8);
+ type[8] = mc_dec(cmd.params[2], 0, 8);
+ type[9] = mc_dec(cmd.params[2], 8, 8);
+ type[10] = mc_dec(cmd.params[2], 16, 8);
+ type[11] = mc_dec(cmd.params[2], 24, 8);
+ type[12] = mc_dec(cmd.params[2], 32, 8);
+ type[13] = mc_dec(cmd.params[2], 40, 8);
+ type[14] = mc_dec(cmd.params[2], 48, 8);
+ type[15] = '\0';
+
+ return 0;
+}
+
+int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_COUNT,
+ MC_CMD_PRI_LOW, token);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *obj_count = mc_dec(cmd.params[0], 32, 32);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_obj_count);
+
+int dprc_get_obj(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int obj_index,
+ struct dprc_obj_desc *obj_desc)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, obj_index);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ obj_desc->id = mc_dec(cmd.params[0], 32, 32);
+ obj_desc->vendor = mc_dec(cmd.params[1], 0, 16);
+ obj_desc->irq_count = mc_dec(cmd.params[1], 16, 8);
+ obj_desc->region_count = mc_dec(cmd.params[1], 24, 8);
+ obj_desc->state = mc_dec(cmd.params[1], 32, 32);
+ obj_desc->ver_major = mc_dec(cmd.params[2], 0, 16);
+ obj_desc->ver_minor = mc_dec(cmd.params[2], 16, 16);
+ obj_desc->type[0] = mc_dec(cmd.params[3], 0, 8);
+ obj_desc->type[1] = mc_dec(cmd.params[3], 8, 8);
+ obj_desc->type[2] = mc_dec(cmd.params[3], 16, 8);
+ obj_desc->type[3] = mc_dec(cmd.params[3], 24, 8);
+ obj_desc->type[4] = mc_dec(cmd.params[3], 32, 8);
+ obj_desc->type[5] = mc_dec(cmd.params[3], 40, 8);
+ obj_desc->type[6] = mc_dec(cmd.params[3], 48, 8);
+ obj_desc->type[7] = mc_dec(cmd.params[3], 56, 8);
+ obj_desc->type[8] = mc_dec(cmd.params[4], 0, 8);
+ obj_desc->type[9] = mc_dec(cmd.params[4], 8, 8);
+ obj_desc->type[10] = mc_dec(cmd.params[4], 16, 8);
+ obj_desc->type[11] = mc_dec(cmd.params[4], 24, 8);
+ obj_desc->type[12] = mc_dec(cmd.params[4], 32, 8);
+ obj_desc->type[13] = mc_dec(cmd.params[4], 40, 8);
+ obj_desc->type[14] = mc_dec(cmd.params[4], 48, 8);
+ obj_desc->type[15] = '\0';
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_obj);
+
+int dprc_get_res_count(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *type,
+ int *res_count)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ *res_count = 0;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_COUNT,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[1] |= mc_enc(0, 8, type[0]);
+ cmd.params[1] |= mc_enc(8, 8, type[1]);
+ cmd.params[1] |= mc_enc(16, 8, type[2]);
+ cmd.params[1] |= mc_enc(24, 8, type[3]);
+ cmd.params[1] |= mc_enc(32, 8, type[4]);
+ cmd.params[1] |= mc_enc(40, 8, type[5]);
+ cmd.params[1] |= mc_enc(48, 8, type[6]);
+ cmd.params[1] |= mc_enc(56, 8, type[7]);
+ cmd.params[2] |= mc_enc(0, 8, type[8]);
+ cmd.params[2] |= mc_enc(8, 8, type[9]);
+ cmd.params[2] |= mc_enc(16, 8, type[10]);
+ cmd.params[2] |= mc_enc(24, 8, type[11]);
+ cmd.params[2] |= mc_enc(32, 8, type[12]);
+ cmd.params[2] |= mc_enc(40, 8, type[13]);
+ cmd.params[2] |= mc_enc(48, 8, type[14]);
+ cmd.params[2] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *res_count = mc_dec(cmd.params[0], 0, 32);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_res_count);
+
+int dprc_get_res_ids(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *type,
+ struct dprc_res_ids_range_desc *range_desc)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_RES_IDS,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(42, 7, range_desc->iter_status);
+ cmd.params[1] |= mc_enc(0, 32, range_desc->base_id);
+ cmd.params[1] |= mc_enc(32, 32, range_desc->last_id);
+ cmd.params[2] |= mc_enc(0, 8, type[0]);
+ cmd.params[2] |= mc_enc(8, 8, type[1]);
+ cmd.params[2] |= mc_enc(16, 8, type[2]);
+ cmd.params[2] |= mc_enc(24, 8, type[3]);
+ cmd.params[2] |= mc_enc(32, 8, type[4]);
+ cmd.params[2] |= mc_enc(40, 8, type[5]);
+ cmd.params[2] |= mc_enc(48, 8, type[6]);
+ cmd.params[2] |= mc_enc(56, 8, type[7]);
+ cmd.params[3] |= mc_enc(0, 8, type[8]);
+ cmd.params[3] |= mc_enc(8, 8, type[9]);
+ cmd.params[3] |= mc_enc(16, 8, type[10]);
+ cmd.params[3] |= mc_enc(24, 8, type[11]);
+ cmd.params[3] |= mc_enc(32, 8, type[12]);
+ cmd.params[3] |= mc_enc(40, 8, type[13]);
+ cmd.params[3] |= mc_enc(48, 8, type[14]);
+ cmd.params[3] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ range_desc->iter_status = mc_dec(cmd.params[0], 42, 7);
+ range_desc->base_id = mc_dec(cmd.params[1], 0, 32);
+ range_desc->last_id = mc_dec(cmd.params[1], 32, 32);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_res_ids);
+
+int dprc_get_portal_paddr(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int portal_id,
+ uint64_t *portal_addr)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_PORTAL_PADDR,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, portal_id);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ *portal_addr = mc_dec(cmd.params[1], 0, 64);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_portal_paddr);
+
+int dprc_get_obj_region(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *obj_type,
+ int obj_id,
+ uint8_t region_index,
+ struct dprc_region_desc *region_desc)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_OBJ_REG,
+ MC_CMD_PRI_LOW, token);
+ cmd.params[0] |= mc_enc(0, 32, obj_id);
+ cmd.params[0] |= mc_enc(48, 8, region_index);
+ cmd.params[3] |= mc_enc(0, 8, obj_type[0]);
+ cmd.params[3] |= mc_enc(8, 8, obj_type[1]);
+ cmd.params[3] |= mc_enc(16, 8, obj_type[2]);
+ cmd.params[3] |= mc_enc(24, 8, obj_type[3]);
+ cmd.params[3] |= mc_enc(32, 8, obj_type[4]);
+ cmd.params[3] |= mc_enc(40, 8, obj_type[5]);
+ cmd.params[3] |= mc_enc(48, 8, obj_type[6]);
+ cmd.params[3] |= mc_enc(56, 8, obj_type[7]);
+ cmd.params[4] |= mc_enc(0, 8, obj_type[8]);
+ cmd.params[4] |= mc_enc(8, 8, obj_type[9]);
+ cmd.params[4] |= mc_enc(16, 8, obj_type[10]);
+ cmd.params[4] |= mc_enc(24, 8, obj_type[11]);
+ cmd.params[4] |= mc_enc(32, 8, obj_type[12]);
+ cmd.params[4] |= mc_enc(40, 8, obj_type[13]);
+ cmd.params[4] |= mc_enc(48, 8, obj_type[14]);
+ cmd.params[4] |= mc_enc(56, 8, '\0');
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ region_desc->base_paddr = mc_dec(cmd.params[1], 0, 64);
+ region_desc->size = mc_dec(cmd.params[2], 0, 32);
+
+ return 0;
+}
+EXPORT_SYMBOL(dprc_get_obj_region);
+
+int dprc_connect(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint1,
+ const struct dprc_endpoint *endpoint2)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_CONNECT,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, endpoint1->id);
+ cmd.params[0] |= mc_enc(32, 32, endpoint1->interface_id);
+ cmd.params[1] |= mc_enc(0, 32, endpoint2->id);
+ cmd.params[1] |= mc_enc(32, 32, endpoint2->interface_id);
+ cmd.params[2] |= mc_enc(0, 8, endpoint1->type[0]);
+ cmd.params[2] |= mc_enc(8, 8, endpoint1->type[1]);
+ cmd.params[2] |= mc_enc(16, 8, endpoint1->type[2]);
+ cmd.params[2] |= mc_enc(24, 8, endpoint1->type[3]);
+ cmd.params[2] |= mc_enc(32, 8, endpoint1->type[4]);
+ cmd.params[2] |= mc_enc(40, 8, endpoint1->type[5]);
+ cmd.params[2] |= mc_enc(48, 8, endpoint1->type[6]);
+ cmd.params[2] |= mc_enc(56, 8, endpoint1->type[7]);
+ cmd.params[3] |= mc_enc(0, 8, endpoint1->type[8]);
+ cmd.params[3] |= mc_enc(8, 8, endpoint1->type[9]);
+ cmd.params[3] |= mc_enc(16, 8, endpoint1->type[10]);
+ cmd.params[3] |= mc_enc(24, 8, endpoint1->type[11]);
+ cmd.params[3] |= mc_enc(32, 8, endpoint1->type[12]);
+ cmd.params[3] |= mc_enc(40, 8, endpoint1->type[13]);
+ cmd.params[3] |= mc_enc(48, 8, endpoint1->type[14]);
+ cmd.params[3] |= mc_enc(56, 8, endpoint1->type[15]);
+ cmd.params[5] |= mc_enc(0, 8, endpoint2->type[0]);
+ cmd.params[5] |= mc_enc(8, 8, endpoint2->type[1]);
+ cmd.params[5] |= mc_enc(16, 8, endpoint2->type[2]);
+ cmd.params[5] |= mc_enc(24, 8, endpoint2->type[3]);
+ cmd.params[5] |= mc_enc(32, 8, endpoint2->type[4]);
+ cmd.params[5] |= mc_enc(40, 8, endpoint2->type[5]);
+ cmd.params[5] |= mc_enc(48, 8, endpoint2->type[6]);
+ cmd.params[5] |= mc_enc(56, 8, endpoint2->type[7]);
+ cmd.params[6] |= mc_enc(0, 8, endpoint2->type[8]);
+ cmd.params[6] |= mc_enc(8, 8, endpoint2->type[9]);
+ cmd.params[6] |= mc_enc(16, 8, endpoint2->type[10]);
+ cmd.params[6] |= mc_enc(24, 8, endpoint2->type[11]);
+ cmd.params[6] |= mc_enc(32, 8, endpoint2->type[12]);
+ cmd.params[6] |= mc_enc(40, 8, endpoint2->type[13]);
+ cmd.params[6] |= mc_enc(48, 8, endpoint2->type[14]);
+ cmd.params[6] |= mc_enc(56, 8, endpoint2->type[15]);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_disconnect(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint)
+{
+ struct mc_command cmd = { 0 };
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_DISCONNECT,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, endpoint->id);
+ cmd.params[0] |= mc_enc(32, 32, endpoint->interface_id);
+ cmd.params[1] |= mc_enc(0, 8, endpoint->type[0]);
+ cmd.params[1] |= mc_enc(8, 8, endpoint->type[1]);
+ cmd.params[1] |= mc_enc(16, 8, endpoint->type[2]);
+ cmd.params[1] |= mc_enc(24, 8, endpoint->type[3]);
+ cmd.params[1] |= mc_enc(32, 8, endpoint->type[4]);
+ cmd.params[1] |= mc_enc(40, 8, endpoint->type[5]);
+ cmd.params[1] |= mc_enc(48, 8, endpoint->type[6]);
+ cmd.params[1] |= mc_enc(56, 8, endpoint->type[7]);
+ cmd.params[2] |= mc_enc(0, 8, endpoint->type[8]);
+ cmd.params[2] |= mc_enc(8, 8, endpoint->type[9]);
+ cmd.params[2] |= mc_enc(16, 8, endpoint->type[10]);
+ cmd.params[2] |= mc_enc(24, 8, endpoint->type[11]);
+ cmd.params[2] |= mc_enc(32, 8, endpoint->type[12]);
+ cmd.params[2] |= mc_enc(40, 8, endpoint->type[13]);
+ cmd.params[2] |= mc_enc(48, 8, endpoint->type[14]);
+ cmd.params[2] |= mc_enc(56, 8, endpoint->type[15]);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+int dprc_get_connection(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint1,
+ struct dprc_endpoint *endpoint2,
+ int *state)
+{
+ struct mc_command cmd = { 0 };
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPRC_CMDID_GET_CONNECTION,
+ MC_CMD_PRI_LOW,
+ token);
+ cmd.params[0] |= mc_enc(0, 32, endpoint1->id);
+ cmd.params[0] |= mc_enc(32, 32, endpoint1->interface_id);
+ cmd.params[1] |= mc_enc(0, 8, endpoint1->type[0]);
+ cmd.params[1] |= mc_enc(8, 8, endpoint1->type[1]);
+ cmd.params[1] |= mc_enc(16, 8, endpoint1->type[2]);
+ cmd.params[1] |= mc_enc(24, 8, endpoint1->type[3]);
+ cmd.params[1] |= mc_enc(32, 8, endpoint1->type[4]);
+ cmd.params[1] |= mc_enc(40, 8, endpoint1->type[5]);
+ cmd.params[1] |= mc_enc(48, 8, endpoint1->type[6]);
+ cmd.params[1] |= mc_enc(56, 8, endpoint1->type[7]);
+ cmd.params[2] |= mc_enc(0, 8, endpoint1->type[8]);
+ cmd.params[2] |= mc_enc(8, 8, endpoint1->type[9]);
+ cmd.params[2] |= mc_enc(16, 8, endpoint1->type[10]);
+ cmd.params[2] |= mc_enc(24, 8, endpoint1->type[11]);
+ cmd.params[2] |= mc_enc(32, 8, endpoint1->type[12]);
+ cmd.params[2] |= mc_enc(40, 8, endpoint1->type[13]);
+ cmd.params[2] |= mc_enc(48, 8, endpoint1->type[14]);
+ cmd.params[2] |= mc_enc(56, 8, endpoint1->type[15]);
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ endpoint2->id = mc_dec(cmd.params[3], 0, 32);
+ endpoint2->interface_id = mc_dec(cmd.params[3], 32, 32);
+ endpoint2->type[0] = mc_dec(cmd.params[4], 0, 8);
+ endpoint2->type[1] = mc_dec(cmd.params[4], 8, 8);
+ endpoint2->type[2] = mc_dec(cmd.params[4], 16, 8);
+ endpoint2->type[3] = mc_dec(cmd.params[4], 24, 8);
+ endpoint2->type[4] = mc_dec(cmd.params[4], 32, 8);
+ endpoint2->type[5] = mc_dec(cmd.params[4], 40, 8);
+ endpoint2->type[6] = mc_dec(cmd.params[4], 48, 8);
+ endpoint2->type[7] = mc_dec(cmd.params[4], 56, 8);
+ endpoint2->type[8] = mc_dec(cmd.params[5], 0, 8);
+ endpoint2->type[9] = mc_dec(cmd.params[5], 8, 8);
+ endpoint2->type[10] = mc_dec(cmd.params[5], 16, 8);
+ endpoint2->type[11] = mc_dec(cmd.params[5], 24, 8);
+ endpoint2->type[12] = mc_dec(cmd.params[5], 32, 8);
+ endpoint2->type[13] = mc_dec(cmd.params[5], 40, 8);
+ endpoint2->type[14] = mc_dec(cmd.params[5], 48, 8);
+ endpoint2->type[15] = mc_dec(cmd.params[5], 56, 8);
+ *state = mc_dec(cmd.params[6], 0, 32);
+
+ return 0;
+}
--- /dev/null
+/*
+ * Freescale MC object device allocator driver
+ *
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "../include/mc-private.h"
+#include "../include/mc-sys.h"
+#include <linux/module.h>
+#include "../include/dpbp-cmd.h"
+#include "../include/dpcon-cmd.h"
+#include "dpmcp-cmd.h"
+#include "dpmcp.h"
+
+/**
+ * fsl_mc_resource_pool_add_device - add allocatable device to a resource
+ * pool of a given MC bus
+ *
+ * @mc_bus: pointer to the MC bus
+ * @pool_type: MC bus pool type
+ * @mc_dev: Pointer to allocatable MC object device
+ *
+ * It adds an allocatable MC object device to a container's resource pool of
+ * the given resource type
+ */
+static int __must_check fsl_mc_resource_pool_add_device(struct fsl_mc_bus
+ *mc_bus,
+ enum fsl_mc_pool_type
+ pool_type,
+ struct fsl_mc_device
+ *mc_dev)
+{
+ struct fsl_mc_resource_pool *res_pool;
+ struct fsl_mc_resource *resource;
+ struct fsl_mc_device *mc_bus_dev = &mc_bus->mc_dev;
+ int error = -EINVAL;
+ bool mutex_locked = false;
+
+ if (WARN_ON(pool_type < 0 || pool_type >= FSL_MC_NUM_POOL_TYPES))
+ goto out;
+ if (WARN_ON(!FSL_MC_IS_ALLOCATABLE(mc_dev->obj_desc.type)))
+ goto out;
+ if (WARN_ON(mc_dev->resource))
+ goto out;
+
+ res_pool = &mc_bus->resource_pools[pool_type];
+ if (WARN_ON(res_pool->type != pool_type))
+ goto out;
+ if (WARN_ON(res_pool->mc_bus != mc_bus))
+ goto out;
+
+ mutex_lock(&res_pool->mutex);
+ mutex_locked = true;
+
+ if (WARN_ON(res_pool->max_count < 0))
+ goto out;
+ if (WARN_ON(res_pool->free_count < 0 ||
+ res_pool->free_count > res_pool->max_count))
+ goto out;
+
+ resource = devm_kzalloc(&mc_bus_dev->dev, sizeof(*resource),
+ GFP_KERNEL);
+ if (!resource) {
+ error = -ENOMEM;
+ dev_err(&mc_bus_dev->dev,
+ "Failed to allocate memory for fsl_mc_resource\n");
+ goto out;
+ }
+
+ resource->type = pool_type;
+ resource->id = mc_dev->obj_desc.id;
+ resource->data = mc_dev;
+ resource->parent_pool = res_pool;
+ INIT_LIST_HEAD(&resource->node);
+ list_add_tail(&resource->node, &res_pool->free_list);
+ mc_dev->resource = resource;
+ res_pool->free_count++;
+ res_pool->max_count++;
+ error = 0;
+out:
+ if (mutex_locked)
+ mutex_unlock(&res_pool->mutex);
+
+ return error;
+}
+
+/**
+ * fsl_mc_resource_pool_remove_device - remove an allocatable device from a
+ * resource pool
+ *
+ * @mc_dev: Pointer to allocatable MC object device
+ *
+ * It permanently removes an allocatable MC object device from the resource
+ * pool, the device is currently in, as long as it is in the pool's free list.
+ */
+static int __must_check fsl_mc_resource_pool_remove_device(struct fsl_mc_device
+ *mc_dev)
+{
+ struct fsl_mc_device *mc_bus_dev;
+ struct fsl_mc_bus *mc_bus;
+ struct fsl_mc_resource_pool *res_pool;
+ struct fsl_mc_resource *resource;
+ int error = -EINVAL;
+ bool mutex_locked = false;
+
+ if (WARN_ON(!FSL_MC_IS_ALLOCATABLE(mc_dev->obj_desc.type)))
+ goto out;
+
+ resource = mc_dev->resource;
+ if (WARN_ON(resource->data != mc_dev))
+ goto out;
+
+ mc_bus_dev = to_fsl_mc_device(mc_dev->dev.parent);
+ mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ res_pool = resource->parent_pool;
+ if (WARN_ON(res_pool != &mc_bus->resource_pools[resource->type]))
+ goto out;
+
+ mutex_lock(&res_pool->mutex);
+ mutex_locked = true;
+
+ if (WARN_ON(res_pool->max_count <= 0))
+ goto out;
+ if (WARN_ON(res_pool->free_count <= 0 ||
+ res_pool->free_count > res_pool->max_count))
+ goto out;
+
+ /*
+ * If the device is currently allocated, its resource is not
+ * in the free list and thus, the device cannot be removed.
+ */
+ if (list_empty(&resource->node)) {
+ error = -EBUSY;
+ dev_err(&mc_bus_dev->dev,
+ "Device %s cannot be removed from resource pool\n",
+ dev_name(&mc_dev->dev));
+ goto out;
+ }
+
+ list_del(&resource->node);
+ INIT_LIST_HEAD(&resource->node);
+ res_pool->free_count--;
+ res_pool->max_count--;
+
+ devm_kfree(&mc_bus_dev->dev, resource);
+ mc_dev->resource = NULL;
+ error = 0;
+out:
+ if (mutex_locked)
+ mutex_unlock(&res_pool->mutex);
+
+ return error;
+}
+
+static const char *const fsl_mc_pool_type_strings[] = {
+ [FSL_MC_POOL_DPMCP] = "dpmcp",
+ [FSL_MC_POOL_DPBP] = "dpbp",
+ [FSL_MC_POOL_DPCON] = "dpcon",
+};
+
+static int __must_check object_type_to_pool_type(const char *object_type,
+ enum fsl_mc_pool_type
+ *pool_type)
+{
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(fsl_mc_pool_type_strings); i++) {
+ if (strcmp(object_type, fsl_mc_pool_type_strings[i]) == 0) {
+ *pool_type = i;
+ return 0;
+ }
+ }
+
+ return -EINVAL;
+}
+
+int __must_check fsl_mc_resource_allocate(struct fsl_mc_bus *mc_bus,
+ enum fsl_mc_pool_type pool_type,
+ struct fsl_mc_resource **new_resource)
+{
+ struct fsl_mc_resource_pool *res_pool;
+ struct fsl_mc_resource *resource;
+ struct fsl_mc_device *mc_bus_dev = &mc_bus->mc_dev;
+ int error = -EINVAL;
+ bool mutex_locked = false;
+
+ BUILD_BUG_ON(ARRAY_SIZE(fsl_mc_pool_type_strings) !=
+ FSL_MC_NUM_POOL_TYPES);
+
+ *new_resource = NULL;
+ if (WARN_ON(pool_type < 0 || pool_type >= FSL_MC_NUM_POOL_TYPES))
+ goto error;
+
+ res_pool = &mc_bus->resource_pools[pool_type];
+ if (WARN_ON(res_pool->mc_bus != mc_bus))
+ goto error;
+
+ mutex_lock(&res_pool->mutex);
+ mutex_locked = true;
+ resource = list_first_entry_or_null(&res_pool->free_list,
+ struct fsl_mc_resource, node);
+
+ if (!resource) {
+ WARN_ON(res_pool->free_count != 0);
+ error = -ENXIO;
+ dev_err(&mc_bus_dev->dev,
+ "No more resources of type %s left\n",
+ fsl_mc_pool_type_strings[pool_type]);
+ goto error;
+ }
+
+ if (WARN_ON(resource->type != pool_type))
+ goto error;
+ if (WARN_ON(resource->parent_pool != res_pool))
+ goto error;
+ if (WARN_ON(res_pool->free_count <= 0 ||
+ res_pool->free_count > res_pool->max_count))
+ goto error;
+
+ list_del(&resource->node);
+ INIT_LIST_HEAD(&resource->node);
+
+ res_pool->free_count--;
+ mutex_unlock(&res_pool->mutex);
+ *new_resource = resource;
+ return 0;
+error:
+ if (mutex_locked)
+ mutex_unlock(&res_pool->mutex);
+
+ return error;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_resource_allocate);
+
+void fsl_mc_resource_free(struct fsl_mc_resource *resource)
+{
+ struct fsl_mc_resource_pool *res_pool;
+ bool mutex_locked = false;
+
+ res_pool = resource->parent_pool;
+ if (WARN_ON(resource->type != res_pool->type))
+ goto out;
+
+ mutex_lock(&res_pool->mutex);
+ mutex_locked = true;
+ if (WARN_ON(res_pool->free_count < 0 ||
+ res_pool->free_count >= res_pool->max_count))
+ goto out;
+
+ if (WARN_ON(!list_empty(&resource->node)))
+ goto out;
+
+ list_add_tail(&resource->node, &res_pool->free_list);
+ res_pool->free_count++;
+out:
+ if (mutex_locked)
+ mutex_unlock(&res_pool->mutex);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_resource_free);
+
+/**
+ * fsl_mc_portal_allocate - Allocates an MC portal
+ *
+ * @mc_dev: MC device for which the MC portal is to be allocated
+ * @mc_io_flags: Flags for the fsl_mc_io object that wraps the allocated
+ * MC portal.
+ * @new_mc_io: Pointer to area where the pointer to the fsl_mc_io object
+ * that wraps the allocated MC portal is to be returned
+ *
+ * This function allocates an MC portal from the device's parent DPRC,
+ * from the corresponding MC bus' pool of MC portals and wraps
+ * it in a new fsl_mc_io object. If 'mc_dev' is a DPRC itself, the
+ * portal is allocated from its own MC bus.
+ */
+int __must_check fsl_mc_portal_allocate(struct fsl_mc_device *mc_dev,
+ uint16_t mc_io_flags,
+ struct fsl_mc_io **new_mc_io)
+{
+ struct fsl_mc_device *mc_bus_dev;
+ struct fsl_mc_bus *mc_bus;
+ phys_addr_t mc_portal_phys_addr;
+ size_t mc_portal_size;
+ struct fsl_mc_device *mc_adev;
+ int error = -EINVAL;
+ struct fsl_mc_resource *resource = NULL;
+ struct fsl_mc_io *mc_io = NULL;
+
+ if (mc_dev->flags & FSL_MC_IS_DPRC) {
+ mc_bus_dev = mc_dev;
+ } else {
+ if (WARN_ON(mc_dev->dev.parent->bus != &fsl_mc_bus_type))
+ return error;
+
+ mc_bus_dev = to_fsl_mc_device(mc_dev->dev.parent);
+ }
+
+ mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ *new_mc_io = NULL;
+ error = fsl_mc_resource_allocate(mc_bus, FSL_MC_POOL_DPMCP, &resource);
+ if (error < 0)
+ return error;
+
+ mc_adev = resource->data;
+ if (WARN_ON(!mc_adev))
+ goto error_cleanup_resource;
+
+ if (WARN_ON(mc_adev->obj_desc.region_count == 0))
+ goto error_cleanup_resource;
+
+ mc_portal_phys_addr = mc_adev->regions[0].start;
+ mc_portal_size = mc_adev->regions[0].end -
+ mc_adev->regions[0].start + 1;
+
+ if (WARN_ON(mc_portal_size != mc_bus_dev->mc_io->portal_size))
+ goto error_cleanup_resource;
+
+ error = fsl_create_mc_io(&mc_bus_dev->dev,
+ mc_portal_phys_addr,
+ mc_portal_size, resource,
+ mc_io_flags, &mc_io);
+ if (error < 0)
+ goto error_cleanup_resource;
+
+ *new_mc_io = mc_io;
+ return 0;
+
+error_cleanup_resource:
+ fsl_mc_resource_free(resource);
+ return error;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_portal_allocate);
+
+/**
+ * fsl_mc_portal_free - Returns an MC portal to the pool of free MC portals
+ * of a given MC bus
+ *
+ * @mc_io: Pointer to the fsl_mc_io object that wraps the MC portal to free
+ */
+void fsl_mc_portal_free(struct fsl_mc_io *mc_io)
+{
+ struct fsl_mc_resource *resource;
+
+ resource = mc_io->resource;
+ if (WARN_ON(resource->type != FSL_MC_POOL_DPMCP))
+ return;
+ if (WARN_ON(!resource->data))
+ return;
+
+ fsl_destroy_mc_io(mc_io);
+ fsl_mc_resource_free(resource);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_portal_free);
+
+/**
+ * fsl_mc_portal_reset - Resets the dpmcp object for a given fsl_mc_io object
+ *
+ * @mc_io: Pointer to the fsl_mc_io object that wraps the MC portal to free
+ */
+int fsl_mc_portal_reset(struct fsl_mc_io *mc_io)
+{
+ int error;
+ uint16_t token;
+ struct fsl_mc_resource *resource = mc_io->resource;
+ struct fsl_mc_device *mc_dev = resource->data;
+
+ if (WARN_ON(resource->type != FSL_MC_POOL_DPMCP))
+ return -EINVAL;
+
+ if (WARN_ON(!mc_dev))
+ return -EINVAL;
+
+ error = dpmcp_open(mc_io, mc_dev->obj_desc.id, &token);
+ if (error < 0) {
+ dev_err(&mc_dev->dev, "dpmcp_open() failed: %d\n", error);
+ return error;
+ }
+
+ error = dpmcp_reset(mc_io, token);
+ if (error < 0) {
+ dev_err(&mc_dev->dev, "dpmcp_reset() failed: %d\n", error);
+ return error;
+ }
+
+ error = dpmcp_close(mc_io, token);
+ if (error < 0) {
+ dev_err(&mc_dev->dev, "dpmcp_close() failed: %d\n", error);
+ return error;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_portal_reset);
+
+/**
+ * fsl_mc_object_allocate - Allocates a MC object device of the given
+ * pool type from a given MC bus
+ *
+ * @mc_dev: MC device for which the MC object device is to be allocated
+ * @pool_type: MC bus resource pool type
+ * @new_mc_dev: Pointer to area where the pointer to the allocated
+ * MC object device is to be returned
+ *
+ * This function allocates a MC object device from the device's parent DPRC,
+ * from the corresponding MC bus' pool of allocatable MC object devices of
+ * the given resource type. mc_dev cannot be a DPRC itself.
+ *
+ * NOTE: pool_type must be different from FSL_MC_POOL_MCP, since MC
+ * portals are allocated using fsl_mc_portal_allocate(), instead of
+ * this function.
+ */
+int __must_check fsl_mc_object_allocate(struct fsl_mc_device *mc_dev,
+ enum fsl_mc_pool_type pool_type,
+ struct fsl_mc_device **new_mc_adev)
+{
+ struct fsl_mc_device *mc_bus_dev;
+ struct fsl_mc_bus *mc_bus;
+ struct fsl_mc_device *mc_adev;
+ int error = -EINVAL;
+ struct fsl_mc_resource *resource = NULL;
+
+ *new_mc_adev = NULL;
+ if (WARN_ON(mc_dev->flags & FSL_MC_IS_DPRC))
+ goto error;
+
+ if (WARN_ON(mc_dev->dev.parent->bus != &fsl_mc_bus_type))
+ goto error;
+
+ if (WARN_ON(pool_type == FSL_MC_POOL_DPMCP))
+ goto error;
+
+ mc_bus_dev = to_fsl_mc_device(mc_dev->dev.parent);
+ mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ error = fsl_mc_resource_allocate(mc_bus, pool_type, &resource);
+ if (error < 0)
+ goto error;
+
+ mc_adev = resource->data;
+ if (WARN_ON(!mc_adev))
+ goto error;
+
+ *new_mc_adev = mc_adev;
+ return 0;
+error:
+ if (resource)
+ fsl_mc_resource_free(resource);
+
+ return error;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_object_allocate);
+
+/**
+ * fsl_mc_object_free - Returns an allocatable MC object device to the
+ * corresponding resource pool of a given MC bus.
+ *
+ * @mc_adev: Pointer to the MC object device
+ */
+void fsl_mc_object_free(struct fsl_mc_device *mc_adev)
+{
+ struct fsl_mc_resource *resource;
+
+ resource = mc_adev->resource;
+ if (WARN_ON(resource->type == FSL_MC_POOL_DPMCP))
+ return;
+ if (WARN_ON(resource->data != mc_adev))
+ return;
+
+ fsl_mc_resource_free(resource);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_object_free);
+
+/**
+ * fsl_mc_allocator_probe - callback invoked when an allocatable device is
+ * being added to the system
+ */
+static int fsl_mc_allocator_probe(struct fsl_mc_device *mc_dev)
+{
+ enum fsl_mc_pool_type pool_type;
+ struct fsl_mc_device *mc_bus_dev;
+ struct fsl_mc_bus *mc_bus;
+ int error = -EINVAL;
+
+ if (WARN_ON(!FSL_MC_IS_ALLOCATABLE(mc_dev->obj_desc.type)))
+ goto error;
+
+ mc_bus_dev = to_fsl_mc_device(mc_dev->dev.parent);
+ if (WARN_ON(mc_bus_dev->dev.bus != &fsl_mc_bus_type))
+ goto error;
+
+ mc_bus = to_fsl_mc_bus(mc_bus_dev);
+ error = object_type_to_pool_type(mc_dev->obj_desc.type, &pool_type);
+ if (error < 0)
+ goto error;
+
+ error = fsl_mc_resource_pool_add_device(mc_bus, pool_type, mc_dev);
+ if (error < 0)
+ goto error;
+
+ dev_info(&mc_dev->dev,
+ "Allocatable MC object device bound to fsl_mc_allocator driver");
+ return 0;
+error:
+
+ return error;
+}
+
+/**
+ * fsl_mc_allocator_remove - callback invoked when an allocatable device is
+ * being removed from the system
+ */
+static int fsl_mc_allocator_remove(struct fsl_mc_device *mc_dev)
+{
+ int error = -EINVAL;
+
+ if (WARN_ON(!FSL_MC_IS_ALLOCATABLE(mc_dev->obj_desc.type)))
+ goto out;
+
+ error = fsl_mc_resource_pool_remove_device(mc_dev);
+ if (error < 0)
+ goto out;
+
+ dev_info(&mc_dev->dev,
+ "Allocatable MC object device unbound from fsl_mc_allocator driver");
+ error = 0;
+out:
+ return error;
+}
+
+static const struct fsl_mc_device_match_id match_id_table[] = {
+ {
+ .vendor = FSL_MC_VENDOR_FREESCALE,
+ .obj_type = "dpbp",
+ .ver_major = DPBP_VER_MAJOR,
+ .ver_minor = DPBP_VER_MINOR
+ },
+ {
+ .vendor = FSL_MC_VENDOR_FREESCALE,
+ .obj_type = "dpmcp",
+ .ver_major = DPMCP_VER_MAJOR,
+ .ver_minor = DPMCP_VER_MINOR
+ },
+ {
+ .vendor = FSL_MC_VENDOR_FREESCALE,
+ .obj_type = "dpcon",
+ .ver_major = DPCON_VER_MAJOR,
+ .ver_minor = DPCON_VER_MINOR
+ },
+ {.vendor = 0x0},
+};
+
+static struct fsl_mc_driver fsl_mc_allocator_driver = {
+ .driver = {
+ .name = "fsl_mc_allocator",
+ .owner = THIS_MODULE,
+ .pm = NULL,
+ },
+ .match_id_table = match_id_table,
+ .probe = fsl_mc_allocator_probe,
+ .remove = fsl_mc_allocator_remove,
+};
+
+module_fsl_mc_driver(fsl_mc_allocator_driver);
+
+MODULE_AUTHOR("Freescale Semiconductor Inc.");
+MODULE_DESCRIPTION("Freescale's MC object device allocator");
+MODULE_LICENSE("GPL");
--- /dev/null
+/*
+ * Freescale Management Complex (MC) bus driver
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Author: German Rivera <German.Rivera@freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include "../include/mc-private.h"
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_address.h>
+#include <linux/ioport.h>
+#include <linux/slab.h>
+#include <linux/limits.h>
+#include "../include/dpmng.h"
+#include "../include/mc-sys.h"
+#include "dprc-cmd.h"
+
+static struct kmem_cache *mc_dev_cache;
+
+/**
+ * fsl_mc_bus_match - device to driver matching callback
+ * @dev: the MC object device structure to match against
+ * @drv: the device driver to search for matching MC object device id
+ * structures
+ *
+ * Returns 1 on success, 0 otherwise.
+ */
+static int fsl_mc_bus_match(struct device *dev, struct device_driver *drv)
+{
+ const struct fsl_mc_device_match_id *id;
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+ struct fsl_mc_driver *mc_drv = to_fsl_mc_driver(drv);
+ bool found = false;
+
+ if (WARN_ON(!fsl_mc_bus_type.dev_root))
+ goto out;
+
+ if (!mc_drv->match_id_table)
+ goto out;
+
+ /*
+ * If the object is not 'plugged' don't match.
+ * Only exception is the root DPRC, which is a special case.
+ */
+ if ((mc_dev->obj_desc.state & DPRC_OBJ_STATE_PLUGGED) == 0 &&
+ &mc_dev->dev != fsl_mc_bus_type.dev_root)
+ goto out;
+
+ /*
+ * Traverse the match_id table of the given driver, trying to find
+ * a matching for the given MC object device.
+ */
+ for (id = mc_drv->match_id_table; id->vendor != 0x0; id++) {
+ if (id->vendor == mc_dev->obj_desc.vendor &&
+ strcmp(id->obj_type, mc_dev->obj_desc.type) == 0 &&
+ id->ver_major == mc_dev->obj_desc.ver_major &&
+ id->ver_minor == mc_dev->obj_desc.ver_minor) {
+ found = true;
+ break;
+ }
+ }
+
+out:
+ dev_dbg(dev, "%smatched\n", found ? "" : "not ");
+ return found;
+}
+
+/**
+ * fsl_mc_bus_uevent - callback invoked when a device is added
+ */
+static int fsl_mc_bus_uevent(struct device *dev, struct kobj_uevent_env *env)
+{
+ pr_debug("%s invoked\n", __func__);
+ return 0;
+}
+
+struct bus_type fsl_mc_bus_type = {
+ .name = "fsl-mc",
+ .match = fsl_mc_bus_match,
+ .uevent = fsl_mc_bus_uevent,
+};
+EXPORT_SYMBOL_GPL(fsl_mc_bus_type);
+
+static int fsl_mc_driver_probe(struct device *dev)
+{
+ struct fsl_mc_driver *mc_drv;
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+ int error;
+
+ if (WARN_ON(!dev->driver))
+ return -EINVAL;
+
+ mc_drv = to_fsl_mc_driver(dev->driver);
+ if (WARN_ON(!mc_drv->probe))
+ return -EINVAL;
+
+ error = mc_drv->probe(mc_dev);
+ if (error < 0) {
+ dev_err(dev, "MC object device probe callback failed: %d\n",
+ error);
+ return error;
+ }
+
+ return 0;
+}
+
+static int fsl_mc_driver_remove(struct device *dev)
+{
+ struct fsl_mc_driver *mc_drv = to_fsl_mc_driver(dev->driver);
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+ int error;
+
+ if (WARN_ON(!dev->driver))
+ return -EINVAL;
+
+ error = mc_drv->remove(mc_dev);
+ if (error < 0) {
+ dev_err(dev,
+ "MC object device remove callback failed: %d\n",
+ error);
+ return error;
+ }
+
+ return 0;
+}
+
+static void fsl_mc_driver_shutdown(struct device *dev)
+{
+ struct fsl_mc_driver *mc_drv = to_fsl_mc_driver(dev->driver);
+ struct fsl_mc_device *mc_dev = to_fsl_mc_device(dev);
+
+ mc_drv->shutdown(mc_dev);
+}
+
+/**
+ * __fsl_mc_driver_register - registers a child device driver with the
+ * MC bus
+ *
+ * This function is implicitly invoked from the registration function of
+ * fsl_mc device drivers, which is generated by the
+ * module_fsl_mc_driver() macro.
+ */
+int __fsl_mc_driver_register(struct fsl_mc_driver *mc_driver,
+ struct module *owner)
+{
+ int error;
+
+ mc_driver->driver.owner = owner;
+ mc_driver->driver.bus = &fsl_mc_bus_type;
+
+ if (mc_driver->probe)
+ mc_driver->driver.probe = fsl_mc_driver_probe;
+
+ if (mc_driver->remove)
+ mc_driver->driver.remove = fsl_mc_driver_remove;
+
+ if (mc_driver->shutdown)
+ mc_driver->driver.shutdown = fsl_mc_driver_shutdown;
+
+ error = driver_register(&mc_driver->driver);
+ if (error < 0) {
+ pr_err("driver_register() failed for %s: %d\n",
+ mc_driver->driver.name, error);
+ return error;
+ }
+
+ pr_info("MC object device driver %s registered\n",
+ mc_driver->driver.name);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(__fsl_mc_driver_register);
+
+/**
+ * fsl_mc_driver_unregister - unregisters a device driver from the
+ * MC bus
+ */
+void fsl_mc_driver_unregister(struct fsl_mc_driver *mc_driver)
+{
+ driver_unregister(&mc_driver->driver);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_driver_unregister);
+
+static int get_dprc_icid(struct fsl_mc_io *mc_io,
+ int container_id, uint16_t *icid)
+{
+ uint16_t dprc_handle;
+ struct dprc_attributes attr;
+ int error;
+
+ error = dprc_open(mc_io, container_id, &dprc_handle);
+ if (error < 0) {
+ pr_err("dprc_open() failed: %d\n", error);
+ return error;
+ }
+
+ memset(&attr, 0, sizeof(attr));
+ error = dprc_get_attributes(mc_io, dprc_handle, &attr);
+ if (error < 0) {
+ pr_err("dprc_get_attributes() failed: %d\n", error);
+ goto common_cleanup;
+ }
+
+ *icid = attr.icid;
+ error = 0;
+
+common_cleanup:
+ (void)dprc_close(mc_io, dprc_handle);
+ return error;
+}
+
+static int translate_mc_addr(uint64_t mc_addr, phys_addr_t *phys_addr)
+{
+ int i;
+ struct fsl_mc *mc = dev_get_drvdata(fsl_mc_bus_type.dev_root->parent);
+
+ if (mc->num_translation_ranges == 0) {
+ /*
+ * Do identity mapping:
+ */
+ *phys_addr = mc_addr;
+ return 0;
+ }
+
+ for (i = 0; i < mc->num_translation_ranges; i++) {
+ struct fsl_mc_addr_translation_range *range =
+ &mc->translation_ranges[i];
+
+ if (mc_addr >= range->start_mc_addr &&
+ mc_addr < range->end_mc_addr) {
+ *phys_addr = range->start_phys_addr +
+ (mc_addr - range->start_mc_addr);
+ return 0;
+ }
+ }
+
+ return -EFAULT;
+}
+
+static int fsl_mc_device_get_mmio_regions(struct fsl_mc_device *mc_dev,
+ struct fsl_mc_device *mc_bus_dev)
+{
+ int i;
+ int error;
+ struct resource *regions;
+ struct dprc_obj_desc *obj_desc = &mc_dev->obj_desc;
+ struct device *parent_dev = mc_dev->dev.parent;
+
+ regions = kmalloc_array(obj_desc->region_count,
+ sizeof(regions[0]), GFP_KERNEL);
+ if (!regions)
+ return -ENOMEM;
+
+ for (i = 0; i < obj_desc->region_count; i++) {
+ struct dprc_region_desc region_desc;
+
+ error = dprc_get_obj_region(mc_bus_dev->mc_io,
+ mc_bus_dev->mc_handle,
+ obj_desc->type,
+ obj_desc->id, i, ®ion_desc);
+ if (error < 0) {
+ dev_err(parent_dev,
+ "dprc_get_obj_region() failed: %d\n", error);
+ goto error_cleanup_regions;
+ }
+
+ WARN_ON(region_desc.base_paddr == 0x0);
+ WARN_ON(region_desc.size == 0);
+ error = translate_mc_addr(region_desc.base_paddr,
+ ®ions[i].start);
+ if (error < 0) {
+ dev_err(parent_dev,
+ "Invalid MC address: %#llx\n",
+ region_desc.base_paddr);
+ goto error_cleanup_regions;
+ }
+
+ regions[i].end = regions[i].start + region_desc.size - 1;
+ regions[i].name = "fsl-mc object MMIO region";
+ regions[i].flags = IORESOURCE_IO;
+ }
+
+ mc_dev->regions = regions;
+ return 0;
+
+error_cleanup_regions:
+ kfree(regions);
+ return error;
+}
+
+/**
+ * Add a newly discovered MC object device to be visible in Linux
+ */
+int fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
+ struct fsl_mc_io *mc_io,
+ struct device *parent_dev,
+ struct fsl_mc_device **new_mc_dev)
+{
+ int error;
+ struct fsl_mc_device *mc_dev = NULL;
+ struct fsl_mc_bus *mc_bus = NULL;
+ struct fsl_mc_device *parent_mc_dev;
+
+ if (parent_dev->bus == &fsl_mc_bus_type)
+ parent_mc_dev = to_fsl_mc_device(parent_dev);
+ else
+ parent_mc_dev = NULL;
+
+ if (strcmp(obj_desc->type, "dprc") == 0) {
+ /*
+ * Allocate an MC bus device object:
+ */
+ mc_bus = devm_kzalloc(parent_dev, sizeof(*mc_bus), GFP_KERNEL);
+ if (!mc_bus)
+ return -ENOMEM;
+
+ mc_dev = &mc_bus->mc_dev;
+ } else {
+ /*
+ * Allocate a regular fsl_mc_device object:
+ */
+ mc_dev = kmem_cache_zalloc(mc_dev_cache, GFP_KERNEL);
+ if (!mc_dev)
+ return -ENOMEM;
+ }
+
+ mc_dev->obj_desc = *obj_desc;
+ mc_dev->mc_io = mc_io;
+ device_initialize(&mc_dev->dev);
+ mc_dev->dev.parent = parent_dev;
+ mc_dev->dev.bus = &fsl_mc_bus_type;
+ dev_set_name(&mc_dev->dev, "%s.%x", obj_desc->type, obj_desc->id);
+
+ if (strcmp(obj_desc->type, "dprc") == 0) {
+ struct fsl_mc_io *mc_io2;
+
+ mc_dev->flags |= FSL_MC_IS_DPRC;
+
+ /*
+ * To get the DPRC's ICID, we need to open the DPRC
+ * in get_dprc_icid(). For child DPRCs, we do so using the
+ * parent DPRC's MC portal instead of the child DPRC's MC
+ * portal, in case the child DPRC is already opened with
+ * its own portal (e.g., the DPRC used by AIOP).
+ *
+ * NOTE: There cannot be more than one active open for a
+ * given MC object, using the same MC portal.
+ */
+ if (parent_mc_dev) {
+ /*
+ * device being added is a child DPRC device
+ */
+ mc_io2 = parent_mc_dev->mc_io;
+ } else {
+ /*
+ * device being added is the root DPRC device
+ */
+ if (WARN_ON(!mc_io)) {
+ error = -EINVAL;
+ goto error_cleanup_dev;
+ }
+
+ mc_io2 = mc_io;
+
+ if (!fsl_mc_bus_type.dev_root)
+ fsl_mc_bus_type.dev_root = &mc_dev->dev;
+ }
+
+ error = get_dprc_icid(mc_io2, obj_desc->id, &mc_dev->icid);
+ if (error < 0)
+ goto error_cleanup_dev;
+ } else {
+ /*
+ * A non-DPRC MC object device has to be a child of another
+ * MC object (specifically a DPRC object)
+ */
+ mc_dev->icid = parent_mc_dev->icid;
+ mc_dev->dma_mask = FSL_MC_DEFAULT_DMA_MASK;
+ mc_dev->dev.dma_mask = &mc_dev->dma_mask;
+ }
+
+ /*
+ * Get MMIO regions for the device from the MC:
+ *
+ * NOTE: the root DPRC is a special case as its MMIO region is
+ * obtained from the device tree
+ */
+ if (parent_mc_dev && obj_desc->region_count != 0) {
+ error = fsl_mc_device_get_mmio_regions(mc_dev,
+ parent_mc_dev);
+ if (error < 0)
+ goto error_cleanup_dev;
+ }
+
+ /*
+ * The device-specific probe callback will get invoked by device_add()
+ */
+ error = device_add(&mc_dev->dev);
+ if (error < 0) {
+ dev_err(parent_dev,
+ "device_add() failed for device %s: %d\n",
+ dev_name(&mc_dev->dev), error);
+ goto error_cleanup_dev;
+ }
+
+ (void)get_device(&mc_dev->dev);
+ dev_dbg(parent_dev, "Added MC object device %s\n",
+ dev_name(&mc_dev->dev));
+
+ *new_mc_dev = mc_dev;
+ return 0;
+
+error_cleanup_dev:
+ kfree(mc_dev->regions);
+ if (mc_bus)
+ devm_kfree(parent_dev, mc_bus);
+ else
+ kmem_cache_free(mc_dev_cache, mc_dev);
+
+ return error;
+}
+EXPORT_SYMBOL_GPL(fsl_mc_device_add);
+
+/**
+ * fsl_mc_device_remove - Remove a MC object device from being visible to
+ * Linux
+ *
+ * @mc_dev: Pointer to a MC object device object
+ */
+void fsl_mc_device_remove(struct fsl_mc_device *mc_dev)
+{
+ struct fsl_mc_bus *mc_bus = NULL;
+
+ kfree(mc_dev->regions);
+
+ /*
+ * The device-specific remove callback will get invoked by device_del()
+ */
+ device_del(&mc_dev->dev);
+ put_device(&mc_dev->dev);
+
+ if (strcmp(mc_dev->obj_desc.type, "dprc") == 0) {
+ struct fsl_mc_io *mc_io = mc_dev->mc_io;
+
+ mc_bus = to_fsl_mc_bus(mc_dev);
+ fsl_destroy_mc_io(mc_io);
+ if (&mc_dev->dev == fsl_mc_bus_type.dev_root)
+ fsl_mc_bus_type.dev_root = NULL;
+ }
+
+ mc_dev->mc_io = NULL;
+ if (mc_bus)
+ devm_kfree(mc_dev->dev.parent, mc_bus);
+ else
+ kmem_cache_free(mc_dev_cache, mc_dev);
+}
+EXPORT_SYMBOL_GPL(fsl_mc_device_remove);
+
+static int parse_mc_ranges(struct device *dev,
+ int *paddr_cells,
+ int *mc_addr_cells,
+ int *mc_size_cells,
+ const __be32 **ranges_start,
+ uint8_t *num_ranges)
+{
+ const __be32 *prop;
+ int range_tuple_cell_count;
+ int ranges_len;
+ int tuple_len;
+ struct device_node *mc_node = dev->of_node;
+
+ *ranges_start = of_get_property(mc_node, "ranges", &ranges_len);
+ if (!(*ranges_start) || !ranges_len) {
+ dev_warn(dev,
+ "missing or empty ranges property for device tree node '%s'\n",
+ mc_node->name);
+
+ *num_ranges = 0;
+ return 0;
+ }
+
+ *paddr_cells = of_n_addr_cells(mc_node);
+
+ prop = of_get_property(mc_node, "#address-cells", NULL);
+ if (prop)
+ *mc_addr_cells = be32_to_cpup(prop);
+ else
+ *mc_addr_cells = *paddr_cells;
+
+ prop = of_get_property(mc_node, "#size-cells", NULL);
+ if (prop)
+ *mc_size_cells = be32_to_cpup(prop);
+ else
+ *mc_size_cells = of_n_size_cells(mc_node);
+
+ range_tuple_cell_count = *paddr_cells + *mc_addr_cells +
+ *mc_size_cells;
+
+ tuple_len = range_tuple_cell_count * sizeof(__be32);
+ if (ranges_len % tuple_len != 0) {
+ dev_err(dev, "malformed ranges property '%s'\n", mc_node->name);
+ return -EINVAL;
+ }
+
+ *num_ranges = ranges_len / tuple_len;
+ return 0;
+}
+
+static int get_mc_addr_translation_ranges(struct device *dev,
+ struct fsl_mc_addr_translation_range
+ **ranges,
+ uint8_t *num_ranges)
+{
+ int error;
+ int paddr_cells;
+ int mc_addr_cells;
+ int mc_size_cells;
+ int i;
+ const __be32 *ranges_start;
+ const __be32 *cell;
+
+ error = parse_mc_ranges(dev,
+ &paddr_cells,
+ &mc_addr_cells,
+ &mc_size_cells,
+ &ranges_start,
+ num_ranges);
+ if (error < 0)
+ return error;
+
+ if (!(*num_ranges)) {
+ /*
+ * Missing or empty ranges property ("ranges;") for the
+ * 'fsl,qoriq-mc' node. In this case, identity mapping
+ * will be used.
+ */
+ *ranges = NULL;
+ return 0;
+ }
+
+ *ranges = devm_kcalloc(dev, *num_ranges,
+ sizeof(struct fsl_mc_addr_translation_range),
+ GFP_KERNEL);
+ if (!(*ranges))
+ return -ENOMEM;
+
+ cell = ranges_start;
+ for (i = 0; i < *num_ranges; ++i) {
+ struct fsl_mc_addr_translation_range *range = &(*ranges)[i];
+
+ range->start_mc_addr = of_read_number(cell, mc_addr_cells);
+ cell += mc_addr_cells;
+ range->start_phys_addr = of_read_number(cell, paddr_cells);
+ cell += paddr_cells;
+ range->end_mc_addr = range->start_mc_addr +
+ of_read_number(cell, mc_size_cells);
+
+ cell += mc_size_cells;
+ }
+
+ return 0;
+}
+
+/**
+ * fsl_mc_bus_probe - callback invoked when the root MC bus is being
+ * added
+ */
+static int fsl_mc_bus_probe(struct platform_device *pdev)
+{
+ struct dprc_obj_desc obj_desc;
+ int error;
+ struct fsl_mc *mc;
+ struct fsl_mc_device *mc_bus_dev = NULL;
+ struct fsl_mc_io *mc_io = NULL;
+ int container_id;
+ phys_addr_t mc_portal_phys_addr;
+ uint32_t mc_portal_size;
+ struct mc_version mc_version;
+ struct resource res;
+
+ dev_info(&pdev->dev, "Root MC bus device probed");
+
+ mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL);
+ if (!mc)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, mc);
+
+ /*
+ * Get physical address of MC portal for the root DPRC:
+ */
+ error = of_address_to_resource(pdev->dev.of_node, 0, &res);
+ if (error < 0) {
+ dev_err(&pdev->dev,
+ "of_address_to_resource() failed for %s\n",
+ pdev->dev.of_node->full_name);
+ return error;
+ }
+
+ mc_portal_phys_addr = res.start;
+ mc_portal_size = resource_size(&res);
+ error = fsl_create_mc_io(&pdev->dev, mc_portal_phys_addr,
+ mc_portal_size, NULL, 0, &mc_io);
+ if (error < 0)
+ return error;
+
+ error = mc_get_version(mc_io, &mc_version);
+ if (error != 0) {
+ dev_err(&pdev->dev,
+ "mc_get_version() failed with error %d\n", error);
+ goto error_cleanup_mc_io;
+ }
+
+ dev_info(&pdev->dev,
+ "Freescale Management Complex Firmware version: %u.%u.%u\n",
+ mc_version.major, mc_version.minor, mc_version.revision);
+
+ if (mc_version.major < MC_VER_MAJOR) {
+ dev_err(&pdev->dev,
+ "ERROR: MC firmware version not supported by driver (driver version: %u.%u)\n",
+ MC_VER_MAJOR, MC_VER_MINOR);
+ error = -ENOTSUPP;
+ goto error_cleanup_mc_io;
+ }
+
+ if (mc_version.major > MC_VER_MAJOR) {
+ dev_warn(&pdev->dev,
+ "WARNING: driver may not support newer MC firmware features (driver version: %u.%u)\n",
+ MC_VER_MAJOR, MC_VER_MINOR);
+ }
+
+ error = get_mc_addr_translation_ranges(&pdev->dev,
+ &mc->translation_ranges,
+ &mc->num_translation_ranges);
+ if (error < 0)
+ goto error_cleanup_mc_io;
+
+ error = dpmng_get_container_id(mc_io, &container_id);
+ if (error < 0) {
+ dev_err(&pdev->dev,
+ "dpmng_get_container_id() failed: %d\n", error);
+ goto error_cleanup_mc_io;
+ }
+
+ obj_desc.vendor = FSL_MC_VENDOR_FREESCALE;
+ strcpy(obj_desc.type, "dprc");
+ obj_desc.id = container_id;
+ obj_desc.ver_major = DPRC_VER_MAJOR;
+ obj_desc.ver_minor = DPRC_VER_MINOR;
+ obj_desc.region_count = 0;
+
+ error = fsl_mc_device_add(&obj_desc, mc_io, &pdev->dev, &mc_bus_dev);
+ if (error < 0)
+ goto error_cleanup_mc_io;
+
+ mc->root_mc_bus_dev = mc_bus_dev;
+ return 0;
+
+error_cleanup_mc_io:
+ fsl_destroy_mc_io(mc_io);
+ return error;
+}
+
+/**
+ * fsl_mc_bus_remove - callback invoked when the root MC bus is being
+ * removed
+ */
+static int fsl_mc_bus_remove(struct platform_device *pdev)
+{
+ struct fsl_mc *mc = platform_get_drvdata(pdev);
+
+ if (WARN_ON(&mc->root_mc_bus_dev->dev != fsl_mc_bus_type.dev_root))
+ return -EINVAL;
+
+ fsl_mc_device_remove(mc->root_mc_bus_dev);
+ dev_info(&pdev->dev, "Root MC bus device removed");
+ return 0;
+}
+
+static const struct of_device_id fsl_mc_bus_match_table[] = {
+ {.compatible = "fsl,qoriq-mc",},
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, fsl_mc_bus_match_table);
+
+static struct platform_driver fsl_mc_bus_driver = {
+ .driver = {
+ .name = "fsl_mc_bus",
+ .owner = THIS_MODULE,
+ .pm = NULL,
+ .of_match_table = fsl_mc_bus_match_table,
+ },
+ .probe = fsl_mc_bus_probe,
+ .remove = fsl_mc_bus_remove,
+};
+
+static int __init fsl_mc_bus_driver_init(void)
+{
+ int error;
+
+ mc_dev_cache = kmem_cache_create("fsl_mc_device",
+ sizeof(struct fsl_mc_device), 0, 0,
+ NULL);
+ if (!mc_dev_cache) {
+ pr_err("Could not create fsl_mc_device cache\n");
+ return -ENOMEM;
+ }
+
+ error = bus_register(&fsl_mc_bus_type);
+ if (error < 0) {
+ pr_err("fsl-mc bus type registration failed: %d\n", error);
+ goto error_cleanup_cache;
+ }
+
+ pr_info("fsl-mc bus type registered\n");
+
+ error = platform_driver_register(&fsl_mc_bus_driver);
+ if (error < 0) {
+ pr_err("platform_driver_register() failed: %d\n", error);
+ goto error_cleanup_bus;
+ }
+
+ error = dprc_driver_init();
+ if (error < 0)
+ goto error_cleanup_driver;
+
+ return 0;
+
+error_cleanup_driver:
+ platform_driver_unregister(&fsl_mc_bus_driver);
+
+error_cleanup_bus:
+ bus_unregister(&fsl_mc_bus_type);
+
+error_cleanup_cache:
+ kmem_cache_destroy(mc_dev_cache);
+ return error;
+}
+
+postcore_initcall(fsl_mc_bus_driver_init);
+
+static void __exit fsl_mc_bus_driver_exit(void)
+{
+ if (WARN_ON(!mc_dev_cache))
+ return;
+
+ dprc_driver_exit();
+ platform_driver_unregister(&fsl_mc_bus_driver);
+ bus_unregister(&fsl_mc_bus_type);
+ kmem_cache_destroy(mc_dev_cache);
+ pr_info("MC bus unregistered\n");
+}
+
+module_exit(fsl_mc_bus_driver_exit);
+
+MODULE_AUTHOR("Freescale Semiconductor Inc.");
+MODULE_DESCRIPTION("Freescale Management Complex (MC) bus driver");
+MODULE_LICENSE("GPL");
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+ *
+ * I/O services to send MC commands to the MC hardware
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "../include/mc-sys.h"
+#include "../include/mc-cmd.h"
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+
+/**
+ * Timeout in jiffies to wait for the completion of an MC command
+ */
+#define MC_CMD_COMPLETION_TIMEOUT_JIFFIES (HZ / 2) /* 500 ms */
+
+/*
+ * usleep_range() min and max values used to throttle down polling
+ * iterations while waiting for MC command completion
+ */
+#define MC_CMD_COMPLETION_POLLING_MIN_SLEEP_USECS 10
+#define MC_CMD_COMPLETION_POLLING_MAX_SLEEP_USECS 500
+
+#define MC_CMD_HDR_READ_CMDID(_hdr) \
+ ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S))
+
+/**
+ * Creates an MC I/O object
+ *
+ * @dev: device to be associated with the MC I/O object
+ * @mc_portal_phys_addr: physical address of the MC portal to use
+ * @mc_portal_size: size in bytes of the MC portal
+ * @resource: Pointer to MC bus object allocator resource associated
+ * with this MC I/O object or NULL if none.
+ * @flags: flags for the new MC I/O object
+ * @new_mc_io: Area to return pointer to newly created MC I/O object
+ *
+ * Returns '0' on Success; Error code otherwise.
+ */
+int __must_check fsl_create_mc_io(struct device *dev,
+ phys_addr_t mc_portal_phys_addr,
+ uint32_t mc_portal_size,
+ struct fsl_mc_resource *resource,
+ uint32_t flags, struct fsl_mc_io **new_mc_io)
+{
+ struct fsl_mc_io *mc_io;
+ void __iomem *mc_portal_virt_addr;
+ struct resource *res;
+
+ mc_io = devm_kzalloc(dev, sizeof(*mc_io), GFP_KERNEL);
+ if (!mc_io)
+ return -ENOMEM;
+
+ mc_io->dev = dev;
+ mc_io->flags = flags;
+ mc_io->portal_phys_addr = mc_portal_phys_addr;
+ mc_io->portal_size = mc_portal_size;
+ mc_io->resource = resource;
+ res = devm_request_mem_region(dev,
+ mc_portal_phys_addr,
+ mc_portal_size,
+ "mc_portal");
+ if (!res) {
+ dev_err(dev,
+ "devm_request_mem_region failed for MC portal %#llx\n",
+ mc_portal_phys_addr);
+ return -EBUSY;
+ }
+
+ mc_portal_virt_addr = devm_ioremap_nocache(dev,
+ mc_portal_phys_addr,
+ mc_portal_size);
+ if (!mc_portal_virt_addr) {
+ dev_err(dev,
+ "devm_ioremap_nocache failed for MC portal %#llx\n",
+ mc_portal_phys_addr);
+ return -ENXIO;
+ }
+
+ mc_io->portal_virt_addr = mc_portal_virt_addr;
+ *new_mc_io = mc_io;
+ return 0;
+}
+EXPORT_SYMBOL_GPL(fsl_create_mc_io);
+
+/**
+ * Destroys an MC I/O object
+ *
+ * @mc_io: MC I/O object to destroy
+ */
+void fsl_destroy_mc_io(struct fsl_mc_io *mc_io)
+{
+ devm_iounmap(mc_io->dev, mc_io->portal_virt_addr);
+ devm_release_mem_region(mc_io->dev,
+ mc_io->portal_phys_addr,
+ mc_io->portal_size);
+
+ mc_io->portal_virt_addr = NULL;
+ devm_kfree(mc_io->dev, mc_io);
+}
+EXPORT_SYMBOL_GPL(fsl_destroy_mc_io);
+
+static int mc_status_to_error(enum mc_cmd_status status)
+{
+ static const int mc_status_to_error_map[] = {
+ [MC_CMD_STATUS_OK] = 0,
+ [MC_CMD_STATUS_AUTH_ERR] = -EACCES,
+ [MC_CMD_STATUS_NO_PRIVILEGE] = -EPERM,
+ [MC_CMD_STATUS_DMA_ERR] = -EIO,
+ [MC_CMD_STATUS_CONFIG_ERR] = -ENXIO,
+ [MC_CMD_STATUS_TIMEOUT] = -ETIMEDOUT,
+ [MC_CMD_STATUS_NO_RESOURCE] = -ENAVAIL,
+ [MC_CMD_STATUS_NO_MEMORY] = -ENOMEM,
+ [MC_CMD_STATUS_BUSY] = -EBUSY,
+ [MC_CMD_STATUS_UNSUPPORTED_OP] = -ENOTSUPP,
+ [MC_CMD_STATUS_INVALID_STATE] = -ENODEV,
+ };
+
+ if (WARN_ON((u32)status >= ARRAY_SIZE(mc_status_to_error_map)))
+ return -EINVAL;
+
+ return mc_status_to_error_map[status];
+}
+
+static const char *mc_status_to_string(enum mc_cmd_status status)
+{
+ static const char *const status_strings[] = {
+ [MC_CMD_STATUS_OK] = "Command completed successfully",
+ [MC_CMD_STATUS_READY] = "Command ready to be processed",
+ [MC_CMD_STATUS_AUTH_ERR] = "Authentication error",
+ [MC_CMD_STATUS_NO_PRIVILEGE] = "No privilege",
+ [MC_CMD_STATUS_DMA_ERR] = "DMA or I/O error",
+ [MC_CMD_STATUS_CONFIG_ERR] = "Configuration error",
+ [MC_CMD_STATUS_TIMEOUT] = "Operation timed out",
+ [MC_CMD_STATUS_NO_RESOURCE] = "No resources",
+ [MC_CMD_STATUS_NO_MEMORY] = "No memory available",
+ [MC_CMD_STATUS_BUSY] = "Device is busy",
+ [MC_CMD_STATUS_UNSUPPORTED_OP] = "Unsupported operation",
+ [MC_CMD_STATUS_INVALID_STATE] = "Invalid state"
+ };
+
+ if ((unsigned int)status >= ARRAY_SIZE(status_strings))
+ return "Unknown MC error";
+
+ return status_strings[status];
+}
+
+/**
+ * mc_write_command - writes a command to a Management Complex (MC) portal
+ *
+ * @portal: pointer to an MC portal
+ * @cmd: pointer to a filled command
+ */
+static inline void mc_write_command(struct mc_command __iomem *portal,
+ struct mc_command *cmd)
+{
+ int i;
+
+ /* copy command parameters into the portal */
+ for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
+ writeq(cmd->params[i], &portal->params[i]);
+
+ /* submit the command by writing the header */
+ writeq(cmd->header, &portal->header);
+}
+
+/**
+ * mc_read_response - reads the response for the last MC command from a
+ * Management Complex (MC) portal
+ *
+ * @portal: pointer to an MC portal
+ * @resp: pointer to command response buffer
+ *
+ * Returns MC_CMD_STATUS_OK on Success; Error code otherwise.
+ */
+static inline enum mc_cmd_status mc_read_response(struct mc_command __iomem *
+ portal,
+ struct mc_command *resp)
+{
+ int i;
+ enum mc_cmd_status status;
+
+ /* Copy command response header from MC portal: */
+ resp->header = readq(&portal->header);
+ status = MC_CMD_HDR_READ_STATUS(resp->header);
+ if (status != MC_CMD_STATUS_OK)
+ return status;
+
+ /* Copy command response data from MC portal: */
+ for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
+ resp->params[i] = readq(&portal->params[i]);
+
+ return status;
+}
+
+/**
+ * Sends an command to the MC device using the given MC I/O object
+ *
+ * @mc_io: MC I/O object to be used
+ * @cmd: command to be sent
+ *
+ * Returns '0' on Success; Error code otherwise.
+ *
+ * NOTE: This function cannot be invoked from from atomic contexts.
+ */
+int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd)
+{
+ enum mc_cmd_status status;
+ unsigned long jiffies_until_timeout =
+ jiffies + MC_CMD_COMPLETION_TIMEOUT_JIFFIES;
+
+ /*
+ * Send command to the MC hardware:
+ */
+ mc_write_command(mc_io->portal_virt_addr, cmd);
+
+ /*
+ * Wait for response from the MC hardware:
+ */
+ for (;;) {
+ status = mc_read_response(mc_io->portal_virt_addr, cmd);
+ if (status != MC_CMD_STATUS_READY)
+ break;
+
+ /*
+ * TODO: When MC command completion interrupts are supported
+ * call wait function here instead of usleep_range()
+ */
+ usleep_range(MC_CMD_COMPLETION_POLLING_MIN_SLEEP_USECS,
+ MC_CMD_COMPLETION_POLLING_MAX_SLEEP_USECS);
+
+ if (time_after_eq(jiffies, jiffies_until_timeout)) {
+ pr_debug("MC command timed out (portal: %#llx, obj handle: %#x, command: %#x)\n",
+ mc_io->portal_phys_addr,
+ (unsigned int)
+ MC_CMD_HDR_READ_TOKEN(cmd->header),
+ (unsigned int)
+ MC_CMD_HDR_READ_CMDID(cmd->header));
+
+ return -ETIMEDOUT;
+ }
+ }
+
+ if (status != MC_CMD_STATUS_OK) {
+ pr_debug("MC command failed: portal: %#llx, obj handle: %#x, command: %#x, status: %s (%#x)\n",
+ mc_io->portal_phys_addr,
+ (unsigned int)MC_CMD_HDR_READ_TOKEN(cmd->header),
+ (unsigned int)MC_CMD_HDR_READ_CMDID(cmd->header),
+ mc_status_to_string(status),
+ (unsigned int)status);
+
+ return mc_status_to_error(status);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(mc_send_command);
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#ifndef _FSL_DPBP_CMD_H
+#define _FSL_DPBP_CMD_H
+
+/* DPBP Version */
+#define DPBP_VER_MAJOR 2
+#define DPBP_VER_MINOR 0
+
+/* Command IDs */
+#define DPBP_CMDID_CLOSE 0x800
+#define DPBP_CMDID_OPEN 0x804
+#define DPBP_CMDID_CREATE 0x904
+#define DPBP_CMDID_DESTROY 0x900
+
+#define DPBP_CMDID_ENABLE 0x002
+#define DPBP_CMDID_DISABLE 0x003
+#define DPBP_CMDID_GET_ATTR 0x004
+#define DPBP_CMDID_RESET 0x005
+#define DPBP_CMDID_IS_ENABLED 0x006
+
+#define DPBP_CMDID_SET_IRQ 0x010
+#define DPBP_CMDID_GET_IRQ 0x011
+#define DPBP_CMDID_SET_IRQ_ENABLE 0x012
+#define DPBP_CMDID_GET_IRQ_ENABLE 0x013
+#define DPBP_CMDID_SET_IRQ_MASK 0x014
+#define DPBP_CMDID_GET_IRQ_MASK 0x015
+#define DPBP_CMDID_GET_IRQ_STATUS 0x016
+#define DPBP_CMDID_CLEAR_IRQ_STATUS 0x017
+
+#endif /* _FSL_DPBP_CMD_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_DPBP_H
+#define __FSL_DPBP_H
+
+/* Data Path Buffer Pool API
+ * Contains initialization APIs and runtime control APIs for DPBP
+ */
+
+struct fsl_mc_io;
+
+/**
+ * dpbp_open() - Open a control session for the specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dpbp_id: DPBP unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpbp_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_open(struct fsl_mc_io *mc_io, int dpbp_id, uint16_t *token);
+
+/**
+ * dpbp_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_close(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * struct dpbp_cfg() - Structure representing DPBP configuration
+ * @options: place holder
+ */
+struct dpbp_cfg {
+ uint32_t options;
+};
+
+/**
+ * dpbp_create() - Create the DPBP object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cfg: Configuration structure
+ * @token: Returned token; use in subsequent API calls
+ *
+ * Create the DPBP object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent calls to
+ * this specific object. For objects that are created using the
+ * DPL file, call dpbp_open function to get an authentication
+ * token first.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_create(struct fsl_mc_io *mc_io,
+ const struct dpbp_cfg *cfg,
+ uint16_t *token);
+
+/**
+ * dpbp_destroy() - Destroy the DPBP object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
+int dpbp_destroy(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpbp_enable() - Enable the DPBP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_enable(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpbp_disable() - Disable the DPBP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_disable(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpbp_is_enabled() - Check if the DPBP is enabled.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @en: Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_is_enabled(struct fsl_mc_io *mc_io, uint16_t token, int *en);
+
+/**
+ * dpbp_reset() - Reset the DPBP, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_reset(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * dpbp_set_irq() - Set IRQ information for the DPBP to trigger an interrupt.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: Identifies the interrupt index to configure
+ * @irq_addr: Address that must be written to
+ * signal a message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_addr,
+ uint32_t irq_val,
+ int user_irq_id);
+
+/**
+ * dpbp_get_irq() - Get IRQ information from the DPBP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @type: Interrupt type: 0 represents message interrupt
+ * type (both irq_addr and irq_val are valid)
+ * @irq_addr: Returned address that must be written to
+ * signal the message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_addr,
+ uint32_t *irq_val,
+ int *user_irq_id);
+
+/**
+ * dpbp_set_irq_enable() - Set overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @en: Interrupt state - enable = 1, disable = 0
+ *
+ * Allows GPP software to control when interrupts are generated.
+ * Each interrupt can have up to 32 causes. The enable/disable control's the
+ * overall interrupt state. if the interrupt is disabled no causes will cause
+ * an interrupt.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+/**
+ * dpbp_get_irq_enable() - Get overall interrupt state
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @en: Returned interrupt state - enable = 1, disable = 0
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+/**
+ * dpbp_set_irq_mask() - Set interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @mask: Event mask to trigger interrupt;
+ * each bit:
+ * 0 = ignore event
+ * 1 = consider event for asserting IRQ
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+/**
+ * dpbp_get_irq_mask() - Get interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @mask: Returned event mask to trigger interrupt
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+/**
+ * dpbp_get_irq_status() - Get the current status of any pending interrupts.
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @status: Returned interrupts status - one bit per cause:
+ * 0 = no interrupt pending
+ * 1 = interrupt pending
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+/**
+ * dpbp_clear_irq_status() - Clear a pending interrupt's status
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @irq_index: The interrupt index to configure
+ * @status: Bits to clear (W1C) - one bit per cause:
+ * 0 = don't change
+ * 1 = clear status bit
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
+ * struct dpbp_attr - Structure representing DPBP attributes
+ * @id: DPBP object ID
+ * @version: DPBP version
+ * @bpid: Hardware buffer pool ID; should be used as an argument in
+ * acquire/release operations on buffers
+ */
+struct dpbp_attr {
+ int id;
+ /**
+ * struct version - Structure representing DPBP version
+ * @major: DPBP major version
+ * @minor: DPBP minor version
+ */
+ struct {
+ uint16_t major;
+ uint16_t minor;
+ } version;
+ uint16_t bpid;
+};
+
+/**
+ * dpbp_get_attributes - Retrieve DPBP attributes.
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPBP object
+ * @attr: Returned object's attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpbp_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dpbp_attr *attr);
+
+/** @} */
+
+#endif /* __FSL_DPBP_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions are met:
+* * Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+* * Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the distribution.
+* * Neither the name of the above-listed copyright holders nor the
+* names of any contributors may be used to endorse or promote products
+* derived from this software without specific prior written permission.
+*
+*
+* ALTERNATIVELY, this software may be distributed under the terms of the
+* GNU General Public License ("GPL") as published by the Free Software
+* Foundation, either version 2 of that License or (at your option) any
+* later version.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+* POSSIBILITY OF SUCH DAMAGE.
+*/
+#ifndef _FSL_DPCON_CMD_H
+#define _FSL_DPCON_CMD_H
+
+/* DPCON Version */
+#define DPCON_VER_MAJOR 2
+#define DPCON_VER_MINOR 0
+
+/* Command IDs */
+#define DPCON_CMDID_CLOSE 0x800
+#define DPCON_CMDID_OPEN 0x808
+#define DPCON_CMDID_CREATE 0x908
+#define DPCON_CMDID_DESTROY 0x900
+
+#define DPCON_CMDID_ENABLE 0x002
+#define DPCON_CMDID_DISABLE 0x003
+#define DPCON_CMDID_GET_ATTR 0x004
+#define DPCON_CMDID_RESET 0x005
+#define DPCON_CMDID_IS_ENABLED 0x006
+
+#define DPCON_CMDID_SET_IRQ 0x010
+#define DPCON_CMDID_GET_IRQ 0x011
+#define DPCON_CMDID_SET_IRQ_ENABLE 0x012
+#define DPCON_CMDID_GET_IRQ_ENABLE 0x013
+#define DPCON_CMDID_SET_IRQ_MASK 0x014
+#define DPCON_CMDID_GET_IRQ_MASK 0x015
+#define DPCON_CMDID_GET_IRQ_STATUS 0x016
+#define DPCON_CMDID_CLEAR_IRQ_STATUS 0x017
+
+#define DPCON_CMDID_SET_NOTIFICATION 0x100
+
+#endif /* _FSL_DPCON_CMD_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_DPMNG_H
+#define __FSL_DPMNG_H
+
+/* Management Complex General API
+ * Contains general API for the Management Complex firmware
+ */
+
+struct fsl_mc_io;
+
+/**
+ * Management Complex firmware version information
+ */
+#define MC_VER_MAJOR 5
+#define MC_VER_MINOR 0
+
+/**
+ * struct mc_versoin
+ * @major: Major version number: incremented on API compatibility changes
+ * @minor: Minor version number: incremented on API additions (that are
+ * backward compatible); reset when major version is incremented
+ * @revision: Internal revision number: incremented on implementation changes
+ * and/or bug fixes that have no impact on API
+ */
+struct mc_version {
+ uint32_t major;
+ uint32_t minor;
+ uint32_t revision;
+};
+
+/**
+ * mc_get_version() - Retrieves the Management Complex firmware
+ * version information
+ * @mc_io: Pointer to opaque I/O object
+ * @mc_ver_info: Returned version information structure
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int mc_get_version(struct fsl_mc_io *mc_io, struct mc_version *mc_ver_info);
+
+/**
+ * dpmng_get_container_id() - Get container ID associated with a given portal.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @container_id: Requested container ID
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpmng_get_container_id(struct fsl_mc_io *mc_io, int *container_id);
+
+#endif /* __FSL_DPMNG_H */
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef _FSL_DPRC_H
+#define _FSL_DPRC_H
+
+/* Data Path Resource Container API
+ * Contains DPRC API for managing and querying DPAA resources
+ */
+
+struct fsl_mc_io;
+
+/**
+ * Set this value as the icid value in dprc_cfg structure when creating a
+ * container, in case the ICID is not selected by the user and should be
+ * allocated by the DPRC from the pool of ICIDs.
+ */
+#define DPRC_GET_ICID_FROM_POOL (uint16_t)(~(0))
+
+/**
+ * Set this value as the portal_id value in dprc_cfg structure when creating a
+ * container, in case the portal ID is not specifically selected by the
+ * user and should be allocated by the DPRC from the pool of portal ids.
+ */
+#define DPRC_GET_PORTAL_ID_FROM_POOL (int)(~(0))
+
+/**
+ * dprc_open() - Open DPRC object for use
+ * @mc_io: Pointer to MC portal's I/O object
+ * @container_id: Container ID to open
+ * @token: Returned token of DPRC object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ * @warning Required before any operation on the object.
+ */
+int dprc_open(struct fsl_mc_io *mc_io, int container_id, uint16_t *token);
+
+/**
+ * dprc_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_close(struct fsl_mc_io *mc_io, uint16_t token);
+
+/**
+ * Container general options
+ *
+ * These options may be selected at container creation by the container creator
+ * and can be retrieved using dprc_get_attributes()
+ */
+
+/* Spawn Policy Option allowed - Indicates that the new container is allowed
+ * to spawn and have its own child containers.
+ */
+#define DPRC_CFG_OPT_SPAWN_ALLOWED 0x00000001
+
+/* General Container allocation policy - Indicates that the new container is
+ * allowed to allocate requested resources from its parent container; if not
+ * set, the container is only allowed to use resources in its own pools; Note
+ * that this is a container's global policy, but the parent container may
+ * override it and set specific quota per resource type.
+ */
+#define DPRC_CFG_OPT_ALLOC_ALLOWED 0x00000002
+
+/* Object initialization allowed - software context associated with this
+ * container is allowed to invoke object initialization operations.
+ */
+#define DPRC_CFG_OPT_OBJ_CREATE_ALLOWED 0x00000004
+
+/* Topology change allowed - software context associated with this
+ * container is allowed to invoke topology operations, such as attach/detach
+ * of network objects.
+ */
+#define DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED 0x00000008
+
+/* IOMMU bypass - indicates whether objects of this container are permitted
+ * to bypass the IOMMU.
+ */
+#define DPRC_CFG_OPT_IOMMU_BYPASS 0x00000010
+
+/* AIOP - Indicates that container belongs to AIOP. */
+#define DPRC_CFG_OPT_AIOP 0x00000020
+
+/**
+ * struct dprc_cfg - Container configuration options
+ * @icid: Container's ICID; if set to 'DPRC_GET_ICID_FROM_POOL', a free
+ * ICID value is allocated by the DPRC
+ * @portal_id: Portal ID; if set to 'DPRC_GET_PORTAL_ID_FROM_POOL', a free
+ * portal ID is allocated by the DPRC
+ * @options: Combination of 'DPRC_CFG_OPT_<X>' options
+ */
+struct dprc_cfg {
+ uint16_t icid;
+ int portal_id;
+ uint64_t options;
+};
+
+/**
+ * dprc_create_container() - Create child container
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @cfg: Child container configuration
+ * @child_container_id: Returned child container ID
+ * @child_portal_paddr: Returned base physical address of the
+ * child portal
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_create_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dprc_cfg *cfg,
+ int *child_container_id,
+ uint64_t *child_portal_paddr);
+
+/**
+ * dprc_destroy_container() - Destroy child container.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id: ID of the container to destroy
+ *
+ * This function terminates the child container, so following this call the
+ * child container ID becomes invalid.
+ *
+ * Notes:
+ * - All resources and objects of the destroyed container are returned to the
+ * parent container or destroyed if were created be the destroyed container.
+ * - This function destroy all the child containers of the specified
+ * container prior to destroying the container itself.
+ *
+ * warning: Only the parent container is allowed to destroy a child policy
+ * Container 0 can't be destroyed
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ */
+int dprc_destroy_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id);
+
+/**
+ * dprc_reset_container - Reset child container.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id: ID of the container to reset
+ *
+ * In case a software context crashes or becomes non-responsive, the parent
+ * may wish to reset its resources container before the software context is
+ * restarted.
+ *
+ * This routine informs all objects assigned to the child container that the
+ * container is being reset, so they may perform any cleanup operations that are
+ * needed. All objects handles that were owned by the child container shall be
+ * closed.
+ *
+ * Note that such request may be submitted even if the child software context
+ * has not crashed, but the resulting object cleanup operations will not be
+ * aware of that.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_reset_container(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id);
+
+/* IRQ */
+
+/* Number of dprc's IRQs */
+#define DPRC_NUM_OF_IRQS 1
+
+/* Object irq events */
+
+/* IRQ event - Indicates that a new object assigned to the container */
+#define DPRC_IRQ_EVENT_OBJ_ADDED 0x00000001
+/* IRQ event - Indicates that an object was unassigned from the container */
+#define DPRC_IRQ_EVENT_OBJ_REMOVED 0x00000002
+/* IRQ event - Indicates that resources assigned to the container */
+#define DPRC_IRQ_EVENT_RES_ADDED 0x00000004
+/* IRQ event - Indicates that resources unassigned from the container */
+#define DPRC_IRQ_EVENT_RES_REMOVED 0x00000008
+/* IRQ event - Indicates that one of the descendant containers that opened by
+ * this container is destroyed
+ */
+#define DPRC_IRQ_EVENT_CONTAINER_DESTROYED 0x00000010
+
+/* IRQ event - Indicates that on one of the container's opened object is
+ * destroyed
+ */
+#define DPRC_IRQ_EVENT_OBJ_DESTROYED 0x00000020
+
+/* Irq event - Indicates that object is created at the container */
+#define DPRC_IRQ_EVENT_OBJ_CREATED 0x00000040
+
+/**
+ * dprc_set_irq() - Set IRQ information for the DPRC to trigger an interrupt.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: Identifies the interrupt index to configure
+ * @irq_addr: Address that must be written to
+ * signal a message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: Returned a user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_set_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint64_t irq_addr,
+ uint32_t irq_val,
+ int user_irq_id);
+
+/**
+ * dprc_get_irq() - Get IRQ information from the DPRC.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @type: Returned interrupt type: 0 represents message interrupt
+ * type (both irq_addr and irq_val are valid)
+ * @irq_addr: Returned address that must be written to
+ * signal the message-based interrupt
+ * @irq_val: Value to write into irq_addr address
+ * @user_irq_id: A user defined number associated with this IRQ
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_irq(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ int *type,
+ uint64_t *irq_addr,
+ uint32_t *irq_val,
+ int *user_irq_id);
+
+/**
+ * dprc_set_irq_enable() - Set overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @en: Interrupt state - enable = 1, disable = 0
+ *
+ * Allows GPP software to control when interrupts are generated.
+ * Each interrupt can have up to 32 causes. The enable/disable control's the
+ * overall interrupt state. if the interrupt is disabled no causes will cause
+ * an interrupt.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+/**
+ * dprc_get_irq_enable() - Get overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @en: Returned interrupt state - enable = 1, disable = 0
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+/**
+ * dprc_set_irq_mask() - Set interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @mask: event mask to trigger interrupt;
+ * each bit:
+ * 0 = ignore event
+ * 1 = consider event for asserting irq
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+/**
+ * dprc_get_irq_mask() - Get interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @mask: Returned event mask to trigger interrupt
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+/**
+ * dprc_get_irq_status() - Get the current status of any pending interrupts.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @status: Returned interrupts status - one bit per cause:
+ * 0 = no interrupt pending
+ * 1 = interrupt pending
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+/**
+ * dprc_clear_irq_status() - Clear a pending interrupt's status
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @irq_index: The interrupt index to configure
+ * @status: bits to clear (W1C) - one bit per cause:
+ * 0 = don't change
+ * 1 = clear status bit
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
+ * struct dprc_attributes - Container attributes
+ * @container_id: Container's ID
+ * @icid: Container's ICID
+ * @portal_id: Container's portal ID
+ * @options: Container's options as set at container's creation
+ * @version: DPRC version
+ */
+struct dprc_attributes {
+ int container_id;
+ uint16_t icid;
+ int portal_id;
+ uint64_t options;
+ /**
+ * struct version - DPRC version
+ * @major: DPRC major version
+ * @minor: DPRC minor version
+ */
+ struct {
+ uint16_t major;
+ uint16_t minor;
+ } version;
+};
+
+/**
+ * dprc_get_attributes() - Obtains container attributes
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @attributes Returned container attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_attributes(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ struct dprc_attributes *attributes);
+
+/**
+ * dprc_set_res_quota() - Set allocation policy for a specific resource/object
+ * type in a child container
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id: ID of the child container
+ * @type: Resource/object type
+ * @quota: Sets the maximum number of resources of the selected type
+ * that the child container is allowed to allocate from its parent;
+ * when quota is set to -1, the policy is the same as container's
+ * general policy.
+ *
+ * Allocation policy determines whether or not a container may allocate
+ * resources from its parent. Each container has a 'global' allocation policy
+ * that is set when the container is created.
+ *
+ * This function sets allocation policy for a specific resource type.
+ * The default policy for all resource types matches the container's 'global'
+ * allocation policy.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ * @warning Only the parent container is allowed to change a child policy.
+ */
+int dprc_set_res_quota(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ char *type,
+ uint16_t quota);
+
+/**
+ * dprc_get_res_quota() - Gets the allocation policy of a specific
+ * resource/object type in a child container
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id; ID of the child container
+ * @type: resource/object type
+ * @quota: Returnes the maximum number of resources of the selected type
+ * that the child container is allowed to allocate from the parent;
+ * when quota is set to -1, the policy is the same as container's
+ * general policy.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_res_quota(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ char *type,
+ uint16_t *quota);
+
+/* Resource request options */
+
+/* Explicit resource ID request - The requested objects/resources
+ * are explicit and sequential (in case of resources).
+ * The base ID is given at res_req at base_align field
+ */
+#define DPRC_RES_REQ_OPT_EXPLICIT 0x00000001
+
+/* Aligned resources request - Relevant only for resources
+ * request (and not objects). Indicates that resources base ID should be
+ * sequential and aligned to the value given at dprc_res_req base_align field
+ */
+#define DPRC_RES_REQ_OPT_ALIGNED 0x00000002
+
+/* Plugged Flag - Relevant only for object assignment request.
+ * Indicates that after all objects assigned. An interrupt will be invoked at
+ * the relevant GPP. The assigned object will be marked as plugged.
+ * plugged objects can't be assigned from their container
+ */
+#define DPRC_RES_REQ_OPT_PLUGGED 0x00000004
+
+/**
+ * struct dprc_res_req - Resource request descriptor, to be used in assignment
+ * or un-assignment of resources and objects.
+ * @type: Resource/object type: Represent as a NULL terminated string.
+ * This string may received by using dprc_get_pool() to get resource
+ * type and dprc_get_obj() to get object type;
+ * Note: it is not possible to assign/un-assign DPRC objects
+ * @num: Number of resources
+ * @options: Request options: combination of DPRC_RES_REQ_OPT_ options
+ * @id_base_align: In case of explicit assignment (DPRC_RES_REQ_OPT_EXPLICIT
+ * is set at option), this field represents the required base ID
+ * for resource allocation; In case of aligned assignment
+ * (DPRC_RES_REQ_OPT_ALIGNED is set at option), this field
+ * indicates the required alignment for the resource ID(s) -
+ * use 0 if there is no alignment or explicit ID requirements
+ */
+struct dprc_res_req {
+ char type[16];
+ uint32_t num;
+ uint32_t options;
+ int id_base_align;
+};
+
+/**
+ * dprc_assign() - Assigns objects or resource to a child container.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @container_id: ID of the child container
+ * @res_req: Describes the type and amount of resources to
+ * assign to the given container
+ *
+ * Assignment is usually done by a parent (this DPRC) to one of its child
+ * containers.
+ *
+ * According to the DPRC allocation policy, the assigned resources may be taken
+ * (allocated) from the container's ancestors, if not enough resources are
+ * available in the container itself.
+ *
+ * The type of assignment depends on the dprc_res_req options, as follows:
+ * - DPRC_RES_REQ_OPT_EXPLICIT: indicates that assigned resources should have
+ * the explicit base ID specified at the id_base_align field of res_req.
+ * - DPRC_RES_REQ_OPT_ALIGNED: indicates that the assigned resources should be
+ * aligned to the value given at id_base_align field of res_req.
+ * - DPRC_RES_REQ_OPT_PLUGGED: Relevant only for object assignment,
+ * and indicates that the object must be set to the plugged state.
+ *
+ * A container may use this function with its own ID in order to change a
+ * object state to plugged or unplugged.
+ *
+ * If IRQ information has been set in the child DPRC, it will signal an
+ * interrupt following every change in its object assignment.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_assign(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int container_id,
+ struct dprc_res_req *res_req);
+
+/**
+ * dprc_unassign() - Un-assigns objects or resources from a child container
+ * and moves them into this (parent) DPRC.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @child_container_id: ID of the child container
+ * @res_req: Describes the type and amount of resources to un-assign from
+ * the child container
+ *
+ * Un-assignment of objects can succeed only if the object is not in the
+ * plugged or opened state.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_unassign(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int child_container_id,
+ struct dprc_res_req *res_req);
+
+/**
+ * dprc_get_pool_count() - Get the number of dprc's pools
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @pool_count: Returned number of resource pools in the dprc
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_pool_count(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int *pool_count);
+
+/**
+ * dprc_get_pool() - Get the type (string) of a certain dprc's pool
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @pool_index; Index of the pool to be queried (< pool_count)
+ * @type: The type of the pool
+ *
+ * The pool types retrieved one by one by incrementing
+ * pool_index up to (not including) the value of pool_count returned
+ * from dprc_get_pool_count(). dprc_get_pool_count() must
+ * be called prior to dprc_get_pool().
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_pool(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int pool_index,
+ char *type);
+
+/**
+ * dprc_get_obj_count() - Obtains the number of objects in the DPRC
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @obj_count: Number of objects assigned to the DPRC
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_obj_count(struct fsl_mc_io *mc_io, uint16_t token, int *obj_count);
+
+/* Objects Attributes Flags */
+
+/* Opened state - Indicates that an object is open by at least one owner */
+#define DPRC_OBJ_STATE_OPEN 0x00000001
+/* Plugged state - Indicates that the object is plugged */
+#define DPRC_OBJ_STATE_PLUGGED 0x00000002
+
+/**
+ * struct dprc_obj_desc - Object descriptor, returned from dprc_get_obj()
+ * @type: Type of object: NULL terminated string
+ * @id: ID of logical object resource
+ * @vendor: Object vendor identifier
+ * @ver_major: Major version number
+ * @ver_minor: Minor version number
+ * @irq_count: Number of interrupts supported by the object
+ * @region_count: Number of mappable regions supported by the object
+ * @state: Object state: combination of DPRC_OBJ_STATE_ states
+ */
+struct dprc_obj_desc {
+ char type[16];
+ int id;
+ uint16_t vendor;
+ uint16_t ver_major;
+ uint16_t ver_minor;
+ uint8_t irq_count;
+ uint8_t region_count;
+ uint32_t state;
+};
+
+/**
+ * dprc_get_obj() - Get general information on an object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @obj_index: Index of the object to be queried (< obj_count)
+ * @obj_desc: Returns the requested object descriptor
+ *
+ * The object descriptors are retrieved one by one by incrementing
+ * obj_index up to (not including) the value of obj_count returned
+ * from dprc_get_obj_count(). dprc_get_obj_count() must
+ * be called prior to dprc_get_obj().
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_obj(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int obj_index,
+ struct dprc_obj_desc *obj_desc);
+
+/**
+ * dprc_get_res_count() - Obtains the number of free resources that are assigned
+ * to this container, by pool type
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @type: pool type
+ * @res_count: Returned number of free resources of the given
+ * resource type that are assigned to this DPRC
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_res_count(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *type,
+ int *res_count);
+
+/**
+ * enum dprc_iter_status - Iteration status
+ * @DPRC_ITER_STATUS_FIRST: Perform first iteration
+ * @DPRC_ITER_STATUS_MORE: Indicates more/next iteration is needed
+ * @DPRC_ITER_STATUS_LAST: Indicates last iteration
+ */
+enum dprc_iter_status {
+ DPRC_ITER_STATUS_FIRST = 0,
+ DPRC_ITER_STATUS_MORE = 1,
+ DPRC_ITER_STATUS_LAST = 2
+};
+
+/**
+ * struct dprc_res_ids_range_desc - Resource ID range descriptor
+ * @base_id: Base resource ID of this range
+ * @last_id: Last resource ID of this range
+ * @iter_status: Iteration status - should be set to DPRC_ITER_STATUS_FIRST at
+ * first iteration; while the returned marker is DPRC_ITER_STATUS_MORE,
+ * additional iterations are needed, until the returned marker is
+ * DPRC_ITER_STATUS_LAST
+ */
+struct dprc_res_ids_range_desc {
+ int base_id;
+ int last_id;
+ enum dprc_iter_status iter_status;
+};
+
+/**
+ * dprc_get_res_ids() - Obtains IDs of free resources in the container
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @type: pool type
+ * @range_desc: range descriptor
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_res_ids(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *type,
+ struct dprc_res_ids_range_desc *range_desc);
+
+/**
+ * dprc_get_portal_paddr() - Get the physical address of MC portals
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @portal_id: MC portal ID
+ * @portal_addr: The physical address of the MC portal ID
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_portal_paddr(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ int portal_id,
+ uint64_t *portal_addr);
+
+/**
+ * struct dprc_region_desc - Mappable region descriptor
+ * @base_paddr: Region base physical address
+ * @size: Region size (in bytes)
+ */
+struct dprc_region_desc {
+ uint64_t base_paddr;
+ uint32_t size;
+};
+
+/**
+ * dprc_get_obj_region() - Get region information for a specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @obj_type; Object type as returned in dprc_get_obj()
+ * @obj_id: Unique object instance as returned in dprc_get_obj()
+ * @region_index: The specific region to query
+ * @region_desc: Returns the requested region descriptor
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_get_obj_region(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ char *obj_type,
+ int obj_id,
+ uint8_t region_index,
+ struct dprc_region_desc *region_desc);
+
+/**
+ * struct dprc_endpoint - Endpoint description for link connect/disconnect
+ * operations
+ * @type: Endpoint object type: NULL terminated string
+ * @id: Endpoint object ID
+ * @interface_id: Interface ID; should be set for endpoints with multiple
+ * interfaces ("dpsw", "dpdmux"); for others, always set to 0
+ */
+struct dprc_endpoint {
+ char type[16];
+ int id;
+ int interface_id;
+};
+
+/**
+ * dprc_connect() - Connect two endpoints to create a network link between them
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @endpoint1: Endpoint 1 configuration parameters
+ * @endpoint2: Endpoint 2 configuration parameters
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_connect(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint1,
+ const struct dprc_endpoint *endpoint2);
+
+/**
+ * dprc_disconnect() - Disconnect one endpoint to remove its network connection
+ * @mc_io: Pointer to MC portal's I/O object
+ * @token: Token of DPRC object
+ * @endpoint: Endpoint configuration parameters
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dprc_disconnect(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint);
+
+/**
+* dprc_get_connection() - Get connected endpoint and link status if connection
+* exists.
+* @mc_io Pointer to MC portal's I/O object
+* @token Token of DPRC object
+* @endpoint1 Endpoint 1 configuration parameters
+* @endpoint2 Returned endpoint 2 configuration parameters
+* @state: Returned link state: 1 - link is up, 0 - link is down
+*
+* Return: '0' on Success; -ENAVAIL if connection does not exist.
+*/
+int dprc_get_connection(struct fsl_mc_io *mc_io,
+ uint16_t token,
+ const struct dprc_endpoint *endpoint1,
+ struct dprc_endpoint *endpoint2,
+ int *state);
+
+#endif /* _FSL_DPRC_H */
+
--- /dev/null
+/* Copyright 2013-2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#ifndef __FSL_MC_CMD_H
+#define __FSL_MC_CMD_H
+
+#define MC_CMD_NUM_OF_PARAMS 7
+
+#define MAKE_UMASK64(_width) \
+ ((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : -1))
+
+static inline uint64_t mc_enc(int lsoffset, int width, uint64_t val)
+{
+ return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset);
+}
+
+static inline uint64_t mc_dec(uint64_t val, int lsoffset, int width)
+{
+ return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width));
+}
+
+struct mc_command {
+ uint64_t header;
+ uint64_t params[MC_CMD_NUM_OF_PARAMS];
+};
+
+enum mc_cmd_status {
+ MC_CMD_STATUS_OK = 0x0, /* Completed successfully */
+ MC_CMD_STATUS_READY = 0x1, /* Ready to be processed */
+ MC_CMD_STATUS_AUTH_ERR = 0x3, /* Authentication error */
+ MC_CMD_STATUS_NO_PRIVILEGE = 0x4, /* No privilege */
+ MC_CMD_STATUS_DMA_ERR = 0x5, /* DMA or I/O error */
+ MC_CMD_STATUS_CONFIG_ERR = 0x6, /* Configuration error */
+ MC_CMD_STATUS_TIMEOUT = 0x7, /* Operation timed out */
+ MC_CMD_STATUS_NO_RESOURCE = 0x8, /* No resources */
+ MC_CMD_STATUS_NO_MEMORY = 0x9, /* No memory available */
+ MC_CMD_STATUS_BUSY = 0xA, /* Device is busy */
+ MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, /* Unsupported operation */
+ MC_CMD_STATUS_INVALID_STATE = 0xC /* Invalid state */
+};
+
+#define MC_CMD_HDR_CMDID_O 52 /* Command ID field offset */
+#define MC_CMD_HDR_CMDID_S 12 /* Command ID field size */
+#define MC_CMD_HDR_TOKEN_O 38 /* Token field offset */
+#define MC_CMD_HDR_TOKEN_S 10 /* Token field size */
+#define MC_CMD_HDR_STATUS_O 16 /* Status field offset */
+#define MC_CMD_HDR_STATUS_S 8 /* Status field size*/
+#define MC_CMD_HDR_PRI_O 15 /* Priority field offset */
+#define MC_CMD_HDR_PRI_S 1 /* Priority field size */
+
+#define MC_CMD_HDR_READ_STATUS(_hdr) \
+ ((enum mc_cmd_status)mc_dec((_hdr), \
+ MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S))
+
+#define MC_CMD_HDR_READ_TOKEN(_hdr) \
+ ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S))
+
+#define MC_CMD_PRI_LOW 0 /* Low Priority command indication */
+#define MC_CMD_PRI_HIGH 1 /* High Priority command indication */
+
+#define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \
+ ((_ext)[_param] |= mc_enc((_offset), (_width), _arg))
+
+#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \
+ ((_cmd).params[_param] |= mc_enc((_offset), (_width), _arg))
+
+#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \
+ (_arg = (_type)mc_dec(_cmd.params[_param], (_offset), (_width)))
+
+static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
+ uint8_t priority,
+ uint16_t token)
+{
+ uint64_t hdr;
+
+ hdr = mc_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id);
+ hdr |= mc_enc(MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S, token);
+ hdr |= mc_enc(MC_CMD_HDR_PRI_O, MC_CMD_HDR_PRI_S, priority);
+ hdr |= mc_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S,
+ MC_CMD_STATUS_READY);
+
+ return hdr;
+}
+
+#endif /* __FSL_MC_CMD_H */
--- /dev/null
+/*
+ * Freescale Management Complex (MC) bus private declarations
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Author: German Rivera <German.Rivera@freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#ifndef _FSL_MC_PRIVATE_H_
+#define _FSL_MC_PRIVATE_H_
+
+#include "../include/mc.h"
+#include <linux/mutex.h>
+#include <linux/stringify.h>
+
+#define FSL_MC_DPRC_DRIVER_NAME "fsl_mc_dprc"
+
+#define FSL_MC_DEVICE_MATCH(_mc_dev, _obj_desc) \
+ (strcmp((_mc_dev)->obj_desc.type, (_obj_desc)->type) == 0 && \
+ (_mc_dev)->obj_desc.id == (_obj_desc)->id)
+
+#define FSL_MC_IS_ALLOCATABLE(_obj_type) \
+ (strcmp(_obj_type, "dpbp") == 0 || \
+ strcmp(_obj_type, "dpmcp") == 0 || \
+ strcmp(_obj_type, "dpcon") == 0)
+
+/**
+ * struct fsl_mc - Private data of a "fsl,qoriq-mc" platform device
+ * @root_mc_bus_dev: MC object device representing the root DPRC
+ * @addr_translation_ranges: array of bus to system address translation ranges
+ */
+struct fsl_mc {
+ struct fsl_mc_device *root_mc_bus_dev;
+ uint8_t num_translation_ranges;
+ struct fsl_mc_addr_translation_range *translation_ranges;
+};
+
+/**
+ * struct fsl_mc_addr_translation_range - bus to system address translation
+ * range
+ * @start_mc_addr: Start MC address of the range being translated
+ * @end_mc_addr: MC address of the first byte after the range (last MC
+ * address of the range is end_mc_addr - 1)
+ * @start_phys_addr: system physical address corresponding to start_mc_addr
+ */
+struct fsl_mc_addr_translation_range {
+ uint64_t start_mc_addr;
+ uint64_t end_mc_addr;
+ phys_addr_t start_phys_addr;
+};
+
+/**
+ * struct fsl_mc_resource_pool - Pool of MC resources of a given
+ * type
+ * @type: type of resources in the pool
+ * @max_count: maximum number of resources in the pool
+ * @free_count: number of free resources in the pool
+ * @mutex: mutex to serialize access to the pool's free list
+ * @free_list: anchor node of list of free resources in the pool
+ * @mc_bus: pointer to the MC bus that owns this resource pool
+ */
+struct fsl_mc_resource_pool {
+ enum fsl_mc_pool_type type;
+ int16_t max_count;
+ int16_t free_count;
+ struct mutex mutex; /* serializes access to free_list */
+ struct list_head free_list;
+ struct fsl_mc_bus *mc_bus;
+};
+
+/**
+ * struct fsl_mc_bus - logical bus that corresponds to a physical DPRC
+ * @mc_dev: fsl-mc device for the bus device itself.
+ * @resource_pools: array of resource pools (one pool per resource type)
+ * for this MC bus. These resources represent allocatable entities
+ * from the physical DPRC.
+ * @scan_mutex: Serializes bus scanning
+ */
+struct fsl_mc_bus {
+ struct fsl_mc_device mc_dev;
+ struct fsl_mc_resource_pool resource_pools[FSL_MC_NUM_POOL_TYPES];
+ struct mutex scan_mutex; /* serializes bus scanning */
+};
+
+#define to_fsl_mc_bus(_mc_dev) \
+ container_of(_mc_dev, struct fsl_mc_bus, mc_dev)
+
+int __must_check fsl_mc_device_add(struct dprc_obj_desc *obj_desc,
+ struct fsl_mc_io *mc_io,
+ struct device *parent_dev,
+ struct fsl_mc_device **new_mc_dev);
+
+void fsl_mc_device_remove(struct fsl_mc_device *mc_dev);
+
+int dprc_scan_container(struct fsl_mc_device *mc_bus_dev);
+
+int dprc_scan_objects(struct fsl_mc_device *mc_bus_dev);
+
+int __init dprc_driver_init(void);
+
+void __exit dprc_driver_exit(void);
+
+int __must_check fsl_mc_resource_allocate(struct fsl_mc_bus *mc_bus,
+ enum fsl_mc_pool_type pool_type,
+ struct fsl_mc_resource
+ **new_resource);
+
+void fsl_mc_resource_free(struct fsl_mc_resource *resource);
+
+#endif /* _FSL_MC_PRIVATE_H_ */
--- /dev/null
+/* Copyright 2013-2014 Freescale Semiconductor Inc.
+ *
+ * Interface of the I/O services to send MC commands to the MC hardware
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _FSL_MC_SYS_H
+#define _FSL_MC_SYS_H
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/dma-mapping.h>
+
+struct fsl_mc_resource;
+struct mc_command;
+
+/**
+ * struct fsl_mc_io - MC I/O object to be passed-in to mc_send_command()
+ * @dev: device associated with this Mc I/O object
+ * @flags: flags for mc_send_command()
+ * @portal_size: MC command portal size in bytes
+ * @portal_phys_addr: MC command portal physical address
+ * @portal_virt_addr: MC command portal virtual address
+ * @resource: generic resource associated with the MC portal if
+ * the MC portal came from a resource pool, or NULL if the MC portal
+ * is permanently bound to a device (e.g., a DPRC)
+ */
+struct fsl_mc_io {
+ struct device *dev;
+ uint32_t flags;
+ uint32_t portal_size;
+ phys_addr_t portal_phys_addr;
+ void __iomem *portal_virt_addr;
+ struct fsl_mc_resource *resource;
+};
+
+int __must_check fsl_create_mc_io(struct device *dev,
+ phys_addr_t mc_portal_phys_addr,
+ uint32_t mc_portal_size,
+ struct fsl_mc_resource *resource,
+ uint32_t flags, struct fsl_mc_io **new_mc_io);
+
+void fsl_destroy_mc_io(struct fsl_mc_io *mc_io);
+
+int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd);
+
+#endif /* _FSL_MC_SYS_H */
--- /dev/null
+/*
+ * Freescale Management Complex (MC) bus public interface
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Author: German Rivera <German.Rivera@freescale.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#ifndef _FSL_MC_H_
+#define _FSL_MC_H_
+
+#include <linux/device.h>
+#include <linux/mod_devicetable.h>
+#include <linux/list.h>
+#include "../include/dprc.h"
+
+#define FSL_MC_VENDOR_FREESCALE 0x1957
+
+struct fsl_mc_device;
+struct fsl_mc_io;
+
+/**
+ * struct fsl_mc_driver - MC object device driver object
+ * @driver: Generic device driver
+ * @match_id_table: table of supported device matching Ids
+ * @probe: Function called when a device is added
+ * @remove: Function called when a device is removed
+ * @shutdown: Function called at shutdown time to quiesce the device
+ * @suspend: Function called when a device is stopped
+ * @resume: Function called when a device is resumed
+ *
+ * Generic DPAA device driver object for device drivers that are registered
+ * with a DPRC bus. This structure is to be embedded in each device-specific
+ * driver structure.
+ */
+struct fsl_mc_driver {
+ struct device_driver driver;
+ const struct fsl_mc_device_match_id *match_id_table;
+ int (*probe)(struct fsl_mc_device *dev);
+ int (*remove)(struct fsl_mc_device *dev);
+ void (*shutdown)(struct fsl_mc_device *dev);
+ int (*suspend)(struct fsl_mc_device *dev, pm_message_t state);
+ int (*resume)(struct fsl_mc_device *dev);
+};
+
+#define to_fsl_mc_driver(_drv) \
+ container_of(_drv, struct fsl_mc_driver, driver)
+
+/**
+ * struct fsl_mc_device_match_id - MC object device Id entry for driver matching
+ * @vendor: vendor ID
+ * @obj_type: MC object type
+ * @ver_major: MC object version major number
+ * @ver_minor: MC object version minor number
+ *
+ * Type of entries in the "device Id" table for MC object devices supported by
+ * a MC object device driver. The last entry of the table has vendor set to 0x0
+ */
+struct fsl_mc_device_match_id {
+ uint16_t vendor;
+ const char obj_type[16];
+ uint32_t ver_major;
+ uint32_t ver_minor;
+};
+
+/**
+ * enum fsl_mc_pool_type - Types of allocatable MC bus resources
+ *
+ * Entries in these enum are used as indices in the array of resource
+ * pools of an fsl_mc_bus object.
+ */
+enum fsl_mc_pool_type {
+ FSL_MC_POOL_DPMCP = 0x0, /* corresponds to "dpmcp" in the MC */
+ FSL_MC_POOL_DPBP, /* corresponds to "dpbp" in the MC */
+ FSL_MC_POOL_DPCON, /* corresponds to "dpcon" in the MC */
+
+ /*
+ * NOTE: New resource pool types must be added before this entry
+ */
+ FSL_MC_NUM_POOL_TYPES
+};
+
+/**
+ * struct fsl_mc_resource - MC generic resource
+ * @type: type of resource
+ * @id: unique MC resource Id within the resources of the same type
+ * @data: pointer to resource-specific data if the resource is currently
+ * allocated, or NULL if the resource is not currently allocated.
+ * @parent_pool: pointer to the parent resource pool from which this
+ * resource is allocated from.
+ * @node: Node in the free list of the corresponding resource pool
+ *
+ * NOTE: This structure is to be embedded as a field of specific
+ * MC resource structures.
+ */
+struct fsl_mc_resource {
+ enum fsl_mc_pool_type type;
+ int32_t id;
+ void *data;
+ struct fsl_mc_resource_pool *parent_pool;
+ struct list_head node;
+};
+
+/**
+ * Bit masks for a MC object device (struct fsl_mc_device) flags
+ */
+#define FSL_MC_IS_DPRC 0x0001
+
+/**
+ * Default DMA mask for devices on a fsl-mc bus
+ */
+#define FSL_MC_DEFAULT_DMA_MASK (~0ULL)
+
+/**
+ * struct fsl_mc_device - MC object device object
+ * @dev: Linux driver model device object
+ * @dma_mask: Default DMA mask
+ * @flags: MC object device flags
+ * @icid: Isolation context ID for the device
+ * @mc_handle: MC handle for the corresponding MC object opened
+ * @mc_io: Pointer to MC IO object assigned to this device or
+ * NULL if none.
+ * @obj_desc: MC description of the DPAA device
+ * @regions: pointer to array of MMIO region entries
+ * @resource: generic resource associated with this MC object device, if any.
+ *
+ * Generic device object for MC object devices that are "attached" to a
+ * MC bus.
+ *
+ * NOTES:
+ * - For a non-DPRC object its icid is the same as its parent DPRC's icid.
+ * - The SMMU notifier callback gets invoked after device_add() has been
+ * called for an MC object device, but before the device-specific probe
+ * callback gets called.
+ * - DP_OBJ_DPRC objects are the only MC objects that have built-in MC
+ * portals. For all other MC objects, their device drivers are responsible for
+ * allocating MC portals for them by calling fsl_mc_portal_allocate().
+ * - Some types of MC objects (e.g., DP_OBJ_DPBP, DP_OBJ_DPCON) are
+ * treated as resources that can be allocated/deallocated from the
+ * corresponding resource pool in the object's parent DPRC, using the
+ * fsl_mc_object_allocate()/fsl_mc_object_free() functions. These MC objects
+ * are known as "allocatable" objects. For them, the corresponding
+ * fsl_mc_device's 'resource' points to the associated resource object.
+ * For MC objects that are not allocatable (e.g., DP_OBJ_DPRC, DP_OBJ_DPNI),
+ * 'resource' is NULL.
+ */
+struct fsl_mc_device {
+ struct device dev;
+ uint64_t dma_mask;
+ uint16_t flags;
+ uint16_t icid;
+ uint16_t mc_handle;
+ struct fsl_mc_io *mc_io;
+ struct dprc_obj_desc obj_desc;
+ struct resource *regions;
+ struct fsl_mc_resource *resource;
+};
+
+#define to_fsl_mc_device(_dev) \
+ container_of(_dev, struct fsl_mc_device, dev)
+
+/*
+ * module_fsl_mc_driver() - Helper macro for drivers that don't do
+ * anything special in module init/exit. This eliminates a lot of
+ * boilerplate. Each module may only use this macro once, and
+ * calling it replaces module_init() and module_exit()
+ */
+#define module_fsl_mc_driver(__fsl_mc_driver) \
+ module_driver(__fsl_mc_driver, fsl_mc_driver_register, \
+ fsl_mc_driver_unregister)
+
+/*
+ * Macro to avoid include chaining to get THIS_MODULE
+ */
+#define fsl_mc_driver_register(drv) \
+ __fsl_mc_driver_register(drv, THIS_MODULE)
+
+int __must_check __fsl_mc_driver_register(struct fsl_mc_driver *fsl_mc_driver,
+ struct module *owner);
+
+void fsl_mc_driver_unregister(struct fsl_mc_driver *driver);
+
+int __must_check fsl_mc_portal_allocate(struct fsl_mc_device *mc_dev,
+ uint16_t mc_io_flags,
+ struct fsl_mc_io **new_mc_io);
+
+void fsl_mc_portal_free(struct fsl_mc_io *mc_io);
+
+int fsl_mc_portal_reset(struct fsl_mc_io *mc_io);
+
+int __must_check fsl_mc_object_allocate(struct fsl_mc_device *mc_dev,
+ enum fsl_mc_pool_type pool_type,
+ struct fsl_mc_device **new_mc_adev);
+
+void fsl_mc_object_free(struct fsl_mc_device *mc_adev);
+
+extern struct bus_type fsl_mc_bus_type;
+
+#endif /* _FSL_MC_H_ */
.resume = ft1000_resume,
};
-static int __init init_ft1000_cs(void)
-{
- return pcmcia_register_driver(&ft1000_cs_driver);
-}
-
-static void __exit exit_ft1000_cs(void)
-{
- pcmcia_unregister_driver(&ft1000_cs_driver);
-}
-
-module_init(init_ft1000_cs);
-module_exit(exit_ft1000_cs);
+module_pcmcia_driver(ft1000_cs_driver);
u16 *usPtr = (u16 *)pHdr;
u16 chksum;
- chksum = ((((((usPtr[0] ^ usPtr[1]) ^ usPtr[2]) ^ usPtr[3]) ^
- usPtr[4]) ^ usPtr[5]) ^ usPtr[6]);
+ chksum = (((((usPtr[0] ^ usPtr[1]) ^ usPtr[2]) ^ usPtr[3]) ^
+ usPtr[4]) ^ usPtr[5]) ^ usPtr[6];
return chksum;
}
/* Get buffer for provisioning data */
pbuffer =
- kmalloc((usHdrLength + sizeof(struct pseudo_hdr)),
+ kmalloc(usHdrLength + sizeof(struct pseudo_hdr),
GFP_ATOMIC);
if (pbuffer) {
- memcpy(pbuffer, (void *)pUcFile,
+ memcpy(pbuffer, pUcFile,
(u32) (usHdrLength +
sizeof(struct pseudo_hdr)));
/* link provisioning data */
*/
if (info->AsicID == MAGNEMITE_ID) {
ft1000_write_reg(dev, FT1000_REG_RESET,
- (DSP_RESET_BIT | ASIC_RESET_BIT));
+ DSP_RESET_BIT | ASIC_RESET_BIT);
}
mdelay(1);
if (info->AsicID == ELECTRABUZZ_ID) {
int i;
unsigned long flags;
struct prov_record *ptr;
+ struct prov_record *tmp;
info->CardReady = 0;
info->ProgConStat = 0;
/* del_timer(&poll_timer); */
/* Make sure we free any memory reserve for provisioning */
- while (list_empty(&info->prov_list) == 0) {
+ list_for_each_entry_safe(ptr, tmp, &info->prov_list, list) {
pr_debug("deleting provisioning record\n");
- ptr = list_entry(info->prov_list.next, struct prov_record, list);
list_del(&ptr->list);
kfree(ptr->pprov_data);
kfree(ptr);
} else {
pr_debug("resetting ASIC and DSP\n");
ft1000_write_reg(dev, FT1000_REG_RESET,
- (DSP_RESET_BIT | ASIC_RESET_BIT));
+ DSP_RESET_BIT | ASIC_RESET_BIT);
}
/* Copy DSP session record into info block if this is not a coldstart */
if (card_download(dev, fw_entry->data, fw_entry->size)) {
pr_debug("card download unsuccessful\n");
return false;
- } else {
- pr_debug("card download successful\n");
}
+ pr_debug("card download successful\n");
mdelay(10);
if (size > maxsz) {
pr_debug("Invalid command length = %d\n", size);
return false;
+ }
+ ppseudohdr = (u16 *)pbuffer;
+ spin_lock_irqsave(&info->dpram_lock, flags);
+ if (info->AsicID == ELECTRABUZZ_ID) {
+ ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
+ FT1000_DPRAM_RX_BASE + 2);
+ for (i = 0; i <= (size >> 1); i++) {
+ tempword =
+ ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
+ *pbuffer++ = ntohs(tempword);
+ }
} else {
- ppseudohdr = (u16 *)pbuffer;
- spin_lock_irqsave(&info->dpram_lock, flags);
- if (info->AsicID == ELECTRABUZZ_ID) {
- ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
- FT1000_DPRAM_RX_BASE + 2);
- for (i = 0; i <= (size >> 1); i++) {
- tempword =
- ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
- *pbuffer++ = ntohs(tempword);
- }
- } else {
- ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
- FT1000_DPRAM_MAG_RX_BASE);
- *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAH);
- pr_debug("received data = 0x%x\n", *pbuffer);
- pbuffer++;
- ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
- FT1000_DPRAM_MAG_RX_BASE + 1);
- for (i = 0; i <= (size >> 2); i++) {
- *pbuffer =
- inw(dev->base_addr +
- FT1000_REG_MAG_DPDATAL);
- pbuffer++;
- *pbuffer =
- inw(dev->base_addr +
- FT1000_REG_MAG_DPDATAH);
- pbuffer++;
- }
- /* copy odd aligned word */
- *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAL);
- pr_debug("received data = 0x%x\n", *pbuffer);
+ ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
+ FT1000_DPRAM_MAG_RX_BASE);
+ *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAH);
+ pr_debug("received data = 0x%x\n", *pbuffer);
+ pbuffer++;
+ ft1000_write_reg(dev, FT1000_REG_DPRAM_ADDR,
+ FT1000_DPRAM_MAG_RX_BASE + 1);
+ for (i = 0; i <= (size >> 2); i++) {
+ *pbuffer =
+ inw(dev->base_addr +
+ FT1000_REG_MAG_DPDATAL);
pbuffer++;
- *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAH);
- pr_debug("received data = 0x%x\n", *pbuffer);
+ *pbuffer =
+ inw(dev->base_addr +
+ FT1000_REG_MAG_DPDATAH);
pbuffer++;
}
- if (size & 0x0001) {
- /* copy odd byte from fifo */
- tempword = ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
- *pbuffer = ntohs(tempword);
- }
- spin_unlock_irqrestore(&info->dpram_lock, flags);
+ /* copy odd aligned word */
+ *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAL);
+ pr_debug("received data = 0x%x\n", *pbuffer);
+ pbuffer++;
+ *pbuffer = inw(dev->base_addr + FT1000_REG_MAG_DPDATAH);
+ pr_debug("received data = 0x%x\n", *pbuffer);
+ pbuffer++;
+ }
+ if (size & 0x0001) {
+ /* copy odd byte from fifo */
+ tempword = ft1000_read_reg(dev, FT1000_REG_DPRAM_DATA);
+ *pbuffer = ntohs(tempword);
+ }
+ spin_unlock_irqrestore(&info->dpram_lock, flags);
- /*
- * Check if pseudo header checksum is good
- * Calculate pseudo header checksum
- */
- tempword = *ppseudohdr++;
- for (i = 1; i < 7; i++)
- tempword ^= *ppseudohdr++;
- if ((tempword != *ppseudohdr)) {
- pr_debug("Pseudo header checksum mismatch\n");
- /* Drop this message */
- return false;
- }
- return true;
+ /*
+ * Check if pseudo header checksum is good
+ * Calculate pseudo header checksum
+ */
+ tempword = *ppseudohdr++;
+ for (i = 1; i < 7; i++)
+ tempword ^= *ppseudohdr++;
+ if (tempword != *ppseudohdr) {
+ pr_debug("Pseudo header checksum mismatch\n");
+ /* Drop this message */
+ return false;
}
+ return true;
}
/*---------------------------------------------------------------------------
info->DSPInfoBlk[8] = 0x7200;
info->DSPInfoBlk[9] =
htons(info->DSPInfoBlklen);
- ft1000_send_cmd(dev, (u16 *)info->DSPInfoBlk, (u16)(info->DSPInfoBlklen+4), 0);
+ ft1000_send_cmd(dev, info->DSPInfoBlk,
+ (u16)(info->DSPInfoBlklen+4),
+ 0);
}
break;
2) >> 8) & 0xff;
} else {
portid =
- (ft1000_read_dpram_mag_16
+ ft1000_read_dpram_mag_16
(dev, FT1000_MAG_PORT_ID,
- FT1000_MAG_PORT_ID_INDX) & 0xff);
+ FT1000_MAG_PORT_ID_INDX) & 0xff;
}
pr_debug("DSP_QID = 0x%x\n", portid);
info->DrvErrNum = DrvErrNum;
ft1000_reset_card(dev);
return;
- } else {
- /* Flush corrupted pkt from FIFO */
- i = 0;
- do {
+ }
+ /* Flush corrupted pkt from FIFO */
+ i = 0;
+ do {
+ if (info->AsicID == ELECTRABUZZ_ID) {
+ tempword =
+ ft1000_read_reg(dev, FT1000_REG_DFIFO);
+ tempword =
+ ft1000_read_reg(dev, FT1000_REG_DFIFO_STAT);
+ } else {
+ templong =
+ inl(dev->base_addr + FT1000_REG_MAG_DFR);
+ tempword =
+ inw(dev->base_addr + FT1000_REG_MAG_DFSR);
+ }
+ i++;
+ /*
+ * This should never happen unless the ASIC is broken.
+ * We must reset to recover.
+ */
+ if ((i > 2048) || (tempword == 0)) {
if (info->AsicID == ELECTRABUZZ_ID) {
- tempword =
- ft1000_read_reg(dev, FT1000_REG_DFIFO);
- tempword =
- ft1000_read_reg(dev, FT1000_REG_DFIFO_STAT);
+ info->DSP_TIME[0] =
+ ft1000_read_dpram(dev,
+ FT1000_DSP_TIMER0);
+ info->DSP_TIME[1] =
+ ft1000_read_dpram(dev,
+ FT1000_DSP_TIMER1);
+ info->DSP_TIME[2] =
+ ft1000_read_dpram(dev,
+ FT1000_DSP_TIMER2);
+ info->DSP_TIME[3] =
+ ft1000_read_dpram(dev,
+ FT1000_DSP_TIMER3);
} else {
- templong =
- inl(dev->base_addr + FT1000_REG_MAG_DFR);
- tempword =
- inw(dev->base_addr + FT1000_REG_MAG_DFSR);
+ info->DSP_TIME[0] =
+ ft1000_read_dpram_mag_16(dev,
+ FT1000_MAG_DSP_TIMER0,
+ FT1000_MAG_DSP_TIMER0_INDX);
+ info->DSP_TIME[1] =
+ ft1000_read_dpram_mag_16(dev,
+ FT1000_MAG_DSP_TIMER1,
+ FT1000_MAG_DSP_TIMER1_INDX);
+ info->DSP_TIME[2] =
+ ft1000_read_dpram_mag_16(dev,
+ FT1000_MAG_DSP_TIMER2,
+ FT1000_MAG_DSP_TIMER2_INDX);
+ info->DSP_TIME[3] =
+ ft1000_read_dpram_mag_16(dev,
+ FT1000_MAG_DSP_TIMER3,
+ FT1000_MAG_DSP_TIMER3_INDX);
}
- i++;
- /*
- * This should never happen unless the ASIC is broken.
- * We must reset to recover.
- */
- if ((i > 2048) || (tempword == 0)) {
- if (info->AsicID == ELECTRABUZZ_ID) {
- info->DSP_TIME[0] =
- ft1000_read_dpram(dev,
- FT1000_DSP_TIMER0);
- info->DSP_TIME[1] =
- ft1000_read_dpram(dev,
- FT1000_DSP_TIMER1);
- info->DSP_TIME[2] =
- ft1000_read_dpram(dev,
- FT1000_DSP_TIMER2);
- info->DSP_TIME[3] =
- ft1000_read_dpram(dev,
- FT1000_DSP_TIMER3);
- } else {
- info->DSP_TIME[0] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER0,
- FT1000_MAG_DSP_TIMER0_INDX);
- info->DSP_TIME[1] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER1,
- FT1000_MAG_DSP_TIMER1_INDX);
- info->DSP_TIME[2] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER2,
- FT1000_MAG_DSP_TIMER2_INDX);
- info->DSP_TIME[3] =
- ft1000_read_dpram_mag_16(dev,
- FT1000_MAG_DSP_TIMER3,
- FT1000_MAG_DSP_TIMER3_INDX);
- }
+ if (tempword == 0) {
+ /*
+ * Let's check if ASIC reads are still ok by reading the Mask register
+ * which is never zero at this point of the code.
+ */
+ tempword =
+ inw(dev->base_addr +
+ FT1000_REG_SUP_IMASK);
if (tempword == 0) {
- /*
- * Let's check if ASIC reads are still ok by reading the Mask register
- * which is never zero at this point of the code.
- */
- tempword =
- inw(dev->base_addr +
- FT1000_REG_SUP_IMASK);
- if (tempword == 0) {
- /* This indicates that we can not communicate with the ASIC */
- info->DrvErrNum =
- FIFO_FLUSH_BADCNT;
- } else {
- /* Let's assume that we really flush the FIFO */
- pcmcia->PktIntfErr++;
- return;
- }
+ /* This indicates that we can not communicate with the ASIC */
+ info->DrvErrNum =
+ FIFO_FLUSH_BADCNT;
} else {
- info->DrvErrNum = FIFO_FLUSH_MAXLIMIT;
+ /* Let's assume that we really flush the FIFO */
+ pcmcia->PktIntfErr++;
+ return;
}
- return;
+ } else {
+ info->DrvErrNum = FIFO_FLUSH_MAXLIMIT;
}
- tempword = inw(dev->base_addr + FT1000_REG_SUP_STAT);
- } while ((tempword & 0x03) != 0x03);
- if (info->AsicID == ELECTRABUZZ_ID) {
- i++;
- pr_debug("Flushing FIFO complete = %x\n", tempword);
- /* Flush last word in FIFO. */
- tempword = ft1000_read_reg(dev, FT1000_REG_DFIFO);
- /* Update FIFO counter for DSP */
- i = i * 2;
- pr_debug("Flush Data byte count to dsp = %d\n", i);
- info->fifo_cnt += i;
- ft1000_write_dpram(dev, FT1000_FIFO_LEN,
- info->fifo_cnt);
- } else {
- pr_debug("Flushing FIFO complete = %x\n", tempword);
- /* Flush last word in FIFO */
- templong = inl(dev->base_addr + FT1000_REG_MAG_DFR);
- tempword = inw(dev->base_addr + FT1000_REG_SUP_STAT);
- pr_debug("FT1000_REG_SUP_STAT = 0x%x\n", tempword);
- tempword = inw(dev->base_addr + FT1000_REG_MAG_DFSR);
- pr_debug("FT1000_REG_MAG_DFSR = 0x%x\n", tempword);
+ return;
}
- if (DrvErrNum)
- pcmcia->PktIntfErr++;
+ tempword = inw(dev->base_addr + FT1000_REG_SUP_STAT);
+ } while ((tempword & 0x03) != 0x03);
+ if (info->AsicID == ELECTRABUZZ_ID) {
+ i++;
+ pr_debug("Flushing FIFO complete = %x\n", tempword);
+ /* Flush last word in FIFO. */
+ tempword = ft1000_read_reg(dev, FT1000_REG_DFIFO);
+ /* Update FIFO counter for DSP */
+ i = i * 2;
+ pr_debug("Flush Data byte count to dsp = %d\n", i);
+ info->fifo_cnt += i;
+ ft1000_write_dpram(dev, FT1000_FIFO_LEN,
+ info->fifo_cnt);
+ } else {
+ pr_debug("Flushing FIFO complete = %x\n", tempword);
+ /* Flush last word in FIFO */
+ templong = inl(dev->base_addr + FT1000_REG_MAG_DFR);
+ tempword = inw(dev->base_addr + FT1000_REG_SUP_STAT);
+ pr_debug("FT1000_REG_SUP_STAT = 0x%x\n", tempword);
+ tempword = inw(dev->base_addr + FT1000_REG_MAG_DFSR);
+ pr_debug("FT1000_REG_MAG_DFSR = 0x%x\n", tempword);
}
+ if (DrvErrNum)
+ pcmcia->PktIntfErr++;
}
/*---------------------------------------------------------------------------
ft1000_read_reg(dev,
FT1000_REG_MAG_DFSR);
}
- if (tempword & 0x1f) {
+ if (tempword & 0x1f)
ft1000_copy_up_pkt(dev);
- } else {
+ else
break;
- }
cnt++;
} while (cnt < MAX_RCV_LOOP);
{
struct ft1000_info *info = netdev_priv(dev);
struct prov_record *ptr;
+ struct prov_record *tmp;
/* int cnt; */
info->CardReady = 0;
ft1000_disable_interrupts(dev);
/* Make sure we free any memory reserve for provisioning */
- while (list_empty(&info->prov_list) == 0) {
- ptr = list_entry(info->prov_list.next, struct prov_record, list);
+ list_for_each_entry_safe(ptr, tmp, &info->prov_list, list) {
list_del(&ptr->list);
kfree(ptr->pprov_data);
kfree(ptr);
struct ethtool_drvinfo *info)
{
struct ft1000_info *ft_info;
+
ft_info = netdev_priv(dev);
strlcpy(info->driver, "ft1000", sizeof(info->driver));
tmp->dent = dir;
tmp->file = file;
tmp->int_number = dev->CardNumber;
- list_add(&(tmp->list), &(dev->nodes.list));
+ list_add(&tmp->list, &dev->nodes.list);
pr_debug("registered debugfs directory \"%s\"\n", dev->DeviceName);
struct ft1000_usb *dev = (struct ft1000_usb *)inode->i_private;
int i, num;
- num = (MINOR(inode->i_rdev) & 0xf);
+ num = MINOR(inode->i_rdev) & 0xf;
pr_debug("minor number=%d\n", num);
info = file->private_data = netdev_priv(dev->net);
/* Search for available application info block */
for (i = 0; i < MAX_NUM_APP; i++) {
- if ((dev->app_info[i].fileobject == NULL)) {
+ if ((dev->app_info[i].fileobject == NULL))
break;
- }
}
/* Fail due to lack of application info block */
/* Connect Message */
pr_debug("IOCTL_FT1000_CONNECT\n");
ConnectionMsg[79] = 0xfc;
- result = card_send_command(ft1000dev, (unsigned short *)ConnectionMsg, 0x4c);
+ result = card_send_command(ft1000dev, ConnectionMsg, 0x4c);
break;
case IOCTL_DISCONNECT:
/* Disconnect Message */
pr_debug("IOCTL_FT1000_DISCONNECT\n");
ConnectionMsg[79] = 0xfd;
- result = card_send_command(ft1000dev, (unsigned short *)ConnectionMsg, 0x4c);
+ result = card_send_command(ft1000dev, ConnectionMsg, 0x4c);
break;
case IOCTL_GET_DSP_STAT_CMD:
/* pr_debug("IOCTL_FT1000_GET_DSP_STAT\n"); */
if (ft1000dev->fProvComplete == 0)
return -EACCES;
- ft1000dev->fAppMsgPend = 1;
+ ft1000dev->fAppMsgPend = true;
if (info->CardReady) {
} else {
/* Check if this message came from a registered application */
for (i = 0; i < MAX_NUM_APP; i++) {
- if (ft1000dev->app_info[i].fileobject == &file->f_owner) {
+ if (ft1000dev->app_info[i].fileobject == &file->f_owner)
break;
- }
}
if (i == MAX_NUM_APP) {
pr_debug("No matching application fileobject\n");
pmsg = (u16 *)&dpram_data->pseudohdr;
ppseudo_hdr = (struct pseudo_hdr *)pmsg;
total_len = msgsz+2;
- if (total_len & 0x1) {
+ if (total_len & 0x1)
total_len++;
- }
/* Insert slow queue sequence number */
ppseudo_hdr->seq_num = info->squeseqnum++;
}
pmsg++;
ppseudo_hdr = (struct pseudo_hdr *)pmsg;
- result = card_send_command(ft1000dev, (unsigned short *)dpram_data, total_len+2);
+ result = card_send_command(ft1000dev, dpram_data, total_len+2);
ft1000dev->app_info[app_index].nTxMsg++;
result = -ENOTTY;
break;
}
- ft1000dev->fAppMsgPend = 0;
+ ft1000dev->fAppMsgPend = false;
return result;
}
struct ft1000_usb *ft1000dev;
int i;
struct dpram_blk *pdpram_blk;
+ struct dpram_blk *tmp;
dev = file->private_data;
info = netdev_priv(dev);
if (i == MAX_NUM_APP)
return 0;
- while (list_empty(&ft1000dev->app_info[i].app_sqlist) == 0) {
+ list_for_each_entry_safe(pdpram_blk, tmp, &ft1000dev->app_info[i].app_sqlist, list) {
pr_debug("Remove and free memory queue up on slow queue\n");
- pdpram_blk = list_entry(ft1000dev->app_info[i].app_sqlist.next, struct dpram_blk, list);
list_del(&pdpram_blk->list);
ft1000_free_buffer(pdpram_blk, &freercvpool);
}
while (loopcnt < 100) {
if (ft1000dev->usbboot == 2) {
status = ft1000_read_dpram32(ft1000dev, 0,
- (u8 *)&(ft1000dev->tempbuf[0]), 64);
+ (u8 *)&ft1000dev->tempbuf[0], 64);
for (temp = 0; temp < 16; temp++) {
pr_debug("tempbuf %d = 0x%x\n",
temp, ft1000dev->tempbuf[temp]);
u16 chksum;
- chksum = ((((((usPtr[0] ^ usPtr[1]) ^ usPtr[2]) ^ usPtr[3]) ^
- usPtr[4]) ^ usPtr[5]) ^ usPtr[6]);
+ chksum = (((((usPtr[0] ^ usPtr[1]) ^ usPtr[2]) ^ usPtr[3]) ^
+ usPtr[4]) ^ usPtr[5]) ^ usPtr[6];
return chksum;
}
usb_sndbulkpipe(ft1000dev->dev,
ft1000dev->bulk_out_endpointAddr),
ft1000dev->tx_buf, byte_length, usb_dnld_complete,
- (void *)ft1000dev);
+ ft1000dev);
usb_submit_urb(ft1000dev->tx_urb, GFP_ATOMIC);
case REQUEST_CODE_SEGMENT:
status = request_code_segment(ft1000dev,
&s_file, &c_file,
- (const u8 *)boot_end,
+ boot_end,
true);
break;
default:
status = request_code_segment(ft1000dev,
&s_file, &c_file,
- (const u8 *)code_end,
+ code_end,
false);
break;
/* Get buffer for provisioning data */
pbuffer =
- kmalloc((pseudo_header_len +
- sizeof(struct pseudo_hdr)),
+ kmalloc(pseudo_header_len +
+ sizeof(struct pseudo_hdr),
GFP_ATOMIC);
if (pbuffer) {
- memcpy(pbuffer, (void *)c_file,
+ memcpy(pbuffer, c_file,
(u32) (pseudo_header_len +
sizeof(struct
pseudo_hdr)));
commandbuf = kmalloc(size + 2, GFP_KERNEL);
if (!commandbuf)
return -ENOMEM;
- memcpy((void *)commandbuf + 2, (void *)ptempbuffer, size);
+ memcpy((void *)commandbuf + 2, ptempbuffer, size);
if (temp & 0x0100)
usleep_range(900, 1100);
/* Let's use the register provided by the Magnemite ASIC to reset the
* ASIC and DSP.
*/
- ft1000_write_register(ft1000dev, (DSP_RESET_BIT | ASIC_RESET_BIT),
+ ft1000_write_register(ft1000dev, DSP_RESET_BIT | ASIC_RESET_BIT,
FT1000_REG_RESET);
mdelay(1);
struct ft1000_usb *ft1000dev = info->priv;
u16 tempword;
struct prov_record *ptr;
+ struct prov_record *tmp;
ft1000dev->fCondResetPend = true;
info->CardReady = 0;
ft1000dev->fProvComplete = false;
/* Make sure we free any memory reserve for provisioning */
- while (list_empty(&info->prov_list) == 0) {
+ list_for_each_entry_safe(ptr, tmp, &info->prov_list, list) {
pr_debug("deleting provisioning record\n");
- ptr =
- list_entry(info->prov_list.next, struct prov_record, list);
list_del(&ptr->list);
kfree(ptr->pprov_data);
kfree(ptr);
hdr.portdest ^ hdr.portsrc ^ hdr.sh_str_id ^ hdr.control;
memcpy(&pFt1000Dev->tx_buf[0], &hdr, sizeof(hdr));
- memcpy(&(pFt1000Dev->tx_buf[sizeof(struct pseudo_hdr)]), packet, len);
+ memcpy(&pFt1000Dev->tx_buf[sizeof(struct pseudo_hdr)], packet, len);
netif_stop_queue(netdev);
usb_sndbulkpipe(pFt1000Dev->dev,
pFt1000Dev->bulk_out_endpointAddr),
pFt1000Dev->tx_buf, count,
- ft1000_usb_transmit_complete, (void *)pFt1000Dev);
+ ft1000_usb_transmit_complete, pFt1000Dev);
t = (u8 *)pFt1000Dev->tx_urb->transfer_buffer;
goto err;
}
- ft1000_copy_down_pkt(dev, (pdata + ENET_HEADER_SIZE - 2),
+ ft1000_copy_down_pkt(dev, pdata + ENET_HEADER_SIZE - 2,
skb->len - ENET_HEADER_SIZE + 2);
err:
/* Reset ASIC and DSP */
status = ft1000_read_dpram16(dev,
FT1000_MAG_DSP_TIMER0,
- (u8 *)&(info->DSP_TIME[0]),
+ (u8 *)&info->DSP_TIME[0],
FT1000_MAG_DSP_TIMER0_INDX);
status = ft1000_read_dpram16(dev,
FT1000_MAG_DSP_TIMER1,
- (u8 *)&(info->DSP_TIME[1]),
+ (u8 *)&info->DSP_TIME[1],
FT1000_MAG_DSP_TIMER1_INDX);
status = ft1000_read_dpram16(dev,
FT1000_MAG_DSP_TIMER2,
- (u8 *)&(info->DSP_TIME[2]),
+ (u8 *)&info->DSP_TIME[2],
FT1000_MAG_DSP_TIMER2_INDX);
status = ft1000_read_dpram16(dev,
FT1000_MAG_DSP_TIMER3,
- (u8 *)&(info->DSP_TIME[3]),
+ (u8 *)&info->DSP_TIME[3],
FT1000_MAG_DSP_TIMER3_INDX);
info->CardReady = 0;
info->DrvErrNum = DSP_CONDRESET_INFO;
ret = request_firmware(&dsp_fw, "ft3000.img", &dev->dev);
if (ret < 0) {
- pr_err("Error request_firmware()\n");
+ dev_err(interface->usb_dev, "Error request_firmware()\n");
goto err_fw;
}
pr_debug("pft1000info=%p\n", pft1000info);
ret = dsp_reload(ft1000dev);
if (ret) {
- pr_err("Problem with DSP image loading\n");
+ dev_err(interface->usb_dev,
+ "Problem with DSP image loading\n");
goto err_load;
}
{
struct fwtty_port *port = tty->driver_data;
- fwtty_dbg(port, "CRTSCTS: %d\n", (C_CRTSCTS(tty) != 0));
+ fwtty_dbg(port, "CRTSCTS: %d\n", C_CRTSCTS(tty) != 0);
fwtty_profile_fifo(port, port->stats.unthrottle);
/* Allocate netdev */
net = alloc_netdev(sizeof(struct nic), pdn_dev_name,
NET_NAME_UNKNOWN, ether_setup);
- if (net == NULL) {
+ if (!net) {
pr_err("alloc_netdev failed\n");
ret = -ENOMEM;
goto err;
if (urb->status) {
if (mux_dev->usb_state == PM_NORMAL)
- pr_err("%s: urb status error %d\n",
+ dev_err(&urb->dev->dev, "%s: urb status error %d\n",
__func__, urb->status);
put_rx_struct(rx, r);
} else {
struct mux_tx *t = urb->context;
if (urb->status == -ECONNRESET) {
- pr_info("CONNRESET\n");
+ dev_info(&urb->dev->dev, "CONNRESET\n");
free_mux_tx(t);
return;
}
rx = &mux_dev->rx;
if (mux_dev->usb_state != PM_NORMAL) {
- pr_err("usb suspend - invalid state\n");
+ dev_err(intf->usb_dev, "usb suspend - invalid state\n");
return -1;
}
mux_dev = tty_dev->priv_dev;
if (mux_dev->usb_state != PM_SUSPEND) {
- pr_err("usb resume - invalid state\n");
+ dev_err(intf->usb_dev, "usb resume - invalid state\n");
return -1;
}
spin_unlock_irqrestore(&rx->to_host_lock, flags);
} else {
if (urb->status && udev->usb_state == PM_NORMAL)
- pr_err("%s: urb status error %d\n",
+ dev_err(&urb->dev->dev, "%s: urb status error %d\n",
__func__, urb->status);
put_rx_struct(rx, r);
unsigned long flags;
if (urb->status == -ECONNRESET) {
- pr_info("CONNRESET\n");
+ dev_info(&urb->dev->dev, "CONNRESET\n");
return;
}
ret = usb_submit_urb(t->urb, GFP_ATOMIC);
if (ret)
- pr_err("usb_submit_urb failed: %d\n", ret);
+ dev_err(&usbdev->dev, "usb_submit_urb failed: %d\n",
+ ret);
usb_mark_last_busy(usbdev);
udev->usbdev = usbdev;
ret = init_usb(udev);
if (ret < 0) {
- pr_err("init_usb func failed\n");
+ dev_err(intf->usb_dev, "init_usb func failed\n");
goto err_init_usb;
}
udev->intf = intf;
ret = request_mac_address(udev);
if (ret < 0) {
- pr_err("request Mac address failed\n");
+ dev_err(intf->usb_dev, "request Mac address failed\n");
goto err_mac_address;
}
udev = phy_dev->priv_dev;
rx = &udev->rx;
if (udev->usb_state != PM_NORMAL) {
- pr_err("usb suspend - invalid state\n");
+ dev_err(intf->usb_dev, "usb suspend - invalid state\n");
return -1;
}
rx = &udev->rx;
if (udev->usb_state != PM_SUSPEND) {
- pr_err("usb resume - invalid state\n");
+ dev_err(intf->usb_dev, "usb resume - invalid state\n");
return -1;
}
udev->usb_state = PM_NORMAL;
}
spin_unlock_irqrestore(&qos_free_list.lock, flags);
- entry = kmalloc(sizeof(*entry), GFP_ATOMIC);
- return entry;
+ return kmalloc(sizeof(*entry), GFP_ATOMIC);
}
static void free_qos_entry(void *entry)
if (ret < 0) {
if (ret != -ENOMEDIUM)
dev_err(&func->dev,
- "gdmwms: %s error: ret = %d\n",
- __func__, ret);
+ "gdmwms: error: ret = %d\n", ret);
goto end_io;
}
}
if (ret < 0) {
if (ret != -ENOMEDIUM)
dev_err(&func->dev,
- "gdmwms: %s error: ret = %d\n",
- __func__, ret);
+ "gdmwms: error: ret = %d\n", ret);
goto end_io;
}
}
int idx;
unsigned long flags;
struct evt_entry *e;
+ struct evt_entry *tmp;
spin_lock_irqsave(&wm_event.evt_lock, flags);
- while (!list_empty(&wm_event.evtq)) {
- e = list_entry(wm_event.evtq.next, struct evt_entry, list);
+ list_for_each_entry_safe(e, tmp, &wm_event.evtq, list) {
spin_unlock_irqrestore(&wm_event.evt_lock, flags);
if (sscanf(e->dev->name, "wm%d", &idx) == 1)
dev = alloc_netdev(sizeof(*nic), "wm%d", NET_NAME_UNKNOWN,
ether_setup);
- if (dev == NULL) {
+ if (!dev) {
pr_err("alloc_etherdev failed\n");
return -ENOMEM;
}
spinlock_t lock;
wait_queue_head_t wait;
- char __iomem *buffer_virt; /* combined buffer virtual address */
+ char *buffer_virt; /* combined buffer virtual address */
unsigned long buffer_phys; /* combined buffer physical address */
- char __iomem *write_buffer1; /* write buffer 1 virtual address */
- char __iomem *write_buffer2; /* write buffer 2 virtual address */
- char __iomem *read_buffer; /* read buffer virtual address */
+ char *write_buffer1; /* write buffer 1 virtual address */
+ char *write_buffer2; /* write buffer 2 virtual address */
+ char *read_buffer; /* read buffer virtual address */
int buffer_status;
int read_supported; /* true if we have audio input support */
};
length = (count > READ_BUFFER_SIZE ? READ_BUFFER_SIZE : count);
AUDIO_WRITE(data, AUDIO_START_READ, length);
- wait_event_interruptible(data->wait, (data->buffer_status &
- AUDIO_INT_READ_BUFFER_FULL));
+ wait_event_interruptible(data->wait, data->buffer_status &
+ AUDIO_INT_READ_BUFFER_FULL);
length = AUDIO_READ(data, AUDIO_READ_BUFFER_AVAILABLE);
struct goldfish_audio *data = fp->private_data;
unsigned long irq_flags;
ssize_t result = 0;
- char __iomem *kbuf;
+ char *kbuf;
while (count > 0) {
ssize_t copy = count;
if (copy > WRITE_BUFFER_SIZE)
copy = WRITE_BUFFER_SIZE;
- wait_event_interruptible(data->wait, (data->buffer_status &
+ wait_event_interruptible(data->wait, data->buffer_status &
(AUDIO_INT_WRITE_BUFFER_1_EMPTY |
- AUDIO_INT_WRITE_BUFFER_2_EMPTY)));
+ AUDIO_INT_WRITE_BUFFER_2_EMPTY));
if ((data->buffer_status & AUDIO_INT_WRITE_BUFFER_1_EMPTY) != 0)
kbuf = data->write_buffer1;
dma_addr_t buf_addr;
data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
- if (data == NULL)
+ if (!data)
return -ENOMEM;
spin_lock_init(&data->lock);
init_waitqueue_head(&data->wait);
mtd->priv = nand;
name = devm_kzalloc(&pdev->dev, name_len + 1, GFP_KERNEL);
- if (name == NULL)
+ if (!name)
return -ENOMEM;
mtd->name = name;
return -ENODEV;
base = devm_ioremap(&pdev->dev, r->start, PAGE_SIZE);
- if (base == NULL)
+ if (!base)
return -ENOMEM;
version = readl(base + NAND_VERSION);
nand = devm_kzalloc(&pdev->dev, sizeof(*nand) +
sizeof(struct mtd_info) * num_dev, GFP_KERNEL);
- if (nand == NULL)
+ if (!nand)
return -ENOMEM;
mutex_init(&nand->lock);
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/device.h>
#include <linux/string.h>
struct i2o_device *i2o_dev = to_i2o_device(d);
int rc;
- if ((rc = i2o_bus_scan(i2o_dev)))
+ rc = i2o_bus_scan(i2o_dev);
+ if (rc)
osm_warn("bus scan failed %d\n", rc);
return count;
#include <linux/namei.h>
#include <linux/fs.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#define OSM_NAME "config-osm"
#define OSM_VERSION "1.323"
static void i2o_report_util_cmd(u8 cmd);
static void i2o_report_exec_cmd(u8 cmd);
-static void i2o_report_fail_status(u8 req_status, u32 * msg);
+static void i2o_report_fail_status(u8 req_status, u32 *msg);
static void i2o_report_common_status(u8 req_status);
static void i2o_report_common_dsc(u16 detailed_status);
u16 detailed_status = msg[4] & 0xFFFF;
if (cmd == I2O_CMD_UTIL_EVT_REGISTER)
- return; // No status in this reply
+ return; /* No status in this reply */
printk("%s%s: ", severity, str);
#ifdef DEBUG
u32 *msg = (u32 *) m;
int i;
+
printk(KERN_INFO "Dumping I2O message size %d @ %p\n",
msg[0] >> 16 & 0xffff, msg);
for (i = 0; i < ((msg[0] >> 16) & 0xffff); i++)
* Following fail status are common to all classes.
* The preserved message must be handled in the reply handler.
*/
-static void i2o_report_fail_status(u8 req_status, u32 * msg)
+static void i2o_report_fail_status(u8 req_status, u32 *msg)
{
static char *FAIL_STATUS[] = {
"0x80", /* not used */
size += 4 - size % 4;
opblk = kmalloc(size, GFP_KERNEL);
- if (opblk == NULL) {
- printk(KERN_ERR "i2o: no memory for query buffer.\n");
+ if (opblk == NULL)
return -ENOMEM;
- }
opblk[0] = 1; /* operation count */
opblk[1] = 0; /* pad */
for (i = 0; i2o_drivers[i]; i++)
if (i >= i2o_max_drivers) {
- osm_err("too many drivers registered, increase "
- "max_drivers\n");
+ osm_err("too many drivers registered, increase max_drivers\n");
spin_unlock_irqrestore(&i2o_drivers_lock, flags);
rc = -EFAULT;
goto out;
}
if (unlikely(!drv->reply)) {
- osm_debug("%s: Reply to driver %s, but no reply function"
- " defined!\n", c->name, drv->name);
+ osm_debug("%s: Reply to driver %s, but no reply function defined!\n",
+ c->name, drv->name);
return -EIO;
}
* to aid in debugging.
*
*/
- printk(KERN_WARNING "%s: Unsolicited message reply sent to core!"
- "Message dumped to syslog\n", c->name);
+ printk(KERN_WARNING "%s: Unsolicited message reply sent to core! Message dumped to syslog\n",
+ c->name);
i2o_dump_message(msg);
return -EFAULT;
struct i2o_block_device *i2o_blk_dev;
struct gendisk *gd;
struct request_queue *queue;
- static int unit = 0;
+ static int unit;
int rc;
u64 size;
u32 blocksize;
#include <linux/mutex.h>
#include <linux/compat.h>
#include <linux/slab.h>
-
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include "core.h"
struct i2o_cfg_info *next;
};
static struct i2o_cfg_info *open_files = NULL;
-static ulong i2o_cfg_info_id = 0;
+static ulong i2o_cfg_info_id;
static int i2o_cfg_getiops(unsigned long arg)
{
#include <linux/errno.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
+#include <linux/uaccess.h>
#include <asm/io.h>
-#include <asm/uaccess.h>
#include <asm/byteorder.h>
/* Structure used to define /proc entries */
switch (serialno[0]) {
case I2O_SNFORMAT_BINARY: /* Binary */
seq_printf(seq, "0x");
- for (i = 0; i < serialno[1]; i++) {
+ for (i = 0; i < serialno[1]; i++)
seq_printf(seq, "%02X", serialno[2 + i]);
- }
break;
case I2O_SNFORMAT_ASCII: /* ASCII */
seq_printf(seq, "%s", &serialno[2]);
} else {
/* print chars for specified length */
- for (i = 0; i < serialno[1]; i++) {
+ for (i = 0; i < serialno[1]; i++)
seq_printf(seq, "%c", serialno[2 + i]);
- }
}
break;
{
switch (block_status) {
case -ETIMEDOUT:
- return seq_printf(seq, "Timeout reading group %s.\n", group);
+ seq_printf(seq, "Timeout reading group %s.\n", group);
+ break;
case -ENOMEM:
- return seq_printf(seq, "No free memory to read the table.\n");
+ seq_puts(seq, "No free memory to read the table.\n");
+ break;
case -I2O_PARAMS_STATUS_INVALID_GROUP_ID:
- return seq_printf(seq, "Group %s not supported.\n", group);
+ seq_printf(seq, "Group %s not supported.\n", group);
+ break;
default:
- return seq_printf(seq,
- "Error reading group %s. BlockStatus 0x%02X\n",
- group, -block_status);
+ seq_printf(seq,
+ "Error reading group %s. BlockStatus 0x%02X\n",
+ group, -block_status);
+ break;
}
+
+ return 0;
}
static char *bus_strings[] = {
*/
struct i2o_controller *i2o_iop_alloc(void)
{
- static int unit = 0; /* 0 and 1 are NULL IOP and Local Host */
+ static int unit; /* 0 and 1 are NULL IOP and Local Host */
struct i2o_controller *c;
char poolname[32];
{
int rc;
- if ((rc = device_add(&c->device))) {
+ rc = device_add(&c->device);
+ if (rc) {
osm_err("%s: could not add controller\n", c->name);
goto iop_reset;
}
osm_info("%s: This may take a few minutes if there are many devices\n",
c->name);
- if ((rc = i2o_iop_activate(c))) {
+ rc = i2o_iop_activate(c);
+ if (rc) {
osm_err("%s: could not activate controller\n", c->name);
goto device_del;
}
osm_debug("%s: building sys table...\n", c->name);
- if ((rc = i2o_systab_build()))
+ rc = i2o_systab_build();
+ if (rc)
goto device_del;
osm_debug("%s: online controller...\n", c->name);
- if ((rc = i2o_iop_online(c)))
+ rc = i2o_iop_online(c);
+ if (rc)
goto device_del;
osm_debug("%s: getting LCT...\n", c->name);
- if ((rc = i2o_exec_lct_get(c)))
+ rc = i2o_exec_lct_get(c);
+ if (rc)
goto device_del;
list_add(&c->list, &i2o_controllers);
printk(KERN_INFO OSM_DESCRIPTION " v" OSM_VERSION "\n");
- if ((rc = i2o_driver_init()))
+ rc = i2o_driver_init();
+ if (rc)
goto exit;
- if ((rc = i2o_exec_init()))
+ rc = i2o_exec_init();
+ if (rc)
goto driver_exit;
- if ((rc = i2o_pci_init()))
+ rc = i2o_pci_init();
+ if (rc)
goto exec_exit;
return 0;
int i2o_pool_alloc(struct i2o_pool *pool, const char *name,
size_t size, int min_nr)
{
- pool->name = kmalloc(strlen(name) + 1, GFP_KERNEL);
+ pool->name = kstrdup(name, GFP_KERNEL);
if (!pool->name)
goto exit;
- strcpy(pool->name, name);
pool->slab =
kmem_cache_create(pool->name, size, 0, SLAB_HWCACHE_ALIGN, NULL);
return -ENODEV;
}
- if ((rc = pci_enable_device(pdev))) {
+ rc = pci_enable_device(pdev);
+ if (rc) {
printk(KERN_WARNING "i2o: couldn't enable device %s\n",
pci_name(pdev));
return rc;
#endif
}
- if ((rc = i2o_pci_alloc(c))) {
+ rc = i2o_pci_alloc(c);
+ if (rc) {
printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
"failed\n", c->name);
goto free_controller;
goto free_pci;
}
- if ((rc = i2o_iop_add(c)))
+ rc = i2o_iop_add(c);
+ if (rc)
goto uninstall;
if (i960)
* Shift before conversion to avoid sign extension
* of left aligned data
*/
- input = input >> info->shift;
+ input >>= info->shift;
if (info->is_signed) {
int16_t val = input;
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
*/
+#ifndef _IIO_UTILS_H
+#define _IIO_UTILS_H
#include <string.h>
#include <stdlib.h>
free(temp);
return ret;
}
+
+#endif /* _IIO_UTILS_H */
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct adis16220_state *st = iio_priv(indio_dev);
ssize_t ret;
- s16 val = 0;
+ u16 val;
/* Take the iio_dev status lock */
mutex_lock(&indio_dev->mlock);
- ret = adis_read_reg_16(&st->adis, this_attr->address,
- (u16 *)&val);
+ ret = adis_read_reg_16(&st->adis, this_attr->address, &val);
mutex_unlock(&indio_dev->mlock);
if (ret)
return ret;
- return sprintf(buf, "%d\n", val);
+ return sprintf(buf, "%u\n", val);
}
static ssize_t adis16220_write_16bit(struct device *dev,
if (val & ADIS16240_ERROR_ACTIVE)
adis_check_status(st);
- val = ((s16)(val << shift) >> shift);
+ val = (s16)(val << shift) >> shift;
return sprintf(buf, "%d\n", val);
}
int scan_count = bitmap_weight(indio_dev->active_scan_mask,
indio_dev->masklength);
- rx_array = kzalloc(4 * scan_count, GFP_KERNEL);
+ rx_array = kcalloc(4, scan_count, GFP_KERNEL);
if (rx_array == NULL)
return -ENOMEM;
ret = lis3l02dq_read_all(indio_dev, rx_array);
* Can probably alleviate this by reading the interrupt register on start, but
* that is really just brushing the problem under the carpet.
*/
+#ifndef _SCA3000
+#define _SCA3000
+
#define SCA3000_WRITE_REG(a) (((a) << 2) | 0x02)
#define SCA3000_READ_REG(a) ((a) << 2)
}
#endif
-
+#endif /* _SCA3000 */
struct device_attribute *attr,
char *buf)
{
- int ret, len;
+ int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct sca3000_state *st = iio_priv(indio_dev);
int val;
mutex_unlock(&st->lock);
if (ret < 0)
return ret;
- len = sprintf(buf, "%d\n",
- !!(val & SCA3000_FREE_FALL_DETECT));
- return len;
+ return sprintf(buf, "%d\n", !!(val & SCA3000_FREE_FALL_DETECT));
}
/**
{
int dev, ch, cnt;
- st->iio_attr = kzalloc(sizeof(*st->iio_attr) * (st->slave_num + 1) *
- AD7280A_CELLS_PER_DEV * 2, GFP_KERNEL);
+ st->iio_attr = kcalloc(2, sizeof(*st->iio_attr) *
+ (st->slave_num + 1) * AD7280A_CELLS_PER_DEV,
+ GFP_KERNEL);
if (st->iio_attr == NULL)
return -ENOMEM;
static unsigned long ad9832_calc_freqreg(unsigned long mclk, unsigned long fout)
{
- unsigned long long freqreg = (u64) fout *
- (u64) ((u64) 1L << AD9832_FREQ_BITS);
+ unsigned long long freqreg = (u64)fout *
+ (u64)((u64)1L << AD9832_FREQ_BITS);
do_div(freqreg, mclk);
return freqreg;
}
static int ad9832_write_phase(struct ad9832_state *st,
unsigned long addr, unsigned long phase)
{
- if (phase > (1 << AD9832_PHASE_BITS))
+ if (phase > BIT(AD9832_PHASE_BITS))
return -EINVAL;
st->phase_data[0] = cpu_to_be16((AD9832_CMD_PHA8BITSW << CMD_SHIFT) |
goto error_ret;
mutex_lock(&indio_dev->mlock);
- switch ((u32) this_attr->address) {
+ switch ((u32)this_attr->address) {
case AD9832_FREQ0HM:
case AD9832_FREQ1HM:
ret = ad9832_write_frequency(st, this_attr->address, val);
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
- if (indio_dev == NULL) {
+ if (!indio_dev) {
ret = -ENOMEM;
goto error_disable_reg;
}
#define AD9832_CMD_SYNCSELSRC 0x8
#define AD9832_CMD_SLEEPRESCLR 0xC
-#define AD9832_FREQ (1 << 11)
+#define AD9832_FREQ BIT(11)
#define AD9832_PHASE(x) (((x) & 3) << 9)
-#define AD9832_SYNC (1 << 13)
-#define AD9832_SELSRC (1 << 12)
-#define AD9832_SLEEP (1 << 13)
-#define AD9832_RESET (1 << 12)
-#define AD9832_CLR (1 << 11)
+#define AD9832_SYNC BIT(13)
+#define AD9832_SELSRC BIT(12)
+#define AD9832_SLEEP BIT(13)
+#define AD9832_RESET BIT(12)
+#define AD9832_CLR BIT(11)
#define CMD_SHIFT 12
#define ADD_SHIFT 8
#define AD9832_FREQ_BITS 32
static unsigned int ad9834_calc_freqreg(unsigned long mclk, unsigned long fout)
{
- unsigned long long freqreg = (u64) fout * (u64) (1 << AD9834_FREQ_BITS);
+ unsigned long long freqreg = (u64)fout * (u64)BIT(AD9834_FREQ_BITS);
do_div(freqreg, mclk);
return freqreg;
}
static int ad9834_write_phase(struct ad9834_state *st,
- unsigned long addr, unsigned long phase)
+ unsigned long addr, unsigned long phase)
{
- if (phase > (1 << AD9834_PHASE_BITS))
+ if (phase > BIT(AD9834_PHASE_BITS))
return -EINVAL;
st->data = cpu_to_be16(addr | phase);
}
static ssize_t ad9834_write(struct device *dev,
- struct device_attribute *attr,
- const char *buf,
- size_t len)
+ struct device_attribute *attr,
+ const char *buf,
+ size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ad9834_state *st = iio_priv(indio_dev);
goto error_ret;
mutex_lock(&indio_dev->mlock);
- switch ((u32) this_attr->address) {
+ switch ((u32)this_attr->address) {
case AD9834_REG_FREQ0:
case AD9834_REG_FREQ1:
ret = ad9834_write_frequency(st, this_attr->address, val);
break;
case AD9834_FSEL:
case AD9834_PSEL:
- if (val == 0)
+ if (val == 0) {
st->control &= ~(this_attr->address | AD9834_PIN_SW);
- else if (val == 1) {
+ } else if (val == 1) {
st->control |= this_attr->address;
st->control &= ~AD9834_PIN_SW;
} else {
}
static ssize_t ad9834_store_wavetype(struct device *dev,
- struct device_attribute *attr,
- const char *buf,
- size_t len)
+ struct device_attribute *attr,
+ const char *buf,
+ size_t len)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ad9834_state *st = iio_priv(indio_dev);
mutex_lock(&indio_dev->mlock);
- switch ((u32) this_attr->address) {
+ switch ((u32)this_attr->address) {
case 0:
if (sysfs_streq(buf, "sine")) {
st->control &= ~AD9834_MODE;
break;
case 1:
if (sysfs_streq(buf, "square") &&
- !(st->control & AD9834_MODE)) {
+ !(st->control & AD9834_MODE)) {
st->control &= ~AD9834_MODE;
st->control |= AD9834_OPBITEN;
} else {
return ret ? ret : len;
}
-static ssize_t ad9834_show_out0_wavetype_available(struct device *dev,
- struct device_attribute *attr,
- char *buf)
+static
+ssize_t ad9834_show_out0_wavetype_available(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ad9834_state *st = iio_priv(indio_dev);
return sprintf(buf, "%s\n", str);
}
-
static IIO_DEVICE_ATTR(out_altvoltage0_out0_wavetype_available, S_IRUGO,
ad9834_show_out0_wavetype_available, NULL, 0);
-static ssize_t ad9834_show_out1_wavetype_available(struct device *dev,
- struct device_attribute *attr,
- char *buf)
+static
+ssize_t ad9834_show_out1_wavetype_available(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ad9834_state *st = iio_priv(indio_dev);
}
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
- if (indio_dev == NULL) {
+ if (!indio_dev) {
ret = -ENOMEM;
goto error_disable_reg;
}
/* Registers */
-#define AD9834_REG_CMD (0 << 14)
-#define AD9834_REG_FREQ0 (1 << 14)
-#define AD9834_REG_FREQ1 (2 << 14)
-#define AD9834_REG_PHASE0 (6 << 13)
-#define AD9834_REG_PHASE1 (7 << 13)
+#define AD9834_REG_CMD 0
+#define AD9834_REG_FREQ0 BIT(14)
+#define AD9834_REG_FREQ1 BIT(15)
+#define AD9834_REG_PHASE0 (BIT(15) | BIT(14))
+#define AD9834_REG_PHASE1 (BIT(15) | BIT(14) | BIT(13))
/* Command Control Bits */
-#define AD9834_B28 (1 << 13)
-#define AD9834_HLB (1 << 12)
-#define AD9834_FSEL (1 << 11)
-#define AD9834_PSEL (1 << 10)
-#define AD9834_PIN_SW (1 << 9)
-#define AD9834_RESET (1 << 8)
-#define AD9834_SLEEP1 (1 << 7)
-#define AD9834_SLEEP12 (1 << 6)
-#define AD9834_OPBITEN (1 << 5)
-#define AD9834_SIGN_PIB (1 << 4)
-#define AD9834_DIV2 (1 << 3)
-#define AD9834_MODE (1 << 1)
+#define AD9834_B28 BIT(13)
+#define AD9834_HLB BIT(12)
+#define AD9834_FSEL BIT(11)
+#define AD9834_PSEL BIT(10)
+#define AD9834_PIN_SW BIT(9)
+#define AD9834_RESET BIT(8)
+#define AD9834_SLEEP1 BIT(7)
+#define AD9834_SLEEP12 BIT(6)
+#define AD9834_OPBITEN BIT(5)
+#define AD9834_SIGN_PIB BIT(4)
+#define AD9834_DIV2 BIT(3)
+#define AD9834_MODE BIT(1)
#define AD9834_FREQ_BITS 28
#define AD9834_PHASE_BITS 12
-#define RES_MASK(bits) ((1 << (bits)) - 1)
+#define RES_MASK(bits) (BIT(bits) - 1)
/**
* struct ad9834_state - driver instance specific data
__be16 freq_data[2];
};
-
/*
* TODO: struct ad7887_platform_data needs to go into include/linux/iio
*/
*
* Licensed under the GPL-2 or later.
*/
+#ifndef IIO_DDS_H_
+#define IIO_DDS_H_
/**
* /sys/bus/iio/devices/.../out_altvoltageX_frequencyY
#define IIO_CONST_ATTR_OUT_WAVETYPES_AVAILABLE(_channel, _output, _modes)\
IIO_CONST_ATTR( \
out_altvoltage##_channel##_out##_output##_wavetype_available, _modes)
+
+#endif /* IIO_DDS_H_ */
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
ret = isl29028_set_proxim_sampling(chip, chip->prox_sampling);
if (ret < 0) {
- dev_err(chip->dev, "%s(): setting the proximity, err = %d\n",
- __func__, ret);
+ dev_err(chip->dev, "setting the proximity, err = %d\n",
+ ret);
return ret;
}
ret = isl29028_set_als_scale(chip, chip->lux_scale);
if (ret < 0)
- dev_err(chip->dev, "%s(): setting als scale failed, err = %d\n",
- __func__, ret);
+ dev_err(chip->dev,
+ "setting als scale failed, err = %d\n", ret);
return ret;
}
static int taos_chip_off(struct iio_dev *indio_dev)
{
struct tsl2583_chip *chip = iio_priv(indio_dev);
- int ret;
/* turn device off */
chip->taos_chip_status = TSL258X_CHIP_SUSPENDED;
- ret = i2c_smbus_write_byte_data(chip->client,
+ return i2c_smbus_write_byte_data(chip->client,
TSL258X_CMD_REG | TSL258X_CNTRL,
0x00);
- return ret;
}
/* Sysfs Interface Functions */
/* select register to write */
ret = i2c_smbus_write_byte(client, (TSL2X7X_CMD_REG | reg));
if (ret < 0) {
- dev_err(&client->dev, "%s: failed to write register %x\n"
- , __func__, reg);
+ dev_err(&client->dev, "failed to write register %x\n", reg);
return ret;
}
if (ret >= 0)
*val = (u8)ret;
else
- dev_err(&client->dev, "%s: failed to read register %x\n"
- , __func__, reg);
+ dev_err(&client->dev, "failed to read register %x\n", reg);
return ret;
}
&buf[i]);
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: failed to read. err=%x\n", __func__, ret);
+ "failed to read. err=%x\n", ret);
goto out_unlock;
}
}
TSL2X7X_CMD_ALS_INT_CLR));
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: i2c_write_command failed - err = %d\n",
- __func__, ret);
+ "i2c_write_command failed - err = %d\n", ret);
goto out_unlock; /* have no data, so return failure */
}
ret = tsl2x7x_i2c_read(chip->client,
(TSL2X7X_CMD_REG | TSL2X7X_STATUS), &status);
if (ret < 0) {
- dev_err(&chip->client->dev,
- "%s: i2c err=%d\n", __func__, ret);
+ dev_err(&chip->client->dev, "i2c err=%d\n", ret);
goto prox_poll_err;
}
(TSL2X7X_CMD_REG | TSL2X7X_CNTRL));
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: failed to write CNTRL register, ret=%d\n",
- __func__, ret);
+ "failed to write CNTRL register, ret=%d\n", ret);
return ret;
}
(TSL2X7X_CMD_REG | TSL2X7X_CNTRL));
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: failed to write ctrl reg: ret=%d\n",
- __func__, ret);
+ "failed to write ctrl reg: ret=%d\n", ret);
return ret;
}
return lux_val;
}
- gain_trim_val = (((chip->tsl2x7x_settings.als_cal_target)
- * chip->tsl2x7x_settings.als_gain_trim) / lux_val);
+ gain_trim_val = ((chip->tsl2x7x_settings.als_cal_target)
+ * chip->tsl2x7x_settings.als_gain_trim) / lux_val;
if ((gain_trim_val < 250) || (gain_trim_val > 4000))
return -ERANGE;
TSL2X7X_CMD_REG + i, *dev_reg++);
if (ret < 0) {
dev_err(&chip->client->dev,
- "%s: failed on write to reg %d.\n", __func__, i);
+ "failed on write to reg %d.\n", i);
return ret;
}
}
if (chip->tsl2x7x_settings.prox_max_samples_cal > MAX_SAMPLES_CAL) {
dev_err(&chip->client->dev,
- "%s: max prox samples cal is too big: %d\n",
- __func__, chip->tsl2x7x_settings.prox_max_samples_cal);
+ "max prox samples cal is too big: %d\n",
+ chip->tsl2x7x_settings.prox_max_samples_cal);
chip->tsl2x7x_settings.prox_max_samples_cal = MAX_SAMPLES_CAL;
}
TSL2X7X_CMD_PROXALS_INT_CLR);
if (ret < 0)
dev_err(&chip->client->dev,
- "%s: Failed to clear irq from event handler. err = %d\n",
- __func__, ret);
+ "Failed to clear irq from event handler. err = %d\n",
+ ret);
return IRQ_HANDLED;
}
ret = i2c_smbus_write_byte(clientp, (TSL2X7X_CMD_REG | TSL2X7X_CNTRL));
if (ret < 0) {
- dev_err(&clientp->dev, "%s: write to cmd reg failed. err = %d\n",
- __func__, ret);
+ dev_err(&clientp->dev, "write to cmd reg failed. err = %d\n",
+ ret);
return ret;
}
*
* */
-
#ifndef HMC5843_CORE_H
#define HMC5843_CORE_H
};
int hmc5843_common_probe(struct device *dev, struct regmap *regmap,
- enum hmc5843_ids id);
+ enum hmc5843_ids id);
int hmc5843_common_remove(struct device *dev);
int hmc5843_common_suspend(struct device *dev);
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, HMC5843_MODE_REG,
- HMC5843_MODE_MASK, operating_mode);
+ HMC5843_MODE_MASK, operating_mode);
mutex_unlock(&data->lock);
return ret;
return ret;
}
ret = regmap_bulk_read(data->regmap, HMC5843_DATA_OUT_MSB_REGS,
- values, sizeof(values));
+ values, sizeof(values));
mutex_unlock(&data->lock);
if (ret < 0)
return ret;
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, HMC5843_CONFIG_REG_A,
- HMC5843_MEAS_CONF_MASK, meas_conf);
+ HMC5843_MEAS_CONF_MASK, meas_conf);
mutex_unlock(&data->lock);
return ret;
}
-static ssize_t hmc5843_show_measurement_configuration(struct device *dev,
- struct device_attribute *attr,
- char *buf)
+static
+ssize_t hmc5843_show_measurement_configuration(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
{
struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev));
unsigned int val;
return sprintf(buf, "%d\n", val);
}
-static ssize_t hmc5843_set_measurement_configuration(struct device *dev,
- struct device_attribute *attr,
- const char *buf,
- size_t count)
+static
+ssize_t hmc5843_set_measurement_configuration(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf,
+ size_t count)
{
struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev));
unsigned long meas_conf = 0;
hmc5843_set_measurement_configuration,
0);
-static ssize_t hmc5843_show_samp_freq_avail(struct device *dev,
- struct device_attribute *attr, char *buf)
+static
+ssize_t hmc5843_show_samp_freq_avail(struct device *dev,
+ struct device_attribute *attr, char *buf)
{
struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev));
size_t len = 0;
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, HMC5843_CONFIG_REG_A,
- HMC5843_RATE_MASK, rate << HMC5843_RATE_OFFSET);
+ HMC5843_RATE_MASK,
+ rate << HMC5843_RATE_OFFSET);
mutex_unlock(&data->lock);
return ret;
}
static int hmc5843_get_samp_freq_index(struct hmc5843_data *data,
- int val, int val2)
+ int val, int val2)
{
int i;
for (i = 0; i < data->variant->n_regval_to_samp_freq; i++)
if (val == data->variant->regval_to_samp_freq[i][0] &&
- val2 == data->variant->regval_to_samp_freq[i][1])
+ val2 == data->variant->regval_to_samp_freq[i][1])
return i;
return -EINVAL;
mutex_lock(&data->lock);
ret = regmap_update_bits(data->regmap, HMC5843_CONFIG_REG_B,
- HMC5843_RANGE_GAIN_MASK,
- range << HMC5843_RANGE_GAIN_OFFSET);
+ HMC5843_RANGE_GAIN_MASK,
+ range << HMC5843_RANGE_GAIN_OFFSET);
mutex_unlock(&data->lock);
return ret;
}
static ssize_t hmc5843_show_scale_avail(struct device *dev,
- struct device_attribute *attr, char *buf)
+ struct device_attribute *attr,
+ char *buf)
{
struct hmc5843_data *data = iio_priv(dev_to_iio_dev(dev));
}
static int hmc5843_write_raw_get_fmt(struct iio_dev *indio_dev,
- struct iio_chan_spec const *chan, long mask)
+ struct iio_chan_spec const *chan,
+ long mask)
{
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
}
ret = regmap_bulk_read(data->regmap, HMC5843_DATA_OUT_MSB_REGS,
- data->buffer, 3 * sizeof(__be16));
+ data->buffer, 3 * sizeof(__be16));
mutex_unlock(&data->lock);
if (ret < 0)
goto done;
iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
- iio_get_time_ns());
+ iio_get_time_ns());
done:
iio_trigger_notify_done(indio_dev->trig);
u8 id[3];
ret = regmap_bulk_read(data->regmap, HMC5843_ID_REG,
- id, ARRAY_SIZE(id));
+ id, ARRAY_SIZE(id));
if (ret < 0)
return ret;
if (id[0] != 'H' || id[1] != '4' || id[2] != '3') {
static const unsigned long hmc5843_scan_masks[] = {0x7, 0};
-
int hmc5843_common_suspend(struct device *dev)
{
return hmc5843_set_mode(iio_priv(dev_get_drvdata(dev)),
int hmc5843_common_resume(struct device *dev)
{
return hmc5843_set_mode(iio_priv(dev_get_drvdata(dev)),
- HMC5843_MODE_SLEEP);
+ HMC5843_MODE_SLEEP);
}
EXPORT_SYMBOL(hmc5843_common_resume);
int hmc5843_common_probe(struct device *dev, struct regmap *regmap,
- enum hmc5843_ids id)
+ enum hmc5843_ids id)
{
struct hmc5843_data *data;
struct iio_dev *indio_dev;
int ret;
indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
- if (indio_dev == NULL)
+ if (!indio_dev)
return -ENOMEM;
dev_set_drvdata(dev, indio_dev);
mutex_init(&data->lock);
indio_dev->dev.parent = dev;
+ indio_dev->name = dev->driver->name;
indio_dev->info = &hmc5843_info;
indio_dev->modes = INDIO_DIRECT_MODE;
indio_dev->channels = data->variant->channels;
return ret;
ret = iio_triggered_buffer_setup(indio_dev, NULL,
- hmc5843_trigger_handler, NULL);
+ hmc5843_trigger_handler, NULL);
if (ret < 0)
return ret;
.cache_type = REGCACHE_RBTREE,
};
-static int hmc5843_i2c_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
+static int hmc5843_i2c_probe(struct i2c_client *cli,
+ const struct i2c_device_id *id)
{
- return hmc5843_common_probe(&client->dev,
- devm_regmap_init_i2c(client, &hmc5843_i2c_regmap_config),
+ return hmc5843_common_probe(&cli->dev,
+ devm_regmap_init_i2c(cli, &hmc5843_i2c_regmap_config),
id->driver_data);
}
mutex_lock(&indio_dev->mlock);
- t = (27900 / val);
+ t = 27900 / val;
if (t > 0)
t--;
if (ret)
return ret;
- ret = iio_device_register(indio_dev);
- if (ret)
- return ret;
-
- return 0;
+ return iio_device_register(indio_dev);
}
/* fixme, confirm ordering in this function */
mutex_lock(&indio_dev->mlock);
- t = (26000 / val);
+ t = 26000 / val;
if (t > 0)
t--;
ret = ade7754_initial_setup(indio_dev);
if (ret)
return ret;
- ret = iio_device_register(indio_dev);
- if (ret)
- return ret;
-
- return 0;
+ return iio_device_register(indio_dev);
}
/* fixme, confirm ordering in this function */
int ret;
u8 val;
- ade7758_spi_read_reg_8(dev,
- ADE7758_OPMODE,
- &val);
+ ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
+ if (ret < 0) {
+ dev_err(dev, "Failed to read opmode reg\n");
+ return ret;
+ }
val |= 1 << 6; /* Software Chip Reset */
- ret = ade7758_spi_write_reg_8(dev,
- ADE7758_OPMODE,
- val);
-
+ ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
+ if (ret < 0)
+ dev_err(dev, "Failed to write opmode reg\n");
return ret;
}
int ret;
u8 val;
- ade7758_spi_read_reg_8(dev,
- ADE7758_OPMODE,
- &val);
+ ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
+ if (ret < 0) {
+ dev_err(dev, "Failed to read opmode reg\n");
+ return ret;
+ }
val |= 7 << 3; /* ADE7758 powered down */
- ret = ade7758_spi_write_reg_8(dev,
- ADE7758_OPMODE,
- val);
-
+ ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
+ if (ret < 0)
+ dev_err(dev, "Failed to write opmode reg\n");
return ret;
}
struct device_attribute *attr,
char *buf)
{
- int ret, len = 0;
+ int ret;
u8 t;
int sps;
t = (t >> 5) & 0x3;
sps = 26040 / (1 << t);
- len = sprintf(buf, "%d SPS\n", sps);
- return len;
+ return sprintf(buf, "%d SPS\n", sps);
}
static ssize_t ade7758_write_frequency(struct device *dev,
int ret = 0;
buffer = iio_kfifo_allocate();
- if (!buffer) {
- ret = -ENOMEM;
- return ret;
- }
+ if (!buffer)
+ return -ENOMEM;
iio_device_attach_buffer(indio_dev, buffer);
static int ade7759_reset(struct device *dev)
{
- int ret;
u16 val;
ade7759_spi_read_reg_16(dev,
ADE7759_MODE,
&val);
val |= 1 << 6; /* Software Chip Reset */
- ret = ade7759_spi_write_reg_16(dev,
+ return ade7759_spi_write_reg_16(dev,
ADE7759_MODE,
val);
-
- return ret;
}
static IIO_DEV_ATTR_AENERGY(ade7759_read_40bit, ADE7759_AENERGY);
mutex_lock(&indio_dev->mlock);
- t = (27900 / val);
+ t = 27900 / val;
if (t > 0)
t--;
if (ret)
return ret;
- ret = iio_device_register(indio_dev);
- if (ret)
- return ret;
-
- return 0;
+ return iio_device_register(indio_dev);
}
/* fixme, confirm ordering in this function */
#include "ade7854.h"
static int ade7854_i2c_write_reg_8(struct device *dev,
- u16 reg_address,
- u8 value)
+ u16 reg_address,
+ u8 value)
{
int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
}
static int ade7854_i2c_write_reg_16(struct device *dev,
- u16 reg_address,
- u16 value)
+ u16 reg_address,
+ u16 value)
{
int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
}
static int ade7854_i2c_write_reg_24(struct device *dev,
- u16 reg_address,
- u32 value)
+ u16 reg_address,
+ u32 value)
{
int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
}
static int ade7854_i2c_write_reg_32(struct device *dev,
- u16 reg_address,
- u32 value)
+ u16 reg_address,
+ u32 value)
{
int ret;
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
}
static int ade7854_i2c_read_reg_8(struct device *dev,
- u16 reg_address,
- u8 *val)
+ u16 reg_address,
+ u8 *val)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ade7854_state *st = iio_priv(indio_dev);
}
static int ade7854_i2c_read_reg_16(struct device *dev,
- u16 reg_address,
- u16 *val)
+ u16 reg_address,
+ u16 *val)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ade7854_state *st = iio_priv(indio_dev);
}
static int ade7854_i2c_read_reg_24(struct device *dev,
- u16 reg_address,
- u32 *val)
+ u16 reg_address,
+ u32 *val)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ade7854_state *st = iio_priv(indio_dev);
}
static int ade7854_i2c_read_reg_32(struct device *dev,
- u16 reg_address,
- u32 *val)
+ u16 reg_address,
+ u32 *val)
{
struct iio_dev *indio_dev = dev_to_iio_dev(dev);
struct ade7854_state *st = iio_priv(indio_dev);
if (ret)
goto out;
- *val = (st->rx[0] << 24) | (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];
+ *val = (st->rx[0] << 24) | (st->rx[1] << 16) |
+ (st->rx[2] << 8) | st->rx[3];
out:
mutex_unlock(&st->buf_lock);
return ret;
}
static int ade7854_i2c_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
+ const struct i2c_device_id *id)
{
- int ret;
struct ade7854_state *st;
struct iio_dev *indio_dev;
indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
- if (indio_dev == NULL)
+ if (!indio_dev)
return -ENOMEM;
st = iio_priv(indio_dev);
i2c_set_clientdata(client, indio_dev);
st->i2c = client;
st->irq = client->irq;
- ret = ade7854_probe(indio_dev, &client->dev);
-
- return ret;
+ return ade7854_probe(indio_dev, &client->dev);
}
static int ade7854_i2c_remove(struct i2c_client *client)
static int ade7854_spi_probe(struct spi_device *spi)
{
- int ret;
struct ade7854_state *st;
struct iio_dev *indio_dev;
st->irq = spi->irq;
st->spi = spi;
-
- ret = ade7854_probe(indio_dev, &spi->dev);
-
- return ret;
+ return ade7854_probe(indio_dev, &spi->dev);
}
static int ade7854_spi_remove(struct spi_device *spi)
+#ifndef _METER_H
+#define _METER_H
+
#include <linux/iio/sysfs.h>
/* metering ic types of attribute */
#define IIO_EVENT_ATTR_VPKLVL_EXC(_evlist, _show, _store, _mask) \
IIO_EVENT_ATTR_SH(vpklvl_exc, _evlist, _show, _store, _mask)
+#endif /* _METER_H */
fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
- pr_err("ad2s1210: FCW out of range\n");
+ dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n");
return -ERANGE;
}
if (ret)
return ret;
if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
- pr_err("ad2s1210: fclkin out of range\n");
+ dev_err(dev, "ad2s1210: fclkin out of range\n");
return -EINVAL;
}
if (ret < 0)
return ret;
if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
- pr_err("ad2s1210: excitation frequency out of range\n");
+ dev_err(dev,
+ "ad2s1210: excitation frequency out of range\n");
return -EINVAL;
}
mutex_lock(&st->lock);
goto error_ret;
if (ret & AD2S1210_MSB_IS_HIGH) {
ret = -EIO;
- pr_err("ad2s1210: write control register fail\n");
+ dev_err(dev,
+ "ad2s1210: write control register fail\n");
goto error_ret;
}
st->resolution
if (st->pdata->gpioin) {
data = ad2s1210_read_resolution_pin(st);
if (data != st->resolution)
- pr_warn("ad2s1210: resolution settings not match\n");
+ dev_warn(dev, "ad2s1210: resolution settings not match\n");
} else
ad2s1210_set_resolution_pin(st);
ret = kstrtou8(buf, 10, &udata);
if (ret || udata < 10 || udata > 16) {
- pr_err("ad2s1210: resolution out of range\n");
+ dev_err(dev, "ad2s1210: resolution out of range\n");
return -EINVAL;
}
mutex_lock(&st->lock);
data = ret;
if (data & AD2S1210_MSB_IS_HIGH) {
ret = -EIO;
- pr_err("ad2s1210: setting resolution fail\n");
+ dev_err(dev, "ad2s1210: setting resolution fail\n");
goto error_ret;
}
st->resolution
if (st->pdata->gpioin) {
data = ad2s1210_read_resolution_pin(st);
if (data != st->resolution)
- pr_warn("ad2s1210: resolution settings not match\n");
+ dev_warn(dev, "ad2s1210: resolution settings not match\n");
} else
ad2s1210_set_resolution_pin(st);
ret = len;
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
+#ifndef _AD2S1210_H
+#define _AD2S1210_H
struct ad2s1210_platform_data {
unsigned sample;
unsigned res[2];
bool gpioin;
};
+#endif /* _AD2S1210_H */
int ret;
st = devm_kzalloc(&pdev->dev, sizeof(*st), GFP_KERNEL);
- if (st == NULL)
+ if (!st)
return -ENOMEM;
st->irq = platform_get_irq(pdev, 0);
.msg_fn = __func__, \
.msg_line = __LINE__, \
.msg_cdls = (cdls) }; \
- dataname.msg_mask = (mask);
+ dataname.msg_mask = (mask)
/**
* Filters out logging messages based on mask and subsystem.
int libcfs_debug_msg(struct libcfs_debug_msg_data *msgdata,
const char *format1, ...)
- __attribute__ ((format (printf, 2, 3)));
+ __printf(2, 3);
int libcfs_debug_vmsg2(struct libcfs_debug_msg_data *msgdata,
const char *format1,
va_list args, const char *format2, ...)
- __attribute__ ((format (printf, 4, 5)));
+ __printf(4, 5);
/* other external symbols that tracefile provides: */
int cfs_trace_copyin_string(char *knl_buffer, int knl_buffer_nob,
static inline void
cfs_hash_keycpy(struct cfs_hash *hs, struct hlist_node *hnode, void *key)
{
- if (hs->hs_ops->hs_keycpy)
+ if (hs->hs_ops->hs_keycpy)
hs->hs_ops->hs_keycpy(hnode, key);
}
/* Generic debug formatting routines mainly for proc handler */
struct seq_file;
-int cfs_hash_debug_header(struct seq_file *m);
-int cfs_hash_debug_str(struct cfs_hash *hs, struct seq_file *m);
+void cfs_hash_debug_header(struct seq_file *m);
+void cfs_hash_debug_str(struct cfs_hash *hs, struct seq_file *m);
/*
* Generic djb2 hash algorithm for character arrays.
__u8 kuc_flags;
__u16 kuc_msgtype; /* Message type or opcode, transport-specific */
__u16 kuc_msglen; /* Including header */
-} __attribute__((aligned(sizeof(__u64))));
+} __aligned(sizeof(__u64));
#define KUC_CHANGELOG_MSG_MAXSIZE (sizeof(struct kuc_hdr)+CR_MAXSIZE)
__u32 lk_group;
__u32 lk_data;
__u32 lk_flags;
-} __attribute__((packed)) lustre_kernelcomm;
+} __packed lustre_kernelcomm;
/* Userspace methods */
int libcfs_ukuc_start(lustre_kernelcomm *l, int groups);
#define LASSERT_ATOMIC_ZERO(a) LASSERT_ATOMIC_EQ(a, 0)
#define LASSERT_ATOMIC_POS(a) LASSERT_ATOMIC_GT(a, 0)
-#define CFS_ALLOC_PTR(ptr) LIBCFS_ALLOC(ptr, sizeof(*(ptr)));
-#define CFS_FREE_PTR(ptr) LIBCFS_FREE(ptr, sizeof(*(ptr)));
+#define CFS_ALLOC_PTR(ptr) LIBCFS_ALLOC(ptr, sizeof(*(ptr)))
+#define CFS_FREE_PTR(ptr) LIBCFS_FREE(ptr, sizeof(*(ptr)))
/*
* percpu partition lock
int n;
int i;
- LASSERT (msg->ibm_type == IBLND_MSG_GET_REQ ||
+ LASSERT(msg->ibm_type == IBLND_MSG_GET_REQ ||
msg->ibm_type == IBLND_MSG_PUT_ACK);
rd = msg->ibm_type == IBLND_MSG_GET_REQ ?
return 1;
}
- nob = offsetof (kib_msg_t, ibm_u) +
+ nob = offsetof(kib_msg_t, ibm_u) +
kiblnd_rd_msg_size(rd, msg->ibm_type, n);
if (msg->ibm_nob < nob) {
}
void
-kiblnd_pack_msg (lnet_ni_t *ni, kib_msg_t *msg, int version,
+kiblnd_pack_msg(lnet_ni_t *ni, kib_msg_t *msg, int version,
int credits, lnet_nid_t dstnid, __u64 dststamp)
{
kib_net_t *net = ni->ni_data;
if (flip) {
/* leave magic unflipped as a clue to peer endianness */
msg->ibm_version = version;
- CLASSERT (sizeof(msg->ibm_type) == 1);
- CLASSERT (sizeof(msg->ibm_credits) == 1);
+ CLASSERT(sizeof(msg->ibm_type) == 1);
+ CLASSERT(sizeof(msg->ibm_credits) == 1);
msg->ibm_nob = msg_nob;
__swab64s(&msg->ibm_srcnid);
__swab64s(&msg->ibm_srcstamp);
write_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
/* always called with a ref on ni, which prevents ni being shutdown */
- LASSERT (net->ibn_shutdown == 0);
+ LASSERT(net->ibn_shutdown == 0);
/* npeers only grows with the global lock held */
atomic_inc(&net->ibn_npeers);
}
void
-kiblnd_destroy_peer (kib_peer_t *peer)
+kiblnd_destroy_peer(kib_peer_t *peer)
{
kib_net_t *net = peer->ibp_ni->ni_data;
- LASSERT (net != NULL);
- LASSERT (atomic_read(&peer->ibp_refcount) == 0);
- LASSERT (!kiblnd_peer_active(peer));
- LASSERT (peer->ibp_connecting == 0);
- LASSERT (peer->ibp_accepting == 0);
- LASSERT (list_empty(&peer->ibp_conns));
- LASSERT (list_empty(&peer->ibp_tx_queue));
+ LASSERT(net != NULL);
+ LASSERT(atomic_read(&peer->ibp_refcount) == 0);
+ LASSERT(!kiblnd_peer_active(peer));
+ LASSERT(peer->ibp_connecting == 0);
+ LASSERT(peer->ibp_accepting == 0);
+ LASSERT(list_empty(&peer->ibp_conns));
+ LASSERT(list_empty(&peer->ibp_tx_queue));
LIBCFS_FREE(peer, sizeof(*peer));
}
kib_peer_t *
-kiblnd_find_peer_locked (lnet_nid_t nid)
+kiblnd_find_peer_locked(lnet_nid_t nid)
{
/* the caller is responsible for accounting the additional reference
* that this creates */
struct list_head *tmp;
kib_peer_t *peer;
- list_for_each (tmp, peer_list) {
+ list_for_each(tmp, peer_list) {
peer = list_entry(tmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 || /* creating conns */
+ LASSERT(peer->ibp_connecting > 0 || /* creating conns */
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns)); /* active conn */
}
void
-kiblnd_unlink_peer_locked (kib_peer_t *peer)
+kiblnd_unlink_peer_locked(kib_peer_t *peer)
{
- LASSERT (list_empty(&peer->ibp_conns));
+ LASSERT(list_empty(&peer->ibp_conns));
- LASSERT (kiblnd_peer_active(peer));
+ LASSERT(kiblnd_peer_active(peer));
list_del_init(&peer->ibp_list);
/* lose peerlist's ref */
kiblnd_peer_decref(peer);
for (i = 0; i < kiblnd_data.kib_peer_hash_size; i++) {
- list_for_each (ptmp, &kiblnd_data.kib_peers[i]) {
+ list_for_each(ptmp, &kiblnd_data.kib_peers[i]) {
peer = list_entry(ptmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 ||
+ LASSERT(peer->ibp_connecting > 0 ||
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns));
if (list_empty(&peer->ibp_conns)) {
kiblnd_unlink_peer_locked(peer);
} else {
- list_for_each_safe (ctmp, cnxt, &peer->ibp_conns) {
+ list_for_each_safe(ctmp, cnxt, &peer->ibp_conns) {
conn = list_entry(ctmp, kib_conn_t, ibc_list);
kiblnd_close_conn_locked(conn, 0);
static int
kiblnd_del_peer(lnet_ni_t *ni, lnet_nid_t nid)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
struct list_head *ptmp;
struct list_head *pnxt;
kib_peer_t *peer;
}
for (i = lo; i <= hi; i++) {
- list_for_each_safe (ptmp, pnxt, &kiblnd_data.kib_peers[i]) {
+ list_for_each_safe(ptmp, pnxt, &kiblnd_data.kib_peers[i]) {
peer = list_entry(ptmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 ||
+ LASSERT(peer->ibp_connecting > 0 ||
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns));
continue;
if (!list_empty(&peer->ibp_tx_queue)) {
- LASSERT (list_empty(&peer->ibp_conns));
+ LASSERT(list_empty(&peer->ibp_conns));
list_splice_init(&peer->ibp_tx_queue,
&zombies);
read_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
for (i = 0; i < kiblnd_data.kib_peer_hash_size; i++) {
- list_for_each (ptmp, &kiblnd_data.kib_peers[i]) {
+ list_for_each(ptmp, &kiblnd_data.kib_peers[i]) {
peer = list_entry(ptmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 ||
+ LASSERT(peer->ibp_connecting > 0 ||
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns));
if (peer->ibp_ni != ni)
continue;
- list_for_each (ctmp, &peer->ibp_conns) {
+ list_for_each(ctmp, &peer->ibp_conns) {
if (index-- > 0)
continue;
return;
mtu = kiblnd_translate_mtu(*kiblnd_tunables.kib_ib_mtu);
- LASSERT (mtu >= 0);
+ LASSERT(mtu >= 0);
if (mtu != 0)
cmid->route.path_rec->mtu = mtu;
}
return 0;
/* hash NID to CPU id in this partition... */
- off = do_div(nid, cpus_weight(*mask));
- for_each_cpu_mask(i, *mask) {
+ off = do_div(nid, cpumask_weight(mask));
+ for_each_cpu(i, mask) {
if (off-- == 0)
return i % vectors;
}
}
/* Init successful! */
- LASSERT (state == IBLND_CONN_ACTIVE_CONNECT ||
+ LASSERT(state == IBLND_CONN_ACTIVE_CONNECT ||
state == IBLND_CONN_PASSIVE_WAIT);
conn->ibc_state = state;
}
void
-kiblnd_destroy_conn (kib_conn_t *conn)
+kiblnd_destroy_conn(kib_conn_t *conn)
{
struct rdma_cm_id *cmid = conn->ibc_cmid;
kib_peer_t *peer = conn->ibc_peer;
int rc;
- LASSERT (!in_interrupt());
- LASSERT (atomic_read(&conn->ibc_refcount) == 0);
- LASSERT (list_empty(&conn->ibc_early_rxs));
- LASSERT (list_empty(&conn->ibc_tx_noops));
- LASSERT (list_empty(&conn->ibc_tx_queue));
- LASSERT (list_empty(&conn->ibc_tx_queue_rsrvd));
- LASSERT (list_empty(&conn->ibc_tx_queue_nocred));
- LASSERT (list_empty(&conn->ibc_active_txs));
- LASSERT (conn->ibc_noops_posted == 0);
- LASSERT (conn->ibc_nsends_posted == 0);
+ LASSERT(!in_interrupt());
+ LASSERT(atomic_read(&conn->ibc_refcount) == 0);
+ LASSERT(list_empty(&conn->ibc_early_rxs));
+ LASSERT(list_empty(&conn->ibc_tx_noops));
+ LASSERT(list_empty(&conn->ibc_tx_queue));
+ LASSERT(list_empty(&conn->ibc_tx_queue_rsrvd));
+ LASSERT(list_empty(&conn->ibc_tx_queue_nocred));
+ LASSERT(list_empty(&conn->ibc_active_txs));
+ LASSERT(conn->ibc_noops_posted == 0);
+ LASSERT(conn->ibc_nsends_posted == 0);
switch (conn->ibc_state) {
default:
case IBLND_CONN_DISCONNECTED:
/* connvars should have been freed already */
- LASSERT (conn->ibc_connvars == NULL);
+ LASSERT(conn->ibc_connvars == NULL);
break;
case IBLND_CONN_INIT:
}
int
-kiblnd_close_peer_conns_locked (kib_peer_t *peer, int why)
+kiblnd_close_peer_conns_locked(kib_peer_t *peer, int why)
{
kib_conn_t *conn;
struct list_head *ctmp;
struct list_head *cnxt;
int count = 0;
- list_for_each_safe (ctmp, cnxt, &peer->ibp_conns) {
+ list_for_each_safe(ctmp, cnxt, &peer->ibp_conns) {
conn = list_entry(ctmp, kib_conn_t, ibc_list);
CDEBUG(D_NET, "Closing conn -> %s, version: %x, reason: %d\n",
}
int
-kiblnd_close_stale_conns_locked (kib_peer_t *peer,
+kiblnd_close_stale_conns_locked(kib_peer_t *peer,
int version, __u64 incarnation)
{
kib_conn_t *conn;
struct list_head *cnxt;
int count = 0;
- list_for_each_safe (ctmp, cnxt, &peer->ibp_conns) {
+ list_for_each_safe(ctmp, cnxt, &peer->ibp_conns) {
conn = list_entry(ctmp, kib_conn_t, ibc_list);
if (conn->ibc_version == version &&
}
for (i = lo; i <= hi; i++) {
- list_for_each_safe (ptmp, pnxt, &kiblnd_data.kib_peers[i]) {
+ list_for_each_safe(ptmp, pnxt, &kiblnd_data.kib_peers[i]) {
peer = list_entry(ptmp, kib_peer_t, ibp_list);
- LASSERT (peer->ibp_connecting > 0 ||
+ LASSERT(peer->ibp_connecting > 0 ||
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns));
break;
}
- LASSERT (conn->ibc_cmid != NULL);
+ LASSERT(conn->ibc_cmid != NULL);
data->ioc_nid = conn->ibc_peer->ibp_nid;
if (conn->ibc_cmid->route.path_rec == NULL)
data->ioc_u32[0] = 0; /* iWarp has no path MTU */
}
void
-kiblnd_query (lnet_ni_t *ni, lnet_nid_t nid, unsigned long *when)
+kiblnd_query(lnet_ni_t *ni, lnet_nid_t nid, unsigned long *when)
{
unsigned long last_alive = 0;
unsigned long now = cfs_time_current();
peer = kiblnd_find_peer_locked(nid);
if (peer != NULL) {
- LASSERT (peer->ibp_connecting > 0 || /* creating conns */
+ LASSERT(peer->ibp_connecting > 0 || /* creating conns */
peer->ibp_accepting > 0 ||
!list_empty(&peer->ibp_conns)); /* active conn */
last_alive = peer->ibp_last_alive;
CDEBUG(D_NET, "Peer %s %p, alive %ld secs ago\n",
libcfs_nid2str(nid), peer,
last_alive ? cfs_duration_sec(now - last_alive) : -1);
- return;
}
void
kib_rx_t *rx;
int i;
- LASSERT (conn->ibc_rxs != NULL);
- LASSERT (conn->ibc_hdev != NULL);
+ LASSERT(conn->ibc_rxs != NULL);
+ LASSERT(conn->ibc_hdev != NULL);
for (i = 0; i < IBLND_RX_MSGS(conn->ibc_version); i++) {
rx = &conn->ibc_rxs[i];
- LASSERT (rx->rx_nob >= 0); /* not posted */
+ LASSERT(rx->rx_nob >= 0); /* not posted */
kiblnd_dma_unmap_single(conn->ibc_hdev->ibh_ibdev,
KIBLND_UNMAP_ADDR(rx, rx_msgunmap,
rx->rx_msgaddr = kiblnd_dma_map_single(conn->ibc_hdev->ibh_ibdev,
rx->rx_msg, IBLND_MSG_SIZE,
DMA_FROM_DEVICE);
- LASSERT (!kiblnd_dma_mapping_error(conn->ibc_hdev->ibh_ibdev,
+ LASSERT(!kiblnd_dma_mapping_error(conn->ibc_hdev->ibh_ibdev,
rx->rx_msgaddr));
KIBLND_UNMAP_ADDR_SET(rx, rx_msgunmap, rx->rx_msgaddr);
lnet_page2phys(pg) + pg_off);
pg_off += IBLND_MSG_SIZE;
- LASSERT (pg_off <= PAGE_SIZE);
+ LASSERT(pg_off <= PAGE_SIZE);
if (pg_off == PAGE_SIZE) {
pg_off = 0;
ipg++;
- LASSERT (ipg <= IBLND_RX_MSG_PAGES(conn->ibc_version));
+ LASSERT(ipg <= IBLND_RX_MSG_PAGES(conn->ibc_version));
}
}
}
kib_tx_t *tx;
int i;
- LASSERT (tpo->tpo_pool.po_allocated == 0);
+ LASSERT(tpo->tpo_pool.po_allocated == 0);
if (hdev == NULL)
return;
int ipage;
int i;
- LASSERT (net != NULL);
+ LASSERT(net != NULL);
dev = net->ibn_dev;
/* pre-mapped messages are not bigger than 1 page */
- CLASSERT (IBLND_MSG_SIZE <= PAGE_SIZE);
+ CLASSERT(IBLND_MSG_SIZE <= PAGE_SIZE);
/* No fancy arithmetic when we do the buffer calculations */
- CLASSERT (PAGE_SIZE % IBLND_MSG_SIZE == 0);
+ CLASSERT(PAGE_SIZE % IBLND_MSG_SIZE == 0);
tpo->tpo_hdev = kiblnd_current_hdev(dev);
tx->tx_msgaddr = kiblnd_dma_map_single(
tpo->tpo_hdev->ibh_ibdev, tx->tx_msg,
IBLND_MSG_SIZE, DMA_TO_DEVICE);
- LASSERT (!kiblnd_dma_mapping_error(tpo->tpo_hdev->ibh_ibdev,
+ LASSERT(!kiblnd_dma_mapping_error(tpo->tpo_hdev->ibh_ibdev,
tx->tx_msgaddr));
KIBLND_UNMAP_ADDR_SET(tx, tx_msgunmap, tx->tx_msgaddr);
list_add(&tx->tx_list, &pool->po_free_list);
page_offset += IBLND_MSG_SIZE;
- LASSERT (page_offset <= PAGE_SIZE);
+ LASSERT(page_offset <= PAGE_SIZE);
if (page_offset == PAGE_SIZE) {
page_offset = 0;
ipage++;
- LASSERT (ipage <= txpgs->ibp_npages);
+ LASSERT(ipage <= txpgs->ibp_npages);
}
}
}
{
__u64 index;
- LASSERT (hdev->ibh_mrs[0] != NULL);
+ LASSERT(hdev->ibh_mrs[0] != NULL);
if (hdev->ibh_nmrs == 1)
return hdev->ibh_mrs[0];
struct ib_mr *mr;
int i;
- LASSERT (hdev->ibh_mrs[0] != NULL);
+ LASSERT(hdev->ibh_mrs[0] != NULL);
if (*kiblnd_tunables.kib_map_on_demand > 0 &&
*kiblnd_tunables.kib_map_on_demand <= rd->rd_nfrags)
static void
kiblnd_destroy_fmr_pool(kib_fmr_pool_t *pool)
{
- LASSERT (pool->fpo_map_count == 0);
+ LASSERT(pool->fpo_map_count == 0);
if (pool->fpo_fmr_pool != NULL)
ib_destroy_fmr_pool(pool->fpo_fmr_pool);
void
kiblnd_fmr_pool_unmap(kib_fmr_t *fmr, int status)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
kib_fmr_pool_t *fpo = fmr->fmr_pool;
kib_fmr_poolset_t *fps = fpo->fpo_owner;
unsigned long now = cfs_time_current();
int rc;
rc = ib_fmr_pool_unmap(fmr->fmr_pfmr);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
if (status != 0) {
rc = ib_flush_fmr_pool(fpo->fpo_fmr_pool);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
}
fmr->fmr_pool = NULL;
static void
kiblnd_fini_pool(kib_pool_t *pool)
{
- LASSERT (list_empty(&pool->po_free_list));
- LASSERT (pool->po_allocated == 0);
+ LASSERT(list_empty(&pool->po_free_list));
+ LASSERT(pool->po_allocated == 0);
CDEBUG(D_NET, "Finalize %s pool\n", pool->po_owner->ps_name);
}
pool = list_entry(head->next, kib_pool_t, po_list);
list_del(&pool->po_list);
- LASSERT (pool->po_owner != NULL);
+ LASSERT(pool->po_owner != NULL);
pool->po_owner->ps_pool_destroy(pool);
}
}
void
kiblnd_pool_free_node(kib_pool_t *pool, struct list_head *node)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
kib_poolset_t *ps = pool->po_owner;
kib_pool_t *tmp;
unsigned long now = cfs_time_current();
if (ps->ps_node_fini != NULL)
ps->ps_node_fini(pool, node);
- LASSERT (pool->po_allocated > 0);
+ LASSERT(pool->po_allocated > 0);
list_add(node, &pool->po_free_list);
pool->po_allocated--;
{
kib_pmr_pool_t *ppo = container_of(pool, kib_pmr_pool_t, ppo_pool);
kib_phys_mr_t *pmr;
+ kib_phys_mr_t *tmp;
- LASSERT (pool->po_allocated == 0);
+ LASSERT(pool->po_allocated == 0);
- while (!list_empty(&pool->po_free_list)) {
- pmr = list_entry(pool->po_free_list.next,
- kib_phys_mr_t, pmr_list);
-
- LASSERT (pmr->pmr_mr == NULL);
+ list_for_each_entry_safe(pmr, tmp, &pool->po_free_list, pmr_list) {
+ LASSERT(pmr->pmr_mr == NULL);
list_del(&pmr->pmr_list);
if (pmr->pmr_ipb != NULL) {
kib_tx_pool_t *tpo = container_of(pool, kib_tx_pool_t, tpo_pool);
int i;
- LASSERT (pool->po_allocated == 0);
+ LASSERT(pool->po_allocated == 0);
if (tpo->tpo_tx_pages != NULL) {
kiblnd_unmap_tx_pool(tpo);
return PTR_ERR(mr);
}
- LASSERT (iova == ipb.addr);
+ LASSERT(iova == ipb.addr);
hdev->ibh_mrs[i] = mr;
}
int
kiblnd_dev_failover(kib_dev_t *dev)
{
- LIST_HEAD (zombie_tpo);
- LIST_HEAD (zombie_ppo);
- LIST_HEAD (zombie_fpo);
+ LIST_HEAD(zombie_tpo);
+ LIST_HEAD(zombie_ppo);
+ LIST_HEAD(zombie_fpo);
struct rdma_cm_id *cmid = NULL;
kib_hca_dev_t *hdev = NULL;
kib_hca_dev_t *old;
int rc = 0;
int i;
- LASSERT (*kiblnd_tunables.kib_dev_failover > 1 ||
+ LASSERT(*kiblnd_tunables.kib_dev_failover > 1 ||
dev->ibd_can_failover ||
dev->ibd_hdev == NULL);
}
void
-kiblnd_destroy_dev (kib_dev_t *dev)
+kiblnd_destroy_dev(kib_dev_t *dev)
{
- LASSERT (dev->ibd_nnets == 0);
- LASSERT (list_empty(&dev->ibd_nets));
+ LASSERT(dev->ibd_nnets == 0);
+ LASSERT(list_empty(&dev->ibd_nets));
list_del(&dev->ibd_fail_list);
list_del(&dev->ibd_list);
struct kib_sched_info *sched;
int i;
- LASSERT (list_empty(&kiblnd_data.kib_devs));
+ LASSERT(list_empty(&kiblnd_data.kib_devs));
CDEBUG(D_MALLOC, "before LND base cleanup: kmem %d\n",
atomic_read(&libcfs_kmemory));
case IBLND_INIT_ALL:
case IBLND_INIT_DATA:
- LASSERT (kiblnd_data.kib_peers != NULL);
+ LASSERT(kiblnd_data.kib_peers != NULL);
for (i = 0; i < kiblnd_data.kib_peer_hash_size; i++) {
- LASSERT (list_empty(&kiblnd_data.kib_peers[i]));
+ LASSERT(list_empty(&kiblnd_data.kib_peers[i]));
}
- LASSERT (list_empty(&kiblnd_data.kib_connd_zombies));
- LASSERT (list_empty(&kiblnd_data.kib_connd_conns));
+ LASSERT(list_empty(&kiblnd_data.kib_connd_zombies));
+ LASSERT(list_empty(&kiblnd_data.kib_connd_conns));
/* flag threads to terminate; wake and wait for them to die */
kiblnd_data.kib_shutdown = 1;
}
void
-kiblnd_shutdown (lnet_ni_t *ni)
+kiblnd_shutdown(lnet_ni_t *ni)
{
kib_net_t *net = ni->ni_data;
rwlock_t *g_lock = &kiblnd_data.kib_global_lock;
/* fall through */
case IBLND_INIT_NOTHING:
- LASSERT (atomic_read(&net->ibn_nconns) == 0);
+ LASSERT(atomic_read(&net->ibn_nconns) == 0);
if (net->ibn_dev != NULL &&
net->ibn_dev->ibd_nnets == 0)
out:
if (list_empty(&kiblnd_data.kib_devs))
kiblnd_base_shutdown();
- return;
}
static int
int rc;
int i;
- LASSERT (kiblnd_data.kib_init == IBLND_INIT_NOTHING);
+ LASSERT(kiblnd_data.kib_init == IBLND_INIT_NOTHING);
try_module_get(THIS_MODULE);
memset(&kiblnd_data, 0, sizeof(kiblnd_data)); /* zero pointers, flags etc */
} else {
LASSERT(sched->ibs_nthreads <= sched->ibs_nthreads_max);
/* increase one thread if there is new interface */
- nthrs = (sched->ibs_nthreads < sched->ibs_nthreads_max);
+ nthrs = sched->ibs_nthreads < sched->ibs_nthreads_max;
}
for (i = 0; i < nthrs; i++) {
long id;
char name[20];
+
id = KIB_THREAD_ID(sched->ibs_cpt, sched->ibs_nthreads + i);
snprintf(name, sizeof(name), "kiblnd_sd_%02ld_%02ld",
KIB_THREAD_CPT(id), KIB_THREAD_TID(id));
}
int
-kiblnd_startup (lnet_ni_t *ni)
+kiblnd_startup(lnet_ni_t *ni)
{
char *ifname;
kib_dev_t *ibdev = NULL;
int rc;
int newdev;
- LASSERT (ni->ni_lnd == &the_o2iblnd);
+ LASSERT(ni->ni_lnd == &the_o2iblnd);
if (kiblnd_data.kib_init == IBLND_INIT_NOTHING) {
rc = kiblnd_base_startup();
if (ni->ni_interfaces[0] != NULL) {
/* Use the IPoIB interface specified in 'networks=' */
- CLASSERT (LNET_MAX_INTERFACES > 1);
+ CLASSERT(LNET_MAX_INTERFACES > 1);
if (ni->ni_interfaces[1] != NULL) {
CERROR("Multiple interfaces not supported\n");
goto failed;
}
static void __exit
-kiblnd_module_fini (void)
+kiblnd_module_fini(void)
{
lnet_unregister_lnd(&the_o2iblnd);
}
static int __init
-kiblnd_module_init (void)
+kiblnd_module_init(void)
{
int rc;
- CLASSERT (sizeof(kib_msg_t) <= IBLND_MSG_SIZE);
- CLASSERT (offsetof(kib_msg_t, ibm_u.get.ibgm_rd.rd_frags[IBLND_MAX_RDMA_FRAGS])
+ CLASSERT(sizeof(kib_msg_t) <= IBLND_MSG_SIZE);
+ CLASSERT(offsetof(kib_msg_t, ibm_u.get.ibgm_rd.rd_frags[IBLND_MAX_RDMA_FRAGS])
<= IBLND_MSG_SIZE);
- CLASSERT (offsetof(kib_msg_t, ibm_u.putack.ibpam_rd.rd_frags[IBLND_MAX_RDMA_FRAGS])
+ CLASSERT(offsetof(kib_msg_t, ibm_u.putack.ibpam_rd.rd_frags[IBLND_MAX_RDMA_FRAGS])
<= IBLND_MSG_SIZE);
rc = kiblnd_tunables_init();
#include <linux/errno.h>
#include <linux/unistd.h>
#include <linux/uio.h>
+#include <linux/uaccess.h>
-#include <asm/uaccess.h>
#include <asm/io.h>
#include <linux/fs.h>
#include "o2iblnd.h"
static void
-kiblnd_tx_done (lnet_ni_t *ni, kib_tx_t *tx)
+kiblnd_tx_done(lnet_ni_t *ni, kib_tx_t *tx)
{
lnet_msg_t *lntmsg[2];
kib_net_t *net = ni->ni_data;
int rc;
int i;
- LASSERT (net != NULL);
- LASSERT (!in_interrupt());
- LASSERT (!tx->tx_queued); /* mustn't be queued for sending */
- LASSERT (tx->tx_sending == 0); /* mustn't be awaiting sent callback */
- LASSERT (!tx->tx_waiting); /* mustn't be awaiting peer response */
- LASSERT (tx->tx_pool != NULL);
+ LASSERT(net != NULL);
+ LASSERT(!in_interrupt());
+ LASSERT(!tx->tx_queued); /* mustn't be queued for sending */
+ LASSERT(tx->tx_sending == 0); /* mustn't be awaiting sent callback */
+ LASSERT(!tx->tx_waiting); /* mustn't be awaiting peer response */
+ LASSERT(tx->tx_pool != NULL);
kiblnd_unmap_tx(ni, tx);
rc = tx->tx_status;
if (tx->tx_conn != NULL) {
- LASSERT (ni == tx->tx_conn->ibc_peer->ibp_ni);
+ LASSERT(ni == tx->tx_conn->ibc_peer->ibp_ni);
kiblnd_conn_decref(tx->tx_conn);
tx->tx_conn = NULL;
}
void
-kiblnd_txlist_done (lnet_ni_t *ni, struct list_head *txlist, int status)
+kiblnd_txlist_done(lnet_ni_t *ni, struct list_head *txlist, int status)
{
kib_tx_t *tx;
- while (!list_empty (txlist)) {
- tx = list_entry (txlist->next, kib_tx_t, tx_list);
+ while (!list_empty(txlist)) {
+ tx = list_entry(txlist->next, kib_tx_t, tx_list);
list_del(&tx->tx_list);
/* complete now */
return NULL;
tx = container_of(node, kib_tx_t, tx_list);
- LASSERT (tx->tx_nwrq == 0);
- LASSERT (!tx->tx_queued);
- LASSERT (tx->tx_sending == 0);
- LASSERT (!tx->tx_waiting);
- LASSERT (tx->tx_status == 0);
- LASSERT (tx->tx_conn == NULL);
- LASSERT (tx->tx_lntmsg[0] == NULL);
- LASSERT (tx->tx_lntmsg[1] == NULL);
- LASSERT (tx->tx_u.pmr == NULL);
- LASSERT (tx->tx_nfrags == 0);
+ LASSERT(tx->tx_nwrq == 0);
+ LASSERT(!tx->tx_queued);
+ LASSERT(tx->tx_sending == 0);
+ LASSERT(!tx->tx_waiting);
+ LASSERT(tx->tx_status == 0);
+ LASSERT(tx->tx_conn == NULL);
+ LASSERT(tx->tx_lntmsg[0] == NULL);
+ LASSERT(tx->tx_lntmsg[1] == NULL);
+ LASSERT(tx->tx_u.pmr == NULL);
+ LASSERT(tx->tx_nfrags == 0);
return tx;
}
}
int
-kiblnd_post_rx (kib_rx_t *rx, int credit)
+kiblnd_post_rx(kib_rx_t *rx, int credit)
{
kib_conn_t *conn = rx->rx_conn;
kib_net_t *net = conn->ibc_peer->ibp_ni->ni_data;
struct ib_mr *mr;
int rc;
- LASSERT (net != NULL);
- LASSERT (!in_interrupt());
- LASSERT (credit == IBLND_POSTRX_NO_CREDIT ||
+ LASSERT(net != NULL);
+ LASSERT(!in_interrupt());
+ LASSERT(credit == IBLND_POSTRX_NO_CREDIT ||
credit == IBLND_POSTRX_PEER_CREDIT ||
credit == IBLND_POSTRX_RSRVD_CREDIT);
mr = kiblnd_find_dma_mr(conn->ibc_hdev, rx->rx_msgaddr, IBLND_MSG_SIZE);
- LASSERT (mr != NULL);
+ LASSERT(mr != NULL);
rx->rx_sge.lkey = mr->lkey;
rx->rx_sge.addr = rx->rx_msgaddr;
rx->rx_wrq.num_sge = 1;
rx->rx_wrq.wr_id = kiblnd_ptr2wreqid(rx, IBLND_WID_RX);
- LASSERT (conn->ibc_state >= IBLND_CONN_INIT);
- LASSERT (rx->rx_nob >= 0); /* not posted */
+ LASSERT(conn->ibc_state >= IBLND_CONN_INIT);
+ LASSERT(rx->rx_nob >= 0); /* not posted */
if (conn->ibc_state > IBLND_CONN_ESTABLISHED) {
kiblnd_drop_rx(rx); /* No more posts for this rx */
list_for_each(tmp, &conn->ibc_active_txs) {
kib_tx_t *tx = list_entry(tmp, kib_tx_t, tx_list);
- LASSERT (!tx->tx_queued);
- LASSERT (tx->tx_sending != 0 || tx->tx_waiting);
+ LASSERT(!tx->tx_queued);
+ LASSERT(tx->tx_sending != 0 || tx->tx_waiting);
if (tx->tx_cookie != cookie)
continue;
}
static void
-kiblnd_handle_rx (kib_rx_t *rx)
+kiblnd_handle_rx(kib_rx_t *rx)
{
kib_msg_t *msg = rx->rx_msg;
kib_conn_t *conn = rx->rx_conn;
int rc2;
int post_credit;
- LASSERT (conn->ibc_state >= IBLND_CONN_ESTABLISHED);
+ LASSERT(conn->ibc_state >= IBLND_CONN_ESTABLISHED);
- CDEBUG (D_NET, "Received %x[%d] from %s\n",
+ CDEBUG(D_NET, "Received %x[%d] from %s\n",
msg->ibm_type, credits,
libcfs_nid2str(conn->ibc_peer->ibp_nid));
break;
case IBLND_MSG_PUT_NAK:
- CWARN ("PUT_NACK from %s\n",
+ CWARN("PUT_NACK from %s\n",
libcfs_nid2str(conn->ibc_peer->ibp_nid));
post_credit = IBLND_POSTRX_RSRVD_CREDIT;
kiblnd_handle_completion(conn, IBLND_MSG_PUT_REQ,
break;
}
- LASSERT (tx->tx_waiting);
+ LASSERT(tx->tx_waiting);
/* CAVEAT EMPTOR: I could be racing with tx_complete, but...
* (a) I can overwrite tx_msg since my peer has received it!
* (b) tx_waiting set tells tx_complete() it's not done. */
}
static void
-kiblnd_rx_complete (kib_rx_t *rx, int status, int nob)
+kiblnd_rx_complete(kib_rx_t *rx, int status, int nob)
{
kib_msg_t *msg = rx->rx_msg;
kib_conn_t *conn = rx->rx_conn;
int rc;
int err = -EIO;
- LASSERT (net != NULL);
- LASSERT (rx->rx_nob < 0); /* was posted */
+ LASSERT(net != NULL);
+ LASSERT(rx->rx_nob < 0); /* was posted */
rx->rx_nob = 0; /* isn't now */
if (conn->ibc_state > IBLND_CONN_ESTABLISHED)
goto failed;
}
- LASSERT (nob >= 0);
+ LASSERT(nob >= 0);
rx->rx_nob = nob;
rc = kiblnd_unpack_msg(msg, rx->rx_nob);
if (rc != 0) {
- CERROR ("Error %d unpacking rx from %s\n",
+ CERROR("Error %d unpacking rx from %s\n",
rc, libcfs_nid2str(conn->ibc_peer->ibp_nid));
goto failed;
}
msg->ibm_dstnid != ni->ni_nid ||
msg->ibm_srcstamp != conn->ibc_incarnation ||
msg->ibm_dststamp != net->ibn_incarnation) {
- CERROR ("Stale rx from %s\n",
+ CERROR("Stale rx from %s\n",
libcfs_nid2str(conn->ibc_peer->ibp_nid));
err = -ESTALE;
goto failed;
}
static struct page *
-kiblnd_kvaddr_to_page (unsigned long vaddr)
+kiblnd_kvaddr_to_page(unsigned long vaddr)
{
struct page *page;
if (is_vmalloc_addr((void *)vaddr)) {
- page = vmalloc_to_page ((void *)vaddr);
- LASSERT (page != NULL);
+ page = vmalloc_to_page((void *)vaddr);
+ LASSERT(page != NULL);
return page;
}
#ifdef CONFIG_HIGHMEM
LBUG();
}
#endif
- page = virt_to_page (vaddr);
- LASSERT (page != NULL);
+ page = virt_to_page(vaddr);
+ LASSERT(page != NULL);
return page;
}
fps = net->ibn_fmr_ps[cpt];
rc = kiblnd_fmr_pool_map(fps, pages, npages, 0, &tx->tx_u.fmr);
if (rc != 0) {
- CERROR ("Can't map %d pages: %d\n", npages, rc);
+ CERROR("Can't map %d pages: %d\n", npages, rc);
return rc;
}
int fragnob;
int page_offset;
- LASSERT (nob > 0);
- LASSERT (niov > 0);
- LASSERT (net != NULL);
+ LASSERT(nob > 0);
+ LASSERT(niov > 0);
+ LASSERT(net != NULL);
while (offset >= iov->iov_len) {
offset -= iov->iov_len;
niov--;
iov++;
- LASSERT (niov > 0);
+ LASSERT(niov > 0);
}
sg = tx->tx_frags;
do {
- LASSERT (niov > 0);
+ LASSERT(niov > 0);
vaddr = ((unsigned long)iov->iov_base) + offset;
page_offset = vaddr & (PAGE_SIZE - 1);
page = kiblnd_kvaddr_to_page(vaddr);
if (page == NULL) {
- CERROR ("Can't find page\n");
+ CERROR("Can't find page\n");
return -EFAULT;
}
}
static int
-kiblnd_setup_rd_kiov (lnet_ni_t *ni, kib_tx_t *tx, kib_rdma_desc_t *rd,
+kiblnd_setup_rd_kiov(lnet_ni_t *ni, kib_tx_t *tx, kib_rdma_desc_t *rd,
int nkiov, lnet_kiov_t *kiov, int offset, int nob)
{
kib_net_t *net = ni->ni_data;
CDEBUG(D_NET, "niov %d offset %d nob %d\n", nkiov, offset, nob);
- LASSERT (nob > 0);
- LASSERT (nkiov > 0);
- LASSERT (net != NULL);
+ LASSERT(nob > 0);
+ LASSERT(nkiov > 0);
+ LASSERT(net != NULL);
while (offset >= kiov->kiov_len) {
offset -= kiov->kiov_len;
nkiov--;
kiov++;
- LASSERT (nkiov > 0);
+ LASSERT(nkiov > 0);
}
sg = tx->tx_frags;
do {
- LASSERT (nkiov > 0);
+ LASSERT(nkiov > 0);
fragnob = min((int)(kiov->kiov_len - offset), nob);
}
static int
-kiblnd_post_tx_locked (kib_conn_t *conn, kib_tx_t *tx, int credit)
+kiblnd_post_tx_locked(kib_conn_t *conn, kib_tx_t *tx, int credit)
__releases(conn->ibc_lock)
__acquires(conn->ibc_lock)
{
int done;
struct ib_send_wr *bad_wrq;
- LASSERT (tx->tx_queued);
+ LASSERT(tx->tx_queued);
/* We rely on this for QP sizing */
- LASSERT (tx->tx_nwrq > 0);
- LASSERT (tx->tx_nwrq <= 1 + IBLND_RDMA_FRAGS(ver));
+ LASSERT(tx->tx_nwrq > 0);
+ LASSERT(tx->tx_nwrq <= 1 + IBLND_RDMA_FRAGS(ver));
- LASSERT (credit == 0 || credit == 1);
- LASSERT (conn->ibc_outstanding_credits >= 0);
- LASSERT (conn->ibc_outstanding_credits <= IBLND_MSG_QUEUE_SIZE(ver));
- LASSERT (conn->ibc_credits >= 0);
- LASSERT (conn->ibc_credits <= IBLND_MSG_QUEUE_SIZE(ver));
+ LASSERT(credit == 0 || credit == 1);
+ LASSERT(conn->ibc_outstanding_credits >= 0);
+ LASSERT(conn->ibc_outstanding_credits <= IBLND_MSG_QUEUE_SIZE(ver));
+ LASSERT(conn->ibc_credits >= 0);
+ LASSERT(conn->ibc_credits <= IBLND_MSG_QUEUE_SIZE(ver));
if (conn->ibc_nsends_posted == IBLND_CONCURRENT_SENDS(ver)) {
/* tx completions outstanding... */
}
void
-kiblnd_check_sends (kib_conn_t *conn)
+kiblnd_check_sends(kib_conn_t *conn)
{
int ver = conn->ibc_version;
lnet_ni_t *ni = conn->ibc_peer->ibp_ni;
spin_lock(&conn->ibc_lock);
- LASSERT (conn->ibc_nsends_posted <= IBLND_CONCURRENT_SENDS(ver));
- LASSERT (!IBLND_OOB_CAPABLE(ver) ||
+ LASSERT(conn->ibc_nsends_posted <= IBLND_CONCURRENT_SENDS(ver));
+ LASSERT(!IBLND_OOB_CAPABLE(ver) ||
conn->ibc_noops_posted <= IBLND_OOB_MSGS(ver));
- LASSERT (conn->ibc_reserved_credits >= 0);
+ LASSERT(conn->ibc_reserved_credits >= 0);
while (conn->ibc_reserved_credits > 0 &&
!list_empty(&conn->ibc_tx_queue_rsrvd)) {
tx = list_entry(conn->ibc_tx_queue_nocred.next,
kib_tx_t, tx_list);
} else if (!list_empty(&conn->ibc_tx_noops)) {
- LASSERT (!IBLND_OOB_CAPABLE(ver));
+ LASSERT(!IBLND_OOB_CAPABLE(ver));
credit = 1;
tx = list_entry(conn->ibc_tx_noops.next,
kib_tx_t, tx_list);
}
static void
-kiblnd_tx_complete (kib_tx_t *tx, int status)
+kiblnd_tx_complete(kib_tx_t *tx, int status)
{
int failed = (status != IB_WC_SUCCESS);
kib_conn_t *conn = tx->tx_conn;
int idle;
- LASSERT (tx->tx_sending > 0);
+ LASSERT(tx->tx_sending > 0);
if (failed) {
if (conn->ibc_state == IBLND_CONN_ESTABLISHED)
}
void
-kiblnd_init_tx_msg (lnet_ni_t *ni, kib_tx_t *tx, int type, int body_nob)
+kiblnd_init_tx_msg(lnet_ni_t *ni, kib_tx_t *tx, int type, int body_nob)
{
kib_hca_dev_t *hdev = tx->tx_pool->tpo_hdev;
struct ib_sge *sge = &tx->tx_sge[tx->tx_nwrq];
struct ib_send_wr *wrq = &tx->tx_wrq[tx->tx_nwrq];
- int nob = offsetof (kib_msg_t, ibm_u) + body_nob;
+ int nob = offsetof(kib_msg_t, ibm_u) + body_nob;
struct ib_mr *mr;
- LASSERT (tx->tx_nwrq >= 0);
- LASSERT (tx->tx_nwrq < IBLND_MAX_RDMA_FRAGS + 1);
- LASSERT (nob <= IBLND_MSG_SIZE);
+ LASSERT(tx->tx_nwrq >= 0);
+ LASSERT(tx->tx_nwrq < IBLND_MAX_RDMA_FRAGS + 1);
+ LASSERT(nob <= IBLND_MSG_SIZE);
kiblnd_init_msg(tx->tx_msg, type, body_nob);
mr = kiblnd_find_dma_mr(hdev, tx->tx_msgaddr, nob);
- LASSERT (mr != NULL);
+ LASSERT(mr != NULL);
sge->lkey = mr->lkey;
sge->addr = tx->tx_msgaddr;
}
int
-kiblnd_init_rdma (kib_conn_t *conn, kib_tx_t *tx, int type,
+kiblnd_init_rdma(kib_conn_t *conn, kib_tx_t *tx, int type,
int resid, kib_rdma_desc_t *dstrd, __u64 dstcookie)
{
kib_msg_t *ibmsg = tx->tx_msg;
int dstidx;
int wrknob;
- LASSERT (!in_interrupt());
- LASSERT (tx->tx_nwrq == 0);
- LASSERT (type == IBLND_MSG_GET_DONE ||
+ LASSERT(!in_interrupt());
+ LASSERT(tx->tx_nwrq == 0);
+ LASSERT(type == IBLND_MSG_GET_DONE ||
type == IBLND_MSG_PUT_DONE);
srcidx = dstidx = 0;
ibmsg->ibm_u.completion.ibcm_status = rc;
ibmsg->ibm_u.completion.ibcm_cookie = dstcookie;
kiblnd_init_tx_msg(conn->ibc_peer->ibp_ni, tx,
- type, sizeof (kib_completion_msg_t));
+ type, sizeof(kib_completion_msg_t));
return rc;
}
void
-kiblnd_queue_tx_locked (kib_tx_t *tx, kib_conn_t *conn)
+kiblnd_queue_tx_locked(kib_tx_t *tx, kib_conn_t *conn)
{
struct list_head *q;
- LASSERT (tx->tx_nwrq > 0); /* work items set up */
- LASSERT (!tx->tx_queued); /* not queued for sending already */
- LASSERT (conn->ibc_state >= IBLND_CONN_ESTABLISHED);
+ LASSERT(tx->tx_nwrq > 0); /* work items set up */
+ LASSERT(!tx->tx_queued); /* not queued for sending already */
+ LASSERT(conn->ibc_state >= IBLND_CONN_ESTABLISHED);
tx->tx_queued = 1;
tx->tx_deadline = jiffies + (*kiblnd_tunables.kib_timeout * HZ);
if (tx->tx_conn == NULL) {
kiblnd_conn_addref(conn);
tx->tx_conn = conn;
- LASSERT (tx->tx_msg->ibm_type != IBLND_MSG_PUT_DONE);
+ LASSERT(tx->tx_msg->ibm_type != IBLND_MSG_PUT_DONE);
} else {
/* PUT_DONE first attached to conn as a PUT_REQ */
- LASSERT (tx->tx_conn == conn);
- LASSERT (tx->tx_msg->ibm_type == IBLND_MSG_PUT_DONE);
+ LASSERT(tx->tx_conn == conn);
+ LASSERT(tx->tx_msg->ibm_type == IBLND_MSG_PUT_DONE);
}
switch (tx->tx_msg->ibm_type) {
}
void
-kiblnd_queue_tx (kib_tx_t *tx, kib_conn_t *conn)
+kiblnd_queue_tx(kib_tx_t *tx, kib_conn_t *conn)
{
spin_lock(&conn->ibc_lock);
kiblnd_queue_tx_locked(tx, conn);
}
static void
-kiblnd_connect_peer (kib_peer_t *peer)
+kiblnd_connect_peer(kib_peer_t *peer)
{
struct rdma_cm_id *cmid;
kib_dev_t *dev;
struct sockaddr_in dstaddr;
int rc;
- LASSERT (net != NULL);
- LASSERT (peer->ibp_connecting > 0);
+ LASSERT(net != NULL);
+ LASSERT(peer->ibp_connecting > 0);
cmid = kiblnd_rdma_create_id(kiblnd_cm_callback, peer, RDMA_PS_TCP,
IB_QPT_RC);
goto failed2;
}
- LASSERT (cmid->device != NULL);
+ LASSERT(cmid->device != NULL);
CDEBUG(D_NET, "%s: connection bound to %s:%pI4h:%s\n",
libcfs_nid2str(peer->ibp_nid), dev->ibd_ifname,
&dev->ibd_ifip, cmid->device->name);
}
void
-kiblnd_launch_tx (lnet_ni_t *ni, kib_tx_t *tx, lnet_nid_t nid)
+kiblnd_launch_tx(lnet_ni_t *ni, kib_tx_t *tx, lnet_nid_t nid)
{
kib_peer_t *peer;
kib_peer_t *peer2;
/* If I get here, I've committed to send, so I complete the tx with
* failure on any problems */
- LASSERT (tx == NULL || tx->tx_conn == NULL); /* only set when assigned a conn */
- LASSERT (tx == NULL || tx->tx_nwrq > 0); /* work items have been set up */
+ LASSERT(tx == NULL || tx->tx_conn == NULL); /* only set when assigned a conn */
+ LASSERT(tx == NULL || tx->tx_nwrq > 0); /* work items have been set up */
/* First time, just use a read lock since I expect to find my peer
* connected */
if (peer != NULL) {
if (list_empty(&peer->ibp_conns)) {
/* found a peer, but it's still connecting... */
- LASSERT (peer->ibp_connecting != 0 ||
+ LASSERT(peer->ibp_connecting != 0 ||
peer->ibp_accepting != 0);
if (tx != NULL)
list_add_tail(&tx->tx_list,
if (peer2 != NULL) {
if (list_empty(&peer2->ibp_conns)) {
/* found a peer, but it's still connecting... */
- LASSERT (peer2->ibp_connecting != 0 ||
+ LASSERT(peer2->ibp_connecting != 0 ||
peer2->ibp_accepting != 0);
if (tx != NULL)
list_add_tail(&tx->tx_list,
}
/* Brand new peer */
- LASSERT (peer->ibp_connecting == 0);
+ LASSERT(peer->ibp_connecting == 0);
peer->ibp_connecting = 1;
/* always called with a ref on ni, which prevents ni being shutdown */
- LASSERT (((kib_net_t *)ni->ni_data)->ibn_shutdown == 0);
+ LASSERT(((kib_net_t *)ni->ni_data)->ibn_shutdown == 0);
if (tx != NULL)
list_add_tail(&tx->tx_list, &peer->ibp_tx_queue);
}
int
-kiblnd_send (lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg)
+kiblnd_send(lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg)
{
lnet_hdr_t *hdr = &lntmsg->msg_hdr;
int type = lntmsg->msg_type;
CDEBUG(D_NET, "sending %d bytes in %d frags to %s\n",
payload_nob, payload_niov, libcfs_id2str(target));
- LASSERT (payload_nob == 0 || payload_niov > 0);
- LASSERT (payload_niov <= LNET_MAX_IOV);
+ LASSERT(payload_nob == 0 || payload_niov > 0);
+ LASSERT(payload_niov <= LNET_MAX_IOV);
/* Thread context */
- LASSERT (!in_interrupt());
+ LASSERT(!in_interrupt());
/* payload is either all vaddrs or all pages */
- LASSERT (!(payload_kiov != NULL && payload_iov != NULL));
+ LASSERT(!(payload_kiov != NULL && payload_iov != NULL));
switch (type) {
default:
return -EIO;
case LNET_MSG_ACK:
- LASSERT (payload_nob == 0);
+ LASSERT(payload_nob == 0);
break;
case LNET_MSG_GET:
/* send IMMEDIATE */
- LASSERT (offsetof(kib_msg_t, ibm_u.immediate.ibim_payload[payload_nob])
+ LASSERT(offsetof(kib_msg_t, ibm_u.immediate.ibim_payload[payload_nob])
<= IBLND_MSG_SIZE);
tx = kiblnd_get_idle_tx(ni, target.nid);
if (tx == NULL) {
- CERROR ("Can't send %d to %s: tx descs exhausted\n",
+ CERROR("Can't send %d to %s: tx descs exhausted\n",
type, libcfs_nid2str(target.nid));
return -ENOMEM;
}
}
static void
-kiblnd_reply (lnet_ni_t *ni, kib_rx_t *rx, lnet_msg_t *lntmsg)
+kiblnd_reply(lnet_ni_t *ni, kib_rx_t *rx, lnet_msg_t *lntmsg)
{
lnet_process_id_t target = lntmsg->msg_target;
unsigned int niov = lntmsg->msg_niov;
}
int
-kiblnd_recv (lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg, int delayed,
+kiblnd_recv(lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg, int delayed,
unsigned int niov, struct kvec *iov, lnet_kiov_t *kiov,
unsigned int offset, unsigned int mlen, unsigned int rlen)
{
int post_credit = IBLND_POSTRX_PEER_CREDIT;
int rc = 0;
- LASSERT (mlen <= rlen);
- LASSERT (!in_interrupt());
+ LASSERT(mlen <= rlen);
+ LASSERT(!in_interrupt());
/* Either all pages or all vaddrs */
- LASSERT (!(kiov != NULL && iov != NULL));
+ LASSERT(!(kiov != NULL && iov != NULL));
switch (rxmsg->ibm_type) {
default:
case IBLND_MSG_IMMEDIATE:
nob = offsetof(kib_msg_t, ibm_u.immediate.ibim_payload[rlen]);
if (nob > rx->rx_nob) {
- CERROR ("Immediate message from %s too big: %d(%d)\n",
+ CERROR("Immediate message from %s too big: %d(%d)\n",
libcfs_nid2str(rxmsg->ibm_u.immediate.ibim_hdr.src_nid),
nob, rx->rx_nob);
rc = -EPROTO;
IBLND_MSG_SIZE, rxmsg,
offsetof(kib_msg_t, ibm_u.immediate.ibim_payload),
mlen);
- lnet_finalize (ni, lntmsg, 0);
+ lnet_finalize(ni, lntmsg, 0);
break;
case IBLND_MSG_PUT_REQ:
}
static void
-kiblnd_thread_fini (void)
+kiblnd_thread_fini(void)
{
- atomic_dec (&kiblnd_data.kib_nthreads);
+ atomic_dec(&kiblnd_data.kib_nthreads);
}
void
-kiblnd_peer_alive (kib_peer_t *peer)
+kiblnd_peer_alive(kib_peer_t *peer)
{
/* This is racy, but everyone's only writing cfs_time_current() */
peer->ibp_last_alive = cfs_time_current();
}
static void
-kiblnd_peer_notify (kib_peer_t *peer)
+kiblnd_peer_notify(kib_peer_t *peer)
{
int error = 0;
unsigned long last_alive = 0;
}
void
-kiblnd_close_conn_locked (kib_conn_t *conn, int error)
+kiblnd_close_conn_locked(kib_conn_t *conn, int error)
{
/* This just does the immediate housekeeping. 'error' is zero for a
* normal shutdown which can happen only after the connection has been
kib_dev_t *dev;
unsigned long flags;
- LASSERT (error != 0 || conn->ibc_state >= IBLND_CONN_ESTABLISHED);
+ LASSERT(error != 0 || conn->ibc_state >= IBLND_CONN_ESTABLISHED);
if (error != 0 && conn->ibc_comms_error == 0)
conn->ibc_comms_error = error;
list_del(&conn->ibc_list);
/* connd (see below) takes over ibc_list's ref */
- if (list_empty (&peer->ibp_conns) && /* no more conns */
+ if (list_empty(&peer->ibp_conns) && /* no more conns */
kiblnd_peer_active(peer)) { /* still in peer table */
kiblnd_unlink_peer_locked(peer);
{
unsigned long flags;
kib_rx_t *rx;
+ kib_rx_t *tmp;
LASSERT(!in_interrupt());
LASSERT(conn->ibc_state >= IBLND_CONN_ESTABLISHED);
write_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
- while (!list_empty(&conn->ibc_early_rxs)) {
- rx = list_entry(conn->ibc_early_rxs.next,
- kib_rx_t, rx_list);
+ list_for_each_entry_safe(rx, tmp, &conn->ibc_early_rxs, rx_list) {
list_del(&rx->rx_list);
write_unlock_irqrestore(&kiblnd_data.kib_global_lock, flags);
static void
kiblnd_abort_txs(kib_conn_t *conn, struct list_head *txs)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
struct list_head *tmp;
struct list_head *nxt;
kib_tx_t *tx;
spin_lock(&conn->ibc_lock);
- list_for_each_safe (tmp, nxt, txs) {
- tx = list_entry (tmp, kib_tx_t, tx_list);
+ list_for_each_safe(tmp, nxt, txs) {
+ tx = list_entry(tmp, kib_tx_t, tx_list);
if (txs == &conn->ibc_active_txs) {
- LASSERT (!tx->tx_queued);
- LASSERT (tx->tx_waiting ||
+ LASSERT(!tx->tx_queued);
+ LASSERT(tx->tx_waiting ||
tx->tx_sending != 0);
} else {
- LASSERT (tx->tx_queued);
+ LASSERT(tx->tx_queued);
}
tx->tx_status = -ECONNABORTED;
if (tx->tx_sending == 0) {
tx->tx_queued = 0;
- list_del (&tx->tx_list);
- list_add (&tx->tx_list, &zombies);
+ list_del(&tx->tx_list);
+ list_add(&tx->tx_list, &zombies);
}
}
}
static void
-kiblnd_finalise_conn (kib_conn_t *conn)
+kiblnd_finalise_conn(kib_conn_t *conn)
{
- LASSERT (!in_interrupt());
- LASSERT (conn->ibc_state > IBLND_CONN_INIT);
+ LASSERT(!in_interrupt());
+ LASSERT(conn->ibc_state > IBLND_CONN_INIT);
kiblnd_set_conn_state(conn, IBLND_CONN_DISCONNECTED);
}
void
-kiblnd_peer_connect_failed (kib_peer_t *peer, int active, int error)
+kiblnd_peer_connect_failed(kib_peer_t *peer, int active, int error)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
unsigned long flags;
- LASSERT (error != 0);
- LASSERT (!in_interrupt());
+ LASSERT(error != 0);
+ LASSERT(!in_interrupt());
write_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
if (active) {
- LASSERT (peer->ibp_connecting > 0);
+ LASSERT(peer->ibp_connecting > 0);
peer->ibp_connecting--;
} else {
- LASSERT (peer->ibp_accepting > 0);
+ LASSERT(peer->ibp_accepting > 0);
peer->ibp_accepting--;
}
peer->ibp_error = error;
} else {
/* Can't have blocked transmits if there are connections */
- LASSERT (list_empty(&peer->ibp_tx_queue));
+ LASSERT(list_empty(&peer->ibp_tx_queue));
}
write_unlock_irqrestore(&kiblnd_data.kib_global_lock, flags);
kiblnd_peer_notify(peer);
- if (list_empty (&zombies))
+ if (list_empty(&zombies))
return;
CNETERR("Deleting messages for %s: connection failed\n",
{
kib_peer_t *peer = conn->ibc_peer;
kib_tx_t *tx;
+ kib_tx_t *tmp;
struct list_head txs;
unsigned long flags;
int active;
libcfs_nid2str(peer->ibp_nid), active,
conn->ibc_version, status);
- LASSERT (!in_interrupt());
- LASSERT ((conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT &&
+ LASSERT(!in_interrupt());
+ LASSERT((conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT &&
peer->ibp_connecting > 0) ||
(conn->ibc_state == IBLND_CONN_PASSIVE_WAIT &&
peer->ibp_accepting > 0));
/* Schedule blocked txs */
spin_lock(&conn->ibc_lock);
- while (!list_empty(&txs)) {
- tx = list_entry(txs.next, kib_tx_t, tx_list);
+ list_for_each_entry_safe(tx, tmp, &txs, tx_list) {
list_del(&tx->tx_list);
kiblnd_queue_tx_locked(tx, conn);
}
static int
-kiblnd_passive_connect (struct rdma_cm_id *cmid, void *priv, int priv_nob)
+kiblnd_passive_connect(struct rdma_cm_id *cmid, void *priv, int priv_nob)
{
rwlock_t *g_lock = &kiblnd_data.kib_global_lock;
kib_msg_t *reqmsg = priv;
unsigned long flags;
int rc;
struct sockaddr_in *peer_addr;
- LASSERT (!in_interrupt());
+ LASSERT(!in_interrupt());
/* cmid inherits 'context' from the corresponding listener id */
ibdev = (kib_dev_t *)cmid->context;
- LASSERT (ibdev != NULL);
+ LASSERT(ibdev != NULL);
memset(&rej, 0, sizeof(rej));
rej.ibr_magic = IBLND_MSG_MAGIC;
peer = peer2;
} else {
/* Brand new peer */
- LASSERT (peer->ibp_accepting == 0);
- LASSERT (peer->ibp_version == 0 &&
+ LASSERT(peer->ibp_accepting == 0);
+ LASSERT(peer->ibp_version == 0 &&
peer->ibp_incarnation == 0);
peer->ibp_accepting = 1;
peer->ibp_incarnation = reqmsg->ibm_srcstamp;
/* I have a ref on ni that prevents it being shutdown */
- LASSERT (net->ibn_shutdown == 0);
+ LASSERT(net->ibn_shutdown == 0);
kiblnd_peer_addref(peer);
list_add_tail(&peer->ibp_list, kiblnd_nid2peerlist(nid));
conn->ibc_incarnation = reqmsg->ibm_srcstamp;
conn->ibc_credits = IBLND_MSG_QUEUE_SIZE(version);
conn->ibc_reserved_credits = IBLND_MSG_QUEUE_SIZE(version);
- LASSERT (conn->ibc_credits + conn->ibc_reserved_credits + IBLND_OOB_MSGS(version)
+ LASSERT(conn->ibc_credits + conn->ibc_reserved_credits + IBLND_OOB_MSGS(version)
<= IBLND_RX_MSGS(version));
ackmsg = &conn->ibc_connvars->cv_msg;
}
static void
-kiblnd_reconnect (kib_conn_t *conn, int version,
+kiblnd_reconnect(kib_conn_t *conn, int version,
__u64 incarnation, int why, kib_connparams_t *cp)
{
kib_peer_t *peer = conn->ibc_peer;
int retry = 0;
unsigned long flags;
- LASSERT (conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT);
- LASSERT (peer->ibp_connecting > 0); /* 'conn' at least */
+ LASSERT(conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT);
+ LASSERT(peer->ibp_connecting > 0); /* 'conn' at least */
write_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
}
static void
-kiblnd_rejected (kib_conn_t *conn, int reason, void *priv, int priv_nob)
+kiblnd_rejected(kib_conn_t *conn, int reason, void *priv, int priv_nob)
{
kib_peer_t *peer = conn->ibc_peer;
- LASSERT (!in_interrupt());
- LASSERT (conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT);
+ LASSERT(!in_interrupt());
+ LASSERT(conn->ibc_state == IBLND_CONN_ACTIVE_CONNECT);
switch (reason) {
case IB_CM_REJ_STALE_CONN:
}
static void
-kiblnd_check_connreply (kib_conn_t *conn, void *priv, int priv_nob)
+kiblnd_check_connreply(kib_conn_t *conn, void *priv, int priv_nob)
{
kib_peer_t *peer = conn->ibc_peer;
lnet_ni_t *ni = peer->ibp_ni;
int rc = kiblnd_unpack_msg(msg, priv_nob);
unsigned long flags;
- LASSERT (net != NULL);
+ LASSERT(net != NULL);
if (rc != 0) {
CERROR("Can't unpack connack from %s: %d\n",
conn->ibc_incarnation = msg->ibm_srcstamp;
conn->ibc_credits =
conn->ibc_reserved_credits = IBLND_MSG_QUEUE_SIZE(ver);
- LASSERT (conn->ibc_credits + conn->ibc_reserved_credits + IBLND_OOB_MSGS(ver)
+ LASSERT(conn->ibc_credits + conn->ibc_reserved_credits + IBLND_OOB_MSGS(ver)
<= IBLND_RX_MSGS(ver));
kiblnd_connreq_done(conn, 0);
* kiblnd_connreq_done(0) moves the conn state to ESTABLISHED, but then
* immediately tears it down. */
- LASSERT (rc != 0);
+ LASSERT(rc != 0);
conn->ibc_comms_error = rc;
kiblnd_connreq_done(conn, 0);
}
static int
-kiblnd_active_connect (struct rdma_cm_id *cmid)
+kiblnd_active_connect(struct rdma_cm_id *cmid)
{
kib_peer_t *peer = (kib_peer_t *)cmid->context;
kib_conn_t *conn;
LBUG();
case IBLND_CONN_PASSIVE_WAIT:
- CERROR ("%s: REJECTED %d\n",
+ CERROR("%s: REJECTED %d\n",
libcfs_nid2str(conn->ibc_peer->ibp_nid),
event->status);
kiblnd_connreq_done(conn, -ECONNRESET);
kib_tx_t *tx;
struct list_head *ttmp;
- list_for_each (ttmp, txs) {
- tx = list_entry (ttmp, kib_tx_t, tx_list);
+ list_for_each(ttmp, txs) {
+ tx = list_entry(ttmp, kib_tx_t, tx_list);
if (txs != &conn->ibc_active_txs) {
- LASSERT (tx->tx_queued);
+ LASSERT(tx->tx_queued);
} else {
- LASSERT (!tx->tx_queued);
- LASSERT (tx->tx_waiting || tx->tx_sending != 0);
+ LASSERT(!tx->tx_queued);
+ LASSERT(tx->tx_waiting || tx->tx_sending != 0);
}
- if (cfs_time_aftereq (jiffies, tx->tx_deadline)) {
+ if (cfs_time_aftereq(jiffies, tx->tx_deadline)) {
CERROR("Timed out tx: %s, %lu seconds\n",
kiblnd_queue2str(conn, txs),
cfs_duration_sec(jiffies - tx->tx_deadline));
}
static void
-kiblnd_check_conns (int idx)
+kiblnd_check_conns(int idx)
{
- LIST_HEAD (closes);
- LIST_HEAD (checksends);
+ LIST_HEAD(closes);
+ LIST_HEAD(checksends);
struct list_head *peers = &kiblnd_data.kib_peers[idx];
struct list_head *ptmp;
kib_peer_t *peer;
kib_conn_t *conn;
+ kib_conn_t *tmp;
struct list_head *ctmp;
unsigned long flags;
* take a look... */
read_lock_irqsave(&kiblnd_data.kib_global_lock, flags);
- list_for_each (ptmp, peers) {
- peer = list_entry (ptmp, kib_peer_t, ibp_list);
+ list_for_each(ptmp, peers) {
+ peer = list_entry(ptmp, kib_peer_t, ibp_list);
- list_for_each (ctmp, &peer->ibp_conns) {
+ list_for_each(ctmp, &peer->ibp_conns) {
int timedout;
int sendnoop;
conn = list_entry(ctmp, kib_conn_t, ibc_list);
- LASSERT (conn->ibc_state == IBLND_CONN_ESTABLISHED);
+ LASSERT(conn->ibc_state == IBLND_CONN_ESTABLISHED);
spin_lock(&conn->ibc_lock);
/* Handle timeout by closing the whole
* connection. We can only be sure RDMA activity
* has ceased once the QP has been modified. */
- while (!list_empty(&closes)) {
- conn = list_entry(closes.next,
- kib_conn_t, ibc_connd_list);
+ list_for_each_entry_safe(conn, tmp, &closes, ibc_connd_list) {
list_del(&conn->ibc_connd_list);
kiblnd_close_conn(conn, -ETIMEDOUT);
kiblnd_conn_decref(conn);
}
static void
-kiblnd_disconnect_conn (kib_conn_t *conn)
+kiblnd_disconnect_conn(kib_conn_t *conn)
{
- LASSERT (!in_interrupt());
- LASSERT (current == kiblnd_data.kib_connd);
- LASSERT (conn->ibc_state == IBLND_CONN_CLOSING);
+ LASSERT(!in_interrupt());
+ LASSERT(current == kiblnd_data.kib_connd);
+ LASSERT(conn->ibc_state == IBLND_CONN_CLOSING);
rdma_disconnect(conn->ibc_cmid);
kiblnd_finalise_conn(conn);
}
int
-kiblnd_connd (void *arg)
+kiblnd_connd(void *arg)
{
wait_queue_t wait;
unsigned long flags;
int peer_index = 0;
unsigned long deadline = jiffies;
- cfs_block_allsigs ();
+ cfs_block_allsigs();
init_waitqueue_entry(&wait, current);
kiblnd_data.kib_connd = current;
dropped_lock = 0;
- if (!list_empty (&kiblnd_data.kib_connd_zombies)) {
+ if (!list_empty(&kiblnd_data.kib_connd_zombies)) {
conn = list_entry(kiblnd_data. \
kib_connd_zombies.next,
kib_conn_t, ibc_list);
}
static void
-kiblnd_complete (struct ib_wc *wc)
+kiblnd_complete(struct ib_wc *wc)
{
switch (kiblnd_wreqid2type(wc->wr_id)) {
default:
unsigned long flags;
int rc;
- LASSERT (*kiblnd_tunables.kib_dev_failover != 0);
+ LASSERT(*kiblnd_tunables.kib_dev_failover != 0);
- cfs_block_allsigs ();
+ cfs_block_allsigs();
init_waitqueue_entry(&wait, current);
write_lock_irqsave(glock, flags);
write_lock_irqsave(glock, flags);
- LASSERT (dev->ibd_failover);
+ LASSERT(dev->ibd_failover);
dev->ibd_failover = 0;
if (rc >= 0) { /* Device is OK or failover succeed */
dev->ibd_next_failover = cfs_time_shift(3);
module_param(service, int, 0444);
MODULE_PARM_DESC(service, "service number (within RDMA_PS_TCP)");
-static int cksum = 0;
+static int cksum;
module_param(cksum, int, 0644);
MODULE_PARM_DESC(cksum, "set non-zero to enable message (not RDMA) checksums");
module_param(peer_credits, int, 0444);
MODULE_PARM_DESC(peer_credits, "# concurrent sends to 1 peer");
-static int peer_credits_hiw = 0;
+static int peer_credits_hiw;
module_param(peer_credits_hiw, int, 0444);
MODULE_PARM_DESC(peer_credits_hiw, "when eagerly to return credits");
-static int peer_buffer_credits = 0;
+static int peer_buffer_credits;
module_param(peer_buffer_credits, int, 0444);
MODULE_PARM_DESC(peer_buffer_credits, "# per-peer router buffer credits");
module_param(keepalive, int, 0644);
MODULE_PARM_DESC(keepalive, "Idle time in seconds before sending a keepalive");
-static int ib_mtu = 0;
+static int ib_mtu;
module_param(ib_mtu, int, 0444);
MODULE_PARM_DESC(ib_mtu, "IB MTU 256/512/1024/2048/4096");
-static int concurrent_sends = 0;
+static int concurrent_sends;
module_param(concurrent_sends, int, 0444);
MODULE_PARM_DESC(concurrent_sends, "send work-queue sizing");
-static int map_on_demand = 0;
+static int map_on_demand;
module_param(map_on_demand, int, 0444);
MODULE_PARM_DESC(map_on_demand, "map on demand");
* 1: enable failover if necessary
* 2: force to failover (for debug)
*/
-static int dev_failover = 0;
+static int dev_failover;
module_param(dev_failover, int, 0444);
MODULE_PARM_DESC(dev_failover, "HCA failover for bonding (0 off, 1 on, other values reserved)");
-static int require_privileged_port = 0;
+static int require_privileged_port;
module_param(require_privileged_port, int, 0644);
MODULE_PARM_DESC(require_privileged_port, "require privileged port when accepting connection");
};
int
-kiblnd_tunables_init (void)
+kiblnd_tunables_init(void)
{
if (kiblnd_translate_mtu(*kiblnd_tunables.kib_ib_mtu) < 0) {
CERROR("Invalid ib_mtu %d, expected 256/512/1024/2048/4096\n",
}
static ksock_route_t *
-ksocknal_create_route (__u32 ipaddr, int port)
+ksocknal_create_route(__u32 ipaddr, int port)
{
ksock_route_t *route;
- LIBCFS_ALLOC (route, sizeof (*route));
+ LIBCFS_ALLOC(route, sizeof(*route));
if (route == NULL)
return NULL;
- atomic_set (&route->ksnr_refcount, 1);
+ atomic_set(&route->ksnr_refcount, 1);
route->ksnr_peer = NULL;
route->ksnr_retry_interval = 0; /* OK to connect at any time */
route->ksnr_ipaddr = ipaddr;
}
void
-ksocknal_destroy_route (ksock_route_t *route)
+ksocknal_destroy_route(ksock_route_t *route)
{
- LASSERT (atomic_read(&route->ksnr_refcount) == 0);
+ LASSERT(atomic_read(&route->ksnr_refcount) == 0);
if (route->ksnr_peer != NULL)
ksocknal_peer_decref(route->ksnr_peer);
- LIBCFS_FREE (route, sizeof (*route));
+ LIBCFS_FREE(route, sizeof(*route));
}
static int
-ksocknal_create_peer (ksock_peer_t **peerp, lnet_ni_t *ni, lnet_process_id_t id)
+ksocknal_create_peer(ksock_peer_t **peerp, lnet_ni_t *ni, lnet_process_id_t id)
{
ksock_net_t *net = ni->ni_data;
ksock_peer_t *peer;
- LASSERT (id.nid != LNET_NID_ANY);
- LASSERT (id.pid != LNET_PID_ANY);
- LASSERT (!in_interrupt());
+ LASSERT(id.nid != LNET_NID_ANY);
+ LASSERT(id.pid != LNET_PID_ANY);
+ LASSERT(!in_interrupt());
- LIBCFS_ALLOC (peer, sizeof (*peer));
+ LIBCFS_ALLOC(peer, sizeof(*peer));
if (peer == NULL)
return -ENOMEM;
peer->ksnp_ni = ni;
peer->ksnp_id = id;
- atomic_set (&peer->ksnp_refcount, 1); /* 1 ref for caller */
+ atomic_set(&peer->ksnp_refcount, 1); /* 1 ref for caller */
peer->ksnp_closing = 0;
peer->ksnp_accepting = 0;
peer->ksnp_proto = NULL;
peer->ksnp_last_alive = 0;
peer->ksnp_zc_next_cookie = SOCKNAL_KEEPALIVE_PING + 1;
- INIT_LIST_HEAD (&peer->ksnp_conns);
- INIT_LIST_HEAD (&peer->ksnp_routes);
- INIT_LIST_HEAD (&peer->ksnp_tx_queue);
- INIT_LIST_HEAD (&peer->ksnp_zc_req_list);
+ INIT_LIST_HEAD(&peer->ksnp_conns);
+ INIT_LIST_HEAD(&peer->ksnp_routes);
+ INIT_LIST_HEAD(&peer->ksnp_tx_queue);
+ INIT_LIST_HEAD(&peer->ksnp_zc_req_list);
spin_lock_init(&peer->ksnp_lock);
spin_lock_bh(&net->ksnn_lock);
}
void
-ksocknal_destroy_peer (ksock_peer_t *peer)
+ksocknal_destroy_peer(ksock_peer_t *peer)
{
ksock_net_t *net = peer->ksnp_ni->ni_data;
- CDEBUG (D_NET, "peer %s %p deleted\n",
+ CDEBUG(D_NET, "peer %s %p deleted\n",
libcfs_id2str(peer->ksnp_id), peer);
- LASSERT (atomic_read (&peer->ksnp_refcount) == 0);
- LASSERT (peer->ksnp_accepting == 0);
- LASSERT (list_empty (&peer->ksnp_conns));
- LASSERT (list_empty (&peer->ksnp_routes));
- LASSERT (list_empty (&peer->ksnp_tx_queue));
- LASSERT (list_empty (&peer->ksnp_zc_req_list));
+ LASSERT(atomic_read(&peer->ksnp_refcount) == 0);
+ LASSERT(peer->ksnp_accepting == 0);
+ LASSERT(list_empty(&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_routes));
+ LASSERT(list_empty(&peer->ksnp_tx_queue));
+ LASSERT(list_empty(&peer->ksnp_zc_req_list));
- LIBCFS_FREE (peer, sizeof (*peer));
+ LIBCFS_FREE(peer, sizeof(*peer));
/* NB a peer's connections and routes keep a reference on their peer
* until they are destroyed, so we can be assured that _all_ state to
}
ksock_peer_t *
-ksocknal_find_peer_locked (lnet_ni_t *ni, lnet_process_id_t id)
+ksocknal_find_peer_locked(lnet_ni_t *ni, lnet_process_id_t id)
{
struct list_head *peer_list = ksocknal_nid2peerlist(id.nid);
struct list_head *tmp;
ksock_peer_t *peer;
- list_for_each (tmp, peer_list) {
+ list_for_each(tmp, peer_list) {
- peer = list_entry (tmp, ksock_peer_t, ksnp_list);
+ peer = list_entry(tmp, ksock_peer_t, ksnp_list);
- LASSERT (!peer->ksnp_closing);
+ LASSERT(!peer->ksnp_closing);
if (peer->ksnp_ni != ni)
continue;
}
ksock_peer_t *
-ksocknal_find_peer (lnet_ni_t *ni, lnet_process_id_t id)
+ksocknal_find_peer(lnet_ni_t *ni, lnet_process_id_t id)
{
ksock_peer_t *peer;
}
static void
-ksocknal_unlink_peer_locked (ksock_peer_t *peer)
+ksocknal_unlink_peer_locked(ksock_peer_t *peer)
{
int i;
__u32 ip;
ksock_interface_t *iface;
for (i = 0; i < peer->ksnp_n_passive_ips; i++) {
- LASSERT (i < LNET_MAX_INTERFACES);
+ LASSERT(i < LNET_MAX_INTERFACES);
ip = peer->ksnp_passive_ips[i];
iface = ksocknal_ip2iface(peer->ksnp_ni, ip);
/* All IPs in peer->ksnp_passive_ips[] come from the
* interface list, therefore the call must succeed. */
- LASSERT (iface != NULL);
+ LASSERT(iface != NULL);
CDEBUG(D_NET, "peer=%p iface=%p ksni_nroutes=%d\n",
peer, iface, iface->ksni_nroutes);
iface->ksni_npeers--;
}
- LASSERT (list_empty(&peer->ksnp_conns));
- LASSERT (list_empty(&peer->ksnp_routes));
- LASSERT (!peer->ksnp_closing);
+ LASSERT(list_empty(&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_routes));
+ LASSERT(!peer->ksnp_closing);
peer->ksnp_closing = 1;
- list_del (&peer->ksnp_list);
+ list_del(&peer->ksnp_list);
/* lose peerlist's ref */
ksocknal_peer_decref(peer);
}
static int
-ksocknal_get_peer_info (lnet_ni_t *ni, int index,
+ksocknal_get_peer_info(lnet_ni_t *ni, int index,
lnet_process_id_t *id, __u32 *myip, __u32 *peer_ip,
int *port, int *conn_count, int *share_count)
{
for (i = 0; i < ksocknal_data.ksnd_peer_hash_size; i++) {
- list_for_each (ptmp, &ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (ptmp, ksock_peer_t, ksnp_list);
+ list_for_each(ptmp, &ksocknal_data.ksnd_peers[i]) {
+ peer = list_entry(ptmp, ksock_peer_t, ksnp_list);
if (peer->ksnp_ni != ni)
continue;
goto out;
}
- list_for_each (rtmp, &peer->ksnp_routes) {
+ list_for_each(rtmp, &peer->ksnp_routes) {
if (index-- > 0)
continue;
}
static void
-ksocknal_add_route_locked (ksock_peer_t *peer, ksock_route_t *route)
+ksocknal_add_route_locked(ksock_peer_t *peer, ksock_route_t *route)
{
struct list_head *tmp;
ksock_conn_t *conn;
ksock_route_t *route2;
- LASSERT (!peer->ksnp_closing);
- LASSERT (route->ksnr_peer == NULL);
- LASSERT (!route->ksnr_scheduled);
- LASSERT (!route->ksnr_connecting);
- LASSERT (route->ksnr_connected == 0);
+ LASSERT(!peer->ksnp_closing);
+ LASSERT(route->ksnr_peer == NULL);
+ LASSERT(!route->ksnr_scheduled);
+ LASSERT(!route->ksnr_connecting);
+ LASSERT(route->ksnr_connected == 0);
/* LASSERT(unique) */
list_for_each(tmp, &peer->ksnp_routes) {
}
static void
-ksocknal_del_route_locked (ksock_route_t *route)
+ksocknal_del_route_locked(ksock_route_t *route)
{
ksock_peer_t *peer = route->ksnr_peer;
ksock_interface_t *iface;
struct list_head *ctmp;
struct list_head *cnxt;
- LASSERT (!route->ksnr_deleted);
+ LASSERT(!route->ksnr_deleted);
/* Close associated conns */
- list_for_each_safe (ctmp, cnxt, &peer->ksnp_conns) {
+ list_for_each_safe(ctmp, cnxt, &peer->ksnp_conns) {
conn = list_entry(ctmp, ksock_conn_t, ksnc_list);
if (conn->ksnc_route != route)
continue;
- ksocknal_close_conn_locked (conn, 0);
+ ksocknal_close_conn_locked(conn, 0);
}
if (route->ksnr_myipaddr != 0) {
}
route->ksnr_deleted = 1;
- list_del (&route->ksnr_list);
+ list_del(&route->ksnr_list);
ksocknal_route_decref(route); /* drop peer's ref */
- if (list_empty (&peer->ksnp_routes) &&
- list_empty (&peer->ksnp_conns)) {
+ if (list_empty(&peer->ksnp_routes) &&
+ list_empty(&peer->ksnp_conns)) {
/* I've just removed the last route to a peer with no active
* connections */
- ksocknal_unlink_peer_locked (peer);
+ ksocknal_unlink_peer_locked(peer);
}
}
int
-ksocknal_add_peer (lnet_ni_t *ni, lnet_process_id_t id, __u32 ipaddr, int port)
+ksocknal_add_peer(lnet_ni_t *ni, lnet_process_id_t id, __u32 ipaddr, int port)
{
struct list_head *tmp;
ksock_peer_t *peer;
if (rc != 0)
return rc;
- route = ksocknal_create_route (ipaddr, port);
+ route = ksocknal_create_route(ipaddr, port);
if (route == NULL) {
ksocknal_peer_decref(peer);
return -ENOMEM;
write_lock_bh(&ksocknal_data.ksnd_global_lock);
/* always called with a ref on ni, so shutdown can't have started */
- LASSERT (((ksock_net_t *) ni->ni_data)->ksnn_shutdown == 0);
+ LASSERT(((ksock_net_t *) ni->ni_data)->ksnn_shutdown == 0);
- peer2 = ksocknal_find_peer_locked (ni, id);
+ peer2 = ksocknal_find_peer_locked(ni, id);
if (peer2 != NULL) {
ksocknal_peer_decref(peer);
peer = peer2;
} else {
/* peer table takes my ref on peer */
- list_add_tail (&peer->ksnp_list,
- ksocknal_nid2peerlist (id.nid));
+ list_add_tail(&peer->ksnp_list,
+ ksocknal_nid2peerlist(id.nid));
}
route2 = NULL;
- list_for_each (tmp, &peer->ksnp_routes) {
+ list_for_each(tmp, &peer->ksnp_routes) {
route2 = list_entry(tmp, ksock_route_t, ksnr_list);
if (route2->ksnr_ipaddr == ipaddr)
}
static void
-ksocknal_del_peer_locked (ksock_peer_t *peer, __u32 ip)
+ksocknal_del_peer_locked(ksock_peer_t *peer, __u32 ip)
{
ksock_conn_t *conn;
ksock_route_t *route;
struct list_head *nxt;
int nshared;
- LASSERT (!peer->ksnp_closing);
+ LASSERT(!peer->ksnp_closing);
/* Extra ref prevents peer disappearing until I'm done with it */
ksocknal_peer_addref(peer);
- list_for_each_safe (tmp, nxt, &peer->ksnp_routes) {
+ list_for_each_safe(tmp, nxt, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
/* no match */
route->ksnr_share_count = 0;
/* This deletes associated conns too */
- ksocknal_del_route_locked (route);
+ ksocknal_del_route_locked(route);
}
nshared = 0;
- list_for_each_safe (tmp, nxt, &peer->ksnp_routes) {
+ list_for_each_safe(tmp, nxt, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
nshared += route->ksnr_share_count;
}
/* remove everything else if there are no explicit entries
* left */
- list_for_each_safe (tmp, nxt, &peer->ksnp_routes) {
+ list_for_each_safe(tmp, nxt, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
/* we should only be removing auto-entries */
LASSERT(route->ksnr_share_count == 0);
- ksocknal_del_route_locked (route);
+ ksocknal_del_route_locked(route);
}
- list_for_each_safe (tmp, nxt, &peer->ksnp_conns) {
+ list_for_each_safe(tmp, nxt, &peer->ksnp_conns) {
conn = list_entry(tmp, ksock_conn_t, ksnc_list);
ksocknal_close_conn_locked(conn, 0);
}
static int
-ksocknal_del_peer (lnet_ni_t *ni, lnet_process_id_t id, __u32 ip)
+ksocknal_del_peer(lnet_ni_t *ni, lnet_process_id_t id, __u32 ip)
{
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
struct list_head *ptmp;
struct list_head *pnxt;
ksock_peer_t *peer;
}
for (i = lo; i <= hi; i++) {
- list_for_each_safe (ptmp, pnxt,
+ list_for_each_safe(ptmp, pnxt,
&ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (ptmp, ksock_peer_t, ksnp_list);
+ peer = list_entry(ptmp, ksock_peer_t, ksnp_list);
if (peer->ksnp_ni != ni)
continue;
ksocknal_peer_addref(peer); /* a ref for me... */
- ksocknal_del_peer_locked (peer, ip);
+ ksocknal_del_peer_locked(peer, ip);
if (peer->ksnp_closing &&
!list_empty(&peer->ksnp_tx_queue)) {
- LASSERT (list_empty(&peer->ksnp_conns));
- LASSERT (list_empty(&peer->ksnp_routes));
+ LASSERT(list_empty(&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_routes));
list_splice_init(&peer->ksnp_tx_queue,
&zombies);
}
static ksock_conn_t *
-ksocknal_get_conn_by_idx (lnet_ni_t *ni, int index)
+ksocknal_get_conn_by_idx(lnet_ni_t *ni, int index)
{
ksock_peer_t *peer;
struct list_head *ptmp;
read_lock(&ksocknal_data.ksnd_global_lock);
for (i = 0; i < ksocknal_data.ksnd_peer_hash_size; i++) {
- list_for_each (ptmp, &ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (ptmp, ksock_peer_t, ksnp_list);
+ list_for_each(ptmp, &ksocknal_data.ksnd_peers[i]) {
+ peer = list_entry(ptmp, ksock_peer_t, ksnp_list);
- LASSERT (!peer->ksnp_closing);
+ LASSERT(!peer->ksnp_closing);
if (peer->ksnp_ni != ni)
continue;
- list_for_each (ctmp, &peer->ksnp_conns) {
+ list_for_each(ctmp, &peer->ksnp_conns) {
if (index-- > 0)
continue;
- conn = list_entry (ctmp, ksock_conn_t,
+ conn = list_entry(ctmp, ksock_conn_t,
ksnc_list);
ksocknal_conn_addref(conn);
read_unlock(&ksocknal_data.ksnd_global_lock);
}
static int
-ksocknal_local_ipvec (lnet_ni_t *ni, __u32 *ipaddrs)
+ksocknal_local_ipvec(lnet_ni_t *ni, __u32 *ipaddrs)
{
ksock_net_t *net = ni->ni_data;
int i;
read_lock(&ksocknal_data.ksnd_global_lock);
nip = net->ksnn_ninterfaces;
- LASSERT (nip <= LNET_MAX_INTERFACES);
+ LASSERT(nip <= LNET_MAX_INTERFACES);
/* Only offer interfaces for additional connections if I have
* more than one. */
for (i = 0; i < nip; i++) {
ipaddrs[i] = net->ksnn_interfaces[i].ksni_ipaddr;
- LASSERT (ipaddrs[i] != 0);
+ LASSERT(ipaddrs[i] != 0);
}
read_unlock(&ksocknal_data.ksnd_global_lock);
}
static int
-ksocknal_match_peerip (ksock_interface_t *iface, __u32 *ips, int nips)
+ksocknal_match_peerip(ksock_interface_t *iface, __u32 *ips, int nips)
{
int best_netmatch = 0;
int best_xor = 0;
if (ips[i] == 0)
continue;
- this_xor = (ips[i] ^ iface->ksni_ipaddr);
+ this_xor = ips[i] ^ iface->ksni_ipaddr;
this_netmatch = ((this_xor & iface->ksni_netmask) == 0) ? 1 : 0;
if (!(best < 0 ||
best_xor = this_xor;
}
- LASSERT (best >= 0);
+ LASSERT(best >= 0);
return best;
}
write_lock_bh(global_lock);
- LASSERT (n_peerips <= LNET_MAX_INTERFACES);
- LASSERT (net->ksnn_ninterfaces <= LNET_MAX_INTERFACES);
+ LASSERT(n_peerips <= LNET_MAX_INTERFACES);
+ LASSERT(net->ksnn_ninterfaces <= LNET_MAX_INTERFACES);
/* Only match interfaces for additional connections
* if I have > 1 interface */
} else {
/* choose a new interface */
- LASSERT (i == peer->ksnp_n_passive_ips);
+ LASSERT(i == peer->ksnp_n_passive_ips);
best_iface = NULL;
best_netmatch = 0;
continue;
k = ksocknal_match_peerip(iface, peerips, n_peerips);
- xor = (ip ^ peerips[k]);
+ xor = ip ^ peerips[k];
this_netmatch = ((xor & iface->ksni_netmask) == 0) ? 1 : 0;
if (!(best_iface == NULL ||
return;
}
- LASSERT (npeer_ipaddrs <= LNET_MAX_INTERFACES);
+ LASSERT(npeer_ipaddrs <= LNET_MAX_INTERFACES);
for (i = 0; i < npeer_ipaddrs; i++) {
if (newroute != NULL) {
best_nroutes = 0;
best_netmatch = 0;
- LASSERT (net->ksnn_ninterfaces <= LNET_MAX_INTERFACES);
+ LASSERT(net->ksnn_ninterfaces <= LNET_MAX_INTERFACES);
/* Select interface to connect from */
for (j = 0; j < net->ksnn_ninterfaces; j++) {
}
int
-ksocknal_accept (lnet_ni_t *ni, struct socket *sock)
+ksocknal_accept(lnet_ni_t *ni, struct socket *sock)
{
ksock_connreq_t *cr;
int rc;
int peer_port;
rc = libcfs_sock_getaddr(sock, 1, &peer_ip, &peer_port);
- LASSERT (rc == 0); /* we succeeded before */
+ LASSERT(rc == 0); /* we succeeded before */
LIBCFS_ALLOC(cr, sizeof(*cr));
if (cr == NULL) {
}
static int
-ksocknal_connecting (ksock_peer_t *peer, __u32 ipaddr)
+ksocknal_connecting(ksock_peer_t *peer, __u32 ipaddr)
{
ksock_route_t *route;
- list_for_each_entry (route, &peer->ksnp_routes, ksnr_list) {
+ list_for_each_entry(route, &peer->ksnp_routes, ksnr_list) {
if (route->ksnr_ipaddr == ipaddr)
return route->ksnr_connecting;
}
int
-ksocknal_create_conn (lnet_ni_t *ni, ksock_route_t *route,
+ksocknal_create_conn(lnet_ni_t *ni, ksock_route_t *route,
struct socket *sock, int type)
{
rwlock_t *global_lock = &ksocknal_data.ksnd_global_lock;
- LIST_HEAD (zombies);
+ LIST_HEAD(zombies);
lnet_process_id_t peerid;
struct list_head *tmp;
__u64 incarnation;
active = (route != NULL);
- LASSERT (active == (type != SOCKLND_CONN_NONE));
+ LASSERT(active == (type != SOCKLND_CONN_NONE));
LIBCFS_ALLOC(conn, sizeof(*conn));
if (conn == NULL) {
conn->ksnc_sock = sock;
/* 2 ref, 1 for conn, another extra ref prevents socket
* being closed before establishment of connection */
- atomic_set (&conn->ksnc_sock_refcount, 2);
+ atomic_set(&conn->ksnc_sock_refcount, 2);
conn->ksnc_type = type;
ksocknal_lib_save_callback(sock, conn);
- atomic_set (&conn->ksnc_conn_refcount, 1); /* 1 ref for me */
+ atomic_set(&conn->ksnc_conn_refcount, 1); /* 1 ref for me */
conn->ksnc_rx_ready = 0;
conn->ksnc_rx_scheduled = 0;
- INIT_LIST_HEAD (&conn->ksnc_tx_queue);
+ INIT_LIST_HEAD(&conn->ksnc_tx_queue);
conn->ksnc_tx_ready = 0;
conn->ksnc_tx_scheduled = 0;
conn->ksnc_tx_carrier = NULL;
- atomic_set (&conn->ksnc_tx_nob, 0);
+ atomic_set(&conn->ksnc_tx_nob, 0);
LIBCFS_ALLOC(hello, offsetof(ksock_hello_msg_t,
kshm_ips[LNET_MAX_INTERFACES]));
}
/* stash conn's local and remote addrs */
- rc = ksocknal_lib_get_conn_addrs (conn);
+ rc = ksocknal_lib_get_conn_addrs(conn);
if (rc != 0)
goto failed_1;
#endif
}
- rc = ksocknal_send_hello (ni, conn, peerid.nid, hello);
+ rc = ksocknal_send_hello(ni, conn, peerid.nid, hello);
if (rc != 0)
goto failed_1;
} else {
conn->ksnc_proto = NULL;
}
- rc = ksocknal_recv_hello (ni, conn, hello, &peerid, &incarnation);
+ rc = ksocknal_recv_hello(ni, conn, hello, &peerid, &incarnation);
if (rc < 0)
goto failed_1;
- LASSERT (rc == 0 || active);
- LASSERT (conn->ksnc_proto != NULL);
- LASSERT (peerid.nid != LNET_NID_ANY);
+ LASSERT(rc == 0 || active);
+ LASSERT(conn->ksnc_proto != NULL);
+ LASSERT(peerid.nid != LNET_NID_ANY);
cpt = lnet_cpt_of_nid(peerid.nid);
write_lock_bh(global_lock);
/* called with a ref on ni, so shutdown can't have started */
- LASSERT (((ksock_net_t *) ni->ni_data)->ksnn_shutdown == 0);
+ LASSERT(((ksock_net_t *) ni->ni_data)->ksnn_shutdown == 0);
peer2 = ksocknal_find_peer_locked(ni, peerid);
if (peer2 == NULL) {
* NB recv_hello may have returned EPROTO to signal my peer
* wants a different protocol than the one I asked for.
*/
- LASSERT (list_empty(&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_conns));
peer->ksnp_proto = conn->ksnc_proto;
peer->ksnp_incarnation = incarnation;
/* Reply on a passive connection attempt so the peer
* realises we're connected. */
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
if (!active)
rc = EALREADY;
* create an association. This allows incoming connections created
* by routes in my peer to match my own route entries so I don't
* continually create duplicate routes. */
- list_for_each (tmp, &peer->ksnp_routes) {
+ list_for_each(tmp, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
if (route->ksnr_ipaddr != conn->ksnc_ipaddr)
conn->ksnc_tx_deadline = cfs_time_shift(*ksocknal_tunables.ksnd_timeout);
mb(); /* order with adding to peer's conn list */
- list_add (&conn->ksnc_list, &peer->ksnp_conns);
+ list_add(&conn->ksnc_list, &peer->ksnp_conns);
ksocknal_conn_addref(conn);
ksocknal_new_packet(conn, 0);
if (conn->ksnc_proto->pro_match_tx(conn, tx, tx->tx_nonblk) == SOCKNAL_MATCH_NO)
continue;
- list_del (&tx->tx_list);
- ksocknal_queue_tx_locked (tx, conn);
+ list_del(&tx->tx_list);
+ ksocknal_queue_tx_locked(tx, conn);
}
write_unlock_bh(global_lock);
failed_2:
if (!peer->ksnp_closing &&
- list_empty (&peer->ksnp_conns) &&
- list_empty (&peer->ksnp_routes)) {
+ list_empty(&peer->ksnp_conns) &&
+ list_empty(&peer->ksnp_routes)) {
list_add(&zombies, &peer->ksnp_tx_queue);
list_del_init(&peer->ksnp_tx_queue);
ksocknal_unlink_peer_locked(peer);
LIBCFS_FREE(hello, offsetof(ksock_hello_msg_t,
kshm_ips[LNET_MAX_INTERFACES]));
- LIBCFS_FREE (conn, sizeof(*conn));
+ LIBCFS_FREE(conn, sizeof(*conn));
failed_0:
libcfs_sock_release(sock);
}
void
-ksocknal_close_conn_locked (ksock_conn_t *conn, int error)
+ksocknal_close_conn_locked(ksock_conn_t *conn, int error)
{
/* This just does the immmediate housekeeping, and queues the
* connection for the reaper to terminate.
ksock_conn_t *conn2;
struct list_head *tmp;
- LASSERT (peer->ksnp_error == 0);
- LASSERT (!conn->ksnc_closing);
+ LASSERT(peer->ksnp_error == 0);
+ LASSERT(!conn->ksnc_closing);
conn->ksnc_closing = 1;
/* ksnd_deathrow_conns takes over peer's ref */
- list_del (&conn->ksnc_list);
+ list_del(&conn->ksnc_list);
route = conn->ksnc_route;
if (route != NULL) {
/* dissociate conn from route... */
- LASSERT (!route->ksnr_deleted);
- LASSERT ((route->ksnr_connected & (1 << conn->ksnc_type)) != 0);
+ LASSERT(!route->ksnr_deleted);
+ LASSERT((route->ksnr_connected & (1 << conn->ksnc_type)) != 0);
conn2 = NULL;
list_for_each(tmp, &peer->ksnp_conns) {
#if 0 /* irrelevant with only eager routes */
/* make route least favourite */
- list_del (&route->ksnr_list);
- list_add_tail (&route->ksnr_list, &peer->ksnp_routes);
+ list_del(&route->ksnr_list);
+ list_add_tail(&route->ksnr_list, &peer->ksnp_routes);
#endif
ksocknal_route_decref(route); /* drop conn's ref on route */
}
- if (list_empty (&peer->ksnp_conns)) {
+ if (list_empty(&peer->ksnp_conns)) {
/* No more connections to this peer */
if (!list_empty(&peer->ksnp_tx_queue)) {
ksock_tx_t *tx;
- LASSERT (conn->ksnc_proto == &ksocknal_protocol_v3x);
+ LASSERT(conn->ksnc_proto == &ksocknal_protocol_v3x);
/* throw them to the last connection...,
* these TXs will be send to /dev/null by scheduler */
peer->ksnp_proto = NULL; /* renegotiate protocol version */
peer->ksnp_error = error; /* stash last conn close reason */
- if (list_empty (&peer->ksnp_routes)) {
+ if (list_empty(&peer->ksnp_routes)) {
/* I've just closed last conn belonging to a
* peer with no routes to it */
- ksocknal_unlink_peer_locked (peer);
+ ksocknal_unlink_peer_locked(peer);
}
}
}
void
-ksocknal_peer_failed (ksock_peer_t *peer)
+ksocknal_peer_failed(ksock_peer_t *peer)
{
int notify = 0;
unsigned long last_alive = 0;
read_unlock(&ksocknal_data.ksnd_global_lock);
if (notify)
- lnet_notify (peer->ksnp_ni, peer->ksnp_id.nid, 0,
+ lnet_notify(peer->ksnp_ni, peer->ksnp_id.nid, 0,
last_alive);
}
ksock_peer_t *peer = conn->ksnc_peer;
ksock_tx_t *tx;
ksock_tx_t *tmp;
- LIST_HEAD (zlist);
+ LIST_HEAD(zlist);
/* NB safe to finalize TXs because closing of socket will
* abort all buffered data */
- LASSERT (conn->ksnc_sock == NULL);
+ LASSERT(conn->ksnc_sock == NULL);
spin_lock(&peer->ksnp_lock);
if (tx->tx_conn != conn)
continue;
- LASSERT (tx->tx_msg.ksm_zc_cookies[0] != 0);
+ LASSERT(tx->tx_msg.ksm_zc_cookies[0] != 0);
tx->tx_msg.ksm_zc_cookies[0] = 0;
tx->tx_zc_aborted = 1; /* mark it as not-acked */
}
void
-ksocknal_terminate_conn (ksock_conn_t *conn)
+ksocknal_terminate_conn(ksock_conn_t *conn)
{
/* This gets called by the reaper (guaranteed thread context) to
* disengage the socket from its callbacks and close it.
if (!conn->ksnc_tx_scheduled &&
!list_empty(&conn->ksnc_tx_queue)) {
- list_add_tail (&conn->ksnc_tx_list,
+ list_add_tail(&conn->ksnc_tx_list,
&sched->kss_tx_conns);
conn->ksnc_tx_scheduled = 1;
/* extra ref for scheduler */
ksocknal_conn_addref(conn);
- wake_up (&sched->kss_waitq);
+ wake_up(&sched->kss_waitq);
}
spin_unlock_bh(&sched->kss_lock);
if (peer->ksnp_error != 0) {
/* peer's last conn closed in error */
- LASSERT (list_empty (&peer->ksnp_conns));
+ LASSERT(list_empty(&peer->ksnp_conns));
failed = 1;
peer->ksnp_error = 0; /* avoid multiple notifications */
}
}
void
-ksocknal_queue_zombie_conn (ksock_conn_t *conn)
+ksocknal_queue_zombie_conn(ksock_conn_t *conn)
{
/* Queue the conn for the reaper to destroy */
}
void
-ksocknal_destroy_conn (ksock_conn_t *conn)
+ksocknal_destroy_conn(ksock_conn_t *conn)
{
unsigned long last_rcv;
/* Final coup-de-grace of the reaper */
- CDEBUG (D_NET, "connection %p\n", conn);
+ CDEBUG(D_NET, "connection %p\n", conn);
- LASSERT (atomic_read (&conn->ksnc_conn_refcount) == 0);
- LASSERT (atomic_read (&conn->ksnc_sock_refcount) == 0);
- LASSERT (conn->ksnc_sock == NULL);
- LASSERT (conn->ksnc_route == NULL);
- LASSERT (!conn->ksnc_tx_scheduled);
- LASSERT (!conn->ksnc_rx_scheduled);
- LASSERT (list_empty(&conn->ksnc_tx_queue));
+ LASSERT(atomic_read(&conn->ksnc_conn_refcount) == 0);
+ LASSERT(atomic_read(&conn->ksnc_sock_refcount) == 0);
+ LASSERT(conn->ksnc_sock == NULL);
+ LASSERT(conn->ksnc_route == NULL);
+ LASSERT(!conn->ksnc_tx_scheduled);
+ LASSERT(!conn->ksnc_rx_scheduled);
+ LASSERT(list_empty(&conn->ksnc_tx_queue));
/* complete current receive if any */
switch (conn->ksnc_rx_state) {
conn->ksnc_rx_nob_wanted, conn->ksnc_rx_nob_left,
cfs_duration_sec(cfs_time_sub(cfs_time_current(),
last_rcv)));
- lnet_finalize (conn->ksnc_peer->ksnp_ni,
+ lnet_finalize(conn->ksnc_peer->ksnp_ni,
conn->ksnc_cookie, -EIO);
break;
case SOCKNAL_RX_LNET_HEADER:
&conn->ksnc_ipaddr, conn->ksnc_port);
break;
default:
- LBUG ();
+ LBUG();
break;
}
ksocknal_peer_decref(conn->ksnc_peer);
- LIBCFS_FREE (conn, sizeof (*conn));
+ LIBCFS_FREE(conn, sizeof(*conn));
}
int
-ksocknal_close_peer_conns_locked (ksock_peer_t *peer, __u32 ipaddr, int why)
+ksocknal_close_peer_conns_locked(ksock_peer_t *peer, __u32 ipaddr, int why)
{
ksock_conn_t *conn;
struct list_head *ctmp;
struct list_head *cnxt;
int count = 0;
- list_for_each_safe (ctmp, cnxt, &peer->ksnp_conns) {
- conn = list_entry (ctmp, ksock_conn_t, ksnc_list);
+ list_for_each_safe(ctmp, cnxt, &peer->ksnp_conns) {
+ conn = list_entry(ctmp, ksock_conn_t, ksnc_list);
if (ipaddr == 0 ||
conn->ksnc_ipaddr == ipaddr) {
count++;
- ksocknal_close_conn_locked (conn, why);
+ ksocknal_close_conn_locked(conn, why);
}
}
}
int
-ksocknal_close_conn_and_siblings (ksock_conn_t *conn, int why)
+ksocknal_close_conn_and_siblings(ksock_conn_t *conn, int why)
{
ksock_peer_t *peer = conn->ksnc_peer;
__u32 ipaddr = conn->ksnc_ipaddr;
write_lock_bh(&ksocknal_data.ksnd_global_lock);
- count = ksocknal_close_peer_conns_locked (peer, ipaddr, why);
+ count = ksocknal_close_peer_conns_locked(peer, ipaddr, why);
write_unlock_bh(&ksocknal_data.ksnd_global_lock);
}
int
-ksocknal_close_matching_conns (lnet_process_id_t id, __u32 ipaddr)
+ksocknal_close_matching_conns(lnet_process_id_t id, __u32 ipaddr)
{
ksock_peer_t *peer;
struct list_head *ptmp;
}
for (i = lo; i <= hi; i++) {
- list_for_each_safe (ptmp, pnxt,
+ list_for_each_safe(ptmp, pnxt,
&ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (ptmp, ksock_peer_t, ksnp_list);
+ peer = list_entry(ptmp, ksock_peer_t, ksnp_list);
if (!((id.nid == LNET_NID_ANY || id.nid == peer->ksnp_id.nid) &&
(id.pid == LNET_PID_ANY || id.pid == peer->ksnp_id.pid)))
continue;
- count += ksocknal_close_peer_conns_locked (peer, ipaddr, 0);
+ count += ksocknal_close_peer_conns_locked(peer, ipaddr, 0);
}
}
}
void
-ksocknal_notify (lnet_ni_t *ni, lnet_nid_t gw_nid, int alive)
+ksocknal_notify(lnet_ni_t *ni, lnet_nid_t gw_nid, int alive)
{
/* The router is telling me she's been notified of a change in
* gateway state.... */
id.nid = gw_nid;
id.pid = LNET_PID_ANY;
- CDEBUG (D_NET, "gw %s %s\n", libcfs_nid2str(gw_nid),
+ CDEBUG(D_NET, "gw %s %s\n", libcfs_nid2str(gw_nid),
alive ? "up" : "down");
if (!alive) {
/* If the gateway crashed, close all open connections... */
- ksocknal_close_matching_conns (id, 0);
+ ksocknal_close_matching_conns(id, 0);
return;
}
}
void
-ksocknal_query (lnet_ni_t *ni, lnet_nid_t nid, unsigned long *when)
+ksocknal_query(lnet_ni_t *ni, lnet_nid_t nid, unsigned long *when)
{
int connect = 1;
unsigned long last_alive = 0;
ksock_conn_t *conn;
int bufnob;
- list_for_each (tmp, &peer->ksnp_conns) {
+ list_for_each(tmp, &peer->ksnp_conns) {
conn = list_entry(tmp, ksock_conn_t, ksnc_list);
bufnob = conn->ksnc_sock->sk->sk_wmem_queued;
}
static void
-ksocknal_push_peer (ksock_peer_t *peer)
+ksocknal_push_peer(ksock_peer_t *peer)
{
int index;
int i;
i = 0;
conn = NULL;
- list_for_each (tmp, &peer->ksnp_conns) {
+ list_for_each(tmp, &peer->ksnp_conns) {
if (i++ == index) {
- conn = list_entry (tmp, ksock_conn_t,
+ conn = list_entry(tmp, ksock_conn_t,
ksnc_list);
ksocknal_conn_addref(conn);
break;
if (conn == NULL)
break;
- ksocknal_lib_push_conn (conn);
+ ksocknal_lib_push_conn(conn);
ksocknal_conn_decref(conn);
}
}
static int
-ksocknal_push (lnet_ni_t *ni, lnet_process_id_t id)
+ksocknal_push(lnet_ni_t *ni, lnet_process_id_t id)
{
ksock_peer_t *peer;
struct list_head *tmp;
index = 0;
peer = NULL;
- list_for_each (tmp, &ksocknal_data.ksnd_peers[i]) {
+ list_for_each(tmp, &ksocknal_data.ksnd_peers[i]) {
peer = list_entry(tmp, ksock_peer_t,
ksnp_list);
if (peer != NULL) {
rc = 0;
- ksocknal_push_peer (peer);
+ ksocknal_push_peer(peer);
ksocknal_peer_decref(peer);
}
}
}
list_for_each_safe(tmp, nxt, &peer->ksnp_routes) {
- route = list_entry (tmp, ksock_route_t, ksnr_list);
+ route = list_entry(tmp, ksock_route_t, ksnr_list);
if (route->ksnr_myipaddr != ipaddr)
continue;
conn = list_entry(tmp, ksock_conn_t, ksnc_list);
if (conn->ksnc_myipaddr == ipaddr)
- ksocknal_close_conn_locked (conn, 0);
+ ksocknal_close_conn_locked(conn, 0);
}
}
case IOC_LIBCFS_ADD_PEER:
id.nid = data->ioc_nid;
id.pid = LUSTRE_SRV_LNET_PID;
- return ksocknal_add_peer (ni, id,
+ return ksocknal_add_peer(ni, id,
data->ioc_u32[0], /* IP */
data->ioc_u32[1]); /* port */
case IOC_LIBCFS_DEL_PEER:
id.nid = data->ioc_nid;
id.pid = LNET_PID_ANY;
- return ksocknal_del_peer (ni, id,
+ return ksocknal_del_peer(ni, id,
data->ioc_u32[0]); /* IP */
case IOC_LIBCFS_GET_CONN: {
int txmem;
int rxmem;
int nagle;
- ksock_conn_t *conn = ksocknal_get_conn_by_idx (ni, data->ioc_count);
+ ksock_conn_t *conn = ksocknal_get_conn_by_idx(ni, data->ioc_count);
if (conn == NULL)
return -ENOENT;
case IOC_LIBCFS_CLOSE_CONNECTION:
id.nid = data->ioc_nid;
id.pid = LNET_PID_ANY;
- return ksocknal_close_matching_conns (id,
+ return ksocknal_close_matching_conns(id,
data->ioc_u32[0]);
case IOC_LIBCFS_REGISTER_MYNID:
}
static void
-ksocknal_free_buffers (void)
+ksocknal_free_buffers(void)
{
- LASSERT (atomic_read(&ksocknal_data.ksnd_nactive_txs) == 0);
+ LASSERT(atomic_read(&ksocknal_data.ksnd_nactive_txs) == 0);
if (ksocknal_data.ksnd_sched_info != NULL) {
struct ksock_sched_info *info;
cfs_percpt_free(ksocknal_data.ksnd_sched_info);
}
- LIBCFS_FREE (ksocknal_data.ksnd_peers,
- sizeof (struct list_head) *
+ LIBCFS_FREE(ksocknal_data.ksnd_peers,
+ sizeof(struct list_head) *
ksocknal_data.ksnd_peer_hash_size);
spin_lock(&ksocknal_data.ksnd_tx_lock);
int j;
CDEBUG(D_MALLOC, "before NAL cleanup: kmem %d\n",
- atomic_read (&libcfs_kmemory));
- LASSERT (ksocknal_data.ksnd_nnets == 0);
+ atomic_read(&libcfs_kmemory));
+ LASSERT(ksocknal_data.ksnd_nnets == 0);
switch (ksocknal_data.ksnd_init) {
default:
- LASSERT (0);
+ LASSERT(0);
case SOCKNAL_INIT_ALL:
case SOCKNAL_INIT_DATA:
- LASSERT (ksocknal_data.ksnd_peers != NULL);
+ LASSERT(ksocknal_data.ksnd_peers != NULL);
for (i = 0; i < ksocknal_data.ksnd_peer_hash_size; i++) {
- LASSERT (list_empty (&ksocknal_data.ksnd_peers[i]));
+ LASSERT(list_empty(&ksocknal_data.ksnd_peers[i]));
}
LASSERT(list_empty(&ksocknal_data.ksnd_nets));
- LASSERT (list_empty (&ksocknal_data.ksnd_enomem_conns));
- LASSERT (list_empty (&ksocknal_data.ksnd_zombie_conns));
- LASSERT (list_empty (&ksocknal_data.ksnd_connd_connreqs));
- LASSERT (list_empty (&ksocknal_data.ksnd_connd_routes));
+ LASSERT(list_empty(&ksocknal_data.ksnd_enomem_conns));
+ LASSERT(list_empty(&ksocknal_data.ksnd_zombie_conns));
+ LASSERT(list_empty(&ksocknal_data.ksnd_connd_connreqs));
+ LASSERT(list_empty(&ksocknal_data.ksnd_connd_routes));
if (ksocknal_data.ksnd_sched_info != NULL) {
cfs_percpt_for_each(info, i,
}
CDEBUG(D_MALLOC, "after NAL cleanup: kmem %d\n",
- atomic_read (&libcfs_kmemory));
+ atomic_read(&libcfs_kmemory));
module_put(THIS_MODULE);
}
static __u64
-ksocknal_new_incarnation (void)
+ksocknal_new_incarnation(void)
{
/* The incarnation number is the time this module loaded and it
int rc;
int i;
- LASSERT (ksocknal_data.ksnd_init == SOCKNAL_INIT_NOTHING);
- LASSERT (ksocknal_data.ksnd_nnets == 0);
+ LASSERT(ksocknal_data.ksnd_init == SOCKNAL_INIT_NOTHING);
+ LASSERT(ksocknal_data.ksnd_nnets == 0);
- memset (&ksocknal_data, 0, sizeof (ksocknal_data)); /* zero pointers */
+ memset(&ksocknal_data, 0, sizeof(ksocknal_data)); /* zero pointers */
ksocknal_data.ksnd_peer_hash_size = SOCKNAL_PEER_HASH_SIZE;
- LIBCFS_ALLOC (ksocknal_data.ksnd_peers,
- sizeof (struct list_head) *
+ LIBCFS_ALLOC(ksocknal_data.ksnd_peers,
+ sizeof(struct list_head) *
ksocknal_data.ksnd_peer_hash_size);
if (ksocknal_data.ksnd_peers == NULL)
return -ENOMEM;
INIT_LIST_HEAD(&ksocknal_data.ksnd_nets);
spin_lock_init(&ksocknal_data.ksnd_reaper_lock);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_enomem_conns);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_zombie_conns);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_deathrow_conns);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_enomem_conns);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_zombie_conns);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_deathrow_conns);
init_waitqueue_head(&ksocknal_data.ksnd_reaper_waitq);
spin_lock_init(&ksocknal_data.ksnd_connd_lock);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_connd_connreqs);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_connd_routes);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_connd_connreqs);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_connd_routes);
init_waitqueue_head(&ksocknal_data.ksnd_connd_waitq);
spin_lock_init(&ksocknal_data.ksnd_tx_lock);
- INIT_LIST_HEAD (&ksocknal_data.ksnd_idle_noop_txs);
+ INIT_LIST_HEAD(&ksocknal_data.ksnd_idle_noop_txs);
/* NB memset above zeros whole of ksocknal_data */
rc = ksocknal_thread_start(ksocknal_reaper, NULL, "socknal_reaper");
if (rc != 0) {
- CERROR ("Can't spawn socknal reaper: %d\n", rc);
+ CERROR("Can't spawn socknal reaper: %d\n", rc);
goto failed;
}
}
static void
-ksocknal_debug_peerhash (lnet_ni_t *ni)
+ksocknal_debug_peerhash(lnet_ni_t *ni)
{
ksock_peer_t *peer = NULL;
struct list_head *tmp;
read_lock(&ksocknal_data.ksnd_global_lock);
for (i = 0; i < ksocknal_data.ksnd_peer_hash_size; i++) {
- list_for_each (tmp, &ksocknal_data.ksnd_peers[i]) {
- peer = list_entry (tmp, ksock_peer_t, ksnp_list);
+ list_for_each(tmp, &ksocknal_data.ksnd_peers[i]) {
+ peer = list_entry(tmp, ksock_peer_t, ksnp_list);
if (peer->ksnp_ni == ni)
break;
!list_empty(&peer->ksnp_tx_queue),
!list_empty(&peer->ksnp_zc_req_list));
- list_for_each (tmp, &peer->ksnp_routes) {
+ list_for_each(tmp, &peer->ksnp_routes) {
route = list_entry(tmp, ksock_route_t, ksnr_list);
CWARN("Route: ref %d, schd %d, conn %d, cnted %d, del %d\n",
atomic_read(&route->ksnr_refcount),
route->ksnr_connected, route->ksnr_deleted);
}
- list_for_each (tmp, &peer->ksnp_conns) {
+ list_for_each(tmp, &peer->ksnp_conns) {
conn = list_entry(tmp, ksock_conn_t, ksnc_list);
- CWARN ("Conn: ref %d, sref %d, t %d, c %d\n",
+ CWARN("Conn: ref %d, sref %d, t %d, c %d\n",
atomic_read(&conn->ksnc_conn_refcount),
atomic_read(&conn->ksnc_sock_refcount),
conn->ksnc_type, conn->ksnc_closing);
}
void
-ksocknal_shutdown (lnet_ni_t *ni)
+ksocknal_shutdown(lnet_ni_t *ni)
{
ksock_net_t *net = ni->ni_data;
int i;
spin_unlock_bh(&net->ksnn_lock);
for (i = 0; i < net->ksnn_ninterfaces; i++) {
- LASSERT (net->ksnn_interfaces[i].ksni_npeers == 0);
- LASSERT (net->ksnn_interfaces[i].ksni_nroutes == 0);
+ LASSERT(net->ksnn_interfaces[i].ksni_npeers == 0);
+ LASSERT(net->ksnn_interfaces[i].ksni_nroutes == 0);
}
list_del(&net->ksnn_list);
}
int
-ksocknal_startup (lnet_ni_t *ni)
+ksocknal_startup(lnet_ni_t *ni)
{
ksock_net_t *net;
int rc;
int i;
- LASSERT (ni->ni_lnd == &the_ksocklnd);
+ LASSERT(ni->ni_lnd == &the_ksocklnd);
if (ksocknal_data.ksnd_init == SOCKNAL_INIT_NOTHING) {
rc = ksocknal_base_startup();
static void __exit
-ksocknal_module_fini (void)
+ksocknal_module_fini(void)
{
lnet_unregister_lnd(&the_ksocklnd);
}
static int __init
-ksocknal_module_init (void)
+ksocknal_module_init(void)
{
int rc;
/* check ksnr_connected/connecting field large enough */
- CLASSERT (SOCKLND_CONN_NTYPES <= 4);
- CLASSERT (SOCKLND_CONN_ACK == SOCKLND_CONN_BULK_IN);
+ CLASSERT(SOCKLND_CONN_NTYPES <= 4);
+ CLASSERT(SOCKLND_CONN_ACK == SOCKLND_CONN_BULK_IN);
/* initialize the_ksocklnd */
the_ksocklnd.lnd_type = SOCKLND;
}
static inline struct list_head *
-ksocknal_nid2peerlist (lnet_nid_t nid)
+ksocknal_nid2peerlist(lnet_nid_t nid)
{
unsigned int hash = ((unsigned int)nid) % ksocknal_data.ksnd_peer_hash_size;
}
static inline void
-ksocknal_conn_addref (ksock_conn_t *conn)
+ksocknal_conn_addref(ksock_conn_t *conn)
{
- LASSERT (atomic_read(&conn->ksnc_conn_refcount) > 0);
+ LASSERT(atomic_read(&conn->ksnc_conn_refcount) > 0);
atomic_inc(&conn->ksnc_conn_refcount);
}
-extern void ksocknal_queue_zombie_conn (ksock_conn_t *conn);
+extern void ksocknal_queue_zombie_conn(ksock_conn_t *conn);
extern void ksocknal_finalize_zcreq(ksock_conn_t *conn);
static inline void
-ksocknal_conn_decref (ksock_conn_t *conn)
+ksocknal_conn_decref(ksock_conn_t *conn)
{
- LASSERT (atomic_read(&conn->ksnc_conn_refcount) > 0);
+ LASSERT(atomic_read(&conn->ksnc_conn_refcount) > 0);
if (atomic_dec_and_test(&conn->ksnc_conn_refcount))
ksocknal_queue_zombie_conn(conn);
}
static inline int
-ksocknal_connsock_addref (ksock_conn_t *conn)
+ksocknal_connsock_addref(ksock_conn_t *conn)
{
int rc = -ESHUTDOWN;
}
static inline void
-ksocknal_connsock_decref (ksock_conn_t *conn)
+ksocknal_connsock_decref(ksock_conn_t *conn)
{
- LASSERT (atomic_read(&conn->ksnc_sock_refcount) > 0);
+ LASSERT(atomic_read(&conn->ksnc_sock_refcount) > 0);
if (atomic_dec_and_test(&conn->ksnc_sock_refcount)) {
- LASSERT (conn->ksnc_closing);
+ LASSERT(conn->ksnc_closing);
libcfs_sock_release(conn->ksnc_sock);
conn->ksnc_sock = NULL;
ksocknal_finalize_zcreq(conn);
}
static inline void
-ksocknal_tx_addref (ksock_tx_t *tx)
+ksocknal_tx_addref(ksock_tx_t *tx)
{
- LASSERT (atomic_read(&tx->tx_refcount) > 0);
+ LASSERT(atomic_read(&tx->tx_refcount) > 0);
atomic_inc(&tx->tx_refcount);
}
-extern void ksocknal_tx_prep (ksock_conn_t *, ksock_tx_t *tx);
-extern void ksocknal_tx_done (lnet_ni_t *ni, ksock_tx_t *tx);
+extern void ksocknal_tx_prep(ksock_conn_t *, ksock_tx_t *tx);
+extern void ksocknal_tx_done(lnet_ni_t *ni, ksock_tx_t *tx);
static inline void
-ksocknal_tx_decref (ksock_tx_t *tx)
+ksocknal_tx_decref(ksock_tx_t *tx)
{
- LASSERT (atomic_read(&tx->tx_refcount) > 0);
+ LASSERT(atomic_read(&tx->tx_refcount) > 0);
if (atomic_dec_and_test(&tx->tx_refcount))
ksocknal_tx_done(NULL, tx);
}
static inline void
-ksocknal_route_addref (ksock_route_t *route)
+ksocknal_route_addref(ksock_route_t *route)
{
- LASSERT (atomic_read(&route->ksnr_refcount) > 0);
+ LASSERT(atomic_read(&route->ksnr_refcount) > 0);
atomic_inc(&route->ksnr_refcount);
}
-extern void ksocknal_destroy_route (ksock_route_t *route);
+extern void ksocknal_destroy_route(ksock_route_t *route);
static inline void
-ksocknal_route_decref (ksock_route_t *route)
+ksocknal_route_decref(ksock_route_t *route)
{
- LASSERT (atomic_read (&route->ksnr_refcount) > 0);
+ LASSERT(atomic_read(&route->ksnr_refcount) > 0);
if (atomic_dec_and_test(&route->ksnr_refcount))
- ksocknal_destroy_route (route);
+ ksocknal_destroy_route(route);
}
static inline void
-ksocknal_peer_addref (ksock_peer_t *peer)
+ksocknal_peer_addref(ksock_peer_t *peer)
{
- LASSERT (atomic_read (&peer->ksnp_refcount) > 0);
+ LASSERT(atomic_read(&peer->ksnp_refcount) > 0);
atomic_inc(&peer->ksnp_refcount);
}
-extern void ksocknal_destroy_peer (ksock_peer_t *peer);
+extern void ksocknal_destroy_peer(ksock_peer_t *peer);
static inline void
-ksocknal_peer_decref (ksock_peer_t *peer)
+ksocknal_peer_decref(ksock_peer_t *peer)
{
- LASSERT (atomic_read (&peer->ksnp_refcount) > 0);
+ LASSERT(atomic_read(&peer->ksnp_refcount) > 0);
if (atomic_dec_and_test(&peer->ksnp_refcount))
- ksocknal_destroy_peer (peer);
+ ksocknal_destroy_peer(peer);
}
-int ksocknal_startup (lnet_ni_t *ni);
-void ksocknal_shutdown (lnet_ni_t *ni);
+int ksocknal_startup(lnet_ni_t *ni);
+void ksocknal_shutdown(lnet_ni_t *ni);
int ksocknal_ctl(lnet_ni_t *ni, unsigned int cmd, void *arg);
-int ksocknal_send (lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg);
+int ksocknal_send(lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg);
int ksocknal_recv(lnet_ni_t *ni, void *private, lnet_msg_t *lntmsg,
int delayed, unsigned int niov,
struct kvec *iov, lnet_kiov_t *kiov,
int ksocknal_accept(lnet_ni_t *ni, struct socket *sock);
extern int ksocknal_add_peer(lnet_ni_t *ni, lnet_process_id_t id, __u32 ip, int port);
-extern ksock_peer_t *ksocknal_find_peer_locked (lnet_ni_t *ni, lnet_process_id_t id);
-extern ksock_peer_t *ksocknal_find_peer (lnet_ni_t *ni, lnet_process_id_t id);
-extern void ksocknal_peer_failed (ksock_peer_t *peer);
-extern int ksocknal_create_conn (lnet_ni_t *ni, ksock_route_t *route,
+extern ksock_peer_t *ksocknal_find_peer_locked(lnet_ni_t *ni, lnet_process_id_t id);
+extern ksock_peer_t *ksocknal_find_peer(lnet_ni_t *ni, lnet_process_id_t id);
+extern void ksocknal_peer_failed(ksock_peer_t *peer);
+extern int ksocknal_create_conn(lnet_ni_t *ni, ksock_route_t *route,
struct socket *sock, int type);
-extern void ksocknal_close_conn_locked (ksock_conn_t *conn, int why);
-extern void ksocknal_terminate_conn (ksock_conn_t *conn);
-extern void ksocknal_destroy_conn (ksock_conn_t *conn);
-extern int ksocknal_close_peer_conns_locked (ksock_peer_t *peer,
+extern void ksocknal_close_conn_locked(ksock_conn_t *conn, int why);
+extern void ksocknal_terminate_conn(ksock_conn_t *conn);
+extern void ksocknal_destroy_conn(ksock_conn_t *conn);
+extern int ksocknal_close_peer_conns_locked(ksock_peer_t *peer,
__u32 ipaddr, int why);
-extern int ksocknal_close_conn_and_siblings (ksock_conn_t *conn, int why);
-extern int ksocknal_close_matching_conns (lnet_process_id_t id, __u32 ipaddr);
+extern int ksocknal_close_conn_and_siblings(ksock_conn_t *conn, int why);
+extern int ksocknal_close_matching_conns(lnet_process_id_t id, __u32 ipaddr);
extern ksock_conn_t *ksocknal_find_conn_locked(ksock_peer_t *peer,
ksock_tx_t *tx, int nonblk);
extern int ksocknal_launch_packet(lnet_ni_t *ni, ksock_tx_t *tx,
lnet_process_id_t id);
extern ksock_tx_t *ksocknal_alloc_tx(int type, int size);
-extern void ksocknal_free_tx (ksock_tx_t *tx);
+extern void ksocknal_free_tx(ksock_tx_t *tx);
extern ksock_tx_t *ksocknal_alloc_tx_noop(__u64 cookie, int nonblk);
extern void ksocknal_next_tx_carrier(ksock_conn_t *conn);
-extern void ksocknal_queue_tx_locked (ksock_tx_t *tx, ksock_conn_t *conn);
-extern void ksocknal_txlist_done (lnet_ni_t *ni, struct list_head *txlist,
+extern void ksocknal_queue_tx_locked(ksock_tx_t *tx, ksock_conn_t *conn);
+extern void ksocknal_txlist_done(lnet_ni_t *ni, struct list_head *txlist,
int error);
-extern void ksocknal_notify (lnet_ni_t *ni, lnet_nid_t gw_nid, int alive);
-extern void ksocknal_query (struct lnet_ni *ni, lnet_nid_t nid, unsigned long *when);
+extern void ksocknal_notify(lnet_ni_t *ni, lnet_nid_t gw_nid, int alive);
+extern void ksocknal_query(struct lnet_ni *ni, lnet_nid_t nid, unsigned long *when);
extern int ksocknal_thread_start(int (*fn)(void *arg), void *arg, char *name);
-extern void ksocknal_thread_fini (void);
-extern void ksocknal_launch_all_connections_locked (ksock_peer_t *peer);
-extern ksock_route_t *ksocknal_find_connectable_route_locked (ksock_peer_t *peer);
-extern ksock_route_t *ksocknal_find_connecting_route_locked (ksock_peer_t *peer);
-extern int ksocknal_new_packet (ksock_conn_t *conn, int skip);
-extern int ksocknal_scheduler (void *arg);
-extern int ksocknal_connd (void *arg);
-extern int ksocknal_reaper (void *arg);
-extern int ksocknal_send_hello (lnet_ni_t *ni, ksock_conn_t *conn,
+extern void ksocknal_thread_fini(void);
+extern void ksocknal_launch_all_connections_locked(ksock_peer_t *peer);
+extern ksock_route_t *ksocknal_find_connectable_route_locked(ksock_peer_t *peer);
+extern ksock_route_t *ksocknal_find_connecting_route_locked(ksock_peer_t *peer);
+extern int ksocknal_new_packet(ksock_conn_t *conn, int skip);
+extern int ksocknal_scheduler(void *arg);
+extern int ksocknal_connd(void *arg);
+extern int ksocknal_reaper(void *arg);
+extern int ksocknal_send_hello(lnet_ni_t *ni, ksock_conn_t *conn,
lnet_nid_t peer_nid, ksock_hello_msg_t *hello);
-extern int ksocknal_recv_hello (lnet_ni_t *ni, ksock_conn_t *conn,
+extern int ksocknal_recv_hello(lnet_ni_t *ni, ksock_conn_t *conn,
ksock_hello_msg_t *hello, lnet_process_id_t *id,
__u64 *incarnation);
extern void ksocknal_read_callback(ksock_conn_t *conn);
extern void ksocknal_lib_save_callback(struct socket *sock, ksock_conn_t *conn);
extern void ksocknal_lib_set_callback(struct socket *sock, ksock_conn_t *conn);
extern void ksocknal_lib_reset_callback(struct socket *sock, ksock_conn_t *conn);
-extern void ksocknal_lib_push_conn (ksock_conn_t *conn);
-extern int ksocknal_lib_get_conn_addrs (ksock_conn_t *conn);
-extern int ksocknal_lib_setup_sock (struct socket *so);
-extern int ksocknal_lib_send_iov (ksock_conn_t *conn, ksock_tx_t *tx);
-extern int ksocknal_lib_send_kiov (ksock_conn_t *conn, ksock_tx_t *tx);
-extern void ksocknal_lib_eager_ack (ksock_conn_t *conn);
-extern int ksocknal_lib_recv_iov (ksock_conn_t *conn);
-extern int ksocknal_lib_recv_kiov (ksock_conn_t *conn);
-extern int ksocknal_lib_get_conn_tunables (ksock_conn_t *conn, int *txmem,
+extern void ksocknal_lib_push_conn(ksock_conn_t *conn);
+extern int ksocknal_lib_get_conn_addrs(ksock_conn_t *conn);
+extern int ksocknal_lib_setup_sock(struct socket *so);
+extern int ksocknal_lib_send_iov(ksock_conn_t *conn, ksock_tx_t *tx);
+extern int ksocknal_lib_send_kiov(ksock_conn_t *conn, ksock_tx_t *tx);
+extern void ksocknal_lib_eager_ack(ksock_conn_t *conn);
+extern int ksocknal_lib_recv_iov(ksock_conn_t *conn);
+extern int ksocknal_lib_recv_kiov(ksock_conn_t *conn);
+extern int ksocknal_lib_get_conn_tunables(ksock_conn_t *conn, int *txmem,
int *rxmem, int *nagle);
extern int ksocknal_tunables_init(void);
spin_lock_bh(&sched->kss_lock);
- rc = (!ksocknal_data.ksnd_shuttingdown &&
+ rc = !ksocknal_data.ksnd_shuttingdown &&
list_empty(&sched->kss_rx_conns) &&
- list_empty(&sched->kss_tx_conns));
+ list_empty(&sched->kss_tx_conns);
spin_unlock_bh(&sched->kss_lock);
return rc;
#include "socklnd.h"
int
-ksocknal_lib_get_conn_addrs (ksock_conn_t *conn)
+ksocknal_lib_get_conn_addrs(ksock_conn_t *conn)
{
int rc = libcfs_sock_getaddr(conn->ksnc_sock, 1,
&conn->ksnc_ipaddr,
&conn->ksnc_port);
/* Didn't need the {get,put}connsock dance to deref ksnc_sock... */
- LASSERT (!conn->ksnc_closing);
+ LASSERT(!conn->ksnc_closing);
if (rc != 0) {
- CERROR ("Error %d getting sock peer IP\n", rc);
+ CERROR("Error %d getting sock peer IP\n", rc);
return rc;
}
rc = libcfs_sock_getaddr(conn->ksnc_sock, 0,
&conn->ksnc_myipaddr, NULL);
if (rc != 0) {
- CERROR ("Error %d getting sock local IP\n", rc);
+ CERROR("Error %d getting sock local IP\n", rc);
return rc;
}
}
int
-ksocknal_lib_send_iov (ksock_conn_t *conn, ksock_tx_t *tx)
+ksocknal_lib_send_iov(ksock_conn_t *conn, ksock_tx_t *tx)
{
struct socket *sock = conn->ksnc_sock;
int nob;
}
int
-ksocknal_lib_send_kiov (ksock_conn_t *conn, ksock_tx_t *tx)
+ksocknal_lib_send_kiov(ksock_conn_t *conn, ksock_tx_t *tx)
{
struct socket *sock = conn->ksnc_sock;
lnet_kiov_t *kiov = tx->tx_kiov;
int nob;
/* Not NOOP message */
- LASSERT (tx->tx_lnetmsg != NULL);
+ LASSERT(tx->tx_lnetmsg != NULL);
/* NB we can't trust socket ops to either consume our iovs
* or leave them alone. */
}
void
-ksocknal_lib_eager_ack (ksock_conn_t *conn)
+ksocknal_lib_eager_ack(ksock_conn_t *conn)
{
int opt = 1;
struct socket *sock = conn->ksnc_sock;
* peer. */
kernel_setsockopt(sock, SOL_TCP, TCP_QUICKACK,
- (char *)&opt, sizeof (opt));
+ (char *)&opt, sizeof(opt));
}
int
-ksocknal_lib_recv_iov (ksock_conn_t *conn)
+ksocknal_lib_recv_iov(ksock_conn_t *conn)
{
#if SOCKNAL_SINGLE_FRAG_RX
struct kvec scratch;
/* NB we can't trust socket ops to either consume our iovs
* or leave them alone. */
- LASSERT (niov > 0);
+ LASSERT(niov > 0);
for (nob = i = 0; i < niov; i++) {
scratchiov[i] = iov[i];
nob += scratchiov[i].iov_len;
}
- LASSERT (nob <= conn->ksnc_rx_nob_wanted);
+ LASSERT(nob <= conn->ksnc_rx_nob_wanted);
rc = kernel_recvmsg(conn->ksnc_sock, &msg,
scratchiov, niov, nob, MSG_DONTWAIT);
if (saved_csum != 0) {
/* accumulate checksum */
for (i = 0, sum = rc; sum > 0; i++, sum -= fragnob) {
- LASSERT (i < niov);
+ LASSERT(i < niov);
fragnob = iov[i].iov_len;
if (fragnob > sum)
if (!*ksocknal_tunables.ksnd_zc_recv || pages == NULL)
return NULL;
- LASSERT (niov <= LNET_MAX_IOV);
+ LASSERT(niov <= LNET_MAX_IOV);
if (niov < 2 ||
niov < *ksocknal_tunables.ksnd_zc_recv_min_nfrags)
}
int
-ksocknal_lib_recv_kiov (ksock_conn_t *conn)
+ksocknal_lib_recv_kiov(ksock_conn_t *conn)
{
#if SOCKNAL_SINGLE_FRAG_RX || !SOCKNAL_RISK_KMAP_DEADLOCK
struct kvec scratch;
n = niov;
}
- LASSERT (nob <= conn->ksnc_rx_nob_wanted);
+ LASSERT(nob <= conn->ksnc_rx_nob_wanted);
rc = kernel_recvmsg(conn->ksnc_sock, &msg,
(struct kvec *)scratchiov, n, nob, MSG_DONTWAIT);
if (conn->ksnc_msg.ksm_csum != 0) {
for (i = 0, sum = rc; sum > 0; i++, sum -= fragnob) {
- LASSERT (i < niov);
+ LASSERT(i < niov);
/* Dang! have to kmap again because I have nowhere to stash the
* mapped address. But by doing it while the page is still
}
int
-ksocknal_lib_get_conn_tunables (ksock_conn_t *conn, int *txmem, int *rxmem, int *nagle)
+ksocknal_lib_get_conn_tunables(ksock_conn_t *conn, int *txmem, int *rxmem, int *nagle)
{
struct socket *sock = conn->ksnc_sock;
int len;
rc = ksocknal_connsock_addref(conn);
if (rc != 0) {
- LASSERT (conn->ksnc_closing);
+ LASSERT(conn->ksnc_closing);
*txmem = *rxmem = *nagle = 0;
return -ESHUTDOWN;
}
}
int
-ksocknal_lib_setup_sock (struct socket *sock)
+ksocknal_lib_setup_sock(struct socket *sock)
{
int rc;
int option;
linger.l_linger = 0;
rc = kernel_setsockopt(sock, SOL_SOCKET, SO_LINGER,
- (char *)&linger, sizeof (linger));
+ (char *)&linger, sizeof(linger));
if (rc != 0) {
- CERROR ("Can't set SO_LINGER: %d\n", rc);
+ CERROR("Can't set SO_LINGER: %d\n", rc);
return rc;
}
option = -1;
rc = kernel_setsockopt(sock, SOL_TCP, TCP_LINGER2,
- (char *)&option, sizeof (option));
+ (char *)&option, sizeof(option));
if (rc != 0) {
- CERROR ("Can't set SO_LINGER2: %d\n", rc);
+ CERROR("Can't set SO_LINGER2: %d\n", rc);
return rc;
}
option = 1;
rc = kernel_setsockopt(sock, SOL_TCP, TCP_NODELAY,
- (char *)&option, sizeof (option));
+ (char *)&option, sizeof(option));
if (rc != 0) {
- CERROR ("Can't disable nagle: %d\n", rc);
+ CERROR("Can't disable nagle: %d\n", rc);
return rc;
}
}
*ksocknal_tunables.ksnd_tx_buffer_size,
*ksocknal_tunables.ksnd_rx_buffer_size);
if (rc != 0) {
- CERROR ("Can't set buffer tx %d, rx %d buffers: %d\n",
+ CERROR("Can't set buffer tx %d, rx %d buffers: %d\n",
*ksocknal_tunables.ksnd_tx_buffer_size,
*ksocknal_tunables.ksnd_rx_buffer_size, rc);
return rc;
option = (do_keepalive ? 1 : 0);
rc = kernel_setsockopt(sock, SOL_SOCKET, SO_KEEPALIVE,
- (char *)&option, sizeof (option));
+ (char *)&option, sizeof(option));
if (rc != 0) {
- CERROR ("Can't set SO_KEEPALIVE: %d\n", rc);
+ CERROR("Can't set SO_KEEPALIVE: %d\n", rc);
return rc;
}
return 0;
rc = kernel_setsockopt(sock, SOL_TCP, TCP_KEEPIDLE,
- (char *)&keep_idle, sizeof (keep_idle));
+ (char *)&keep_idle, sizeof(keep_idle));
if (rc != 0) {
- CERROR ("Can't set TCP_KEEPIDLE: %d\n", rc);
+ CERROR("Can't set TCP_KEEPIDLE: %d\n", rc);
return rc;
}
rc = kernel_setsockopt(sock, SOL_TCP, TCP_KEEPINTVL,
- (char *)&keep_intvl, sizeof (keep_intvl));
+ (char *)&keep_intvl, sizeof(keep_intvl));
if (rc != 0) {
- CERROR ("Can't set TCP_KEEPINTVL: %d\n", rc);
+ CERROR("Can't set TCP_KEEPINTVL: %d\n", rc);
return rc;
}
rc = kernel_setsockopt(sock, SOL_TCP, TCP_KEEPCNT,
- (char *)&keep_count, sizeof (keep_count));
+ (char *)&keep_count, sizeof(keep_count));
if (rc != 0) {
- CERROR ("Can't set TCP_KEEPCNT: %d\n", rc);
+ CERROR("Can't set TCP_KEEPCNT: %d\n", rc);
return rc;
}
}
void
-ksocknal_lib_push_conn (ksock_conn_t *conn)
+ksocknal_lib_push_conn(ksock_conn_t *conn)
{
struct sock *sk;
struct tcp_sock *tp;
sk = conn->ksnc_sock->sk;
tp = tcp_sk(sk);
- lock_sock (sk);
+ lock_sock(sk);
nonagle = tp->nonagle;
tp->nonagle = 1;
- release_sock (sk);
+ release_sock(sk);
rc = kernel_setsockopt(conn->ksnc_sock, SOL_TCP, TCP_NODELAY,
- (char *)&val, sizeof (val));
- LASSERT (rc == 0);
+ (char *)&val, sizeof(val));
+ LASSERT(rc == 0);
- lock_sock (sk);
+ lock_sock(sk);
tp->nonagle = nonagle;
- release_sock (sk);
+ release_sock(sk);
ksocknal_connsock_decref(conn);
}
-extern void ksocknal_read_callback (ksock_conn_t *conn);
-extern void ksocknal_write_callback (ksock_conn_t *conn);
+extern void ksocknal_read_callback(ksock_conn_t *conn);
+extern void ksocknal_write_callback(ksock_conn_t *conn);
/*
* socket call back in Linux
*/
static void
-ksocknal_data_ready (struct sock *sk)
+ksocknal_data_ready(struct sock *sk)
{
ksock_conn_t *conn;
conn = sk->sk_user_data;
if (conn == NULL) { /* raced with ksocknal_terminate_conn */
- LASSERT (sk->sk_data_ready != &ksocknal_data_ready);
- sk->sk_data_ready (sk);
+ LASSERT(sk->sk_data_ready != &ksocknal_data_ready);
+ sk->sk_data_ready(sk);
} else
ksocknal_read_callback(conn);
}
static void
-ksocknal_write_space (struct sock *sk)
+ksocknal_write_space(struct sock *sk)
{
ksock_conn_t *conn;
int wspace;
" ready" : " blocked"),
(conn == NULL) ? "" : (conn->ksnc_tx_scheduled ?
" scheduled" : " idle"),
- (conn == NULL) ? "" : (list_empty (&conn->ksnc_tx_queue) ?
+ (conn == NULL) ? "" : (list_empty(&conn->ksnc_tx_queue) ?
" empty" : " queued"));
if (conn == NULL) { /* raced with ksocknal_terminate_conn */
- LASSERT (sk->sk_write_space != &ksocknal_write_space);
- sk->sk_write_space (sk);
+ LASSERT(sk->sk_write_space != &ksocknal_write_space);
+ sk->sk_write_space(sk);
read_unlock(&ksocknal_data.ksnd_global_lock);
return;
* ENOMEM check in ksocknal_transmit is race-free (think about
* it). */
- clear_bit (SOCK_NOSPACE, &sk->sk_socket->flags);
+ clear_bit(SOCK_NOSPACE, &sk->sk_socket->flags);
}
read_unlock(&ksocknal_data.ksnd_global_lock);
#include <net/tcp.h>
#include <linux/uio.h>
#include <linux/if.h>
+#include <linux/uaccess.h>
-#include <asm/uaccess.h>
#include <asm/irq.h>
#include <linux/fs.h>
module_param(typed_conns, int, 0444);
MODULE_PARM_DESC(typed_conns, "use different sockets for bulk");
-static int min_bulk = (1<<10);
+static int min_bulk = 1<<10;
module_param(min_bulk, int, 0644);
MODULE_PARM_DESC(min_bulk, "smallest 'large' message");
module_param(nonblk_zcack, int, 0644);
MODULE_PARM_DESC(nonblk_zcack, "always send ZC-ACK on non-blocking connection");
-static unsigned int zc_min_payload = (16 << 10);
+static unsigned int zc_min_payload = 16 << 10;
module_param(zc_min_payload, int, 0644);
MODULE_PARM_DESC(zc_min_payload, "minimum payload size to zero copy");
#endif
if (*ksocknal_tunables.ksnd_zc_min_payload < (2 << 10))
- *ksocknal_tunables.ksnd_zc_min_payload = (2 << 10);
+ *ksocknal_tunables.ksnd_zc_min_payload = 2 << 10;
return 0;
};
ksock_tx_t *tx = conn->ksnc_tx_carrier;
/* Called holding BH lock: conn->ksnc_scheduler->kss_lock */
- LASSERT (!list_empty(&conn->ksnc_tx_queue));
- LASSERT (tx != NULL);
+ LASSERT(!list_empty(&conn->ksnc_tx_queue));
+ LASSERT(tx != NULL);
/* Next TX that can carry ZC-ACK or LNet message */
if (tx->tx_list.next == &conn->ksnc_tx_queue) {
} else {
conn->ksnc_tx_carrier = list_entry(tx->tx_list.next,
ksock_tx_t, tx_list);
- LASSERT (conn->ksnc_tx_carrier->tx_msg.ksm_type == tx->tx_msg.ksm_type);
+ LASSERT(conn->ksnc_tx_carrier->tx_msg.ksm_type == tx->tx_msg.ksm_type);
}
}
{
ksock_tx_t *tx = conn->ksnc_tx_carrier;
- LASSERT (tx_ack == NULL ||
+ LASSERT(tx_ack == NULL ||
tx_ack->tx_msg.ksm_type == KSOCK_MSG_NOOP);
/*
return NULL;
}
- LASSERT (tx->tx_msg.ksm_type == KSOCK_MSG_NOOP);
+ LASSERT(tx->tx_msg.ksm_type == KSOCK_MSG_NOOP);
/* There is a noop zc-ack can be piggybacked */
tx_msg->tx_msg.ksm_zc_cookies[1] = tx->tx_msg.ksm_zc_cookies[1];
return ksocknal_queue_tx_zcack_v2(conn, tx_ack, cookie);
/* non-blocking ZC-ACK (to router) */
- LASSERT (tx_ack == NULL ||
+ LASSERT(tx_ack == NULL ||
tx_ack->tx_msg.ksm_type == KSOCK_MSG_NOOP);
tx = conn->ksnc_tx_carrier;
if (tx->tx_msg.ksm_zc_cookies[1] == SOCKNAL_KEEPALIVE_PING) {
/* replace the keepalive PING with a real ACK */
- LASSERT (tx->tx_msg.ksm_zc_cookies[0] == 0);
+ LASSERT(tx->tx_msg.ksm_zc_cookies[0] == 0);
tx->tx_msg.ksm_zc_cookies[1] = cookie;
return 1;
}
__u64 tmp = 0;
/* two separated cookies: (a+2, a) or (a+1, a) */
- LASSERT (tx->tx_msg.ksm_zc_cookies[0] -
+ LASSERT(tx->tx_msg.ksm_zc_cookies[0] -
tx->tx_msg.ksm_zc_cookies[1] <= 2);
if (tx->tx_msg.ksm_zc_cookies[0] -
ksock_peer_t *peer = conn->ksnc_peer;
ksock_tx_t *tx;
ksock_tx_t *tmp;
- LIST_HEAD (zlist);
+ LIST_HEAD(zlist);
int count;
if (cookie1 == 0)
}
static int
-ksocknal_send_hello_v1 (ksock_conn_t *conn, ksock_hello_msg_t *hello)
+ksocknal_send_hello_v1(ksock_conn_t *conn, ksock_hello_msg_t *hello)
{
struct socket *sock = conn->ksnc_sock;
lnet_hdr_t *hdr;
}
static int
-ksocknal_send_hello_v2 (ksock_conn_t *conn, ksock_hello_msg_t *hello)
+ksocknal_send_hello_v2(ksock_conn_t *conn, ksock_hello_msg_t *hello)
{
struct socket *sock = conn->ksnc_sock;
int rc;
}
rc = libcfs_sock_read(sock, &hdr->src_nid,
- sizeof (*hdr) - offsetof (lnet_hdr_t, src_nid),
+ sizeof(*hdr) - offsetof(lnet_hdr_t, src_nid),
timeout);
if (rc != 0) {
CERROR("Error %d reading rest of HELLO hdr from %pI4h\n",
rc, &conn->ksnc_ipaddr);
- LASSERT (rc < 0 && rc != -EALREADY);
+ LASSERT(rc < 0 && rc != -EALREADY);
goto out;
}
goto out;
}
- hello->kshm_src_nid = le64_to_cpu (hdr->src_nid);
- hello->kshm_src_pid = le32_to_cpu (hdr->src_pid);
- hello->kshm_src_incarnation = le64_to_cpu (hdr->msg.hello.incarnation);
- hello->kshm_ctype = le32_to_cpu (hdr->msg.hello.type);
- hello->kshm_nips = le32_to_cpu (hdr->payload_length) /
- sizeof (__u32);
+ hello->kshm_src_nid = le64_to_cpu(hdr->src_nid);
+ hello->kshm_src_pid = le32_to_cpu(hdr->src_pid);
+ hello->kshm_src_incarnation = le64_to_cpu(hdr->msg.hello.incarnation);
+ hello->kshm_ctype = le32_to_cpu(hdr->msg.hello.type);
+ hello->kshm_nips = le32_to_cpu(hdr->payload_length) /
+ sizeof(__u32);
if (hello->kshm_nips > LNET_MAX_INTERFACES) {
CERROR("Bad nips %d from ip %pI4h\n",
}
static int
-ksocknal_recv_hello_v2 (ksock_conn_t *conn, ksock_hello_msg_t *hello, int timeout)
+ksocknal_recv_hello_v2(ksock_conn_t *conn, ksock_hello_msg_t *hello, int timeout)
{
struct socket *sock = conn->ksnc_sock;
int rc;
count = cfs_power2_roundup(count);
- if (callback != LNET_EQ_HANDLER_NONE && count != 0) {
+ if (callback != LNET_EQ_HANDLER_NONE && count != 0)
CWARN("EQ callback is guaranteed to get every event, do you still want to set eqcount %d for polling event which will have locking overhead? Please contact with developer to confirm\n", count);
- }
/* count can be 0 if only need callback, we can eliminate
* overhead of enqueue event */
}
void
-lnet_notify_locked(lnet_peer_t *lp, int notifylnd, int alive, unsigned long when)
+lnet_notify_locked(lnet_peer_t *lp, int notifylnd, int alive,
+ unsigned long when)
{
if (time_before(when, lp->lp_timestamp)) { /* out of date information */
CDEBUG(D_NET, "Out of date\n");
}
lnet_remotenet_t *
-lnet_find_net_locked (__u32 net)
+lnet_find_net_locked(__u32 net)
{
lnet_remotenet_t *rnet;
struct list_head *tmp;
do_gettimeofday(&tv);
cfs_srand(tv.tv_sec ^ seed[0], tv.tv_usec ^ seed[1]);
seeded = 1;
- return;
}
/* NB expects LNET_LOCK held */
static void
-lnet_add_route_to_rnet (lnet_remotenet_t *rnet, lnet_route_t *route)
+lnet_add_route_to_rnet(lnet_remotenet_t *rnet, lnet_route_t *route)
{
unsigned int len = 0;
unsigned int offset = 0;
lnet_shuffle_seed();
- list_for_each (e, &rnet->lrn_routes) {
+ list_for_each(e, &rnet->lrn_routes) {
len++;
}
/* len+1 positions to add a new entry, also prevents division by 0 */
offset = cfs_rand() % (len + 1);
- list_for_each (e, &rnet->lrn_routes) {
+ list_for_each(e, &rnet->lrn_routes) {
if (offset == 0)
break;
offset--;
LIBCFS_FREE(route, sizeof(*route));
LIBCFS_FREE(rnet, sizeof(*rnet));
- if (rc == -EHOSTUNREACH) { /* gateway is not on a local net */
+ if (rc == -EHOSTUNREACH) /* gateway is not on a local net */
return 0; /* ignore the route entry */
- } else {
- CERROR("Error %d creating route %s %d %s\n", rc,
- libcfs_net2str(net), hops,
- libcfs_nid2str(gateway));
- }
+ CERROR("Error %d creating route %s %d %s\n", rc,
+ libcfs_net2str(net), hops,
+ libcfs_nid2str(gateway));
+
return rc;
}
- LASSERT (!the_lnet.ln_shutdown);
+ LASSERT(!the_lnet.ln_shutdown);
rnet2 = lnet_find_net_locked(net);
if (rnet2 == NULL) {
/* Search for a duplicate route (it's a NOOP if it is) */
add_route = 1;
- list_for_each (e, &rnet2->lrn_routes) {
+ list_for_each(e, &rnet2->lrn_routes) {
lnet_route_t *route2 = list_entry(e, lnet_route_t, lr_list);
if (route2->lr_gateway == route->lr_gateway) {
}
/* our lookups must be true */
- LASSERT (route2->lr_gateway->lp_nid != gateway);
+ LASSERT(route2->lr_gateway->lp_nid != gateway);
}
if (add_route) {
}
void
-lnet_destroy_routes (void)
+lnet_destroy_routes(void)
{
lnet_del_route(LNET_NIDNET(LNET_NID_ANY), LNET_NID_ANY);
}
__swab64s(&stat->ns_nid);
__swab32s(&stat->ns_status);
}
- return;
}
/**
struct list_head *entry;
int all_known;
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
for (;;) {
int cpt = lnet_net_lock_current();
all_known = 1;
- list_for_each (entry, &the_lnet.ln_routers) {
+ list_for_each(entry, &the_lnet.ln_routers) {
rtr = list_entry(entry, lnet_peer_t, lp_rtr_list);
if (rtr->lp_alive_count == 0) {
}
rcd->rcd_pinginfo = pi;
- LASSERT (!LNetHandleIsInvalid(the_lnet.ln_rc_eqh));
+ LASSERT(!LNetHandleIsInvalid(the_lnet.ln_rc_eqh));
rc = LNetMDBind((lnet_md_t){.start = pi,
.user_ptr = rcd,
.length = LNET_PINGINFO_SIZE,
}
static int
-lnet_router_check_interval (lnet_peer_t *rtr)
+lnet_router_check_interval(lnet_peer_t *rtr)
{
int secs;
}
static void
-lnet_ping_router_locked (lnet_peer_t *rtr)
+lnet_ping_router_locked(lnet_peer_t *rtr)
{
lnet_rc_data_t *rcd = NULL;
unsigned long now = cfs_time_current();
}
lnet_peer_decref_locked(rtr);
- return;
}
int
int rc;
int eqsz;
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_SHUTDOWN);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_SHUTDOWN);
if (check_routers_before_use &&
dead_router_check_interval <= 0) {
}
void
-lnet_router_checker_stop (void)
+lnet_router_checker_stop(void)
{
int rc;
if (the_lnet.ln_rc_state == LNET_RC_STATE_SHUTDOWN)
return;
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
the_lnet.ln_rc_state = LNET_RC_STATE_STOPPING;
/* block until event callback signals exit */
LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_SHUTDOWN);
rc = LNetEQFree(the_lnet.ln_rc_eqh);
- LASSERT (rc == 0);
- return;
+ LASSERT(rc == 0);
}
static void
cfs_block_allsigs();
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
while (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING) {
__u64 version;
if (rbp->rbp_nbuffers == 0) /* not initialized or already freed */
return;
- LASSERT (list_empty(&rbp->rbp_msgs));
- LASSERT (rbp->rbp_credits == rbp->rbp_nbuffers);
+ LASSERT(list_empty(&rbp->rbp_msgs));
+ LASSERT(rbp->rbp_credits == rbp->rbp_nbuffers);
while (!list_empty(&rbp->rbp_bufs)) {
- LASSERT (rbp->rbp_credits > 0);
+ LASSERT(rbp->rbp_credits > 0);
rb = list_entry(rbp->rbp_bufs.next,
lnet_rtrbuf_t, rb_list);
nbuffers++;
}
- LASSERT (rbp->rbp_nbuffers == nbuffers);
- LASSERT (rbp->rbp_credits == nbuffers);
+ LASSERT(rbp->rbp_nbuffers == nbuffers);
+ LASSERT(rbp->rbp_credits == nbuffers);
rbp->rbp_nbuffers = rbp->rbp_credits = 0;
}
int i;
if (rbp->rbp_nbuffers != 0) {
- LASSERT (rbp->rbp_nbuffers == nbufs);
+ LASSERT(rbp->rbp_nbuffers == nbufs);
return 0;
}
/* No allocation "under fire" */
/* Otherwise we'd need code to schedule blocked msgs etc */
- LASSERT (!the_lnet.ln_routing);
+ LASSERT(!the_lnet.ln_routing);
}
- LASSERT (rbp->rbp_credits == nbufs);
+ LASSERT(rbp->rbp_credits == nbufs);
return 0;
}
lnet_rtrpools_alloc(int im_a_router)
{
lnet_rtrbufpool_t *rtrp;
- int large_pages = (LNET_MTU + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT;
+ int large_pages;
int small_pages = 1;
int nrb_tiny;
int nrb_small;
int rc;
int i;
+ large_pages = (LNET_MTU + PAGE_CACHE_SIZE - 1) >> PAGE_CACHE_SHIFT;
+
if (!strcmp(forwarding, "")) {
/* not set either way */
if (!im_a_router)
unsigned long now = cfs_time_current();
int cpt = lnet_cpt_of_nid(nid);
- LASSERT (!in_interrupt ());
+ LASSERT(!in_interrupt ());
- CDEBUG (D_NET, "%s notifying %s: %s\n",
+ CDEBUG(D_NET, "%s notifying %s: %s\n",
(ni == NULL) ? "userspace" : libcfs_nid2str(ni->ni_nid),
libcfs_nid2str(nid),
alive ? "up" : "down");
if (ni != NULL &&
LNET_NIDNET(ni->ni_nid) != LNET_NIDNET(nid)) {
- CWARN ("Ignoring notification of %s %s by %s (different net)\n",
+ CWARN("Ignoring notification of %s %s by %s (different net)\n",
libcfs_nid2str(nid), alive ? "birth" : "death",
libcfs_nid2str(ni->ni_nid));
return -EINVAL;
EXPORT_SYMBOL(lnet_notify);
void
-lnet_get_tunables (void)
+lnet_get_tunables(void)
{
- return;
}
#else
int
-lnet_notify (lnet_ni_t *ni, lnet_nid_t nid, int alive, unsigned long when)
+lnet_notify(lnet_ni_t *ni, lnet_nid_t nid, int alive, unsigned long when)
{
return -EOPNOTSUPP;
}
void
-lnet_router_checker (void)
+lnet_router_checker(void)
{
static time_t last;
static int running;
abort();
}
- LASSERT (rc == 1);
+ LASSERT(rc == 1);
lnet_router_checker_event(&ev);
}
return;
}
- LASSERT (the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
+ LASSERT(the_lnet.ln_rc_state == LNET_RC_STATE_RUNNING);
lnet_net_lock(0);
version = the_lnet.ln_routers_version;
- list_for_each_entry (rtr, &the_lnet.ln_routers, lp_rtr_list) {
+ list_for_each_entry(rtr, &the_lnet.ln_routers, lp_rtr_list) {
lnet_ping_router_locked(rtr);
- LASSERT (version == the_lnet.ln_routers_version);
+ LASSERT(version == the_lnet.ln_routers_version);
}
lnet_net_unlock(0);
running = 0; /* lock only needed for the recursion check */
- return;
}
/* NB lnet_peers_start_down depends on me,
* so must be called before any peer creation */
void
-lnet_get_tunables (void)
+lnet_get_tunables(void)
{
char *s;
if (args->lstio_grp_key != console_session.ses_key)
return -EACCES;
- if (args->lstio_grp_namep == NULL||
+ if (args->lstio_grp_namep == NULL ||
args->lstio_grp_nmlen <= 0 ||
args->lstio_grp_nmlen > LST_NAME_SIZE)
return -EINVAL;
static void
lstcon_node_get(lstcon_node_t *nd)
{
- LASSERT (nd->nd_ref >= 1);
+ LASSERT(nd->nd_ref >= 1);
nd->nd_ref++;
}
lstcon_ndlink_t *ndl;
unsigned int idx = LNET_NIDADDR(id.nid) % LST_GLOBAL_HASHSIZE;
- LASSERT (id.nid != LNET_NID_ANY);
+ LASSERT(id.nid != LNET_NID_ANY);
list_for_each_entry(ndl, &console_session.ses_ndl_hash[idx], ndl_hlink) {
if (ndl->ndl_node->nd_id.nid != id.nid ||
{
lstcon_ndlink_t *ndl;
- LASSERT (nd->nd_ref > 0);
+ LASSERT(nd->nd_ref > 0);
if (--nd->nd_ref > 0)
return;
ndl = (lstcon_ndlink_t *)(nd + 1);
- LASSERT (!list_empty(&ndl->ndl_link));
- LASSERT (!list_empty(&ndl->ndl_hlink));
+ LASSERT(!list_empty(&ndl->ndl_link));
+ LASSERT(!list_empty(&ndl->ndl_hlink));
/* remove from session */
list_del(&ndl->ndl_link);
static void
lstcon_ndlink_release(lstcon_ndlink_t *ndl)
{
- LASSERT (list_empty(&ndl->ndl_link));
- LASSERT (!list_empty(&ndl->ndl_hlink));
+ LASSERT(list_empty(&ndl->ndl_link));
+ LASSERT(!list_empty(&ndl->ndl_hlink));
list_del(&ndl->ndl_hlink); /* delete from hash */
lstcon_node_put(ndl->ndl_node);
lstcon_group_drain(grp, 0);
for (i = 0; i < LST_NODE_HASHSIZE; i++) {
- LASSERT (list_empty(&grp->grp_ndl_hash[i]));
+ LASSERT(list_empty(&grp->grp_ndl_hash[i]));
}
LIBCFS_FREE(grp, offsetof(lstcon_group_t,
lstcon_group_t *grp;
int rc;
- LASSERT (count > 0);
- LASSERT (ids_up != NULL);
+ LASSERT(count > 0);
+ LASSERT(ids_up != NULL);
rc = lstcon_group_find(name, &grp);
if (rc != 0) {
{
lstcon_group_t *grp;
- LASSERT (index >= 0);
- LASSERT (name_up != NULL);
+ LASSERT(index >= 0);
+ LASSERT(name_up != NULL);
list_for_each_entry(grp, &console_session.ses_grp_list, grp_link) {
if (index-- == 0) {
int count = 0;
int index = 0;
- LASSERT (index_p != NULL && count_p != NULL);
- LASSERT (dents_up != NULL);
- LASSERT (*index_p >= 0);
- LASSERT (*count_p > 0);
+ LASSERT(index_p != NULL && count_p != NULL);
+ LASSERT(dents_up != NULL);
+ LASSERT(*index_p >= 0);
+ LASSERT(*count_p > 0);
list_for_each_entry(ndl, head, ndl_link) {
if (index++ < *index_p)
{
lstcon_batch_t *bat;
- LASSERT (name_up != NULL);
- LASSERT (index >= 0);
+ LASSERT(name_up != NULL);
+ LASSERT(index >= 0);
list_for_each_entry(bat, &console_session.ses_bat_list, bat_link) {
if (index-- == 0) {
while (!list_empty(&bat->bat_test_list)) {
test = list_entry(bat->bat_test_list.next,
lstcon_test_t, tes_link);
- LASSERT (list_empty(&test->tes_trans_list));
+ LASSERT(list_empty(&test->tes_trans_list));
list_del(&test->tes_link);
tes_param[test->tes_paramlen]));
}
- LASSERT (list_empty(&bat->bat_trans_list));
+ LASSERT(list_empty(&bat->bat_trans_list));
while (!list_empty(&bat->bat_cli_list)) {
ndl = list_entry(bat->bat_cli_list.next,
}
for (i = 0; i < LST_NODE_HASHSIZE; i++) {
- LASSERT (list_empty(&bat->bat_cli_hash[i]));
- LASSERT (list_empty(&bat->bat_srv_hash[i]));
+ LASSERT(list_empty(&bat->bat_cli_hash[i]));
+ LASSERT(list_empty(&bat->bat_srv_hash[i]));
}
LIBCFS_FREE(bat->bat_cli_hash,
struct list_head *head;
test = (lstcon_test_t *)arg;
- LASSERT (test != NULL);
+ LASSERT(test != NULL);
batch = test->tes_batch;
- LASSERT (batch != NULL);
+ LASSERT(batch != NULL);
if (test->tes_oneside &&
transop == LST_TRANS_TSBSRVADD)
head = &batch->bat_cli_list;
} else {
- LASSERT (transop == LST_TRANS_TSBSRVADD);
+ LASSERT(transop == LST_TRANS_TSBSRVADD);
hash = batch->bat_srv_hash;
head = &batch->bat_srv_list;
}
- LASSERT (nd->nd_id.nid != LNET_NID_ANY);
+ LASSERT(nd->nd_id.nid != LNET_NID_ANY);
if (lstcon_ndlink_find(hash, nd->nd_id, &ndl, 1) != 0)
return -ENOMEM;
int transop;
int rc;
- LASSERT (test->tes_src_grp != NULL);
- LASSERT (test->tes_dst_grp != NULL);
+ LASSERT(test->tes_src_grp != NULL);
+ LASSERT(test->tes_dst_grp != NULL);
transop = LST_TRANS_TSBSRVADD;
grp = test->tes_dst_grp;
{
srpc_batch_reply_t *rep = &msg->msg_body.bat_reply;
- LASSERT (transop == LST_TRANS_TSBCLIQRY ||
+ LASSERT(transop == LST_TRANS_TSBCLIQRY ||
transop == LST_TRANS_TSBSRVQRY);
/* positive errno, framework error code */
{
lnet_process_id_t id;
- LASSERT (console_session.ses_state == LST_SESSION_NONE);
+ LASSERT(console_session.ses_state == LST_SESSION_NONE);
LNetGetId(1, &id);
sid->ses_nid = id.nid;
lstcon_batch_t *bat;
int rc = 0;
- LASSERT (console_session.ses_state == LST_SESSION_ACTIVE);
+ LASSERT(console_session.ses_state == LST_SESSION_ACTIVE);
rc = lstcon_rpc_trans_ndlist(&console_session.ses_ndl_list,
NULL, LST_TRANS_SESEND, NULL,
while (!list_empty(&console_session.ses_grp_list)) {
grp = list_entry(console_session.ses_grp_list.next,
lstcon_group_t, grp_link);
- LASSERT (grp->grp_ref == 1);
+ LASSERT(grp->grp_ref == 1);
lstcon_group_put(grp);
}
/* all nodes should be released */
- LASSERT (list_empty(&console_session.ses_ndl_list));
+ LASSERT(list_empty(&console_session.ses_ndl_list));
console_session.ses_shutdown = 0;
console_session.ses_expired = 0;
}
static int
-lstcon_acceptor_handle (srpc_server_rpc_t *rpc)
+lstcon_acceptor_handle(srpc_server_rpc_t *rpc)
{
srpc_msg_t *rep = &rpc->srpc_replymsg;
srpc_msg_t *req = &rpc->srpc_reqstbuf->buf_msg;
lstcon_init_acceptor_service();
rc = srpc_add_service(&lstcon_acceptor_service);
- LASSERT (rc != -EBUSY);
+ LASSERT(rc != -EBUSY);
if (rc != 0) {
LIBCFS_FREE(console_session.ses_ndl_hash,
sizeof(struct list_head) * LST_GLOBAL_HASHSIZE);
mutex_unlock(&console_session.ses_mutex);
- LASSERT (list_empty(&console_session.ses_ndl_list));
- LASSERT (list_empty(&console_session.ses_grp_list));
- LASSERT (list_empty(&console_session.ses_bat_list));
- LASSERT (list_empty(&console_session.ses_trans_list));
+ LASSERT(list_empty(&console_session.ses_ndl_list));
+ LASSERT(list_empty(&console_session.ses_grp_list));
+ LASSERT(list_empty(&console_session.ses_bat_list));
+ LASSERT(list_empty(&console_session.ses_trans_list));
for (i = 0; i < LST_NODE_HASHSIZE; i++) {
- LASSERT (list_empty(&console_session.ses_ndl_hash[i]));
+ LASSERT(list_empty(&console_session.ses_ndl_hash[i]));
}
LIBCFS_FREE(console_session.ses_ndl_hash,
} sfw_data;
/* forward ref's */
-int sfw_stop_batch (sfw_batch_t *tsb, int force);
-void sfw_destroy_session (sfw_session_t *sn);
+int sfw_stop_batch(sfw_batch_t *tsb, int force);
+void sfw_destroy_session(sfw_session_t *sn);
static inline sfw_test_case_t *
sfw_find_test_case(int id)
{
sfw_test_case_t *tsc;
- LASSERT (id <= SRPC_SERVICE_MAX_ID);
- LASSERT (id > SRPC_FRAMEWORK_SERVICE_MAX_ID);
+ LASSERT(id <= SRPC_SERVICE_MAX_ID);
+ LASSERT(id > SRPC_FRAMEWORK_SERVICE_MAX_ID);
- list_for_each_entry (tsc, &sfw_data.fw_tests, tsc_list) {
+ list_for_each_entry(tsc, &sfw_data.fw_tests, tsc_list) {
if (tsc->tsc_srv_service->sv_id == id)
return tsc;
}
}
static int
-sfw_register_test (srpc_service_t *service, sfw_test_client_ops_t *cliops)
+sfw_register_test(srpc_service_t *service, sfw_test_client_ops_t *cliops)
{
sfw_test_case_t *tsc;
if (sfw_find_test_case(service->sv_id) != NULL) {
- CERROR ("Failed to register test %s (%d)\n",
+ CERROR("Failed to register test %s (%d)\n",
service->sv_name, service->sv_id);
return -EEXIST;
}
}
static void
-sfw_add_session_timer (void)
+sfw_add_session_timer(void)
{
sfw_session_t *sn = sfw_data.fw_session;
stt_timer_t *timer = &sn->sn_timer;
- LASSERT (!sfw_data.fw_shuttingdown);
+ LASSERT(!sfw_data.fw_shuttingdown);
if (sn == NULL || sn->sn_timeout == 0)
return;
- LASSERT (!sn->sn_timer_active);
+ LASSERT(!sn->sn_timer_active);
sn->sn_timer_active = 1;
timer->stt_expires = cfs_time_add(sn->sn_timeout,
}
static int
-sfw_del_session_timer (void)
+sfw_del_session_timer(void)
{
sfw_session_t *sn = sfw_data.fw_session;
if (sn == NULL || !sn->sn_timer_active)
return 0;
- LASSERT (sn->sn_timeout != 0);
+ LASSERT(sn->sn_timeout != 0);
if (stt_del_timer(&sn->sn_timer)) { /* timer defused */
sn->sn_timer_active = 0;
}
static void
-sfw_deactivate_session (void)
+sfw_deactivate_session(void)
__must_hold(&sfw_data.fw_lock)
{
sfw_session_t *sn = sfw_data.fw_session;
if (sn == NULL) return;
- LASSERT (!sn->sn_timer_active);
+ LASSERT(!sn->sn_timer_active);
sfw_data.fw_session = NULL;
atomic_inc(&sfw_data.fw_nzombies);
spin_lock(&sfw_data.fw_lock);
- list_for_each_entry (tsb, &sn->sn_batches, bat_list) {
+ list_for_each_entry(tsb, &sn->sn_batches, bat_list) {
if (sfw_batch_active(tsb)) {
nactive++;
sfw_stop_batch(tsb, 1);
static void
-sfw_session_expired (void *data)
+sfw_session_expired(void *data)
{
sfw_session_t *sn = data;
spin_lock(&sfw_data.fw_lock);
- LASSERT (sn->sn_timer_active);
- LASSERT (sn == sfw_data.fw_session);
+ LASSERT(sn->sn_timer_active);
+ LASSERT(sn == sfw_data.fw_session);
- CWARN ("Session expired! sid: %s-%llu, name: %s\n",
+ CWARN("Session expired! sid: %s-%llu, name: %s\n",
libcfs_nid2str(sn->sn_id.ses_nid),
sn->sn_id.ses_stamp, &sn->sn_name[0]);
struct srpc_service *sv = rpc->srpc_scd->scd_svc;
int status = rpc->srpc_status;
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Incoming framework RPC done: service %s, peer %s, status %s:%d\n",
sv->sv_name, libcfs_id2str(rpc->srpc_peer),
swi_state2str(rpc->srpc_wi.swi_state),
}
static void
-sfw_client_rpc_fini (srpc_client_rpc_t *rpc)
+sfw_client_rpc_fini(srpc_client_rpc_t *rpc)
{
- LASSERT (rpc->crpc_bulk.bk_niov == 0);
- LASSERT (list_empty(&rpc->crpc_list));
- LASSERT (atomic_read(&rpc->crpc_refcount) == 0);
+ LASSERT(rpc->crpc_bulk.bk_niov == 0);
+ LASSERT(list_empty(&rpc->crpc_list));
+ LASSERT(atomic_read(&rpc->crpc_refcount) == 0);
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Outgoing framework RPC done: service %d, peer %s, status %s:%d:%d\n",
rpc->crpc_service, libcfs_id2str(rpc->crpc_dest),
swi_state2str(rpc->crpc_wi.swi_state),
}
static sfw_batch_t *
-sfw_find_batch (lst_bid_t bid)
+sfw_find_batch(lst_bid_t bid)
{
sfw_session_t *sn = sfw_data.fw_session;
sfw_batch_t *bat;
- LASSERT (sn != NULL);
+ LASSERT(sn != NULL);
- list_for_each_entry (bat, &sn->sn_batches, bat_list) {
+ list_for_each_entry(bat, &sn->sn_batches, bat_list) {
if (bat->bat_id.bat_id == bid.bat_id)
return bat;
}
}
static sfw_batch_t *
-sfw_bid2batch (lst_bid_t bid)
+sfw_bid2batch(lst_bid_t bid)
{
sfw_session_t *sn = sfw_data.fw_session;
sfw_batch_t *bat;
- LASSERT (sn != NULL);
+ LASSERT(sn != NULL);
bat = sfw_find_batch(bid);
if (bat != NULL)
}
static int
-sfw_get_stats (srpc_stat_reqst_t *request, srpc_stat_reply_t *reply)
+sfw_get_stats(srpc_stat_reqst_t *request, srpc_stat_reply_t *reply)
{
sfw_session_t *sn = sfw_data.fw_session;
sfw_counters_t *cnt = &reply->str_fw;
cnt->zombie_sessions = atomic_read(&sfw_data.fw_nzombies);
cnt->active_batches = 0;
- list_for_each_entry (bat, &sn->sn_batches, bat_list) {
+ list_for_each_entry(bat, &sn->sn_batches, bat_list) {
if (atomic_read(&bat->bat_nactive) > 0)
cnt->active_batches++;
}
/* brand new or create by force */
LIBCFS_ALLOC(sn, sizeof(sfw_session_t));
if (sn == NULL) {
- CERROR ("Dropping RPC (mksn) under memory pressure.\n");
+ CERROR("Dropping RPC (mksn) under memory pressure.\n");
return -ENOMEM;
}
}
static int
-sfw_remove_session (srpc_rmsn_reqst_t *request, srpc_rmsn_reply_t *reply)
+sfw_remove_session(srpc_rmsn_reqst_t *request, srpc_rmsn_reply_t *reply)
{
sfw_session_t *sn = sfw_data.fw_session;
}
static int
-sfw_debug_session (srpc_debug_reqst_t *request, srpc_debug_reply_t *reply)
+sfw_debug_session(srpc_debug_reqst_t *request, srpc_debug_reply_t *reply)
{
sfw_session_t *sn = sfw_data.fw_session;
}
static void
-sfw_test_rpc_fini (srpc_client_rpc_t *rpc)
+sfw_test_rpc_fini(srpc_client_rpc_t *rpc)
{
sfw_test_unit_t *tsu = rpc->crpc_priv;
sfw_test_instance_t *tsi = tsu->tsu_instance;
/* Called with hold of tsi->tsi_lock */
- LASSERT (list_empty(&rpc->crpc_list));
+ LASSERT(list_empty(&rpc->crpc_list));
list_add(&rpc->crpc_list, &tsi->tsi_free_rpcs);
}
}
static void
-sfw_destroy_test_instance (sfw_test_instance_t *tsi)
+sfw_destroy_test_instance(sfw_test_instance_t *tsi)
{
srpc_client_rpc_t *rpc;
sfw_test_unit_t *tsu;
tsi->tsi_ops->tso_fini(tsi);
- LASSERT (!tsi->tsi_stopping);
- LASSERT (list_empty(&tsi->tsi_active_rpcs));
- LASSERT (!sfw_test_active(tsi));
+ LASSERT(!tsi->tsi_stopping);
+ LASSERT(list_empty(&tsi->tsi_active_rpcs));
+ LASSERT(!sfw_test_active(tsi));
while (!list_empty(&tsi->tsi_units)) {
tsu = list_entry(tsi->tsi_units.next,
}
static void
-sfw_destroy_batch (sfw_batch_t *tsb)
+sfw_destroy_batch(sfw_batch_t *tsb)
{
sfw_test_instance_t *tsi;
- LASSERT (!sfw_batch_active(tsb));
- LASSERT (list_empty(&tsb->bat_list));
+ LASSERT(!sfw_batch_active(tsb));
+ LASSERT(list_empty(&tsb->bat_list));
while (!list_empty(&tsb->bat_tests)) {
tsi = list_entry(tsb->bat_tests.next,
}
void
-sfw_destroy_session (sfw_session_t *sn)
+sfw_destroy_session(sfw_session_t *sn)
{
sfw_batch_t *batch;
- LASSERT (list_empty(&sn->sn_list));
- LASSERT (sn != sfw_data.fw_session);
+ LASSERT(list_empty(&sn->sn_list));
+ LASSERT(sn != sfw_data.fw_session);
while (!list_empty(&sn->sn_batches)) {
batch = list_entry(sn->sn_batches.next,
{
srpc_test_reqst_t *req = &msg->msg_body.tes_reqst;
- LASSERT (msg->msg_type == SRPC_MSG_TEST_REQST);
- LASSERT (req->tsr_is_client);
+ LASSERT(msg->msg_type == SRPC_MSG_TEST_REQST);
+ LASSERT(req->tsr_is_client);
if (msg->msg_magic == SRPC_MSG_MAGIC)
return; /* no flipping needed */
- LASSERT (msg->msg_magic == __swab32(SRPC_MSG_MAGIC));
+ LASSERT(msg->msg_magic == __swab32(SRPC_MSG_MAGIC));
if (req->tsr_service == SRPC_SERVICE_BRW) {
if ((msg->msg_ses_feats & LST_FEAT_BULK_LEN) == 0) {
return;
}
- LBUG ();
+ LBUG();
return;
}
static int
-sfw_add_test_instance (sfw_batch_t *tsb, srpc_server_rpc_t *rpc)
+sfw_add_test_instance(sfw_batch_t *tsb, srpc_server_rpc_t *rpc)
{
srpc_msg_t *msg = &rpc->srpc_reqstbuf->buf_msg;
srpc_test_reqst_t *req = &msg->msg_body.tes_reqst;
LIBCFS_ALLOC(tsi, sizeof(*tsi));
if (tsi == NULL) {
- CERROR ("Can't allocate test instance for batch: %llu\n",
+ CERROR("Can't allocate test instance for batch: %llu\n",
tsb->bat_id.bat_id);
return -ENOMEM;
}
return rc;
}
- LASSERT (!sfw_batch_active(tsb));
+ LASSERT(!sfw_batch_active(tsb));
if (!tsi->tsi_is_client) {
/* it's test server, just add it to tsb */
return 0;
}
- LASSERT (bk != NULL);
- LASSERT (bk->bk_niov * SFW_ID_PER_PAGE >= (unsigned int)ndest);
+ LASSERT(bk != NULL);
+ LASSERT(bk->bk_niov * SFW_ID_PER_PAGE >= (unsigned int)ndest);
LASSERT((unsigned int)bk->bk_len >=
sizeof(lnet_process_id_packed_t) * ndest);
int j;
dests = page_address(bk->bk_iovs[i / SFW_ID_PER_PAGE].kiov_page);
- LASSERT (dests != NULL); /* my pages are within KVM always */
+ LASSERT(dests != NULL); /* my pages are within KVM always */
id = dests[i % SFW_ID_PER_PAGE];
if (msg->msg_magic != SRPC_MSG_MAGIC)
sfw_unpack_id(id);
LIBCFS_ALLOC(tsu, sizeof(sfw_test_unit_t));
if (tsu == NULL) {
rc = -ENOMEM;
- CERROR ("Can't allocate tsu for %d\n",
+ CERROR("Can't allocate tsu for %d\n",
tsi->tsi_service);
goto error;
}
}
error:
- LASSERT (rc != 0);
+ LASSERT(rc != 0);
sfw_destroy_test_instance(tsi);
return rc;
}
static void
-sfw_test_unit_done (sfw_test_unit_t *tsu)
+sfw_test_unit_done(sfw_test_unit_t *tsu)
{
sfw_test_instance_t *tsi = tsu->tsu_instance;
sfw_batch_t *tsb = tsi->tsi_batch;
sfw_session_t *sn = tsb->bat_session;
- LASSERT (sfw_test_active(tsi));
+ LASSERT(sfw_test_active(tsi));
if (!atomic_dec_and_test(&tsi->tsi_nactive))
return;
return;
}
- LASSERT (!list_empty(&sn->sn_list)); /* I'm a zombie! */
+ LASSERT(!list_empty(&sn->sn_list)); /* I'm a zombie! */
- list_for_each_entry (tsb, &sn->sn_batches, bat_list) {
+ list_for_each_entry(tsb, &sn->sn_batches, bat_list) {
if (sfw_batch_active(tsb)) {
spin_unlock(&sfw_data.fw_lock);
return;
}
static void
-sfw_test_rpc_done (srpc_client_rpc_t *rpc)
+sfw_test_rpc_done(srpc_client_rpc_t *rpc)
{
sfw_test_unit_t *tsu = rpc->crpc_priv;
sfw_test_instance_t *tsi = tsu->tsu_instance;
spin_lock(&tsi->tsi_lock);
- LASSERT (sfw_test_active(tsi));
- LASSERT (!list_empty(&rpc->crpc_list));
+ LASSERT(sfw_test_active(tsi));
+ LASSERT(!list_empty(&rpc->crpc_list));
list_del_init(&rpc->crpc_list);
spin_lock(&tsi->tsi_lock);
- LASSERT (sfw_test_active(tsi));
+ LASSERT(sfw_test_active(tsi));
if (!list_empty(&tsi->tsi_free_rpcs)) {
/* pick request from buffer */
rpc = list_entry(tsi->tsi_free_rpcs.next,
srpc_client_rpc_t, crpc_list);
- LASSERT (nblk == rpc->crpc_bulk.bk_niov);
+ LASSERT(nblk == rpc->crpc_bulk.bk_niov);
list_del_init(&rpc->crpc_list);
}
}
static int
-sfw_run_test (swi_workitem_t *wi)
+sfw_run_test(swi_workitem_t *wi)
{
sfw_test_unit_t *tsu = wi->swi_workitem.wi_data;
sfw_test_instance_t *tsi = tsu->tsu_instance;
srpc_client_rpc_t *rpc = NULL;
- LASSERT (wi == &tsu->tsu_worker);
+ LASSERT(wi == &tsu->tsu_worker);
if (tsi->tsi_ops->tso_prep_rpc(tsu, tsu->tsu_dest, &rpc) != 0) {
- LASSERT (rpc == NULL);
+ LASSERT(rpc == NULL);
goto test_done;
}
- LASSERT (rpc != NULL);
+ LASSERT(rpc != NULL);
spin_lock(&tsi->tsi_lock);
}
static int
-sfw_run_batch (sfw_batch_t *tsb)
+sfw_run_batch(sfw_batch_t *tsb)
{
swi_workitem_t *wi;
sfw_test_unit_t *tsu;
return 0;
}
- list_for_each_entry (tsi, &tsb->bat_tests, tsi_list) {
+ list_for_each_entry(tsi, &tsb->bat_tests, tsi_list) {
if (!tsi->tsi_is_client) /* skip server instances */
continue;
- LASSERT (!tsi->tsi_stopping);
- LASSERT (!sfw_test_active(tsi));
+ LASSERT(!tsi->tsi_stopping);
+ LASSERT(!sfw_test_active(tsi));
atomic_inc(&tsb->bat_nactive);
- list_for_each_entry (tsu, &tsi->tsi_units, tsu_list) {
+ list_for_each_entry(tsu, &tsi->tsi_units, tsu_list) {
atomic_inc(&tsi->tsi_nactive);
tsu->tsu_loop = tsi->tsi_loop;
wi = &tsu->tsu_worker;
}
int
-sfw_stop_batch (sfw_batch_t *tsb, int force)
+sfw_stop_batch(sfw_batch_t *tsb, int force)
{
sfw_test_instance_t *tsi;
srpc_client_rpc_t *rpc;
return 0;
}
- list_for_each_entry (tsi, &tsb->bat_tests, tsi_list) {
+ list_for_each_entry(tsi, &tsb->bat_tests, tsi_list) {
spin_lock(&tsi->tsi_lock);
if (!tsi->tsi_is_client ||
}
static int
-sfw_query_batch (sfw_batch_t *tsb, int testidx, srpc_batch_reply_t *reply)
+sfw_query_batch(sfw_batch_t *tsb, int testidx, srpc_batch_reply_t *reply)
{
sfw_test_instance_t *tsi;
return 0;
}
- list_for_each_entry (tsi, &tsb->bat_tests, tsi_list) {
+ list_for_each_entry(tsi, &tsb->bat_tests, tsi_list) {
if (testidx-- > 1)
continue;
}
void
-sfw_free_pages (srpc_server_rpc_t *rpc)
+sfw_free_pages(srpc_server_rpc_t *rpc)
{
srpc_free_bulk(rpc->srpc_bulk);
rpc->srpc_bulk = NULL;
}
static int
-sfw_add_test (srpc_server_rpc_t *rpc)
+sfw_add_test(srpc_server_rpc_t *rpc)
{
sfw_session_t *sn = sfw_data.fw_session;
srpc_test_reply_t *reply = &rpc->srpc_replymsg.msg_body.tes_reply;
bat = sfw_bid2batch(request->tsr_bid);
if (bat == NULL) {
- CERROR ("Dropping RPC (%s) from %s under memory pressure.\n",
+ CERROR("Dropping RPC (%s) from %s under memory pressure.\n",
rpc->srpc_scd->scd_svc->sv_name,
libcfs_id2str(rpc->srpc_peer));
return -ENOMEM;
}
rc = sfw_add_test_instance(bat, rpc);
- CDEBUG (rc == 0 ? D_NET : D_WARNING,
+ CDEBUG(rc == 0 ? D_NET : D_WARNING,
"%s test: sv %d %s, loop %d, concur %d, ndest %d\n",
rc == 0 ? "Added" : "Failed to add", request->tsr_service,
request->tsr_is_client ? "client" : "server",
}
static int
-sfw_control_batch (srpc_batch_reqst_t *request, srpc_batch_reply_t *reply)
+sfw_control_batch(srpc_batch_reqst_t *request, srpc_batch_reply_t *reply)
{
sfw_session_t *sn = sfw_data.fw_session;
int rc = 0;
switch (sv->sv_id) {
default:
- LBUG ();
+ LBUG();
case SRPC_SERVICE_TEST:
rc = sfw_add_test(rpc);
break;
spin_lock(&sfw_data.fw_lock);
- LASSERT (!sfw_data.fw_shuttingdown);
- LASSERT (service <= SRPC_FRAMEWORK_SERVICE_MAX_ID);
+ LASSERT(!sfw_data.fw_shuttingdown);
+ LASSERT(service <= SRPC_FRAMEWORK_SERVICE_MAX_ID);
if (nbulkiov == 0 && !list_empty(&sfw_data.fw_zombie_rpcs)) {
rpc = list_entry(sfw_data.fw_zombie_rpcs.next,
}
void
-sfw_unpack_message (srpc_msg_t *msg)
+sfw_unpack_message(srpc_msg_t *msg)
{
if (msg->msg_magic == SRPC_MSG_MAGIC)
return; /* no flipping needed */
/* srpc module should guarantee I wouldn't get crap */
- LASSERT (msg->msg_magic == __swab32(SRPC_MSG_MAGIC));
+ LASSERT(msg->msg_magic == __swab32(SRPC_MSG_MAGIC));
if (msg->msg_type == SRPC_MSG_STAT_REQST) {
srpc_stat_reqst_t *req = &msg->msg_body.stat_reqst;
return;
}
- LBUG ();
+ LBUG();
return;
}
void
-sfw_abort_rpc (srpc_client_rpc_t *rpc)
+sfw_abort_rpc(srpc_client_rpc_t *rpc)
{
LASSERT(atomic_read(&rpc->crpc_refcount) > 0);
LASSERT(rpc->crpc_service <= SRPC_FRAMEWORK_SERVICE_MAX_ID);
}
void
-sfw_post_rpc (srpc_client_rpc_t *rpc)
+sfw_post_rpc(srpc_client_rpc_t *rpc)
{
spin_lock(&rpc->crpc_lock);
- LASSERT (!rpc->crpc_closed);
- LASSERT (!rpc->crpc_aborted);
- LASSERT (list_empty(&rpc->crpc_list));
- LASSERT (!sfw_data.fw_shuttingdown);
+ LASSERT(!rpc->crpc_closed);
+ LASSERT(!rpc->crpc_aborted);
+ LASSERT(list_empty(&rpc->crpc_list));
+ LASSERT(!sfw_data.fw_shuttingdown);
rpc->crpc_timeout = rpc_timeout;
srpc_post_rpc(rpc);
int
-sfw_startup (void)
+sfw_startup(void)
{
int i;
int rc;
if (session_timeout < 0) {
- CERROR ("Session timeout must be non-negative: %d\n",
+ CERROR("Session timeout must be non-negative: %d\n",
session_timeout);
return -EINVAL;
}
if (rpc_timeout < 0) {
- CERROR ("RPC timeout must be non-negative: %d\n",
+ CERROR("RPC timeout must be non-negative: %d\n",
rpc_timeout);
return -EINVAL;
}
brw_init_test_client();
brw_init_test_service();
rc = sfw_register_test(&brw_test_service, &brw_test_client);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
ping_init_test_client();
ping_init_test_service();
rc = sfw_register_test(&ping_test_service, &ping_test_client);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
error = 0;
- list_for_each_entry (tsc, &sfw_data.fw_tests, tsc_list) {
+ list_for_each_entry(tsc, &sfw_data.fw_tests, tsc_list) {
sv = tsc->tsc_srv_service;
rc = srpc_add_service(sv);
- LASSERT (rc != -EBUSY);
+ LASSERT(rc != -EBUSY);
if (rc != 0) {
- CWARN ("Failed to add %s service: %d\n",
+ CWARN("Failed to add %s service: %d\n",
sv->sv_name, rc);
error = rc;
}
sv->sv_bulk_ready = sfw_bulk_ready;
rc = srpc_add_service(sv);
- LASSERT (rc != -EBUSY);
+ LASSERT(rc != -EBUSY);
if (rc != 0) {
- CWARN ("Failed to add %s service: %d\n",
+ CWARN("Failed to add %s service: %d\n",
sv->sv_name, rc);
error = rc;
}
}
void
-sfw_shutdown (void)
+sfw_shutdown(void)
{
srpc_service_t *sv;
sfw_test_case_t *tsc;
srpc_remove_service(sv);
}
- list_for_each_entry (tsc, &sfw_data.fw_tests, tsc_list) {
+ list_for_each_entry(tsc, &sfw_data.fw_tests, tsc_list) {
sv = tsc->tsc_srv_service;
srpc_shutdown_service(sv);
srpc_remove_service(sv);
}
/* forward ref's */
-int srpc_handle_rpc (swi_workitem_t *wi);
+int srpc_handle_rpc(swi_workitem_t *wi);
-void srpc_get_counters (srpc_counters_t *cnt)
+void srpc_get_counters(srpc_counters_t *cnt)
{
spin_lock(&srpc_data.rpc_glock);
*cnt = srpc_data.rpc_counters;
spin_unlock(&srpc_data.rpc_glock);
}
-void srpc_set_counters (const srpc_counters_t *cnt)
+void srpc_set_counters(const srpc_counters_t *cnt)
{
spin_lock(&srpc_data.rpc_glock);
srpc_data.rpc_counters = *cnt;
}
void
-srpc_free_bulk (srpc_bulk_t *bk)
+srpc_free_bulk(srpc_bulk_t *bk)
{
int i;
struct page *pg;
- LASSERT (bk != NULL);
+ LASSERT(bk != NULL);
for (i = 0; i < bk->bk_niov; i++) {
pg = bk->bk_iovs[i].kiov_page;
- if (pg == NULL) break;
+ if (pg == NULL)
+ break;
__free_page(pg);
}
}
static inline __u64
-srpc_next_id (void)
+srpc_next_id(void)
{
__u64 id;
}
int
-srpc_remove_service (srpc_service_t *sv)
+srpc_remove_service(srpc_service_t *sv)
{
int id = sv->sv_id;
rc = LNetMEAttach(portal, peer, matchbits, 0, LNET_UNLINK,
local ? LNET_INS_LOCAL : LNET_INS_AFTER, &meh);
if (rc != 0) {
- CERROR ("LNetMEAttach failed: %d\n", rc);
- LASSERT (rc == -ENOMEM);
+ CERROR("LNetMEAttach failed: %d\n", rc);
+ LASSERT(rc == -ENOMEM);
return -ENOMEM;
}
rc = LNetMDAttach(meh, md, LNET_UNLINK, mdh);
if (rc != 0) {
- CERROR ("LNetMDAttach failed: %d\n", rc);
- LASSERT (rc == -ENOMEM);
+ CERROR("LNetMDAttach failed: %d\n", rc);
+ LASSERT(rc == -ENOMEM);
rc = LNetMEUnlink(meh);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
return -ENOMEM;
}
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Posted passive RDMA: peer %s, portal %d, matchbits %#llx\n",
libcfs_id2str(peer), portal, matchbits);
return 0;
rc = LNetMDBind(md, LNET_UNLINK, mdh);
if (rc != 0) {
- CERROR ("LNetMDBind failed: %d\n", rc);
- LASSERT (rc == -ENOMEM);
+ CERROR("LNetMDBind failed: %d\n", rc);
+ LASSERT(rc == -ENOMEM);
return -ENOMEM;
}
rc = LNetPut(self, *mdh, LNET_NOACK_REQ, peer,
portal, matchbits, 0, 0);
} else {
- LASSERT ((options & LNET_MD_OP_GET) != 0);
+ LASSERT((options & LNET_MD_OP_GET) != 0);
rc = LNetGet(self, *mdh, peer, portal, matchbits, 0);
}
if (rc != 0) {
- CERROR ("LNet%s(%s, %d, %lld) failed: %d\n",
+ CERROR("LNet%s(%s, %d, %lld) failed: %d\n",
((options & LNET_MD_OP_PUT) != 0) ? "Put" : "Get",
libcfs_id2str(peer), portal, matchbits, rc);
* with failure, so fall through and return success here.
*/
rc = LNetMDUnlink(*mdh);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
} else {
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Posted active RDMA: peer %s, portal %u, matchbits %#llx\n",
libcfs_id2str(peer), portal, matchbits);
}
}
static int
-srpc_send_request (srpc_client_rpc_t *rpc)
+srpc_send_request(srpc_client_rpc_t *rpc)
{
srpc_event_t *ev = &rpc->crpc_reqstev;
int rc;
&rpc->crpc_reqstmsg, sizeof(srpc_msg_t),
&rpc->crpc_reqstmdh, ev);
if (rc != 0) {
- LASSERT (rc == -ENOMEM);
+ LASSERT(rc == -ENOMEM);
ev->ev_fired = 1; /* no more event expected */
}
return rc;
}
static int
-srpc_prepare_reply (srpc_client_rpc_t *rpc)
+srpc_prepare_reply(srpc_client_rpc_t *rpc)
{
srpc_event_t *ev = &rpc->crpc_replyev;
__u64 *id = &rpc->crpc_reqstmsg.msg_body.reqst.rpyid;
LNET_MD_OP_PUT, rpc->crpc_dest,
&rpc->crpc_replymdh, ev);
if (rc != 0) {
- LASSERT (rc == -ENOMEM);
+ LASSERT(rc == -ENOMEM);
ev->ev_fired = 1; /* no more event expected */
}
return rc;
}
static int
-srpc_prepare_bulk (srpc_client_rpc_t *rpc)
+srpc_prepare_bulk(srpc_client_rpc_t *rpc)
{
srpc_bulk_t *bk = &rpc->crpc_bulk;
srpc_event_t *ev = &rpc->crpc_bulkev;
int rc;
int opt;
- LASSERT (bk->bk_niov <= LNET_MAX_IOV);
+ LASSERT(bk->bk_niov <= LNET_MAX_IOV);
- if (bk->bk_niov == 0) return 0; /* nothing to do */
+ if (bk->bk_niov == 0)
+ return 0; /* nothing to do */
opt = bk->bk_sink ? LNET_MD_OP_PUT : LNET_MD_OP_GET;
opt |= LNET_MD_KIOV;
&bk->bk_iovs[0], bk->bk_niov, opt,
rpc->crpc_dest, &bk->bk_mdh, ev);
if (rc != 0) {
- LASSERT (rc == -ENOMEM);
+ LASSERT(rc == -ENOMEM);
ev->ev_fired = 1; /* no more event expected */
}
return rc;
}
static int
-srpc_do_bulk (srpc_server_rpc_t *rpc)
+srpc_do_bulk(srpc_server_rpc_t *rpc)
{
srpc_event_t *ev = &rpc->srpc_ev;
srpc_bulk_t *bk = rpc->srpc_bulk;
int rc;
int opt;
- LASSERT (bk != NULL);
+ LASSERT(bk != NULL);
opt = bk->bk_sink ? LNET_MD_OP_GET : LNET_MD_OP_PUT;
opt |= LNET_MD_KIOV;
struct srpc_service *sv = scd->scd_svc;
srpc_buffer_t *buffer;
- LASSERT (status != 0 || rpc->srpc_wi.swi_state == SWI_STATE_DONE);
+ LASSERT(status != 0 || rpc->srpc_wi.swi_state == SWI_STATE_DONE);
rpc->srpc_status = status;
- CDEBUG_LIMIT (status == 0 ? D_NET : D_NETERROR,
+ CDEBUG_LIMIT(status == 0 ? D_NET : D_NETERROR,
"Server RPC %p done: service %s, peer %s, status %s:%d\n",
rpc, sv->sv_name, libcfs_id2str(rpc->srpc_peer),
swi_state2str(rpc->srpc_wi.swi_state), status);
switch (wi->swi_state) {
default:
- LBUG ();
+ LBUG();
case SWI_STATE_NEWBORN: {
srpc_msg_t *msg;
srpc_generic_reply_t *reply;
if (rc == 0)
return 0; /* wait for bulk */
- LASSERT (ev->ev_fired);
+ LASSERT(ev->ev_fired);
ev->ev_status = rc;
}
}
case SWI_STATE_BULK_STARTED:
- LASSERT (rpc->srpc_bulk == NULL || ev->ev_fired);
+ LASSERT(rpc->srpc_bulk == NULL || ev->ev_fired);
if (rpc->srpc_bulk != NULL) {
rc = ev->ev_status;
rpc, rpc->srpc_bulk, sv->sv_id);
CERROR("Event: status %d, type %d, lnet %d\n",
ev->ev_status, ev->ev_type, ev->ev_lnet);
- LASSERT (ev->ev_fired);
+ LASSERT(ev->ev_fired);
}
wi->swi_state = SWI_STATE_DONE;
}
static void
-srpc_client_rpc_expired (void *data)
+srpc_client_rpc_expired(void *data)
{
srpc_client_rpc_t *rpc = data;
- CWARN ("Client RPC expired: service %d, peer %s, timeout %d.\n",
+ CWARN("Client RPC expired: service %d, peer %s, timeout %d.\n",
rpc->crpc_service, libcfs_id2str(rpc->crpc_dest),
rpc->crpc_timeout);
}
inline void
-srpc_add_client_rpc_timer (srpc_client_rpc_t *rpc)
+srpc_add_client_rpc_timer(srpc_client_rpc_t *rpc)
{
stt_timer_t *timer = &rpc->crpc_timer;
- if (rpc->crpc_timeout == 0) return;
+ if (rpc->crpc_timeout == 0)
+ return;
INIT_LIST_HEAD(&timer->stt_list);
timer->stt_data = rpc;
* Upon exit the RPC expiry timer is not queued and the handler is not
* running on any CPU. */
static void
-srpc_del_client_rpc_timer (srpc_client_rpc_t *rpc)
+srpc_del_client_rpc_timer(srpc_client_rpc_t *rpc)
{
/* timer not planted or already exploded */
if (rpc->crpc_timeout == 0)
}
static void
-srpc_client_rpc_done (srpc_client_rpc_t *rpc, int status)
+srpc_client_rpc_done(srpc_client_rpc_t *rpc, int status)
{
swi_workitem_t *wi = &rpc->crpc_wi;
srpc_del_client_rpc_timer(rpc);
- CDEBUG_LIMIT ((status == 0) ? D_NET : D_NETERROR,
+ CDEBUG_LIMIT((status == 0) ? D_NET : D_NETERROR,
"Client RPC done: service %d, peer %s, status %s:%d:%d\n",
rpc->crpc_service, libcfs_id2str(rpc->crpc_dest),
swi_state2str(wi->swi_state), rpc->crpc_aborted, status);
* scheduling me.
* Cancel pending schedules and prevent future schedule attempts:
*/
- LASSERT (!srpc_event_pending(rpc));
+ LASSERT(!srpc_event_pending(rpc));
swi_exit_workitem(wi);
spin_unlock(&rpc->crpc_lock);
/* sends an outgoing RPC */
int
-srpc_send_rpc (swi_workitem_t *wi)
+srpc_send_rpc(swi_workitem_t *wi)
{
int rc = 0;
srpc_client_rpc_t *rpc;
rpc = wi->swi_workitem.wi_data;
- LASSERT (rpc != NULL);
- LASSERT (wi == &rpc->crpc_wi);
+ LASSERT(rpc != NULL);
+ LASSERT(wi == &rpc->crpc_wi);
reply = &rpc->crpc_replymsg;
do_bulk = rpc->crpc_bulk.bk_niov > 0;
switch (wi->swi_state) {
default:
- LBUG ();
+ LBUG();
case SWI_STATE_NEWBORN:
- LASSERT (!srpc_event_pending(rpc));
+ LASSERT(!srpc_event_pending(rpc));
rc = srpc_prepare_reply(rpc);
if (rc != 0) {
}
rc = srpc_prepare_bulk(rpc);
- if (rc != 0) break;
+ if (rc != 0)
+ break;
wi->swi_state = SWI_STATE_REQUEST_SUBMITTED;
rc = srpc_send_request(rpc);
/* CAVEAT EMPTOR: rqtev, rpyev, and bulkev may come in any
* order; however, they're processed in a strict order:
* rqt, rpy, and bulk. */
- if (!rpc->crpc_reqstev.ev_fired) break;
+ if (!rpc->crpc_reqstev.ev_fired)
+ break;
rc = rpc->crpc_reqstev.ev_status;
- if (rc != 0) break;
+ if (rc != 0)
+ break;
wi->swi_state = SWI_STATE_REQUEST_SENT;
/* perhaps more events, fall thru */
case SWI_STATE_REQUEST_SENT: {
srpc_msg_type_t type = srpc_service2reply(rpc->crpc_service);
- if (!rpc->crpc_replyev.ev_fired) break;
+ if (!rpc->crpc_replyev.ev_fired)
+ break;
rc = rpc->crpc_replyev.ev_status;
- if (rc != 0) break;
+ if (rc != 0)
+ break;
srpc_unpack_msg_hdr(reply);
if (reply->msg_type != type ||
wi->swi_state = SWI_STATE_REPLY_RECEIVED;
}
case SWI_STATE_REPLY_RECEIVED:
- if (do_bulk && !rpc->crpc_bulkev.ev_fired) break;
+ if (do_bulk && !rpc->crpc_bulkev.ev_fired)
+ break;
rc = do_bulk ? rpc->crpc_bulkev.ev_status : 0;
}
srpc_client_rpc_t *
-srpc_create_client_rpc (lnet_process_id_t peer, int service,
+srpc_create_client_rpc(lnet_process_id_t peer, int service,
int nbulkiov, int bulklen,
void (*rpc_done)(srpc_client_rpc_t *),
void (*rpc_fini)(srpc_client_rpc_t *), void *priv)
/* called with rpc->crpc_lock held */
void
-srpc_abort_rpc (srpc_client_rpc_t *rpc, int why)
+srpc_abort_rpc(srpc_client_rpc_t *rpc, int why)
{
- LASSERT (why != 0);
+ LASSERT(why != 0);
if (rpc->crpc_aborted || /* already aborted */
rpc->crpc_closed) /* callback imminent */
return;
- CDEBUG (D_NET,
+ CDEBUG(D_NET,
"Aborting RPC: service %d, peer %s, state %s, why %d\n",
rpc->crpc_service, libcfs_id2str(rpc->crpc_dest),
swi_state2str(rpc->crpc_wi.swi_state), why);
/* called with rpc->crpc_lock held */
void
-srpc_post_rpc (srpc_client_rpc_t *rpc)
+srpc_post_rpc(srpc_client_rpc_t *rpc)
{
- LASSERT (!rpc->crpc_aborted);
- LASSERT (srpc_data.rpc_state == SRPC_STATE_RUNNING);
+ LASSERT(!rpc->crpc_aborted);
+ LASSERT(srpc_data.rpc_state == SRPC_STATE_RUNNING);
- CDEBUG (D_NET, "Posting RPC: peer %s, service %d, timeout %d\n",
+ CDEBUG(D_NET, "Posting RPC: peer %s, service %d, timeout %d\n",
libcfs_id2str(rpc->crpc_dest), rpc->crpc_service,
rpc->crpc_timeout);
srpc_msg_t *msg;
srpc_msg_type_t type;
- LASSERT (!in_interrupt());
+ LASSERT(!in_interrupt());
if (ev->status != 0) {
spin_lock(&srpc_data.rpc_glock);
default:
CERROR("Unknown event: status %d, type %d, lnet %d\n",
rpcev->ev_status, rpcev->ev_type, rpcev->ev_lnet);
- LBUG ();
+ LBUG();
case SRPC_REQUEST_SENT:
if (ev->status == 0 && ev->type != LNET_EVENT_UNLINK) {
spin_lock(&srpc_data.rpc_glock);
&crpc->crpc_replyev, &crpc->crpc_bulkev);
CERROR("Bad event: status %d, type %d, lnet %d\n",
rpcev->ev_status, rpcev->ev_type, rpcev->ev_lnet);
- LBUG ();
+ LBUG();
}
spin_lock(&crpc->crpc_lock);
spin_lock(&scd->scd_lock);
- LASSERT (ev->unlinked);
- LASSERT (ev->type == LNET_EVENT_PUT ||
+ LASSERT(ev->unlinked);
+ LASSERT(ev->type == LNET_EVENT_PUT ||
ev->type == LNET_EVENT_UNLINK);
- LASSERT (ev->type != LNET_EVENT_UNLINK ||
+ LASSERT(ev->type != LNET_EVENT_UNLINK ||
sv->sv_shuttingdown);
buffer = container_of(ev->md.start, srpc_buffer_t, buf_msg);
break;
case SRPC_BULK_GET_RPLD:
- LASSERT (ev->type == LNET_EVENT_SEND ||
+ LASSERT(ev->type == LNET_EVENT_SEND ||
ev->type == LNET_EVENT_REPLY ||
ev->type == LNET_EVENT_UNLINK);
int
-srpc_startup (void)
+srpc_startup(void)
{
int rc;
rc = LNetNIInit(LUSTRE_SRV_LNET_PID);
if (rc < 0) {
- CERROR ("LNetNIInit() has failed: %d\n", rc);
+ CERROR("LNetNIInit() has failed: %d\n", rc);
return rc;
}
}
void
-srpc_shutdown (void)
+srpc_shutdown(void)
{
int i;
int rc;
switch (state) {
default:
- LBUG ();
+ LBUG();
case SRPC_STATE_RUNNING:
spin_lock(&srpc_data.rpc_glock);
for (i = 0; i <= SRPC_SERVICE_MAX_ID; i++) {
srpc_service_t *sv = srpc_data.rpc_services[i];
- LASSERTF (sv == NULL,
+ LASSERTF(sv == NULL,
"service not empty: id %d, name %s\n",
i, sv->sv_name);
}
case SRPC_STATE_EQ_INIT:
rc = LNetClearLazyPortal(SRPC_FRAMEWORK_REQUEST_PORTAL);
rc = LNetClearLazyPortal(SRPC_REQUEST_PORTAL);
- LASSERT (rc == 0);
+ LASSERT(rc == 0);
rc = LNetEQFree(srpc_data.rpc_lnet_eq);
- LASSERT (rc == 0); /* the EQ should have no user by now */
+ LASSERT(rc == 0); /* the EQ should have no user by now */
case SRPC_STATE_NI_INIT:
LNetNIFini();
lprocfs_fid_space_seq_show(struct seq_file *m, void *unused)
{
struct lu_client_seq *seq = (struct lu_client_seq *)m->private;
- int rc;
LASSERT(seq != NULL);
mutex_lock(&seq->lcs_mutex);
- rc = seq_printf(m, "[%#llx - %#llx]:%x:%s\n", PRANGE(&seq->lcs_space));
+ seq_printf(m, "[%#llx - %#llx]:%x:%s\n", PRANGE(&seq->lcs_space));
mutex_unlock(&seq->lcs_mutex);
- return rc;
+ return 0;
}
static ssize_t lprocfs_fid_width_seq_write(struct file *file,
lprocfs_fid_width_seq_show(struct seq_file *m, void *unused)
{
struct lu_client_seq *seq = (struct lu_client_seq *)m->private;
- int rc;
LASSERT(seq != NULL);
mutex_lock(&seq->lcs_mutex);
- rc = seq_printf(m, "%llu\n", seq->lcs_width);
+ seq_printf(m, "%llu\n", seq->lcs_width);
mutex_unlock(&seq->lcs_mutex);
- return rc;
+ return 0;
}
static int
lprocfs_fid_fid_seq_show(struct seq_file *m, void *unused)
{
struct lu_client_seq *seq = (struct lu_client_seq *)m->private;
- int rc;
LASSERT(seq != NULL);
mutex_lock(&seq->lcs_mutex);
- rc = seq_printf(m, DFID"\n", PFID(&seq->lcs_fid));
+ seq_printf(m, DFID "\n", PFID(&seq->lcs_fid));
mutex_unlock(&seq->lcs_mutex);
- return rc;
+ return 0;
}
static int
{
struct lu_client_seq *seq = (struct lu_client_seq *)m->private;
struct client_obd *cli;
- int rc;
LASSERT(seq != NULL);
if (seq->lcs_exp != NULL) {
cli = &seq->lcs_exp->exp_obd->u.cli;
- rc = seq_printf(m, "%s\n", cli->cl_target_uuid.uuid);
+ seq_printf(m, "%s\n", cli->cl_target_uuid.uuid);
} else {
- rc = seq_printf(m, "%s\n", seq->lcs_srv->lss_name);
+ seq_printf(m, "%s\n", seq->lcs_srv->lss_name);
}
- return rc;
+
+ return 0;
}
LPROC_SEQ_FOPS(lprocfs_fid_space);
int fld_client_rpc(struct obd_export *exp,
struct lu_seq_range *range, __u32 fld_op);
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
extern struct lprocfs_vars fld_client_proc_list[];
#endif
CERROR("%s: Attempt to add target %s (idx %llu) on fly - skip it\n",
fld->lcf_name, name, tar->ft_idx);
return 0;
- } else {
- CDEBUG(D_INFO, "%s: Adding target %s (idx %llu)\n",
- fld->lcf_name, name, tar->ft_idx);
}
+ CDEBUG(D_INFO, "%s: Adding target %s (idx %llu)\n",
+ fld->lcf_name, name, tar->ft_idx);
OBD_ALLOC_PTR(target);
if (target == NULL)
static struct proc_dir_entry *fld_type_proc_dir;
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
static int fld_client_proc_init(struct lu_client_fld *fld)
{
int rc;
void fld_client_proc_fini(struct lu_client_fld *fld)
{
- return;
}
#endif
EXPORT_SYMBOL(fld_client_proc_fini);
{ "targets", &fld_proc_targets_fops },
{ "hash", &fld_proc_hash_fops },
{ "cache_flush", &fld_proc_cache_flush_fops },
- { NULL }};
+ { NULL }
+};
} \
} while (0)
#define LPROCFS_CLIMP_EXIT(obd) \
- up_read(&(obd)->u.cli.cl_sem);
+ up_read(&(obd)->u.cli.cl_sem)
/* write the name##_seq_show function, call LPROC_SEQ_FOPS_RO for read-only
return lprocfs_wr_##type(file, buffer, \
count, seq->private); \
} \
- LPROC_SEQ_FOPS(name##_##type);
+ LPROC_SEQ_FOPS(name##_##type)
#define LPROC_SEQ_FOPS_WR_ONLY(name, type) \
static ssize_t name##_##type##_write(struct file *file, \
.open = name##_##type##_open, \
.write = name##_##type##_write, \
.release = lprocfs_single_release, \
- };
+ }
/* lproc_ptlrpc.c */
struct ptlrpc_request;
*/
typedef int (*lu_printer_t)(const struct lu_env *env,
void *cookie, const char *format, ...)
- __attribute__ ((format (printf, 3, 4)));
+ __printf(3, 4);
/**
* Operations specific for particular lu_object.
void _ldlm_lock_debug(struct ldlm_lock *lock,
struct libcfs_debug_msg_data *data,
const char *fmt, ...)
- __attribute__ ((format (printf, 3, 4)));
+ __printf(3, 4);
/**
* Rate-limited version of lock printing function.
void _debug_req(struct ptlrpc_request *req,
struct libcfs_debug_msg_data *data, const char *fmt, ...)
- __attribute__ ((format (printf, 3, 4)));
+ __printf(3, 4);
/**
* Helper that decides if we need to print request according to current debug
* --bug 17336 */
loff_t size = cl_isize_read(inode);
loff_t cur_index = start >> PAGE_CACHE_SHIFT;
- loff_t size_index = ((size - 1) >> PAGE_CACHE_SHIFT);
+ loff_t size_index = (size - 1) >>
+ PAGE_CACHE_SHIFT;
if ((size == 0 && cur_index != 0) ||
size_index < cur_index)
return gen;
}
- gen = (fid_flatten(fid) >> 32);
+ gen = fid_flatten(fid) >> 32;
return gen;
}
LASSERT(mode != 0);
LASSERT(IS_PO2(mode));
- for (index = -1; mode; index++, mode >>= 1) ;
+ for (index = -1; mode; index++)
+ mode >>= 1;
LASSERT(index < LCK_MODE_NUM);
return index;
}
union ldlm_gl_desc *gl_desc; /* glimpse AST descriptor */
};
-typedef enum {
+enum ldlm_desc_ast_t {
LDLM_WORK_BL_AST,
LDLM_WORK_CP_AST,
LDLM_WORK_REVOKE_AST,
LDLM_WORK_GL_AST
-} ldlm_desc_ast_t;
+};
void ldlm_grant_lock(struct ldlm_lock *lock, struct list_head *work_list);
int ldlm_fill_lvb(struct ldlm_lock *lock, struct req_capsule *pill,
void ldlm_add_ast_work_item(struct ldlm_lock *lock, struct ldlm_lock *new,
struct list_head *work_list);
int ldlm_run_ast_work(struct ldlm_namespace *ns, struct list_head *rpc_list,
- ldlm_desc_ast_t ast_type);
+ enum ldlm_desc_ast_t ast_type);
int ldlm_work_gl_ast_lock(struct ptlrpc_request_set *rqset, void *opaq);
int ldlm_lock_remove_from_lru(struct ldlm_lock *lock);
int ldlm_lock_remove_from_lru_nolock(struct ldlm_lock *lock);
void ldlm_handle_bl_callback(struct ldlm_namespace *ns,
struct ldlm_lock_desc *ld, struct ldlm_lock *lock);
+extern struct kmem_cache *ldlm_resource_slab;
+
+/* ldlm_lockd.c & ldlm_lock.c */
+extern struct kmem_cache *ldlm_lock_slab;
/* ldlm_extent.c */
void ldlm_extent_add_lock(struct ldlm_resource *res, struct ldlm_lock *lock);
}
EXPORT_SYMBOL(ldlm_it2str);
-extern struct kmem_cache *ldlm_lock_slab;
-
void ldlm_register_intent(struct ldlm_namespace *ns, ldlm_res_policy arg)
{
* one.
*/
int ldlm_run_ast_work(struct ldlm_namespace *ns, struct list_head *rpc_list,
- ldlm_desc_ast_t ast_type)
+ enum ldlm_desc_ast_t ast_type)
{
struct ldlm_cb_set_arg *arg;
set_producer_func work_ast_lock;
module_param(ldlm_cpts, charp, 0444);
MODULE_PARM_DESC(ldlm_cpts, "CPU partitions ldlm threads should run on");
-extern struct kmem_cache *ldlm_resource_slab;
-extern struct kmem_cache *ldlm_lock_slab;
static struct mutex ldlm_ref_mutex;
static int ldlm_refcount;
if (lock->l_flags & LDLM_FL_CANCEL_ON_BLOCK)
lock->l_flags |= LDLM_FL_CANCEL;
- do_ast = (!lock->l_readers && !lock->l_writers);
+ do_ast = !lock->l_readers && !lock->l_writers;
unlock_res_and_lock(lock);
if (do_ast) {
" GP: %d\n",
grant_step, grant_plan);
}
- seq_printf(m, " GR: %d\n" " CR: %d\n" " GS: %d\n"
- " G: %d\n" " L: %d\n",
+ seq_printf(m, " GR: %d\n CR: %d\n GS: %d\n"
+ " G: %d\n L: %d\n",
grant_rate, cancel_rate, grant_speed,
granted, limit);
int do_ast;
lock->l_flags |= LDLM_FL_CBPENDING;
- do_ast = (!lock->l_readers && !lock->l_writers);
+ do_ast = !lock->l_readers && !lock->l_writers;
unlock_res_and_lock(lock);
if (do_ast) {
if (opaque != NULL && lock->l_ast_data != opaque) {
LDLM_ERROR(lock, "data %p doesn't match opaque %p",
lock->l_ast_data, opaque);
- //LBUG();
continue;
}
libcfs-linux-objs := linux-tracefile.o linux-debug.o
libcfs-linux-objs += linux-prim.o linux-cpu.o
libcfs-linux-objs += linux-tcpip.o
-libcfs-linux-objs += linux-proc.o linux-curproc.o
+libcfs-linux-objs += linux-curproc.o
libcfs-linux-objs += linux-module.o
libcfs-linux-objs += linux-crypto.o
libcfs-linux-objs += linux-crypto-adler.o
if (max > cfs_trace_max_debug_mb() || max < num_possible_cpus()) {
max = TCD_MAX_PAGES;
} else {
- max = (max / num_possible_cpus());
- max = max << (20 - PAGE_CACHE_SHIFT);
+ max = max / num_possible_cpus();
+ max <<= (20 - PAGE_CACHE_SHIFT);
}
rc = cfs_tracefile_init(max);
}
EXPORT_SYMBOL(cfs_hash_rehash_key);
-int cfs_hash_debug_header(struct seq_file *m)
+void cfs_hash_debug_header(struct seq_file *m)
{
- return seq_printf(m, "%-*s%6s%6s%6s%6s%6s%6s%6s%7s%8s%8s%8s%s\n",
- CFS_HASH_BIGNAME_LEN,
- "name", "cur", "min", "max", "theta", "t-min", "t-max",
- "flags", "rehash", "count", "maxdep", "maxdepb",
- " distribution");
+ seq_printf(m, "%-*s cur min max theta t-min t-max flags rehash count maxdep maxdepb distribution\n",
+ CFS_HASH_BIGNAME_LEN, "name");
}
EXPORT_SYMBOL(cfs_hash_debug_header);
CFS_HASH_RH_NBKT(hs) : CFS_HASH_NBKT(hs);
}
-int cfs_hash_debug_str(struct cfs_hash *hs, struct seq_file *m)
+void cfs_hash_debug_str(struct cfs_hash *hs, struct seq_file *m)
{
int dist[8] = { 0, };
int maxdep = -1;
seq_printf(m, "%d%c", dist[i], (i == 7) ? '\n' : '/');
cfs_hash_unlock(hs, 0);
-
- return 0;
}
EXPORT_SYMBOL(cfs_hash_debug_str);
}
tmp += rc;
- for_each_cpu_mask(j, *cptab->ctb_parts[i].cpt_cpumask) {
+ for_each_cpu(j, cptab->ctb_parts[i].cpt_cpumask) {
rc = snprintf(tmp, len, "%d ", j);
len -= rc;
if (len <= 0) {
LASSERT(cpt == CFS_CPT_ANY || (cpt >= 0 && cpt < cptab->ctb_nparts));
return cpt == CFS_CPT_ANY ?
- cpus_weight(*cptab->ctb_cpumask) :
- cpus_weight(*cptab->ctb_parts[cpt].cpt_cpumask);
+ cpumask_weight(cptab->ctb_cpumask) :
+ cpumask_weight(cptab->ctb_parts[cpt].cpt_cpumask);
}
EXPORT_SYMBOL(cfs_cpt_weight);
LASSERT(cpt == CFS_CPT_ANY || (cpt >= 0 && cpt < cptab->ctb_nparts));
return cpt == CFS_CPT_ANY ?
- any_online_cpu(*cptab->ctb_cpumask) != NR_CPUS :
- any_online_cpu(*cptab->ctb_parts[cpt].cpt_cpumask) != NR_CPUS;
+ cpumask_any_and(cptab->ctb_cpumask,
+ cpu_online_mask) < nr_cpu_ids :
+ cpumask_any_and(cptab->ctb_parts[cpt].cpt_cpumask,
+ cpu_online_mask) < nr_cpu_ids;
}
EXPORT_SYMBOL(cfs_cpt_online);
LASSERT(cpt >= 0 && cpt < cptab->ctb_nparts);
- if (cpu < 0 || cpu >= NR_CPUS || !cpu_online(cpu)) {
+ if (cpu < 0 || cpu >= nr_cpu_ids || !cpu_online(cpu)) {
CDEBUG(D_INFO, "CPU %d is invalid or it's offline\n", cpu);
return 0;
}
cptab->ctb_cpu2cpt[cpu] = cpt;
- LASSERT(!cpu_isset(cpu, *cptab->ctb_cpumask));
- LASSERT(!cpu_isset(cpu, *cptab->ctb_parts[cpt].cpt_cpumask));
+ LASSERT(!cpumask_test_cpu(cpu, cptab->ctb_cpumask));
+ LASSERT(!cpumask_test_cpu(cpu, cptab->ctb_parts[cpt].cpt_cpumask));
- cpu_set(cpu, *cptab->ctb_cpumask);
- cpu_set(cpu, *cptab->ctb_parts[cpt].cpt_cpumask);
+ cpumask_set_cpu(cpu, cptab->ctb_cpumask);
+ cpumask_set_cpu(cpu, cptab->ctb_parts[cpt].cpt_cpumask);
node = cpu_to_node(cpu);
LASSERT(cpt == CFS_CPT_ANY || (cpt >= 0 && cpt < cptab->ctb_nparts));
- if (cpu < 0 || cpu >= NR_CPUS) {
+ if (cpu < 0 || cpu >= nr_cpu_ids) {
CDEBUG(D_INFO, "Invalid CPU id %d\n", cpu);
return;
}
return;
}
- LASSERT(cpu_isset(cpu, *cptab->ctb_parts[cpt].cpt_cpumask));
- LASSERT(cpu_isset(cpu, *cptab->ctb_cpumask));
+ LASSERT(cpumask_test_cpu(cpu, cptab->ctb_parts[cpt].cpt_cpumask));
+ LASSERT(cpumask_test_cpu(cpu, cptab->ctb_cpumask));
- cpu_clear(cpu, *cptab->ctb_parts[cpt].cpt_cpumask);
- cpu_clear(cpu, *cptab->ctb_cpumask);
+ cpumask_clear_cpu(cpu, cptab->ctb_parts[cpt].cpt_cpumask);
+ cpumask_clear_cpu(cpu, cptab->ctb_cpumask);
cptab->ctb_cpu2cpt[cpu] = -1;
node = cpu_to_node(cpu);
LASSERT(node_isset(node, *cptab->ctb_parts[cpt].cpt_nodemask));
LASSERT(node_isset(node, *cptab->ctb_nodemask));
- for_each_cpu_mask(i, *cptab->ctb_parts[cpt].cpt_cpumask) {
+ for_each_cpu(i, cptab->ctb_parts[cpt].cpt_cpumask) {
/* this CPT has other CPU belonging to this node? */
if (cpu_to_node(i) == node)
break;
}
- if (i == NR_CPUS)
+ if (i >= nr_cpu_ids)
node_clear(node, *cptab->ctb_parts[cpt].cpt_nodemask);
- for_each_cpu_mask(i, *cptab->ctb_cpumask) {
+ for_each_cpu(i, cptab->ctb_cpumask) {
/* this CPT-table has other CPU belonging to this node? */
if (cpu_to_node(i) == node)
break;
}
- if (i == NR_CPUS)
+ if (i >= nr_cpu_ids)
node_clear(node, *cptab->ctb_nodemask);
return;
{
int i;
- if (cpus_weight(*mask) == 0 || any_online_cpu(*mask) == NR_CPUS) {
+ if (cpumask_weight(mask) == 0 ||
+ cpumask_any_and(mask, cpu_online_mask) >= nr_cpu_ids) {
CDEBUG(D_INFO, "No online CPU is found in the CPU mask for CPU partition %d\n",
cpt);
return 0;
}
- for_each_cpu_mask(i, *mask) {
+ for_each_cpu(i, mask) {
if (!cfs_cpt_set_cpu(cptab, cpt, i))
return 0;
}
{
int i;
- for_each_cpu_mask(i, *mask)
+ for_each_cpu(i, mask)
cfs_cpt_unset_cpu(cptab, cpt, i);
}
EXPORT_SYMBOL(cfs_cpt_unset_cpumask);
}
for (; cpt <= last; cpt++) {
- for_each_cpu_mask(i, *cptab->ctb_parts[cpt].cpt_cpumask)
+ for_each_cpu(i, cptab->ctb_parts[cpt].cpt_cpumask)
cfs_cpt_unset_cpu(cptab, cpt, i);
}
}
int
cfs_cpt_of_cpu(struct cfs_cpt_table *cptab, int cpu)
{
- LASSERT(cpu >= 0 && cpu < NR_CPUS);
+ LASSERT(cpu >= 0 && cpu < nr_cpu_ids);
return cptab->ctb_cpu2cpt[cpu];
}
nodemask = cptab->ctb_parts[cpt].cpt_nodemask;
}
- if (any_online_cpu(*cpumask) == NR_CPUS) {
+ if (cpumask_any_and(cpumask, cpu_online_mask) >= nr_cpu_ids) {
CERROR("No online CPU found in CPU partition %d, did someone do CPU hotplug on system? You might need to reload Lustre modules to keep system working well.\n",
cpt);
return -EINVAL;
}
for_each_online_cpu(i) {
- if (cpu_isset(i, *cpumask))
+ if (cpumask_test_cpu(i, cpumask))
continue;
rc = set_cpus_allowed_ptr(current, cpumask);
LASSERT(number > 0);
- if (number >= cpus_weight(*node)) {
- while (!cpus_empty(*node)) {
- cpu = first_cpu(*node);
+ if (number >= cpumask_weight(node)) {
+ while (!cpumask_empty(node)) {
+ cpu = cpumask_first(node);
rc = cfs_cpt_set_cpu(cptab, cpt, cpu);
if (!rc)
return -EINVAL;
- cpu_clear(cpu, *node);
+ cpumask_clear_cpu(cpu, node);
}
return 0;
}
goto out;
}
- while (!cpus_empty(*node)) {
- cpu = first_cpu(*node);
+ while (!cpumask_empty(node)) {
+ cpu = cpumask_first(node);
/* get cpumask for cores in the same socket */
cfs_cpu_core_siblings(cpu, socket);
- cpus_and(*socket, *socket, *node);
+ cpumask_and(socket, socket, node);
- LASSERT(!cpus_empty(*socket));
+ LASSERT(!cpumask_empty(socket));
- while (!cpus_empty(*socket)) {
+ while (!cpumask_empty(socket)) {
int i;
/* get cpumask for hts in the same core */
cfs_cpu_ht_siblings(cpu, core);
- cpus_and(*core, *core, *node);
+ cpumask_and(core, core, node);
- LASSERT(!cpus_empty(*core));
+ LASSERT(!cpumask_empty(core));
- for_each_cpu_mask(i, *core) {
- cpu_clear(i, *socket);
- cpu_clear(i, *node);
+ for_each_cpu(i, core) {
+ cpumask_clear_cpu(i, socket);
+ cpumask_clear_cpu(i, node);
rc = cfs_cpt_set_cpu(cptab, cpt, i);
if (!rc) {
if (--number == 0)
goto out;
}
- cpu = first_cpu(*socket);
+ cpu = cpumask_first(socket);
}
}
for_each_online_node(i) {
cfs_node_to_cpumask(i, mask);
- while (!cpus_empty(*mask)) {
+ while (!cpumask_empty(mask)) {
struct cfs_cpu_partition *part;
int n;
part = &cptab->ctb_parts[cpt];
- n = num - cpus_weight(*part->cpt_cpumask);
+ n = num - cpumask_weight(part->cpt_cpumask);
LASSERT(n > 0);
rc = cfs_cpt_choose_ncpus(cptab, cpt, mask, n);
if (rc < 0)
goto failed;
- LASSERT(num >= cpus_weight(*part->cpt_cpumask));
- if (num == cpus_weight(*part->cpt_cpumask))
+ LASSERT(num >= cpumask_weight(part->cpt_cpumask));
+ if (num == cpumask_weight(part->cpt_cpumask))
cpt++;
}
}
if (cpt != ncpt ||
- num != cpus_weight(*cptab->ctb_parts[ncpt - 1].cpt_cpumask)) {
+ num != cpumask_weight(cptab->ctb_parts[ncpt - 1].cpt_cpumask)) {
CERROR("Expect %d(%d) CPU partitions but got %d(%d), CPU hotplug/unplug while setting?\n",
cptab->ctb_nparts, num, cpt,
- cpus_weight(*cptab->ctb_parts[ncpt - 1].cpt_cpumask));
+ cpumask_weight(cptab->ctb_parts[ncpt - 1].cpt_cpumask));
goto failed;
}
return NULL;
}
- high = node ? MAX_NUMNODES - 1 : NR_CPUS - 1;
+ high = node ? MAX_NUMNODES - 1 : nr_cpu_ids - 1;
cptab = cfs_cpt_table_alloc(ncpt);
if (cptab == NULL) {
mutex_lock(&cpt_data.cpt_mutex);
/* if all HTs in a core are offline, it may break affinity */
cfs_cpu_ht_siblings(cpu, cpt_data.cpt_cpumask);
- warn = any_online_cpu(*cpt_data.cpt_cpumask) >= nr_cpu_ids;
+ warn = cpumask_any_and(cpt_data.cpt_cpumask,
+ cpu_online_mask) >= nr_cpu_ids;
mutex_unlock(&cpt_data.cpt_mutex);
CDEBUG(warn ? D_WARNING : D_INFO,
"Lustre: can't support CPU plug-out well now, performance and stability could be impacted [CPU %u action: %lx]\n",
#include <linux/interrupt.h>
#include <linux/completion.h>
#include <linux/fs.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/miscdevice.h>
# define DEBUG_SUBSYSTEM S_LNET
#include "../../../include/linux/libcfs/libcfs.h"
#if defined(CONFIG_KGDB)
-#include <asm/kgdb.h>
+#include <linux/kgdb.h>
#endif
/**
void cfs_enter_debugger(void)
{
#if defined(CONFIG_KGDB)
-// BREAKPOINT();
+ /* BREAKPOINT(); */
#else
/* nothing */
#endif
}
+EXPORT_SYMBOL(cfs_enter_debugger);
sigset_t
return old;
}
+EXPORT_SYMBOL(cfs_block_allsigs);
sigset_t cfs_block_sigs(unsigned long sigs)
{
spin_unlock_irqrestore(¤t->sighand->siglock, flags);
return old;
}
+EXPORT_SYMBOL(cfs_block_sigs);
/* Block all signals except for the @sigs */
sigset_t cfs_block_sigsinv(unsigned long sigs)
return old;
}
+EXPORT_SYMBOL(cfs_block_sigsinv);
void
-cfs_restore_sigs (sigset_t old)
+cfs_restore_sigs(sigset_t old)
{
unsigned long flags;
recalc_sigpending();
spin_unlock_irqrestore(¤t->sighand->siglock, flags);
}
+EXPORT_SYMBOL(cfs_restore_sigs);
int
cfs_signal_pending(void)
{
return signal_pending(current);
}
+EXPORT_SYMBOL(cfs_signal_pending);
void
cfs_clear_sigpending(void)
clear_tsk_thread_flag(current, TIF_SIGPENDING);
spin_unlock_irqrestore(¤t->sighand->siglock, flags);
}
+EXPORT_SYMBOL(cfs_clear_sigpending);
int
libcfs_arch_init(void)
{
return 0;
}
+EXPORT_SYMBOL(libcfs_arch_init);
void
libcfs_arch_cleanup(void)
{
return;
}
-
-EXPORT_SYMBOL(libcfs_arch_init);
EXPORT_SYMBOL(libcfs_arch_cleanup);
-EXPORT_SYMBOL(cfs_enter_debugger);
-EXPORT_SYMBOL(cfs_block_allsigs);
-EXPORT_SYMBOL(cfs_block_sigs);
-EXPORT_SYMBOL(cfs_block_sigsinv);
-EXPORT_SYMBOL(cfs_restore_sigs);
-EXPORT_SYMBOL(cfs_signal_pending);
-EXPORT_SYMBOL(cfs_clear_sigpending);
+
+++ /dev/null
-/*
- * GPL HEADER START
- *
- * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 only,
- * as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- * General Public License version 2 for more details (a copy is included
- * in the LICENSE file that accompanied this code).
- *
- * You should have received a copy of the GNU General Public License
- * version 2 along with this program; If not, see
- * http://www.sun.com/software/products/lustre/docs/GPLv2.pdf
- *
- * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara,
- * CA 95054 USA or visit www.sun.com if you need additional information or
- * have any questions.
- *
- * GPL HEADER END
- */
-/*
- * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
- * Use is subject to license terms.
- *
- * Copyright (c) 2011, 2012, Intel Corporation.
- */
-/*
- * This file is part of Lustre, http://www.lustre.org/
- * Lustre is a trademark of Sun Microsystems, Inc.
- *
- * libcfs/libcfs/linux/linux-proc.c
- *
- * Author: Zach Brown <zab@zabbo.net>
- * Author: Peter J. Braam <braam@clusterfs.com>
- * Author: Phil Schwan <phil@clusterfs.com>
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/string.h>
-#include <linux/stat.h>
-#include <linux/errno.h>
-#include <linux/unistd.h>
-#include <net/sock.h>
-#include <linux/uio.h>
-
-#include <asm/uaccess.h>
-
-#include <linux/fs.h>
-#include <linux/file.h>
-#include <linux/list.h>
-
-#include <linux/proc_fs.h>
-#include <linux/sysctl.h>
-
-# define DEBUG_SUBSYSTEM S_LNET
-
-#include "../../../include/linux/libcfs/libcfs.h"
-#include <asm/div64.h>
-#include "../tracefile.h"
-
-static struct ctl_table_header *lnet_table_header = NULL;
-extern char lnet_upcall[1024];
-/**
- * The path of debug log dump upcall script.
- */
-extern char lnet_debug_log_upcall[1024];
-
-#define CTL_LNET (0x100)
-enum {
- PSDEV_DEBUG = 1, /* control debugging */
- PSDEV_SUBSYSTEM_DEBUG, /* control debugging */
- PSDEV_PRINTK, /* force all messages to console */
- PSDEV_CONSOLE_RATELIMIT, /* ratelimit console messages */
- PSDEV_CONSOLE_MAX_DELAY_CS, /* maximum delay over which we skip messages */
- PSDEV_CONSOLE_MIN_DELAY_CS, /* initial delay over which we skip messages */
- PSDEV_CONSOLE_BACKOFF, /* delay increase factor */
- PSDEV_DEBUG_PATH, /* crashdump log location */
- PSDEV_DEBUG_DUMP_PATH, /* crashdump tracelog location */
- PSDEV_CPT_TABLE, /* information about cpu partitions */
- PSDEV_LNET_UPCALL, /* User mode upcall script */
- PSDEV_LNET_MEMUSED, /* bytes currently PORTAL_ALLOCated */
- PSDEV_LNET_CATASTROPHE, /* if we have LBUGged or panic'd */
- PSDEV_LNET_PANIC_ON_LBUG, /* flag to panic on LBUG */
- PSDEV_LNET_DUMP_KERNEL, /* snapshot kernel debug buffer to file */
- PSDEV_LNET_DAEMON_FILE, /* spool kernel debug buffer to file */
- PSDEV_LNET_DEBUG_MB, /* size of debug buffer */
- PSDEV_LNET_DEBUG_LOG_UPCALL, /* debug log upcall script */
- PSDEV_LNET_WATCHDOG_RATELIMIT, /* ratelimit watchdog messages */
- PSDEV_LNET_FORCE_LBUG, /* hook to force an LBUG */
- PSDEV_LNET_FAIL_LOC, /* control test failures instrumentation */
- PSDEV_LNET_FAIL_VAL, /* userdata for fail loc */
-};
-
-static int proc_call_handler(void *data, int write, loff_t *ppos,
- void __user *buffer, size_t *lenp,
- int (*handler)(void *data, int write,
- loff_t pos, void __user *buffer, int len))
-{
- int rc = handler(data, write, *ppos, buffer, *lenp);
-
- if (rc < 0)
- return rc;
-
- if (write) {
- *ppos += *lenp;
- } else {
- *lenp = rc;
- *ppos += rc;
- }
- return 0;
-}
-
-static int __proc_dobitmasks(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- const int tmpstrlen = 512;
- char *tmpstr;
- int rc;
- unsigned int *mask = data;
- int is_subsys = (mask == &libcfs_subsystem_debug) ? 1 : 0;
- int is_printk = (mask == &libcfs_printk) ? 1 : 0;
-
- rc = cfs_trace_allocate_string_buffer(&tmpstr, tmpstrlen);
- if (rc < 0)
- return rc;
-
- if (!write) {
- libcfs_debug_mask2str(tmpstr, tmpstrlen, *mask, is_subsys);
- rc = strlen(tmpstr);
-
- if (pos >= rc) {
- rc = 0;
- } else {
- rc = cfs_trace_copyout_string(buffer, nob,
- tmpstr + pos, "\n");
- }
- } else {
- rc = cfs_trace_copyin_string(tmpstr, tmpstrlen, buffer, nob);
- if (rc < 0) {
- cfs_trace_free_string_buffer(tmpstr, tmpstrlen);
- return rc;
- }
-
- rc = libcfs_debug_str2mask(mask, tmpstr, is_subsys);
- /* Always print LBUG/LASSERT to console, so keep this mask */
- if (is_printk)
- *mask |= D_EMERG;
- }
-
- cfs_trace_free_string_buffer(tmpstr, tmpstrlen);
- return rc;
-}
-
-static int proc_dobitmasks(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_dobitmasks);
-}
-
-static int min_watchdog_ratelimit = 0; /* disable ratelimiting */
-static int max_watchdog_ratelimit = (24*60*60); /* limit to once per day */
-
-static int __proc_dump_kernel(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- if (!write)
- return 0;
-
- return cfs_trace_dump_debug_buffer_usrstr(buffer, nob);
-}
-
-static int proc_dump_kernel(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_dump_kernel);
-}
-
-static int __proc_daemon_file(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- if (!write) {
- int len = strlen(cfs_tracefile);
-
- if (pos >= len)
- return 0;
-
- return cfs_trace_copyout_string(buffer, nob,
- cfs_tracefile + pos, "\n");
- }
-
- return cfs_trace_daemon_command_usrstr(buffer, nob);
-}
-
-static int proc_daemon_file(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_daemon_file);
-}
-
-static int __proc_debug_mb(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- if (!write) {
- char tmpstr[32];
- int len = snprintf(tmpstr, sizeof(tmpstr), "%d",
- cfs_trace_get_debug_mb());
-
- if (pos >= len)
- return 0;
-
- return cfs_trace_copyout_string(buffer, nob, tmpstr + pos,
- "\n");
- }
-
- return cfs_trace_set_debug_mb_usrstr(buffer, nob);
-}
-
-static int proc_debug_mb(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_debug_mb);
-}
-
-static int proc_console_max_delay_cs(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp,
- loff_t *ppos)
-{
- int rc, max_delay_cs;
- struct ctl_table dummy = *table;
- long d;
-
- dummy.data = &max_delay_cs;
- dummy.proc_handler = &proc_dointvec;
-
- if (!write) { /* read */
- max_delay_cs = cfs_duration_sec(libcfs_console_max_delay * 100);
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- return rc;
- }
-
- /* write */
- max_delay_cs = 0;
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- if (rc < 0)
- return rc;
- if (max_delay_cs <= 0)
- return -EINVAL;
-
- d = cfs_time_seconds(max_delay_cs) / 100;
- if (d == 0 || d < libcfs_console_min_delay)
- return -EINVAL;
- libcfs_console_max_delay = d;
-
- return rc;
-}
-
-static int proc_console_min_delay_cs(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp,
- loff_t *ppos)
-{
- int rc, min_delay_cs;
- struct ctl_table dummy = *table;
- long d;
-
- dummy.data = &min_delay_cs;
- dummy.proc_handler = &proc_dointvec;
-
- if (!write) { /* read */
- min_delay_cs = cfs_duration_sec(libcfs_console_min_delay * 100);
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- return rc;
- }
-
- /* write */
- min_delay_cs = 0;
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- if (rc < 0)
- return rc;
- if (min_delay_cs <= 0)
- return -EINVAL;
-
- d = cfs_time_seconds(min_delay_cs) / 100;
- if (d == 0 || d > libcfs_console_max_delay)
- return -EINVAL;
- libcfs_console_min_delay = d;
-
- return rc;
-}
-
-static int proc_console_backoff(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- int rc, backoff;
- struct ctl_table dummy = *table;
-
- dummy.data = &backoff;
- dummy.proc_handler = &proc_dointvec;
-
- if (!write) { /* read */
- backoff= libcfs_console_backoff;
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- return rc;
- }
-
- /* write */
- backoff = 0;
- rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
- if (rc < 0)
- return rc;
- if (backoff <= 0)
- return -EINVAL;
-
- libcfs_console_backoff = backoff;
-
- return rc;
-}
-
-static int libcfs_force_lbug(struct ctl_table *table, int write,
- void __user *buffer,
- size_t *lenp, loff_t *ppos)
-{
- if (write)
- LBUG();
- return 0;
-}
-
-static int proc_fail_loc(struct ctl_table *table, int write,
- void __user *buffer,
- size_t *lenp, loff_t *ppos)
-{
- int rc;
- long old_fail_loc = cfs_fail_loc;
-
- rc = proc_doulongvec_minmax(table, write, buffer, lenp, ppos);
- if (old_fail_loc != cfs_fail_loc)
- wake_up(&cfs_race_waitq);
- return rc;
-}
-
-static int __proc_cpt_table(void *data, int write,
- loff_t pos, void __user *buffer, int nob)
-{
- char *buf = NULL;
- int len = 4096;
- int rc = 0;
-
- if (write)
- return -EPERM;
-
- LASSERT(cfs_cpt_table != NULL);
-
- while (1) {
- LIBCFS_ALLOC(buf, len);
- if (buf == NULL)
- return -ENOMEM;
-
- rc = cfs_cpt_table_print(cfs_cpt_table, buf, len);
- if (rc >= 0)
- break;
-
- if (rc == -EFBIG) {
- LIBCFS_FREE(buf, len);
- len <<= 1;
- continue;
- }
- goto out;
- }
-
- if (pos >= rc) {
- rc = 0;
- goto out;
- }
-
- rc = cfs_trace_copyout_string(buffer, nob, buf + pos, NULL);
- out:
- if (buf != NULL)
- LIBCFS_FREE(buf, len);
- return rc;
-}
-
-static int proc_cpt_table(struct ctl_table *table, int write,
- void __user *buffer, size_t *lenp, loff_t *ppos)
-{
- return proc_call_handler(table->data, write, ppos, buffer, lenp,
- __proc_cpt_table);
-}
-
-static struct ctl_table lnet_table[] = {
- /*
- * NB No .strategy entries have been provided since sysctl(8) prefers
- * to go via /proc for portability.
- */
- {
- .procname = "debug",
- .data = &libcfs_debug,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dobitmasks,
- },
- {
- .procname = "subsystem_debug",
- .data = &libcfs_subsystem_debug,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dobitmasks,
- },
- {
- .procname = "printk",
- .data = &libcfs_printk,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dobitmasks,
- },
- {
- .procname = "console_ratelimit",
- .data = &libcfs_console_ratelimit,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dointvec
- },
- {
- .procname = "console_max_delay_centisecs",
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_console_max_delay_cs
- },
- {
- .procname = "console_min_delay_centisecs",
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_console_min_delay_cs
- },
- {
- .procname = "console_backoff",
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_console_backoff
- },
-
- {
- .procname = "debug_path",
- .data = libcfs_debug_file_path_arr,
- .maxlen = sizeof(libcfs_debug_file_path_arr),
- .mode = 0644,
- .proc_handler = &proc_dostring,
- },
-
- {
- .procname = "cpu_partition_table",
- .maxlen = 128,
- .mode = 0444,
- .proc_handler = &proc_cpt_table,
- },
-
- {
- .procname = "upcall",
- .data = lnet_upcall,
- .maxlen = sizeof(lnet_upcall),
- .mode = 0644,
- .proc_handler = &proc_dostring,
- },
- {
- .procname = "debug_log_upcall",
- .data = lnet_debug_log_upcall,
- .maxlen = sizeof(lnet_debug_log_upcall),
- .mode = 0644,
- .proc_handler = &proc_dostring,
- },
- {
- .procname = "lnet_memused",
- .data = (int *)&libcfs_kmemory.counter,
- .maxlen = sizeof(int),
- .mode = 0444,
- .proc_handler = &proc_dointvec,
- },
- {
- .procname = "catastrophe",
- .data = &libcfs_catastrophe,
- .maxlen = sizeof(int),
- .mode = 0444,
- .proc_handler = &proc_dointvec,
- },
- {
- .procname = "panic_on_lbug",
- .data = &libcfs_panic_on_lbug,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dointvec,
- },
- {
- .procname = "dump_kernel",
- .maxlen = 256,
- .mode = 0200,
- .proc_handler = &proc_dump_kernel,
- },
- {
- .procname = "daemon_file",
- .mode = 0644,
- .maxlen = 256,
- .proc_handler = &proc_daemon_file,
- },
- {
- .procname = "debug_mb",
- .mode = 0644,
- .proc_handler = &proc_debug_mb,
- },
- {
- .procname = "watchdog_ratelimit",
- .data = &libcfs_watchdog_ratelimit,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dointvec_minmax,
- .extra1 = &min_watchdog_ratelimit,
- .extra2 = &max_watchdog_ratelimit,
- },
- {
- .procname = "force_lbug",
- .data = NULL,
- .maxlen = 0,
- .mode = 0200,
- .proc_handler = &libcfs_force_lbug
- },
- {
- .procname = "fail_loc",
- .data = &cfs_fail_loc,
- .maxlen = sizeof(cfs_fail_loc),
- .mode = 0644,
- .proc_handler = &proc_fail_loc
- },
- {
- .procname = "fail_val",
- .data = &cfs_fail_val,
- .maxlen = sizeof(int),
- .mode = 0644,
- .proc_handler = &proc_dointvec
- },
- {
- }
-};
-
-static struct ctl_table top_table[] = {
- {
- .procname = "lnet",
- .mode = 0555,
- .data = NULL,
- .maxlen = 0,
- .child = lnet_table,
- },
- {
- }
-};
-
-int insert_proc(void)
-{
- if (lnet_table_header == NULL)
- lnet_table_header = register_sysctl_table(top_table);
- return 0;
-}
-
-void remove_proc(void)
-{
- if (lnet_table_header != NULL)
- unregister_sysctl_table(lnet_table_header);
-
- lnet_table_header = NULL;
-}
newsock->ops = sock->ops;
- set_current_state(TASK_INTERRUPTIBLE);
- add_wait_queue(sk_sleep(sock->sk), &wait);
-
rc = sock->ops->accept(sock, newsock, O_NONBLOCK);
if (rc == -EAGAIN) {
/* Nothing ready, so wait for activity */
+ set_current_state(TASK_INTERRUPTIBLE);
+ add_wait_queue(sk_sleep(sock->sk), &wait);
schedule();
+ remove_wait_queue(sk_sleep(sock->sk), &wait);
+ set_current_state(TASK_RUNNING);
rc = sock->ops->accept(sock, newsock, O_NONBLOCK);
}
- remove_wait_queue(sk_sleep(sock->sk), &wait);
- set_current_state(TASK_RUNNING);
-
if (rc != 0)
goto failed;
* This file is part of Lustre, http://www.lustre.org/
* Lustre is a trademark of Sun Microsystems, Inc.
*/
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/string.h>
+#include <linux/stat.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <net/sock.h>
+#include <linux/uio.h>
-#define DEBUG_SUBSYSTEM S_LNET
+#include <linux/uaccess.h>
+
+#include <linux/fs.h>
+#include <linux/file.h>
+#include <linux/list.h>
+
+#include <linux/proc_fs.h>
+#include <linux/sysctl.h>
+
+# define DEBUG_SUBSYSTEM S_LNET
#include "../../include/linux/libcfs/libcfs.h"
+#include <asm/div64.h>
+
#include "../../include/linux/libcfs/libcfs_crypto.h"
#include "../../include/linux/lnet/lib-lnet.h"
#include "../../include/linux/lnet/lnet.h"
#include "tracefile.h"
+MODULE_AUTHOR("Peter J. Braam <braam@clusterfs.com>");
+MODULE_DESCRIPTION("Portals v3.1");
+MODULE_LICENSE("GPL");
+
+extern struct miscdevice libcfs_dev;
+extern struct rw_semaphore cfs_tracefile_sem;
+extern struct mutex cfs_trace_thread_mutex;
+extern struct cfs_wi_sched *cfs_sched_rehash;
+extern void libcfs_init_nidstrings(void);
+
+static int insert_proc(void);
+static void remove_proc(void);
+
+static struct ctl_table_header *lnet_table_header;
+extern char lnet_upcall[1024];
+/**
+ * The path of debug log dump upcall script.
+ */
+extern char lnet_debug_log_upcall[1024];
+
+#define CTL_LNET (0x100)
+
+enum {
+ PSDEV_DEBUG = 1, /* control debugging */
+ PSDEV_SUBSYSTEM_DEBUG, /* control debugging */
+ PSDEV_PRINTK, /* force all messages to console */
+ PSDEV_CONSOLE_RATELIMIT, /* ratelimit console messages */
+ PSDEV_CONSOLE_MAX_DELAY_CS, /* maximum delay over which we skip messages */
+ PSDEV_CONSOLE_MIN_DELAY_CS, /* initial delay over which we skip messages */
+ PSDEV_CONSOLE_BACKOFF, /* delay increase factor */
+ PSDEV_DEBUG_PATH, /* crashdump log location */
+ PSDEV_DEBUG_DUMP_PATH, /* crashdump tracelog location */
+ PSDEV_CPT_TABLE, /* information about cpu partitions */
+ PSDEV_LNET_UPCALL, /* User mode upcall script */
+ PSDEV_LNET_MEMUSED, /* bytes currently PORTAL_ALLOCated */
+ PSDEV_LNET_CATASTROPHE, /* if we have LBUGged or panic'd */
+ PSDEV_LNET_PANIC_ON_LBUG, /* flag to panic on LBUG */
+ PSDEV_LNET_DUMP_KERNEL, /* snapshot kernel debug buffer to file */
+ PSDEV_LNET_DAEMON_FILE, /* spool kernel debug buffer to file */
+ PSDEV_LNET_DEBUG_MB, /* size of debug buffer */
+ PSDEV_LNET_DEBUG_LOG_UPCALL, /* debug log upcall script */
+ PSDEV_LNET_WATCHDOG_RATELIMIT, /* ratelimit watchdog messages */
+ PSDEV_LNET_FORCE_LBUG, /* hook to force an LBUG */
+ PSDEV_LNET_FAIL_LOC, /* control test failures instrumentation */
+ PSDEV_LNET_FAIL_VAL, /* userdata for fail loc */
+};
+
static void kportal_memhog_free (struct libcfs_device_userstate *ldu)
{
struct page **level0p = &ldu->ldu_memhog_root_page;
libcfs_ioctl
};
-extern int insert_proc(void);
-extern void remove_proc(void);
-MODULE_AUTHOR("Peter J. Braam <braam@clusterfs.com>");
-MODULE_DESCRIPTION("Portals v3.1");
-MODULE_LICENSE("GPL");
-
-extern struct miscdevice libcfs_dev;
-extern struct rw_semaphore cfs_tracefile_sem;
-extern struct mutex cfs_trace_thread_mutex;
-extern struct cfs_wi_sched *cfs_sched_rehash;
-
-extern void libcfs_init_nidstrings(void);
-
static int init_libcfs_module(void)
{
int rc;
rc = libcfs_debug_init(5 * 1024 * 1024);
if (rc < 0) {
- printk(KERN_ERR "LustreError: libcfs_debug_init: %d\n", rc);
+ pr_err("LustreError: libcfs_debug_init: %d\n", rc);
return rc;
}
rc = libcfs_debug_cleanup();
if (rc)
- printk(KERN_ERR "LustreError: libcfs_debug_cleanup: %d\n",
- rc);
+ pr_err("LustreError: libcfs_debug_cleanup: %d\n", rc);
libcfs_arch_cleanup();
}
+static int proc_call_handler(void *data, int write, loff_t *ppos,
+ void __user *buffer, size_t *lenp,
+ int (*handler)(void *data, int write,
+ loff_t pos, void __user *buffer, int len))
+{
+ int rc = handler(data, write, *ppos, buffer, *lenp);
+
+ if (rc < 0)
+ return rc;
+
+ if (write) {
+ *ppos += *lenp;
+ } else {
+ *lenp = rc;
+ *ppos += rc;
+ }
+ return 0;
+}
+
+static int __proc_dobitmasks(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ const int tmpstrlen = 512;
+ char *tmpstr;
+ int rc;
+ unsigned int *mask = data;
+ int is_subsys = (mask == &libcfs_subsystem_debug) ? 1 : 0;
+ int is_printk = (mask == &libcfs_printk) ? 1 : 0;
+
+ rc = cfs_trace_allocate_string_buffer(&tmpstr, tmpstrlen);
+ if (rc < 0)
+ return rc;
+
+ if (!write) {
+ libcfs_debug_mask2str(tmpstr, tmpstrlen, *mask, is_subsys);
+ rc = strlen(tmpstr);
+
+ if (pos >= rc) {
+ rc = 0;
+ } else {
+ rc = cfs_trace_copyout_string(buffer, nob,
+ tmpstr + pos, "\n");
+ }
+ } else {
+ rc = cfs_trace_copyin_string(tmpstr, tmpstrlen, buffer, nob);
+ if (rc < 0) {
+ cfs_trace_free_string_buffer(tmpstr, tmpstrlen);
+ return rc;
+ }
+
+ rc = libcfs_debug_str2mask(mask, tmpstr, is_subsys);
+ /* Always print LBUG/LASSERT to console, so keep this mask */
+ if (is_printk)
+ *mask |= D_EMERG;
+ }
+
+ cfs_trace_free_string_buffer(tmpstr, tmpstrlen);
+ return rc;
+}
+
+static int proc_dobitmasks(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_dobitmasks);
+}
+
+static int min_watchdog_ratelimit; /* disable ratelimiting */
+static int max_watchdog_ratelimit = (24*60*60); /* limit to once per day */
+
+static int __proc_dump_kernel(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ if (!write)
+ return 0;
+
+ return cfs_trace_dump_debug_buffer_usrstr(buffer, nob);
+}
+
+static int proc_dump_kernel(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_dump_kernel);
+}
+
+static int __proc_daemon_file(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ if (!write) {
+ int len = strlen(cfs_tracefile);
+
+ if (pos >= len)
+ return 0;
+
+ return cfs_trace_copyout_string(buffer, nob,
+ cfs_tracefile + pos, "\n");
+ }
+
+ return cfs_trace_daemon_command_usrstr(buffer, nob);
+}
+
+static int proc_daemon_file(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_daemon_file);
+}
+
+static int __proc_debug_mb(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ if (!write) {
+ char tmpstr[32];
+ int len = snprintf(tmpstr, sizeof(tmpstr), "%d",
+ cfs_trace_get_debug_mb());
+
+ if (pos >= len)
+ return 0;
+
+ return cfs_trace_copyout_string(buffer, nob, tmpstr + pos,
+ "\n");
+ }
+
+ return cfs_trace_set_debug_mb_usrstr(buffer, nob);
+}
+
+static int proc_debug_mb(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_debug_mb);
+}
+
+static int proc_console_max_delay_cs(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp,
+ loff_t *ppos)
+{
+ int rc, max_delay_cs;
+ struct ctl_table dummy = *table;
+ long d;
+
+ dummy.data = &max_delay_cs;
+ dummy.proc_handler = &proc_dointvec;
+
+ if (!write) { /* read */
+ max_delay_cs = cfs_duration_sec(libcfs_console_max_delay * 100);
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ return rc;
+ }
+
+ /* write */
+ max_delay_cs = 0;
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ if (rc < 0)
+ return rc;
+ if (max_delay_cs <= 0)
+ return -EINVAL;
+
+ d = cfs_time_seconds(max_delay_cs) / 100;
+ if (d == 0 || d < libcfs_console_min_delay)
+ return -EINVAL;
+ libcfs_console_max_delay = d;
+
+ return rc;
+}
+
+static int proc_console_min_delay_cs(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp,
+ loff_t *ppos)
+{
+ int rc, min_delay_cs;
+ struct ctl_table dummy = *table;
+ long d;
+
+ dummy.data = &min_delay_cs;
+ dummy.proc_handler = &proc_dointvec;
+
+ if (!write) { /* read */
+ min_delay_cs = cfs_duration_sec(libcfs_console_min_delay * 100);
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ return rc;
+ }
+
+ /* write */
+ min_delay_cs = 0;
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ if (rc < 0)
+ return rc;
+ if (min_delay_cs <= 0)
+ return -EINVAL;
+
+ d = cfs_time_seconds(min_delay_cs) / 100;
+ if (d == 0 || d > libcfs_console_max_delay)
+ return -EINVAL;
+ libcfs_console_min_delay = d;
+
+ return rc;
+}
+
+static int proc_console_backoff(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ int rc, backoff;
+ struct ctl_table dummy = *table;
+
+ dummy.data = &backoff;
+ dummy.proc_handler = &proc_dointvec;
+
+ if (!write) { /* read */
+ backoff = libcfs_console_backoff;
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ return rc;
+ }
+
+ /* write */
+ backoff = 0;
+ rc = proc_dointvec(&dummy, write, buffer, lenp, ppos);
+ if (rc < 0)
+ return rc;
+ if (backoff <= 0)
+ return -EINVAL;
+
+ libcfs_console_backoff = backoff;
+
+ return rc;
+}
+
+static int libcfs_force_lbug(struct ctl_table *table, int write,
+ void __user *buffer,
+ size_t *lenp, loff_t *ppos)
+{
+ if (write)
+ LBUG();
+ return 0;
+}
+
+static int proc_fail_loc(struct ctl_table *table, int write,
+ void __user *buffer,
+ size_t *lenp, loff_t *ppos)
+{
+ int rc;
+ long old_fail_loc = cfs_fail_loc;
+
+ rc = proc_doulongvec_minmax(table, write, buffer, lenp, ppos);
+ if (old_fail_loc != cfs_fail_loc)
+ wake_up(&cfs_race_waitq);
+ return rc;
+}
+
+static int __proc_cpt_table(void *data, int write,
+ loff_t pos, void __user *buffer, int nob)
+{
+ char *buf = NULL;
+ int len = 4096;
+ int rc = 0;
+
+ if (write)
+ return -EPERM;
+
+ LASSERT(cfs_cpt_table != NULL);
+
+ while (1) {
+ LIBCFS_ALLOC(buf, len);
+ if (buf == NULL)
+ return -ENOMEM;
+
+ rc = cfs_cpt_table_print(cfs_cpt_table, buf, len);
+ if (rc >= 0)
+ break;
+
+ if (rc == -EFBIG) {
+ LIBCFS_FREE(buf, len);
+ len <<= 1;
+ continue;
+ }
+ goto out;
+ }
+
+ if (pos >= rc) {
+ rc = 0;
+ goto out;
+ }
+
+ rc = cfs_trace_copyout_string(buffer, nob, buf + pos, NULL);
+ out:
+ if (buf != NULL)
+ LIBCFS_FREE(buf, len);
+ return rc;
+}
+
+static int proc_cpt_table(struct ctl_table *table, int write,
+ void __user *buffer, size_t *lenp, loff_t *ppos)
+{
+ return proc_call_handler(table->data, write, ppos, buffer, lenp,
+ __proc_cpt_table);
+}
+
+static struct ctl_table lnet_table[] = {
+ /*
+ * NB No .strategy entries have been provided since sysctl(8) prefers
+ * to go via /proc for portability.
+ */
+ {
+ .procname = "debug",
+ .data = &libcfs_debug,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dobitmasks,
+ },
+ {
+ .procname = "subsystem_debug",
+ .data = &libcfs_subsystem_debug,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dobitmasks,
+ },
+ {
+ .procname = "printk",
+ .data = &libcfs_printk,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dobitmasks,
+ },
+ {
+ .procname = "console_ratelimit",
+ .data = &libcfs_console_ratelimit,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec
+ },
+ {
+ .procname = "console_max_delay_centisecs",
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_console_max_delay_cs
+ },
+ {
+ .procname = "console_min_delay_centisecs",
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_console_min_delay_cs
+ },
+ {
+ .procname = "console_backoff",
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_console_backoff
+ },
+
+ {
+ .procname = "debug_path",
+ .data = libcfs_debug_file_path_arr,
+ .maxlen = sizeof(libcfs_debug_file_path_arr),
+ .mode = 0644,
+ .proc_handler = &proc_dostring,
+ },
+
+ {
+ .procname = "cpu_partition_table",
+ .maxlen = 128,
+ .mode = 0444,
+ .proc_handler = &proc_cpt_table,
+ },
+
+ {
+ .procname = "upcall",
+ .data = lnet_upcall,
+ .maxlen = sizeof(lnet_upcall),
+ .mode = 0644,
+ .proc_handler = &proc_dostring,
+ },
+ {
+ .procname = "debug_log_upcall",
+ .data = lnet_debug_log_upcall,
+ .maxlen = sizeof(lnet_debug_log_upcall),
+ .mode = 0644,
+ .proc_handler = &proc_dostring,
+ },
+ {
+ .procname = "lnet_memused",
+ .data = (int *)&libcfs_kmemory.counter,
+ .maxlen = sizeof(int),
+ .mode = 0444,
+ .proc_handler = &proc_dointvec,
+ },
+ {
+ .procname = "catastrophe",
+ .data = &libcfs_catastrophe,
+ .maxlen = sizeof(int),
+ .mode = 0444,
+ .proc_handler = &proc_dointvec,
+ },
+ {
+ .procname = "panic_on_lbug",
+ .data = &libcfs_panic_on_lbug,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec,
+ },
+ {
+ .procname = "dump_kernel",
+ .maxlen = 256,
+ .mode = 0200,
+ .proc_handler = &proc_dump_kernel,
+ },
+ {
+ .procname = "daemon_file",
+ .mode = 0644,
+ .maxlen = 256,
+ .proc_handler = &proc_daemon_file,
+ },
+ {
+ .procname = "debug_mb",
+ .mode = 0644,
+ .proc_handler = &proc_debug_mb,
+ },
+ {
+ .procname = "watchdog_ratelimit",
+ .data = &libcfs_watchdog_ratelimit,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec_minmax,
+ .extra1 = &min_watchdog_ratelimit,
+ .extra2 = &max_watchdog_ratelimit,
+ },
+ {
+ .procname = "force_lbug",
+ .data = NULL,
+ .maxlen = 0,
+ .mode = 0200,
+ .proc_handler = &libcfs_force_lbug
+ },
+ {
+ .procname = "fail_loc",
+ .data = &cfs_fail_loc,
+ .maxlen = sizeof(cfs_fail_loc),
+ .mode = 0644,
+ .proc_handler = &proc_fail_loc
+ },
+ {
+ .procname = "fail_val",
+ .data = &cfs_fail_val,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec
+ },
+ {
+ }
+};
+
+static struct ctl_table top_table[] = {
+ {
+ .procname = "lnet",
+ .mode = 0555,
+ .data = NULL,
+ .maxlen = 0,
+ .child = lnet_table,
+ },
+ {
+ }
+};
+
+static int insert_proc(void)
+{
+ if (lnet_table_header == NULL)
+ lnet_table_header = register_sysctl_table(top_table);
+ return 0;
+}
+
+static void remove_proc(void)
+{
+ if (lnet_table_header != NULL)
+ unregister_sysctl_table(lnet_table_header);
+
+ lnet_table_header = NULL;
+}
+
MODULE_VERSION("1.0.0");
+
module_init(init_libcfs_module);
module_exit(exit_libcfs_module);
long long cfs_tracefile_size = CFS_TRACEFILE_SIZE;
static struct tracefiled_ctl trace_tctl;
struct mutex cfs_trace_thread_mutex;
-static int thread_running = 0;
+static int thread_running;
static atomic_t cfs_tage_allocated = ATOMIC_INIT(0);
*/
if (len > PAGE_CACHE_SIZE) {
- printk(KERN_ERR
- "cowardly refusing to write %lu bytes in a page\n", len);
+ pr_err("cowardly refusing to write %lu bytes in a page\n", len);
return NULL;
}
if (IS_ERR(filp)) {
rc = PTR_ERR(filp);
filp = NULL;
- printk(KERN_ERR "LustreError: can't open %s for dump: rc %d\n",
- filename, rc);
+ pr_err("LustreError: can't open %s for dump: rc %d\n",
+ filename, rc);
goto out;
}
MMSPACE_CLOSE;
rc = vfs_fsync(filp, 1);
if (rc)
- printk(KERN_ERR "sync returns %d\n", rc);
+ pr_err("sync returns %d\n", rc);
close:
filp_close(filp, NULL);
out:
int i;
printk(KERN_ALERT "Lustre: trace pages aren't empty\n");
- printk(KERN_ERR "total cpus(%d): ",
- num_possible_cpus());
+ pr_err("total cpus(%d): ",
+ num_possible_cpus());
for (i = 0; i < num_possible_cpus(); i++)
if (cpu_online(i))
- printk(KERN_ERR "%d(on) ", i);
+ pr_cont("%d(on) ", i);
else
- printk(KERN_ERR "%d(off) ", i);
- printk(KERN_ERR "\n");
+ pr_cont("%d(off) ", i);
+ pr_cont("\n");
i = 0;
list_for_each_entry_safe(tage, tmp, &pc.pc_pages,
linkage)
- printk(KERN_ERR "page %d belongs to cpu %d\n",
- ++i, tage->cpu);
- printk(KERN_ERR "There are %d pages unwritten\n",
- i);
+ pr_err("page %d belongs to cpu %d\n",
+ ++i, tage->cpu);
+ pr_err("There are %d pages unwritten\n", i);
}
__LASSERT(list_empty(&pc.pc_pages));
end_loop:
}
void
-cfs_wi_shutdown (void)
+cfs_wi_shutdown(void)
{
struct cfs_wi_sched *sched;
rc = md_find_cbdata(sbi->ll_md_exp, ll_inode2fid(inode),
return_if_equal, NULL);
if (rc != 0)
- return rc;
+ return rc;
lsm = ccc_inode_lsm_get(inode);
if (lsm == NULL)
*/
static int ll_revalidate_nd(struct dentry *dentry, unsigned int flags)
{
- int rc;
-
CDEBUG(D_VFSTRACE, "VFS Op:name=%pd, flags=%u\n",
dentry, flags);
- rc = ll_revalidate_dentry(dentry, flags);
- return rc;
+ return ll_revalidate_dentry(dentry, flags);
}
#include <linux/fs.h>
#include <linux/pagemap.h>
#include <linux/mm.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/buffer_head.h> /* for wait_on_buffer */
#include <linux/pagevec.h>
#include <linux/prefetch.h>
lump = (struct lov_user_md *)arg;
} else {
struct lov_user_mds_data *lmdp;
+
lmdp = (struct lov_user_mds_data *)arg;
lump = &lmdp->lmd_lmm;
}
mutex_lock(&inode->i_mutex);
switch (origin) {
- case SEEK_SET:
- break;
- case SEEK_CUR:
- offset += file->f_pos;
- break;
- case SEEK_END:
- if (offset > 0)
- goto out;
- if (api32)
- offset += LL_DIR_END_OFF_32BIT;
- else
- offset += LL_DIR_END_OFF;
- break;
- default:
+ case SEEK_SET:
+ break;
+ case SEEK_CUR:
+ offset += file->f_pos;
+ break;
+ case SEEK_END:
+ if (offset > 0)
goto out;
+ if (api32)
+ offset += LL_DIR_END_OFF_32BIT;
+ else
+ offset += LL_DIR_END_OFF;
+ break;
+ default:
+ goto out;
}
if (offset >= 0 &&
op_data->op_lease_handle = och->och_lease_handle;
op_data->op_attr.ia_valid |= ATTR_SIZE | ATTR_BLOCKS;
}
- epoch_close = (op_data->op_flags & MF_EPOCH_CLOSE);
+ epoch_close = op_data->op_flags & MF_EPOCH_CLOSE;
rc = md_close(md_exp, op_data, och->och_mod, &req);
if (rc == -EAGAIN) {
/* This close must have the epoch closed. */
}
if (rc == 0 && op_data->op_bias & MDS_HSM_RELEASE) {
struct mdt_body *body;
+
body = req_capsule_server_get(&req->rq_pill, &RMF_MDT_BODY);
if (!(body->valid & OBD_MD_FLRELEASED))
rc = -EBUSY;
int lockmode;
__u64 flags = LDLM_FL_BLOCK_GRANTED | LDLM_FL_TEST_LOCK;
struct lustre_handle lockh;
- ldlm_policy_data_t policy = {.l_inodebits={MDS_INODELOCK_OPEN}};
+ ldlm_policy_data_t policy = {.l_inodebits = {MDS_INODELOCK_OPEN}};
int rc = 0;
/* clear group lock, if present */
out_och_free:
if (rc) {
if (och_p && *och_p) {
- OBD_FREE(*och_p, sizeof (struct obd_client_handle));
+ OBD_FREE(*och_p, sizeof(struct obd_client_handle));
*och_p = NULL; /* OBD_FREE writes some magic there */
(*och_usecount)--;
}
int i;
if (!inode)
- return 0;
+ return 0;
fid = &ll_i2info(inode)->lli_fid;
CDEBUG(D_INFO, "trying to match res "DFID" mode %s\n", PFID(fid),
return in_data;
}
+EXPORT_SYMBOL(ll_iocontrol_register);
void ll_iocontrol_unregister(void *magic)
{
CWARN("didn't find iocontrol register block with magic: %p\n", magic);
}
-
-EXPORT_SYMBOL(ll_iocontrol_register);
EXPORT_SYMBOL(ll_iocontrol_unregister);
static enum llioc_iter
LASSERT(exp_connect_som(ll_i2mdexp(inode)));
op_data = kzalloc(sizeof(*op_data), GFP_NOFS);
- if (!op_data) {
- CERROR("can't allocate op_data\n");
+ if (!op_data)
return;
- }
ll_prepare_done_writing(inode, op_data, &och);
/* If there is no @och, we do not do D_W yet. */
si_meminfo(&si);
pages = si.totalram - si.totalhigh;
- if (pages >> (20 - PAGE_CACHE_SHIFT) < 512) {
+ if (pages >> (20 - PAGE_CACHE_SHIFT) < 512)
lru_page_max = pages / 2;
- } else {
+ else
lru_page_max = (pages / 4) * 3;
- }
/* initialize lru data */
atomic_set(&sbi->ll_cache.ccc_users, 0);
rc = obd_get_info(NULL, sbi->ll_md_exp, sizeof(KEY_MAX_EASIZE),
KEY_MAX_EASIZE, &size, lmmsize, NULL);
if (rc)
- CERROR("Get max mdsize error rc %d \n", rc);
+ CERROR("Get max mdsize error rc %d\n", rc);
return rc;
}
CDEBUG(D_CONFIG, "Found profile %s: mdc=%s osc=%s\n", profilenm,
lprof->lp_md, lprof->lp_dt);
- dt = kzalloc(strlen(lprof->lp_dt) + instlen + 2, GFP_NOFS);
+ dt = kasprintf(GFP_NOFS, "%s-%p", lprof->lp_dt, cfg->cfg_instance);
if (!dt) {
err = -ENOMEM;
goto out_free;
}
- sprintf(dt, "%s-%p", lprof->lp_dt, cfg->cfg_instance);
- md = kzalloc(strlen(lprof->lp_md) + instlen + 2, GFP_NOFS);
+ md = kasprintf(GFP_NOFS, "%s-%p", lprof->lp_md, cfg->cfg_instance);
if (!md) {
err = -ENOMEM;
goto out_free;
}
- sprintf(md, "%s-%p", lprof->lp_md, cfg->cfg_instance);
/* connections, registrations, sb setup */
err = client_common_fill_super(sb, md, dt, mnt);
if (attr->ia_valid & (ATTR_SIZE |
ATTR_ATIME | ATTR_ATIME_SET |
- ATTR_MTIME | ATTR_MTIME_SET))
+ ATTR_MTIME | ATTR_MTIME_SET)) {
/* For truncate and utimes sending attributes to OSTs, setting
* mtime/atime to the past will be performed under PW [0:EOF]
* extent lock (new_size:EOF for truncate). It may seem
rc = ll_setattr_ost(inode, attr);
if (attr->ia_valid & ATTR_SIZE)
up_write(&lli->lli_trunc_sem);
+ }
out:
if (op_data) {
if (op_data->op_ioepoch) {
struct lov_stripe_md *lsm = md->lsm;
struct ll_sb_info *sbi = ll_i2sbi(inode);
- LASSERT ((lsm != NULL) == ((body->valid & OBD_MD_FLEASIZE) != 0));
+ LASSERT((lsm != NULL) == ((body->valid & OBD_MD_FLEASIZE) != 0));
if (lsm != NULL) {
if (!lli->lli_has_smd &&
!(sbi->ll_flags & LL_SBI_LAYOUT_LOCK))
ptr = strrchr(lustre_cfg_string(lcfg, 0), '-');
if (!ptr || !*(++ptr))
return -EINVAL;
- if (sscanf(ptr, "%lx", &x) != 1)
+ rc = kstrtoul(ptr, 16, &x);
+ if (rc != 0)
return -EINVAL;
sb = (void *)x;
/* This better be a real Lustre superblock! */
#include <linux/stat.h>
#include <linux/errno.h>
#include <linux/unistd.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/fs.h>
#include <linux/pagemap.h>
vio->u.fault.ft_vmpage = NULL;
vio->u.fault.fault.ft_vmf = vmf;
vio->u.fault.fault.ft_flags = 0;
- vio->u.fault.fault.ft_flags_valid = 0;
+ vio->u.fault.fault.ft_flags_valid = false;
result = cl_io_loop(env, io);
#include <linux/highmem.h>
#include <linux/gfp.h>
#include <linux/pagevec.h>
-
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include "../include/lustre_lib.h"
#include "../include/lustre_lite.h"
old_bio->bi_iter.bi_size);
spin_lock_irq(&lo->lo_lock);
- inactive = (lo->lo_state != LLOOP_BOUND);
+ inactive = lo->lo_state != LLOOP_BOUND;
spin_unlock_irq(&lo->lo_lock);
if (inactive)
goto err;
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%u\n", osfs.os_bsize);
+ seq_printf(m, "%u\n", osfs.os_bsize);
return rc;
}
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_kbytestotal);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_kbytesfree);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_kbytesavail);
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%llu\n", osfs.os_files);
+ seq_printf(m, "%llu\n", osfs.os_files);
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_filestotal);
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%llu\n", osfs.os_ffree);
+ seq_printf(m, "%llu\n", osfs.os_ffree);
+
return rc;
}
LPROC_SEQ_FOPS_RO(ll_filesfree);
static int ll_client_type_seq_show(struct seq_file *m, void *v)
{
struct ll_sb_info *sbi = ll_s2sbi((struct super_block *)m->private);
- int rc;
LASSERT(sbi != NULL);
if (sbi->ll_flags & LL_SBI_RMT_CLIENT)
- rc = seq_printf(m, "remote client\n");
+ seq_puts(m, "remote client\n");
else
- rc = seq_printf(m, "local client\n");
+ seq_puts(m, "local client\n");
- return rc;
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_client_type);
struct super_block *sb = (struct super_block *)m->private;
LASSERT(sb != NULL);
- return seq_printf(m, "%s\n", sb->s_type->name);
+ seq_printf(m, "%s\n", sb->s_type->name);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_fstype);
struct super_block *sb = (struct super_block *)m->private;
LASSERT(sb != NULL);
- return seq_printf(m, "%s\n", ll_s2sbi(sb)->ll_sb_uuid.uuid);
+ seq_printf(m, "%s\n", ll_s2sbi(sb)->ll_sb_uuid.uuid);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_sb_uuid);
max_cached_mb = cache->ccc_lru_max >> shift;
unused_mb = atomic_read(&cache->ccc_lru_left) >> shift;
- return seq_printf(m,
- "users: %d\n"
- "max_cached_mb: %d\n"
- "used_mb: %d\n"
- "unused_mb: %d\n"
- "reclaim_count: %u\n",
- atomic_read(&cache->ccc_users),
- max_cached_mb,
- max_cached_mb - unused_mb,
- unused_mb,
- cache->ccc_lru_shrinkers);
+ seq_printf(m,
+ "users: %d\n"
+ "max_cached_mb: %d\n"
+ "used_mb: %d\n"
+ "unused_mb: %d\n"
+ "reclaim_count: %u\n",
+ atomic_read(&cache->ccc_users),
+ max_cached_mb,
+ max_cached_mb - unused_mb,
+ unused_mb,
+ cache->ccc_lru_shrinkers);
+ return 0;
}
static ssize_t ll_max_cached_mb_seq_write(struct file *file,
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m, "%u\n", (sbi->ll_flags & LL_SBI_CHECKSUM) ? 1 : 0);
+ seq_printf(m, "%u\n", (sbi->ll_flags & LL_SBI_CHECKSUM) ? 1 : 0);
+ return 0;
}
static ssize_t ll_checksum_seq_write(struct file *file,
{
struct super_block *sb = m->private;
- return seq_printf(m, "%lu\n", ll_s2sbi(sb)->ll_max_rw_chunk);
+ seq_printf(m, "%lu\n", ll_s2sbi(sb)->ll_max_rw_chunk);
+ return 0;
}
static ssize_t ll_max_rw_chunk_seq_write(struct file *file,
{
struct super_block *sb = m->private;
- if (ll_s2sbi(sb)->ll_stats_track_type == type) {
- return seq_printf(m, "%d\n",
- ll_s2sbi(sb)->ll_stats_track_id);
+ if (ll_s2sbi(sb)->ll_stats_track_type == type)
+ seq_printf(m, "%d\n", ll_s2sbi(sb)->ll_stats_track_id);
+ else if (ll_s2sbi(sb)->ll_stats_track_type == STATS_TRACK_ALL)
+ seq_puts(m, "0 (all)\n");
+ else
+ seq_puts(m, "untracked\n");
- } else if (ll_s2sbi(sb)->ll_stats_track_type == STATS_TRACK_ALL) {
- return seq_printf(m, "0 (all)\n");
- } else {
- return seq_printf(m, "untracked\n");
- }
+ return 0;
}
static int ll_wr_track_id(const char __user *buffer, unsigned long count,
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m, "%u\n", sbi->ll_sa_max);
+ seq_printf(m, "%u\n", sbi->ll_sa_max);
+ return 0;
}
static ssize_t ll_statahead_max_seq_write(struct file *file,
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m, "%u\n",
- sbi->ll_flags & LL_SBI_AGL_ENABLED ? 1 : 0);
+ seq_printf(m, "%u\n", sbi->ll_flags & LL_SBI_AGL_ENABLED ? 1 : 0);
+ return 0;
}
static ssize_t ll_statahead_agl_seq_write(struct file *file,
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m,
- "statahead total: %u\n"
- "statahead wrong: %u\n"
- "agl total: %u\n",
- atomic_read(&sbi->ll_sa_total),
- atomic_read(&sbi->ll_sa_wrong),
- atomic_read(&sbi->ll_agl_total));
+ seq_printf(m,
+ "statahead total: %u\n"
+ "statahead wrong: %u\n"
+ "agl total: %u\n",
+ atomic_read(&sbi->ll_sa_total),
+ atomic_read(&sbi->ll_sa_wrong),
+ atomic_read(&sbi->ll_agl_total));
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_statahead_stats);
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- return seq_printf(m, "%u\n",
- (sbi->ll_flags & LL_SBI_LAZYSTATFS) ? 1 : 0);
+ seq_printf(m, "%u\n", sbi->ll_flags & LL_SBI_LAZYSTATFS ? 1 : 0);
+ return 0;
}
static ssize_t ll_lazystatfs_seq_write(struct file *file,
if (rc)
return rc;
- return seq_printf(m, "%u\n", ealen);
+ seq_printf(m, "%u\n", ealen);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_max_easize);
-static int ll_defult_easize_seq_show(struct seq_file *m, void *v)
+static int ll_default_easize_seq_show(struct seq_file *m, void *v)
{
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
if (rc)
return rc;
- return seq_printf(m, "%u\n", ealen);
+ seq_printf(m, "%u\n", ealen);
+ return 0;
}
-LPROC_SEQ_FOPS_RO(ll_defult_easize);
+LPROC_SEQ_FOPS_RO(ll_default_easize);
static int ll_max_cookiesize_seq_show(struct seq_file *m, void *v)
{
if (rc)
return rc;
- return seq_printf(m, "%u\n", cookielen);
+ seq_printf(m, "%u\n", cookielen);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ll_max_cookiesize);
-static int ll_defult_cookiesize_seq_show(struct seq_file *m, void *v)
+static int ll_default_cookiesize_seq_show(struct seq_file *m, void *v)
{
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
if (rc)
return rc;
- return seq_printf(m, "%u\n", cookielen);
+ seq_printf(m, "%u\n", cookielen);
+ return 0;
}
-LPROC_SEQ_FOPS_RO(ll_defult_cookiesize);
+LPROC_SEQ_FOPS_RO(ll_default_cookiesize);
static int ll_sbi_flags_seq_show(struct seq_file *m, void *v)
{
{
struct super_block *sb = m->private;
struct ll_sb_info *sbi = ll_s2sbi(sb);
- int rc;
- rc = seq_printf(m, "%u\n", sbi->ll_xattr_cache_enabled);
+ seq_printf(m, "%u\n", sbi->ll_xattr_cache_enabled);
- return rc;
+ return 0;
}
static ssize_t ll_xattr_cache_seq_write(struct file *file,
{ "statahead_stats", &ll_statahead_stats_fops, NULL, 0 },
{ "lazystatfs", &ll_lazystatfs_fops, NULL },
{ "max_easize", &ll_max_easize_fops, NULL, 0 },
- { "default_easize", &ll_defult_easize_fops, NULL, 0 },
+ { "default_easize", &ll_default_easize_fops, NULL, 0 },
{ "max_cookiesize", &ll_max_cookiesize_fops, NULL, 0 },
- { "default_cookiesize", &ll_defult_cookiesize_fops, NULL, 0 },
+ { "default_cookiesize", &ll_default_cookiesize_fops, NULL, 0 },
{ "sbi_flags", &ll_sbi_flags_fops, NULL, 0 },
{ "xattr_cache", &ll_xattr_cache_fops, NULL, 0 },
{ NULL }
lli->lli_fid = body->fid1;
if (unlikely(!(body->valid & OBD_MD_FLTYPE))) {
- CERROR("Can not initialize inode " DFID " without object type: valid = %#llx\n",
+ CERROR("Can not initialize inode " DFID
+ " without object type: valid = %#llx\n",
PFID(&lli->lli_fid), body->valid);
return -EINVAL;
}
long long lookup_flags = LOOKUP_OPEN;
int rc = 0;
- CDEBUG(D_VFSTRACE, "VFS Op:name=%pd,dir=%lu/%u(%p),file %p,open_flags %x,mode %x opened %d\n",
+ CDEBUG(D_VFSTRACE,
+ "VFS Op:name=%pd,dir=%lu/%u(%p),file %p,open_flags %x,mode %x opened %d\n",
dentry, dir->i_ino,
dir->i_generation, dir, file, open_flags, mode, *opened);
* Instead, ll_ddelete() and ll_d_iput() will update it based upon if there
* is any lock existing. They will recycle dentries and inodes based upon locks
* too. b=20433 */
-static int ll_unlink(struct inode * dir, struct dentry *dentry)
+static int ll_unlink(struct inode *dir, struct dentry *dentry)
{
struct ptlrpc_request *request = NULL;
struct md_op_data *op_data;
int rc;
+
CDEBUG(D_VFSTRACE, "VFS Op:name=%pd,dir=%lu/%u(%p)\n",
dentry, dir->i_ino, dir->i_generation, dir);
dentry, dir->i_ino, dir->i_generation, dir);
op_data = ll_prep_md_op_data(NULL, dir, NULL,
- dentry->d_name.name,
+ dentry->d_name.name,
dentry->d_name.len,
S_IFDIR, LUSTRE_OPC_ANY, NULL);
if (IS_ERR(op_data))
int err;
CDEBUG(D_VFSTRACE,
- "VFS Op:oldname=%pd,src_dir=%lu/%u(%p),newname=%pd,"
- "tgt_dir=%lu/%u(%p)\n", old_dentry,
- old_dir->i_ino, old_dir->i_generation, old_dir, new_dentry,
- new_dir->i_ino, new_dir->i_generation, new_dir);
+ "VFS Op:oldname=%pd,src_dir=%lu/%u(%p),newname=%pd,tgt_dir=%lu/%u(%p)\n",
+ old_dentry, old_dir->i_ino, old_dir->i_generation, old_dir,
+ new_dentry, new_dir->i_ino, new_dir->i_generation, new_dir);
op_data = ll_prep_md_op_data(NULL, old_dir, new_dir, NULL, 0, 0,
LUSTRE_OPC_ANY, NULL);
#include <linux/errno.h>
#include <linux/unistd.h>
#include <linux/writeback.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/fs.h>
#include <linux/pagemap.h>
/* Note: we only trim the RPC, instead of extending the RPC
* to the boundary, so to avoid reading too much pages during
* random reading. */
- rpc_boundary = ((end + 1) & (~(PTLRPC_MAX_BRW_PAGES - 1)));
+ rpc_boundary = (end + 1) & (~(PTLRPC_MAX_BRW_PAGES - 1));
if (rpc_boundary > 0)
rpc_boundary--;
#include <linux/stat.h>
#include <linux/errno.h>
#include <linux/unistd.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/migrate.h>
#include <linux/fs.h>
struct qstr se_qstr;
};
-static unsigned int sai_generation = 0;
+static unsigned int sai_generation;
static DEFINE_SPINLOCK(sai_generation_lock);
static inline int ll_sa_entry_unhashed(struct ll_sa_entry *entry)
struct ll_inode_info *lli = ll_i2info(dir);
struct ll_statahead_info *sai = NULL;
struct ll_sa_entry *entry;
+ __u64 handle = 0;
int wakeup;
if (it_disposition(it, DISP_LOOKUP_NEG))
rc = -ENOENT;
+ if (rc == 0) {
+ /* release ibits lock ASAP to avoid deadlock when statahead
+ * thread enqueues lock on parent in readdir and another
+ * process enqueues lock on child with parent lock held, eg.
+ * unlink. */
+ handle = it->d.lustre.it_lock_handle;
+ ll_intent_drop_lock(it);
+ }
+
spin_lock(&lli->lli_sa_lock);
/* stale entry */
if (unlikely(lli->lli_sai == NULL ||
* when statahead thread tries to enqueue lock on parent
* for readpage and other tries to enqueue lock on child
* with parent's lock held, for example: unlink. */
- entry->se_handle = it->d.lustre.it_lock_handle;
- ll_intent_drop_lock(it);
+ entry->se_handle = handle;
wakeup = sa_received_empty(sai);
list_add_tail(&entry->se_list,
&sai->sai_entries_received);
do_gettimeofday(&tv);
cfs_srand(tv.tv_sec ^ seed[0], tv.tv_usec ^ seed[1]);
-
- init_timer(&ll_capa_timer);
- ll_capa_timer.function = ll_capa_timer_callback;
+ setup_timer(&ll_capa_timer, ll_capa_timer_callback, 0);
rc = ll_capa_thread_start();
if (rc != 0)
goto out_proc;
{
.ckd_cache = &vvp_thread_kmem,
.ckd_name = "vvp_thread_kmem",
- .ckd_size = sizeof (struct vvp_thread_info),
+ .ckd_size = sizeof(struct vvp_thread_info),
},
{
.ckd_cache = &vvp_session_kmem,
.ckd_name = "vvp_session_kmem",
- .ckd_size = sizeof (struct vvp_session)
+ .ckd_size = sizeof(struct vvp_session)
},
{
.ckd_cache = NULL
struct lu_context_key *key, void *data)
{
struct vvp_thread_info *info = data;
+
OBD_SLAB_FREE_PTR(info, vvp_thread_kmem);
}
struct lu_context_key *key, void *data)
{
struct vvp_session *session = data;
+
OBD_SLAB_FREE_PTR(session, vvp_session_kmem);
}
id->vpi_index = pos & 0xffffffff;
id->vpi_depth = (pos >> PGC_DEPTH_SHIFT) & 0xf;
- id->vpi_bucket = ((unsigned long long)pos >> PGC_OBJ_SHIFT);
+ id->vpi_bucket = (unsigned long long)pos >> PGC_OBJ_SHIFT;
}
static loff_t vvp_pgcache_id_pack(struct vvp_pgcache_id *id)
xattr->xe_namelen);
goto err_name;
}
- xattr->xe_value = kzalloc(xattr_val_len, GFP_NOFS);
- if (!xattr->xe_value) {
- CDEBUG(D_CACHE, "failed to alloc xattr value %d\n",
- xattr_val_len);
+ xattr->xe_value = kmemdup(xattr_val, xattr_val_len, GFP_NOFS);
+ if (!xattr->xe_value)
goto err_value;
- }
- memcpy(xattr->xe_value, xattr_val, xattr_val_len);
xattr->xe_vallen = xattr_val_len;
list_add(&xattr->xe_list, cache);
#include <asm/div64.h>
#include <linux/seq_file.h>
#include <linux/namei.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include "../include/lustre/lustre_idl.h"
#include "../include/obd_support.h"
__u32 oldsize = 0;
while (newsize < index + 1)
- newsize = newsize << 1;
+ newsize <<= 1;
OBD_ALLOC(newtgts, sizeof(*newtgts) * newsize);
if (newtgts == NULL) {
lmv_init_unlock(lmv);
LASSERT(dev != NULL);
desc = &dev->u.lmv.desc;
- return seq_printf(m, "%u\n", desc->ld_tgt_count);
+ seq_printf(m, "%u\n", desc->ld_tgt_count);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lmv_numobd);
LASSERT(dev != NULL);
lmv = &dev->u.lmv;
- return seq_printf(m, "%s\n", placement_policy2name(lmv->lmv_placement));
+ seq_printf(m, "%s\n", placement_policy2name(lmv->lmv_placement));
+ return 0;
}
#define MAX_POLICY_STRING_SIZE 64
LASSERT(dev != NULL);
desc = &dev->u.lmv.desc;
- return seq_printf(m, "%u\n", desc->ld_active_tgt_count);
+ seq_printf(m, "%u\n", desc->ld_active_tgt_count);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lmv_activeobd);
LASSERT(dev != NULL);
lmv = &dev->u.lmv;
- return seq_printf(m, "%s\n", lmv->desc.ld_uuid.uuid);
+ seq_printf(m, "%s\n", lmv->desc.ld_uuid.uuid);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lmv_desc_uuid);
if (tgt == NULL)
return 0;
- return seq_printf(p, "%d: %s %sACTIVE\n", tgt->ltd_idx,
- tgt->ltd_uuid.uuid, tgt->ltd_active ? "" : "IN");
+ seq_printf(p, "%d: %s %sACTIVE\n",
+ tgt->ltd_idx, tgt->ltd_uuid.uuid,
+ tgt->ltd_active ? "" : "IN");
+ return 0;
}
static struct seq_operations lmv_tgt_sops = {
struct kmem_cache *lov_lock_link_kmem;
/** Lock class of lov_device::ld_mutex. */
-struct lock_class_key cl_lov_device_mutex_class;
+static struct lock_class_key cl_lov_device_mutex_class;
struct lu_kmem_descr lov_caches[] = {
{
return lsm_lmm_verify_common(lmm, lmm_bytes, *stripe_count);
}
-int lsm_unpackmd_v1(struct lov_obd *lov, struct lov_stripe_md *lsm,
- struct lov_mds_md_v1 *lmm)
+static int lsm_unpackmd_v1(struct lov_obd *lov, struct lov_stripe_md *lsm,
+ struct lov_mds_md_v1 *lmm)
{
struct lov_oinfo *loi;
int i;
*stripe_count);
}
-int lsm_unpackmd_v3(struct lov_obd *lov, struct lov_stripe_md *lsm,
- struct lov_mds_md *lmmv1)
+static int lsm_unpackmd_v3(struct lov_obd *lov, struct lov_stripe_md *lsm,
+ struct lov_mds_md *lmmv1)
{
struct lov_mds_md_v3 *lmm;
struct lov_oinfo *loi;
newsize = max_t(__u32, lov->lov_tgt_size, 2);
while (newsize < index + 1)
- newsize = newsize << 1;
+ newsize <<= 1;
OBD_ALLOC(newtgts, sizeof(*newtgts) * newsize);
if (newtgts == NULL) {
mutex_unlock(&lov->lov_lock);
* \param fm_end logical end of mapping
* \param start_stripe starting stripe will be returned in this
*/
-u64 fiemap_calc_fm_end_offset(struct ll_user_fiemap *fiemap,
- struct lov_stripe_md *lsm, u64 fm_start,
- u64 fm_end, int *start_stripe)
+static u64 fiemap_calc_fm_end_offset(struct ll_user_fiemap *fiemap,
+ struct lov_stripe_md *lsm, u64 fm_start,
+ u64 fm_end, int *start_stripe)
{
u64 local_end = fiemap->fm_extents[0].fe_logical;
u64 lun_start, lun_end;
*
* \retval last_stripe return the last stripe of the mapping
*/
-int fiemap_calc_last_stripe(struct lov_stripe_md *lsm, u64 fm_start,
- u64 fm_end, int start_stripe,
- int *stripe_count)
+static int fiemap_calc_last_stripe(struct lov_stripe_md *lsm, u64 fm_start,
+ u64 fm_end, int start_stripe,
+ int *stripe_count)
{
int last_stripe;
u64 obd_start, obd_end;
int i, j;
if (fm_end - fm_start > lsm->lsm_stripe_size * lsm->lsm_stripe_count) {
- last_stripe = (start_stripe < 1 ? lsm->lsm_stripe_count - 1 :
- start_stripe - 1);
+ last_stripe = start_stripe < 1 ? lsm->lsm_stripe_count - 1 :
+ start_stripe - 1;
*stripe_count = lsm->lsm_stripe_count;
} else {
for (j = 0, i = start_stripe; j < lsm->lsm_stripe_count;
* \param ext_count number of extents to be copied
* \param current_extent where to start copying in main extent array
*/
-void fiemap_prepare_and_copy_exts(struct ll_user_fiemap *fiemap,
- struct ll_fiemap_extent *lcl_fm_ext,
- int ost_index, unsigned int ext_count,
- int current_extent)
+static void fiemap_prepare_and_copy_exts(struct ll_user_fiemap *fiemap,
+ struct ll_fiemap_extent *lcl_fm_ext,
+ int ost_index, unsigned int ext_count,
+ int current_extent)
{
char *to;
int ext;
return rc;
}
-struct obd_ops lov_obd_ops = {
+static struct obd_ops lov_obd_ops = {
.o_owner = THIS_MODULE,
.o_setup = lov_setup,
.o_precleanup = lov_precleanup,
struct kmem_cache *lov_oinfo_slab;
-int __init lov_init(void)
+static int __init lov_init(void)
{
struct lprocfs_static_vars lvars = { NULL };
int rc;
/**
* Return lov_layout_type associated with a given lsm
*/
-enum lov_layout_type lov_type(struct lov_stripe_md *lsm)
+static enum lov_layout_type lov_type(struct lov_stripe_md *lsm)
{
if (lsm == NULL)
return LLT_EMPTY;
}
}
-void lov_pool_putref_locked(struct pool_desc *pool)
+static void lov_pool_putref_locked(struct pool_desc *pool)
{
CDEBUG(D_INFO, "pool %p\n", pool);
LASSERT(atomic_read(&pool->pool_refcount) > 1);
*/
#define DEBUG_SUBSYSTEM S_CLASS
-#include <asm/statfs.h>
+#include <linux/statfs.h>
#include "../include/lprocfs_status.h"
#include "../include/obd_class.h"
#include <linux/seq_file.h>
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%llu\n", desc->ld_default_stripe_size);
+ seq_printf(m, "%llu\n", desc->ld_default_stripe_size);
+ return 0;
}
static ssize_t lov_stripesize_seq_write(struct file *file,
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%llu\n", desc->ld_default_stripe_offset);
+ seq_printf(m, "%llu\n", desc->ld_default_stripe_offset);
+ return 0;
}
static ssize_t lov_stripeoffset_seq_write(struct file *file,
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%u\n", desc->ld_pattern);
+ seq_printf(m, "%u\n", desc->ld_pattern);
+ return 0;
}
static ssize_t lov_stripetype_seq_write(struct file *file,
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%d\n",
- (__s16)(desc->ld_default_stripe_count + 1) - 1);
+ seq_printf(m, "%d\n", (__s16)(desc->ld_default_stripe_count + 1) - 1);
+ return 0;
}
static ssize_t lov_stripecount_seq_write(struct file *file,
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%u\n", desc->ld_tgt_count);
+ seq_printf(m, "%u\n", desc->ld_tgt_count);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lov_numobd);
LASSERT(dev != NULL);
desc = &dev->u.lov.desc;
- return seq_printf(m, "%u\n", desc->ld_active_tgt_count);
+ seq_printf(m, "%u\n", desc->ld_active_tgt_count);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lov_activeobd);
LASSERT(dev != NULL);
lov = &dev->u.lov;
- return seq_printf(m, "%s\n", lov->desc.ld_uuid.uuid);
+ seq_printf(m, "%s\n", lov->desc.ld_uuid.uuid);
+ return 0;
}
LPROC_SEQ_FOPS_RO(lov_desc_uuid);
static int lov_tgt_seq_show(struct seq_file *p, void *v)
{
struct lov_tgt_desc *tgt = v;
- return seq_printf(p, "%d: %s %sACTIVE\n", tgt->ltd_index,
- obd_uuid2str(&tgt->ltd_uuid),
- tgt->ltd_active ? "" : "IN");
+
+ seq_printf(p, "%d: %s %sACTIVE\n",
+ tgt->ltd_index, obd_uuid2str(&tgt->ltd_uuid),
+ tgt->ltd_active ? "" : "IN");
+ return 0;
}
-struct seq_operations lov_tgt_sops = {
+static const struct seq_operations lov_tgt_sops = {
.start = lov_tgt_seq_start,
.stop = lov_tgt_seq_stop,
.next = lov_tgt_seq_next,
LPROC_SEQ_FOPS_RO_TYPE(lov, kbytesfree);
LPROC_SEQ_FOPS_RO_TYPE(lov, kbytesavail);
-struct lprocfs_vars lprocfs_lov_obd_vars[] = {
+static struct lprocfs_vars lprocfs_lov_obd_vars[] = {
{ "uuid", &lov_uuid_fops, NULL, 0 },
{ "stripesize", &lov_stripesize_fops, NULL },
{ "stripeoffset", &lov_stripeoffset_fops, NULL },
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%u\n", cli->cl_max_rpcs_in_flight);
+ seq_printf(m, "%u\n", cli->cl_max_rpcs_in_flight);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
static ssize_t mdc_max_rpcs_in_flight_seq_write(struct file *file,
static int __init mdc_init(void)
{
- int rc;
struct lprocfs_static_vars lvars = { NULL };
lprocfs_mdc_init_vars(&lvars);
- rc = class_register_type(&mdc_obd_ops, &mdc_md_ops, lvars.module_vars,
+ return class_register_type(&mdc_obd_ops, &mdc_md_ops, lvars.module_vars,
LUSTRE_MDC_NAME, NULL);
- return rc;
}
static void /*__exit*/ mdc_exit(void)
{
struct config_llog_data *cld;
struct config_llog_data *found = NULL;
- void * instance;
+ void *instance;
LASSERT(logname != NULL);
#define RQ_NOW 0x2
#define RQ_LATER 0x4
#define RQ_STOP 0x8
-static int rq_state = 0;
+static int rq_state;
static wait_queue_head_t rq_waitq;
static DECLARE_COMPLETION(rq_exit);
static int mgc_cleanup(struct obd_device *obd)
{
- int rc;
-
/* COMPAT_146 - old config logs may have added profiles we don't
know about */
if (obd->obd_type->typ_refcnt <= 1)
lprocfs_obd_cleanup(obd);
ptlrpcd_decref();
- rc = client_obd_cleanup(obd);
- return rc;
+ return client_obd_cleanup(obd);
}
static int mgc_setup(struct obd_device *obd, struct lustre_cfg *lcfg)
/* dt class init function. */
int dt_global_init(void)
{
- int result;
-
LU_CONTEXT_KEY_INIT(&dt_key);
- result = lu_context_key_register(&dt_key);
- return result;
+ return lu_context_key_register(&dt_key);
}
void dt_global_fini(void)
if (exp) {
int connected;
spin_lock(&exp->exp_lock);
- connected = (exp->exp_conn_cnt > 0);
+ connected = exp->exp_conn_cnt > 0;
spin_unlock(&exp->exp_lock);
return connected;
}
EXPORT_SYMBOL(obd_exports_barrier);
/* Total amount of zombies to be destroyed */
-static int zombies_count = 0;
+static int zombies_count;
/**
* kill zombie imports and exports
#if defined (CONFIG_PROC_FS)
int obd_proc_version_seq_show(struct seq_file *m, void *v)
{
- return seq_printf(m, "lustre: %s\nkernel: %s\nbuild: %s\n",
- LUSTRE_VERSION_STRING, "patchless_client",
- BUILD_VERSION);
+ seq_printf(m, "lustre: %s\nkernel: %s\nbuild: %s\n",
+ LUSTRE_VERSION_STRING, "patchless_client", BUILD_VERSION);
+ return 0;
}
LPROC_SEQ_FOPS_RO(obd_proc_version);
int obd_proc_pinger_seq_show(struct seq_file *m, void *v)
{
- return seq_printf(m, "%s\n", "on");
+ seq_printf(m, "%s\n", "on");
+ return 0;
}
LPROC_SEQ_FOPS_RO(obd_proc_pinger);
static int obd_proc_health_seq_show(struct seq_file *m, void *v)
{
- int rc = 0, i;
+ bool healthy = true;
+ int i;
if (libcfs_catastrophe)
seq_printf(m, "LBUG\n");
if (obd_health_check(NULL, obd)) {
seq_printf(m, "device %s reported unhealthy\n",
- obd->obd_name);
- rc++;
+ obd->obd_name);
+ healthy = false;
}
class_decref(obd, __func__, current);
read_lock(&obd_dev_lock);
}
read_unlock(&obd_dev_lock);
- if (rc == 0)
- return seq_printf(m, "healthy\n");
+ if (healthy)
+ seq_puts(m, "healthy\n");
+ else
+ seq_puts(m, "NOT HEALTHY\n");
- seq_printf(m, "NOT HEALTHY\n");
return 0;
}
LPROC_SEQ_FOPS_RO(obd_proc_health);
static int obd_proc_jobid_var_seq_show(struct seq_file *m, void *v)
{
- return seq_printf(m, "%s\n", obd_jobid_var);
+ seq_printf(m, "%s\n", obd_jobid_var);
+ return 0;
}
static ssize_t obd_proc_jobid_var_seq_write(struct file *file,
static int obd_proc_jobid_name_seq_show(struct seq_file *m, void *v)
{
- return seq_printf(m, "%s\n", obd_jobid_var);
+ seq_printf(m, "%s\n", obd_jobid_var);
+ return 0;
}
static ssize_t obd_proc_jobid_name_seq_write(struct file *file,
else
status = "--";
- return seq_printf(p, "%3d %s %s %s %s %d\n",
- (int)index, status, obd->obd_type->typ_name,
- obd->obd_name, obd->obd_uuid.uuid,
- atomic_read(&obd->obd_refcount));
+ seq_printf(p, "%3d %s %s %s %s %d\n",
+ (int)index, status, obd->obd_type->typ_name,
+ obd->obd_name, obd->obd_uuid.uuid,
+ atomic_read(&obd->obd_refcount));
+ return 0;
}
struct seq_operations obd_device_list_sops = {
};
+#ifdef CONFIG_SYSCTL
static int proc_set_timeout(struct ctl_table *table, int write,
void __user *buffer, size_t *lenp, loff_t *ppos)
{
CERROR("Refusing to set max dirty pages to %u, which is more than 90%% of available RAM; setting to %lu\n",
obd_max_dirty_pages,
((totalram_pages / 10) * 9));
- obd_max_dirty_pages = ((totalram_pages / 10) * 9);
+ obd_max_dirty_pages = (totalram_pages / 10) * 9;
} else if (obd_max_dirty_pages < 4 << (20 - PAGE_CACHE_SHIFT)) {
obd_max_dirty_pages = 4 << (20 - PAGE_CACHE_SHIFT);
}
return rc;
}
-#ifdef CONFIG_SYSCTL
static struct ctl_table obd_table[] = {
{
.procname = "timeout",
}
EXPORT_SYMBOL(llog_cat_cancel_records);
-int llog_cat_process_cb(const struct lu_env *env, struct llog_handle *cat_llh,
- struct llog_rec_hdr *rec, void *data)
+static int llog_cat_process_cb(const struct lu_env *env,
+ struct llog_handle *cat_llh,
+ struct llog_rec_hdr *rec, void *data)
{
struct llog_process_data *d = data;
struct llog_logid_rec *lir = (struct llog_logid_rec *)rec;
#if defined (CONFIG_PROC_FS)
-static int lprocfs_no_percpu_stats = 0;
+static int lprocfs_no_percpu_stats;
module_param(lprocfs_no_percpu_stats, int, 0644);
MODULE_PARM_DESC(lprocfs_no_percpu_stats, "Do not alloc percpu data for lprocfs stats");
/* Generic callbacks */
int lprocfs_rd_uint(struct seq_file *m, void *data)
{
- return seq_printf(m, "%u\n", *(unsigned int *)data);
+ seq_printf(m, "%u\n", *(unsigned int *)data);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_uint);
int lprocfs_rd_u64(struct seq_file *m, void *data)
{
- return seq_printf(m, "%llu\n", *(__u64 *)data);
+ seq_printf(m, "%llu\n", *(__u64 *)data);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_u64);
{
atomic_t *atom = data;
LASSERT(atom != NULL);
- return seq_printf(m, "%d\n", atomic_read(atom));
+ seq_printf(m, "%d\n", atomic_read(atom));
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_atomic);
struct obd_device *obd = data;
LASSERT(obd != NULL);
- return seq_printf(m, "%s\n", obd->obd_uuid.uuid);
+ seq_printf(m, "%s\n", obd->obd_uuid.uuid);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_uuid);
struct obd_device *dev = data;
LASSERT(dev != NULL);
- return seq_printf(m, "%s\n", dev->obd_name);
+ seq_printf(m, "%s\n", dev->obd_name);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_name);
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%u\n", osfs.os_bsize);
+ seq_printf(m, "%u\n", osfs.os_bsize);
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_blksize);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_kbytestotal);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_kbytesfree);
while (blk_size >>= 1)
result <<= 1;
- rc = seq_printf(m, "%llu\n", result);
+ seq_printf(m, "%llu\n", result);
}
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_kbytesavail);
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%llu\n", osfs.os_files);
+ seq_printf(m, "%llu\n", osfs.os_files);
return rc;
}
cfs_time_shift_64(-OBD_STATFS_CACHE_SECONDS),
OBD_STATFS_NODELAY);
if (!rc)
- rc = seq_printf(m, "%llu\n", osfs.os_ffree);
+ seq_printf(m, "%llu\n", osfs.os_ffree);
+
return rc;
}
EXPORT_SYMBOL(lprocfs_rd_filesfree);
struct obd_device *obd = data;
struct obd_import *imp;
char *imp_state_name = NULL;
- int rc = 0;
LASSERT(obd != NULL);
LPROCFS_CLIMP_CHECK(obd);
imp = obd->u.cli.cl_import;
imp_state_name = ptlrpc_import_state_name(imp->imp_state);
- rc = seq_printf(m, "%s\t%s%s\n", obd2cli_tgt(obd), imp_state_name,
- imp->imp_deactive ? "\tDEACTIVATED" : "");
+ seq_printf(m, "%s\t%s%s\n",
+ obd2cli_tgt(obd), imp_state_name,
+ imp->imp_deactive ? "\tDEACTIVATED" : "");
LPROCFS_CLIMP_EXIT(obd);
- return rc;
+
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_server_uuid);
{
struct obd_device *obd = data;
struct ptlrpc_connection *conn;
- int rc = 0;
LASSERT(obd != NULL);
LPROCFS_CLIMP_CHECK(obd);
conn = obd->u.cli.cl_import->imp_connection;
if (conn && obd->u.cli.cl_import)
- rc = seq_printf(m, "%s\n", conn->c_remote_uuid.uuid);
+ seq_printf(m, "%s\n", conn->c_remote_uuid.uuid);
else
- rc = seq_printf(m, "%s\n", "<none>");
+ seq_puts(m, "<none>\n");
LPROCFS_CLIMP_EXIT(obd);
- return rc;
+
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_conn_uuid);
struct obd_device *obd = data;
LASSERT(obd != NULL);
- return seq_printf(m, "%u\n", obd->obd_num_exports);
+ seq_printf(m, "%u\n", obd->obd_num_exports);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_num_exports);
struct obd_type *class = (struct obd_type *) data;
LASSERT(class != NULL);
- return seq_printf(m, "%d\n", class->typ_refcnt);
+ seq_printf(m, "%d\n", class->typ_refcnt);
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_numrefs);
struct lprocfs_counter_header *hdr;
struct lprocfs_counter ctr;
int idx = *(loff_t *)v;
- int rc = 0;
if (idx == 0) {
struct timeval now;
do_gettimeofday(&now);
- rc = seq_printf(p, "%-25s %lu.%lu secs.usecs\n",
- "snapshot_time", now.tv_sec, (unsigned long)now.tv_usec);
- if (rc < 0)
- return rc;
+ seq_printf(p, "%-25s %lu.%lu secs.usecs\n",
+ "snapshot_time",
+ now.tv_sec, (unsigned long)now.tv_usec);
}
+
hdr = &stats->ls_cnt_header[idx];
lprocfs_stats_collect(stats, idx, &ctr);
- if (ctr.lc_count == 0)
- goto out;
-
- rc = seq_printf(p, "%-25s %lld samples [%s]", hdr->lc_name,
- ctr.lc_count, hdr->lc_units);
+ if (ctr.lc_count != 0) {
+ seq_printf(p, "%-25s %lld samples [%s]",
+ hdr->lc_name, ctr.lc_count, hdr->lc_units);
- if (rc < 0)
- goto out;
-
- if ((hdr->lc_config & LPROCFS_CNTR_AVGMINMAX) && (ctr.lc_count > 0)) {
- rc = seq_printf(p, " %lld %lld %lld",
- ctr.lc_min, ctr.lc_max, ctr.lc_sum);
- if (rc < 0)
- goto out;
- if (hdr->lc_config & LPROCFS_CNTR_STDDEV)
- rc = seq_printf(p, " %lld", ctr.lc_sumsquare);
- if (rc < 0)
- goto out;
+ if ((hdr->lc_config & LPROCFS_CNTR_AVGMINMAX) &&
+ (ctr.lc_count > 0)) {
+ seq_printf(p, " %lld %lld %lld",
+ ctr.lc_min, ctr.lc_max, ctr.lc_sum);
+ if (hdr->lc_config & LPROCFS_CNTR_STDDEV)
+ seq_printf(p, " %lld", ctr.lc_sumsquare);
+ }
+ seq_putc(p, '\n');
}
- rc = seq_printf(p, "\n");
-out:
- return (rc < 0) ? rc : 0;
+
+ return 0;
}
static const struct seq_operations lprocfs_stats_seq_sops = {
int lprocfs_nid_stats_clear_read(struct seq_file *m, void *data)
{
- return seq_printf(m, "%s\n",
- "Write into this file to clear all nid stats and stale nid entries");
+ seq_printf(m, "%s\n",
+ "Write into this file to clear all nid stats and stale nid entries");
+ return 0;
}
EXPORT_SYMBOL(lprocfs_nid_stats_clear_read);
{
struct obd_device *dev = data;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%d\n", cli->cl_max_pages_per_rpc);
+ seq_printf(m, "%d\n", cli->cl_max_pages_per_rpc);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
EXPORT_SYMBOL(lprocfs_obd_rd_max_pages_per_rpc);
* lu_context_refill(). No locking is provided, as initialization and shutdown
* are supposed to be externally serialized.
*/
-static unsigned key_set_version = 0;
+static unsigned key_set_version;
/**
* Register new key.
int lu_env_refill_by_tags(struct lu_env *env, __u32 ctags,
__u32 stags)
{
- int result;
-
if ((env->le_ctx.lc_tags & ctags) != ctags) {
env->le_ctx.lc_version = 0;
env->le_ctx.lc_tags |= ctags;
env->le_ses->lc_tags |= stags;
}
- result = lu_env_refill(env);
-
- return result;
+ return lu_env_refill(env);
}
EXPORT_SYMBOL(lu_env_refill_by_tags);
memset(&stats, 0, sizeof(stats));
lu_site_stats_get(s->ls_obj_hash, &stats, 1);
- return seq_printf(m, "%d/%d %d/%d %d %d %d %d %d %d %d\n",
- stats.lss_busy,
- stats.lss_total,
- stats.lss_populated,
- CFS_HASH_NHLIST(s->ls_obj_hash),
- stats.lss_max_search,
- ls_stats_read(s->ls_stats, LU_SS_CREATED),
- ls_stats_read(s->ls_stats, LU_SS_CACHE_HIT),
- ls_stats_read(s->ls_stats, LU_SS_CACHE_MISS),
- ls_stats_read(s->ls_stats, LU_SS_CACHE_RACE),
- ls_stats_read(s->ls_stats, LU_SS_CACHE_DEATH_RACE),
- ls_stats_read(s->ls_stats, LU_SS_LRU_PURGED));
+ seq_printf(m, "%d/%d %d/%d %d %d %d %d %d %d %d\n",
+ stats.lss_busy,
+ stats.lss_total,
+ stats.lss_populated,
+ CFS_HASH_NHLIST(s->ls_obj_hash),
+ stats.lss_max_search,
+ ls_stats_read(s->ls_stats, LU_SS_CREATED),
+ ls_stats_read(s->ls_stats, LU_SS_CACHE_HIT),
+ ls_stats_read(s->ls_stats, LU_SS_CACHE_MISS),
+ ls_stats_read(s->ls_stats, LU_SS_CACHE_RACE),
+ ls_stats_read(s->ls_stats, LU_SS_CACHE_DEATH_RACE),
+ ls_stats_read(s->ls_stats, LU_SS_LRU_PURGED));
+ return 0;
}
EXPORT_SYMBOL(lu_site_stats_print);
}
/*** SERVER NAME ***
- * <FSNAME><SEPERATOR><TYPE><INDEX>
+ * <FSNAME><SEPARATOR><TYPE><INDEX>
* FSNAME is between 1 and 8 characters (inclusive).
* Excluded characters are '/' and ':'
- * SEPERATOR is either ':' or '-'
+ * SEPARATOR is either ':' or '-'
* TYPE: "OST", "MDT", etc.
* INDEX: Hex representation of the index
*/
static inline struct echo_thread_info *echo_env_info(const struct lu_env *env)
{
struct echo_thread_info *info;
+
info = lu_context_key_get(&env->le_ctx, &echo_thread_key);
LASSERT(info != NULL);
return info;
{
.ckd_cache = &echo_lock_kmem,
.ckd_name = "echo_lock_kmem",
- .ckd_size = sizeof (struct echo_lock)
+ .ckd_size = sizeof(struct echo_lock)
},
{
.ckd_cache = &echo_object_kmem,
.ckd_name = "echo_object_kmem",
- .ckd_size = sizeof (struct echo_object)
+ .ckd_size = sizeof(struct echo_object)
},
{
.ckd_cache = &echo_thread_kmem,
.ckd_name = "echo_thread_kmem",
- .ckd_size = sizeof (struct echo_thread_info)
+ .ckd_size = sizeof(struct echo_thread_info)
},
{
.ckd_cache = &echo_session_kmem,
.ckd_name = "echo_session_kmem",
- .ckd_size = sizeof (struct echo_session_info)
+ .ckd_size = sizeof(struct echo_session_info)
},
{
.ckd_cache = NULL
struct lu_context_key *key, void *data)
{
struct echo_thread_info *info = data;
+
OBD_SLAB_FREE_PTR(info, echo_thread_kmem);
}
struct lu_context_key *key, void *data)
{
struct echo_session_info *session = data;
+
OBD_SLAB_FREE_PTR(session, echo_session_kmem);
}
switch (cleanup) {
case 4: {
int rc2;
+
rc2 = echo_client_cleanup(obd);
if (rc2)
CERROR("Cleanup obd device %s error(%d)\n",
if (d->ed_next) {
if (!d->ed_next_islov) {
struct lov_oinfo *oinfo = lsm->lsm_oinfo[0];
+
LASSERT(oinfo != NULL);
oinfo->loi_oi = lsm->lsm_oi;
conf->eoc_cl.u.coc_oinfo = oinfo;
} else {
struct lustre_md *md;
+
md = &info->eti_md;
memset(md, 0, sizeof(*md));
md->lsm = lsm;
/* an external function to kill an object? */
if (eco->eo_deleted) {
struct lu_object_header *loh = obj->co_lu.lo_header;
+
LASSERT(&eco->eo_hdr == luh2coh(loh));
set_bit(LU_OBJECT_HEARD_BANSHEE, &loh->loh_flags);
}
static int cl_echo_enqueue0(struct lu_env *env, struct echo_object *eco,
u64 start, u64 end, int mode,
- __u64 *cookie , __u32 enqflags)
+ __u64 *cookie, __u32 enqflags)
{
struct cl_io *io;
struct cl_lock *lck;
LASSERT(ec != NULL);
spin_lock(&ec->ec_lock);
- list_for_each (el, &ec->ec_locks) {
- ecl = list_entry (el, struct echo_lock, el_chain);
+ list_for_each(el, &ec->ec_locks) {
+ ecl = list_entry(el, struct echo_lock, el_chain);
CDEBUG(D_INFO, "ecl: %p, cookie: %#llx\n", ecl, ecl->el_cookie);
found = (ecl->el_cookie == cookie);
if (found) {
cl_page_list_for_each_safe(clp, temp, &queue->c2_qin) {
int rc;
+
rc = cl_page_cache_add(env, io, clp, CRT_WRITE);
if (rc == 0)
continue;
static u64 last_object_id;
static int
-echo_copyout_lsm (struct lov_stripe_md *lsm, void *_ulsm, int ulsm_nob)
+echo_copyout_lsm(struct lov_stripe_md *lsm, void *_ulsm, int ulsm_nob)
{
struct lov_stripe_md *ulsm = _ulsm;
int nob, i;
- nob = offsetof (struct lov_stripe_md, lsm_oinfo[lsm->lsm_stripe_count]);
+ nob = offsetof(struct lov_stripe_md, lsm_oinfo[lsm->lsm_stripe_count]);
if (nob > ulsm_nob)
return -EINVAL;
- if (copy_to_user (ulsm, lsm, sizeof(*ulsm)))
+ if (copy_to_user(ulsm, lsm, sizeof(*ulsm)))
return -EFAULT;
for (i = 0; i < lsm->lsm_stripe_count; i++) {
- if (copy_to_user (ulsm->lsm_oinfo[i], lsm->lsm_oinfo[i],
+ if (copy_to_user(ulsm->lsm_oinfo[i], lsm->lsm_oinfo[i],
sizeof(lsm->lsm_oinfo[0])))
return -EFAULT;
}
}
static int
-echo_copyin_lsm (struct echo_device *ed, struct lov_stripe_md *lsm,
+echo_copyin_lsm(struct echo_device *ed, struct lov_stripe_md *lsm,
void *ulsm, int ulsm_nob)
{
struct echo_client_obd *ec = ed->ed_ec;
int i;
- if (ulsm_nob < sizeof (*lsm))
+ if (ulsm_nob < sizeof(*lsm))
return -EINVAL;
- if (copy_from_user (lsm, ulsm, sizeof (*lsm)))
+ if (copy_from_user(lsm, ulsm, sizeof(*lsm)))
return -EFAULT;
if (lsm->lsm_stripe_count > ec->ec_nstripes ||
if ((oa->o_valid & OBD_MD_FLID) == 0 && /* no obj id */
(on_target || /* set_stripe */
ec->ec_nstripes != 0)) { /* LOV */
- CERROR ("No valid oid\n");
+ CERROR("No valid oid\n");
return -EINVAL;
}
if (ulsm != NULL) {
int i, idx;
- rc = echo_copyin_lsm (ed, lsm, ulsm, ulsm_nob);
+ rc = echo_copyin_lsm(ed, lsm, ulsm, ulsm_nob);
if (rc != 0)
goto failed;
if ((oa->o_valid & OBD_MD_FLID) == 0 || ostid_id(&oa->o_oi) == 0) {
/* disallow use of object id 0 */
- CERROR ("No valid oid\n");
+ CERROR("No valid oid\n");
return -EINVAL;
}
width = stripe_size * stripe_count;
/* woffset = offset within a width; offset = whole number of widths */
- woffset = do_div (offset, width);
+ woffset = do_div(offset, width);
stripe_index = woffset / stripe_size;
for (rc = delta = 0; delta < PAGE_CACHE_SIZE; delta += OBD_ECHO_BLOCK_SIZE) {
stripe_off = offset + delta;
stripe_id = id;
- echo_get_stripe_off_id (lsm, &stripe_off, &stripe_id);
+ echo_get_stripe_off_id(lsm, &stripe_off, &stripe_id);
rc2 = block_debug_check("test_brw",
addr + delta, OBD_ECHO_BLOCK_SIZE,
stripe_off, stripe_id);
if (rc2 != 0) {
- CERROR ("Error in echo object %#llx\n", id);
+ CERROR("Error in echo object %#llx\n", id);
rc = rc2;
}
}
i < npages;
i++, pgp++, off += PAGE_CACHE_SIZE) {
- LASSERT (pgp->pg == NULL); /* for cleanup */
+ LASSERT(pgp->pg == NULL); /* for cleanup */
rc = -ENOMEM;
OBD_PAGE_ALLOC(pgp->pg, gfp_mask);
if (verify) {
int vrc;
+
vrc = echo_client_page_debug_check(lsm, pgp->pg,
ostid_id(&oa->o_oi),
pgp->off, pgp->count);
(nob & (~CFS_PAGE_MASK)) != 0)
return -EINVAL;
- rc = echo_get_object (&eco, ed, oa);
+ rc = echo_get_object(&eco, ed, oa);
if (rc != 0)
return rc;
rc = echo_get_object(&eco, ed, oa);
if (rc == 0) {
struct obd_info oinfo = { { { 0 } } };
+
oinfo.oi_md = eco->eo_lsm;
oinfo.oi_oa = oa;
rc = obd_getattr(env, ec->ec_exp, &oinfo);
rc = echo_get_object(&eco, ed, oa);
if (rc == 0) {
struct obd_info oinfo = { { { 0 } } };
+
oinfo.oi_oa = oa;
oinfo.oi_md = eco->eo_lsm;
goto out;
default:
- CERROR ("echo_ioctl(): unrecognised ioctl %#x\n", cmd);
+ CERROR("echo_ioctl(): unrecognised ioctl %#x\n", cmd);
rc = -ENOTTY;
goto out;
}
}
spin_lock_init(&ec->ec_lock);
- INIT_LIST_HEAD (&ec->ec_objects);
- INIT_LIST_HEAD (&ec->ec_locks);
+ INIT_LIST_HEAD(&ec->ec_objects);
+ INIT_LIST_HEAD(&ec->ec_locks);
ec->ec_unique = 0;
ec->ec_nstripes = 0;
static int __init obdecho_init(void)
{
struct lprocfs_static_vars lvars;
- int rc;
LCONSOLE_INFO("Echo OBD driver; http://www.lustre.org/\n");
lprocfs_echo_init_vars(&lvars);
- rc = echo_client_init();
-
- return rc;
+ return echo_client_init();
}
static void /*__exit*/ obdecho_exit(void)
#include "../include/lprocfs_status.h"
#include "../include/obd_class.h"
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
LPROC_SEQ_FOPS_RO_TYPE(echo, uuid);
static struct lprocfs_vars lprocfs_echo_obd_vars[] = {
{ "uuid", &echo_uuid_fops, NULL, 0 },
*/
#define DEBUG_SUBSYSTEM S_CLASS
-#include <asm/statfs.h>
+#include <linux/statfs.h>
#include "../include/obd_cksum.h"
#include "../include/obd_class.h"
#include "../include/lprocfs_status.h"
static int osc_active_seq_show(struct seq_file *m, void *v)
{
struct obd_device *dev = m->private;
- int rc;
LPROCFS_CLIMP_CHECK(dev);
- rc = seq_printf(m, "%d\n", !dev->u.cli.cl_import->imp_deactive);
+ seq_printf(m, "%d\n", !dev->u.cli.cl_import->imp_deactive);
LPROCFS_CLIMP_EXIT(dev);
- return rc;
+
+ return 0;
}
static ssize_t osc_active_seq_write(struct file *file,
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%u\n", cli->cl_max_rpcs_in_flight);
+ seq_printf(m, "%u\n", cli->cl_max_rpcs_in_flight);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
static ssize_t osc_max_rpcs_in_flight_seq_write(struct file *file,
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
int shift = 20 - PAGE_CACHE_SHIFT;
- int rc;
- rc = seq_printf(m,
- "used_mb: %d\n"
- "busy_cnt: %d\n",
- (atomic_read(&cli->cl_lru_in_list) +
- atomic_read(&cli->cl_lru_busy)) >> shift,
- atomic_read(&cli->cl_lru_busy));
+ seq_printf(m,
+ "used_mb: %d\n"
+ "busy_cnt: %d\n",
+ (atomic_read(&cli->cl_lru_in_list) +
+ atomic_read(&cli->cl_lru_busy)) >> shift,
+ atomic_read(&cli->cl_lru_busy));
- return rc;
+ return 0;
}
/* shrink the number of caching pages to a specific number */
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%lu\n", cli->cl_dirty);
+ seq_printf(m, "%lu\n", cli->cl_dirty);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
LPROC_SEQ_FOPS_RO(osc_cur_dirty_bytes);
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%lu\n", cli->cl_avail_grant);
+ seq_printf(m, "%lu\n", cli->cl_avail_grant);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
static ssize_t osc_cur_grant_bytes_seq_write(struct file *file,
{
struct obd_device *dev = m->private;
struct client_obd *cli = &dev->u.cli;
- int rc;
client_obd_list_lock(&cli->cl_loi_list_lock);
- rc = seq_printf(m, "%lu\n", cli->cl_lost_grant);
+ seq_printf(m, "%lu\n", cli->cl_lost_grant);
client_obd_list_unlock(&cli->cl_loi_list_lock);
- return rc;
+
+ return 0;
}
LPROC_SEQ_FOPS_RO(osc_cur_lost_grant_bytes);
if (obd == NULL)
return 0;
- return seq_printf(m, "%d\n",
- obd->u.cli.cl_grant_shrink_interval);
+ seq_printf(m, "%d\n", obd->u.cli.cl_grant_shrink_interval);
+ return 0;
}
static ssize_t osc_grant_shrink_interval_seq_write(struct file *file,
if (obd == NULL)
return 0;
- return seq_printf(m, "%d\n",
- obd->u.cli.cl_checksum ? 1 : 0);
+ seq_printf(m, "%d\n", obd->u.cli.cl_checksum ? 1 : 0);
+ return 0;
}
static ssize_t osc_checksum_seq_write(struct file *file,
{
struct obd_device *obd = m->private;
- return seq_printf(m, "%u\n", atomic_read(&obd->u.cli.cl_resends));
+ seq_printf(m, "%u\n", atomic_read(&obd->u.cli.cl_resends));
+ return 0;
}
static ssize_t osc_resend_count_seq_write(struct file *file,
struct obd_device *obd = m->private;
struct osc_device *od = obd2osc_dev(obd);
- return seq_printf(m, "%u\n", od->od_contention_time);
+ seq_printf(m, "%u\n", od->od_contention_time);
+ return 0;
}
static ssize_t osc_contention_seconds_seq_write(struct file *file,
struct obd_device *obd = m->private;
struct osc_device *od = obd2osc_dev(obd);
- return seq_printf(m, "%u\n", od->od_lockless_truncate);
+ seq_printf(m, "%u\n", od->od_lockless_truncate);
+ return 0;
}
static ssize_t osc_lockless_truncate_seq_write(struct file *file,
static int osc_destroys_in_flight_seq_show(struct seq_file *m, void *v)
{
struct obd_device *obd = m->private;
- return seq_printf(m, "%u\n",
- atomic_read(&obd->u.cli.cl_destroy_in_flight));
+
+ seq_printf(m, "%u\n", atomic_read(&obd->u.cli.cl_destroy_in_flight));
+ return 0;
}
LPROC_SEQ_FOPS_RO(osc_destroys_in_flight);
if (ia_valid & ATTR_SIZE) {
attr->cat_size = attr->cat_kms = size;
- cl_valid = (CAT_SIZE | CAT_KMS);
+ cl_valid = CAT_SIZE | CAT_KMS;
}
if (ia_valid & ATTR_MTIME_SET) {
attr->cat_mtime = lvb->lvb_mtime;
struct cl_lock_descr *descr = &lock->cll_descr;
struct cl_object_header *hdr = cl_object_header(descr->cld_obj);
struct cl_lock *scan;
- struct cl_lock *conflict= NULL;
+ struct cl_lock *conflict = NULL;
int lockless = osc_lock_is_lockless(olck);
int rc = 0;
static inline int can_merge_pages(struct brw_page *p1, struct brw_page *p2)
{
if (p1->flag != p2->flag) {
- unsigned mask = ~(OBD_BRW_FROM_GRANT| OBD_BRW_NOCACHE|
- OBD_BRW_SYNC|OBD_BRW_ASYNC|OBD_BRW_NOQUOTA);
+ unsigned mask = ~(OBD_BRW_FROM_GRANT | OBD_BRW_NOCACHE |
+ OBD_BRW_SYNC | OBD_BRW_ASYNC|OBD_BRW_NOQUOTA);
/* warn if we try to combine flags that we don't know to be
* safe to combine */
list_add_tail(&req->rq_list, &pool->prp_req_list);
}
spin_unlock(&pool->prp_lock);
- return;
}
EXPORT_SYMBOL(ptlrpc_add_rqs_to_pool);
if (req->rq_err) {
req->rq_status = rc;
return 1;
- } else {
- spin_lock(&req->rq_lock);
- req->rq_wait_ctx = 1;
- spin_unlock(&req->rq_lock);
- return 0;
}
+ spin_lock(&req->rq_lock);
+ req->rq_wait_ctx = 1;
+ spin_unlock(&req->rq_lock);
+ return 0;
}
CDEBUG(D_RPCTRACE, "Sending RPC pname:cluuid:pid:xid:nid:opc %s:%s:%d:%llu:%s:%d\n",
if (set->set_interpret != NULL) {
int (*interpreter)(struct ptlrpc_request_set *set, void *, int) =
set->set_interpret;
- rc = interpreter (set, set->set_arg, rc);
+ rc = interpreter(set, set->set_arg, rc);
} else {
struct ptlrpc_set_cbdata *cbdata, *n;
int err;
conn_key(struct hlist_node *hnode)
{
struct ptlrpc_connection *conn;
+
conn = hlist_entry(hnode, struct ptlrpc_connection, c_hash);
return &conn->c_peer;
}
.rmf_name = (name), \
.rmf_flags = (flags), \
.rmf_size = (size), \
- .rmf_swabber = (void (*)(void*))(swabber), \
- .rmf_dumper = (void (*)(void*))(dumper) \
+ .rmf_swabber = (void (*)(void *))(swabber), \
+ .rmf_dumper = (void (*)(void *))(dumper) \
}
struct req_msg_field RMF_GENERIC_DATA =
LASSERTF(offset > 0, "%s:%s, off=%d, loc=%d\n",
pill->rc_fmt->rf_name,
field->rmf_name, offset, loc);
- offset --;
+ offset--;
LASSERT(0 <= offset && offset < REQ_MAX_FIELD_NR);
return offset;
return ll_eopcode_table[opcode].opname;
}
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
static void ptlrpc_lprocfs_register(struct proc_dir_entry *root, char *dir,
char *name,
struct proc_dir_entry **procroot_ret,
ptlrpc_service_for_each_part(svcpt, i, svc)
total += svcpt->scp_hist_nrqbds;
- return seq_printf(m, "%d\n", total);
+ seq_printf(m, "%d\n", total);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ptlrpc_lprocfs_req_history_len);
ptlrpc_service_for_each_part(svcpt, i, svc)
total += svc->srv_hist_nrqbds_cpt_max;
- return seq_printf(m, "%d\n", total);
+ seq_printf(m, "%d\n", total);
+ return 0;
}
static ssize_t
{
struct ptlrpc_service *svc = m->private;
- return seq_printf(m, "%d\n",
- svc->srv_nthrs_cpt_init * svc->srv_ncpts);
+ seq_printf(m, "%d\n", svc->srv_nthrs_cpt_init * svc->srv_ncpts);
+ return 0;
}
static ssize_t
ptlrpc_service_for_each_part(svcpt, i, svc)
total += svcpt->scp_nthrs_running;
- return seq_printf(m, "%d\n", total);
+ seq_printf(m, "%d\n", total);
+ return 0;
}
LPROC_SEQ_FOPS_RO(ptlrpc_lprocfs_threads_started);
{
struct ptlrpc_service *svc = m->private;
- return seq_printf(m, "%d\n",
- svc->srv_nthrs_cpt_limit * svc->srv_ncpts);
+ seq_printf(m, "%d\n", svc->srv_nthrs_cpt_limit * svc->srv_ncpts);
+ return 0;
}
static ssize_t
static int ptlrpc_lprocfs_hp_ratio_seq_show(struct seq_file *m, void *v)
{
struct ptlrpc_service *svc = m->private;
- return seq_printf(m, "%d", svc->srv_hpreq_ratio);
+ seq_printf(m, "%d", svc->srv_hpreq_ratio);
+ return 0;
}
static ssize_t ptlrpc_lprocfs_hp_ratio_seq_write(struct file *file,
.data = svc},
{NULL}
};
- static struct file_operations req_history_fops = {
+ static const struct file_operations req_history_fops = {
.owner = THIS_MODULE,
.open = ptlrpc_lprocfs_svc_req_history_open,
.read = seq_read,
{
struct obd_device *obd = m->private;
struct obd_import *imp = obd->u.cli.cl_import;
- int rc;
LPROCFS_CLIMP_CHECK(obd);
- rc = seq_printf(m, "%d\n", !imp->imp_no_pinger_recover);
+ seq_printf(m, "%d\n", !imp->imp_no_pinger_recover);
LPROCFS_CLIMP_EXIT(obd);
- return rc;
+ return 0;
}
EXPORT_SYMBOL(lprocfs_rd_pinger_recov);
req->rq_export->exp_obd->obd_minor);
}
- /* In order to keep interoprability with the client (< 2.3) which
+ /* In order to keep interoperability with the client (< 2.3) which
* doesn't have pb_jobid in ptlrpc_body, We have to shrink the
* ptlrpc_body in reply buffer to ptlrpc_body_v2, otherwise, the
* reply buffer on client will be overflow.
*
- * XXX Remove this whenever we drop the interoprability with such client.
+ * XXX Remove this whenever we drop the interoperability with
+ * such client.
*/
req->rq_replen = lustre_shrink_msg(req->rq_repmsg, 0,
sizeof(struct ptlrpc_body_v2), 1);
{
struct ptlrpc_nrs_policy *tmp = nrs->nrs_policy_primary;
- if (tmp == NULL) {
+ if (tmp == NULL)
return;
- }
nrs->nrs_policy_primary = NULL;
static int nrs_svcpt_setup_locked0(struct ptlrpc_nrs *nrs,
struct ptlrpc_service_part *svcpt)
{
- int rc;
enum ptlrpc_nrs_queue_type queue;
LASSERT(mutex_is_locked(&nrs_core.nrs_mutex));
INIT_LIST_HEAD(&nrs->nrs_policy_list);
INIT_LIST_HEAD(&nrs->nrs_policy_queued);
- rc = nrs_register_policies_locked(nrs);
-
- return rc;
+ return nrs_register_policies_locked(nrs);
}
/**
/* early reply size */
int lustre_msg_early_size(void)
{
- static int size = 0;
+ static int size;
if (!size) {
- /* Always reply old ptlrpc_body_v2 to keep interoprability
+ /* Always reply old ptlrpc_body_v2 to keep interoperability
* with the old client (< 2.3) which doesn't have pb_jobid
* in the ptlrpc_body.
*
- * XXX Remove this whenever we drop interoprability with such
+ * XXX Remove this whenever we drop interoperability with such
* client.
*/
__u32 pblen = sizeof(struct ptlrpc_body_v2);
#define PET_READY 1
#define PET_TERMINATE 2
-static int pet_refcount = 0;
+static int pet_refcount;
static int pet_state;
static wait_queue_head_t pet_waitq;
LIST_HEAD(pet_list);
int lustre_unpack_req_ptlrpc_body(struct ptlrpc_request *req, int offset);
int lustre_unpack_rep_ptlrpc_body(struct ptlrpc_request *req, int offset);
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
void ptlrpc_lprocfs_register_service(struct proc_dir_entry *proc_entry,
struct ptlrpc_service *svc);
void ptlrpc_lprocfs_unregister_service(struct ptlrpc_service *svc);
int sptlrpc_proc_enc_pool_seq_show(struct seq_file *m, void *v);
/* sec_lproc.c */
-#if defined (CONFIG_PROC_FS)
+#if defined(CONFIG_PROC_FS)
int sptlrpc_lproc_init(void);
void sptlrpc_lproc_fini(void);
#else
static struct ptlrpcd *ptlrpcds;
struct mutex ptlrpcd_mutex;
-static int ptlrpcd_users = 0;
+static int ptlrpcd_users;
void ptlrpcd_wake(struct ptlrpc_request *req)
{
#if defined(CONFIG_NUMA)
{
int i;
- mask = *cpumask_of_node(cpu_to_node(index));
+ cpumask_copy(&mask, cpumask_of_node(cpu_to_node(index)));
for (i = max; i < num_online_cpus(); i++)
- cpu_clear(i, mask);
- pc->pc_npartners = cpus_weight(mask) - 1;
+ cpumask_clear_cpu(i, &mask);
+ pc->pc_npartners = cpumask_weight(&mask) - 1;
set_bit(LIOD_BIND, &pc->pc_flags);
}
#else
* that are already initialized
*/
for (pidx = 0, i = 0; i < index; i++) {
- if (cpu_isset(i, mask)) {
+ if (cpumask_test_cpu(i, &mask)) {
ppc = &ptlrpcds->pd_threads[i];
pc->pc_partners[pidx++] = ppc;
ppc->pc_partners[ppc->
*/
int sptlrpc_proc_enc_pool_seq_show(struct seq_file *m, void *v)
{
- int rc;
-
spin_lock(&page_pools.epp_lock);
- rc = seq_printf(m,
- "physical pages: %lu\n"
- "pages per pool: %lu\n"
- "max pages: %lu\n"
- "max pools: %u\n"
- "total pages: %lu\n"
- "total free: %lu\n"
- "idle index: %lu/100\n"
- "last shrink: %lds\n"
- "last access: %lds\n"
- "max pages reached: %lu\n"
- "grows: %u\n"
- "grows failure: %u\n"
- "shrinks: %u\n"
- "cache access: %lu\n"
- "cache missing: %lu\n"
- "low free mark: %lu\n"
- "max waitqueue depth: %u\n"
- "max wait time: "CFS_TIME_T"/%u\n"
- ,
- totalram_pages,
- PAGES_PER_POOL,
- page_pools.epp_max_pages,
- page_pools.epp_max_pools,
- page_pools.epp_total_pages,
- page_pools.epp_free_pages,
- page_pools.epp_idle_idx,
- get_seconds() - page_pools.epp_last_shrink,
- get_seconds() - page_pools.epp_last_access,
- page_pools.epp_st_max_pages,
- page_pools.epp_st_grows,
- page_pools.epp_st_grow_fails,
- page_pools.epp_st_shrinks,
- page_pools.epp_st_access,
- page_pools.epp_st_missings,
- page_pools.epp_st_lowfree,
- page_pools.epp_st_max_wqlen,
- page_pools.epp_st_max_wait, HZ
- );
+ seq_printf(m,
+ "physical pages: %lu\n"
+ "pages per pool: %lu\n"
+ "max pages: %lu\n"
+ "max pools: %u\n"
+ "total pages: %lu\n"
+ "total free: %lu\n"
+ "idle index: %lu/100\n"
+ "last shrink: %lds\n"
+ "last access: %lds\n"
+ "max pages reached: %lu\n"
+ "grows: %u\n"
+ "grows failure: %u\n"
+ "shrinks: %u\n"
+ "cache access: %lu\n"
+ "cache missing: %lu\n"
+ "low free mark: %lu\n"
+ "max waitqueue depth: %u\n"
+ "max wait time: " CFS_TIME_T "/%u\n",
+ totalram_pages,
+ PAGES_PER_POOL,
+ page_pools.epp_max_pages,
+ page_pools.epp_max_pools,
+ page_pools.epp_total_pages,
+ page_pools.epp_free_pages,
+ page_pools.epp_idle_idx,
+ get_seconds() - page_pools.epp_last_shrink,
+ get_seconds() - page_pools.epp_last_access,
+ page_pools.epp_st_max_pages,
+ page_pools.epp_st_grows,
+ page_pools.epp_st_grow_fails,
+ page_pools.epp_st_shrinks,
+ page_pools.epp_st_access,
+ page_pools.epp_st_missings,
+ page_pools.epp_st_lowfree,
+ page_pools.epp_st_max_wqlen,
+ page_pools.epp_st_max_wait,
+ HZ);
spin_unlock(&page_pools.epp_lock);
- return rc;
+
+ return 0;
}
static void enc_pools_release_free_pages(long npages)
*/
cur_npools = (page_pools.epp_total_pages + PAGES_PER_POOL - 1) /
PAGES_PER_POOL;
- end_npools = (page_pools.epp_total_pages + npages + PAGES_PER_POOL - 1) /
- PAGES_PER_POOL;
+ end_npools = (page_pools.epp_total_pages + npages + PAGES_PER_POOL - 1)
+ / PAGES_PER_POOL;
LASSERT(end_npools <= page_pools.epp_max_pools);
np_idx = 0;
return -EINVAL;
}
- if (swabbed) {
+ if (swabbed)
__swab32s(&bsd->bsd_nob);
- }
if (unlikely(bsd->bsd_version != 0)) {
CERROR("Unexpected version %u\n", bsd->bsd_version);
if (tc->tc_thr_factor != 0) {
int factor = tc->tc_thr_factor;
const int fade = 4;
- cpumask_t mask;
/*
* User wants to increase number of threads with for
* have too many threads no matter how many cores/HTs
* there are.
*/
- cpumask_copy(&mask, topology_thread_cpumask(0));
- if (cpus_weight(mask) > 1) { /* weight is # of HTs */
+ /* weight is # of HTs */
+ if (cpumask_weight(topology_thread_cpumask(0)) > 1) {
/* depress thread factor for hyper-thread */
factor = factor - (factor >> 1) + (factor >> 3);
}
int ptlrpc_hr_init(void)
{
- cpumask_t mask;
struct ptlrpc_hr_partition *hrp;
struct ptlrpc_hr_thread *hrt;
int rc;
init_waitqueue_head(&ptlrpc_hr.hr_waitq);
- cpumask_copy(&mask, topology_thread_cpumask(0));
- weight = cpus_weight(mask);
+ weight = cpumask_weight(topology_thread_cpumask(0));
cfs_percpt_for_each(hrp, i, ptlrpc_hr.hr_partitions) {
hrp->hrp_cpt = i;
/* Block A match, only data without crc errors taken */
if (bdev->rds_info.radio_text[i] == BCM2048_RDS_BLOCK_A) {
- pi = ((bdev->rds_info.radio_text[i+1] << 8) +
- bdev->rds_info.radio_text[i+2]);
+ pi = (bdev->rds_info.radio_text[i+1] << 8) +
+ bdev->rds_info.radio_text[i+2];
if (!bdev->rds_info.rds_pi) {
bdev->rds_info.rds_pi = pi;
if ((bdev->rds_info.radio_text[i] & BCM2048_RDS_BLOCK_MASK) ==
BCM2048_RDS_BLOCK_B) {
- rt_id = (bdev->rds_info.radio_text[i+1] &
- BCM2048_RDS_BLOCK_MASK);
+ rt_id = bdev->rds_info.radio_text[i+1] &
+ BCM2048_RDS_BLOCK_MASK;
rt_group_b = bdev->rds_info.radio_text[i+1] &
BCM2048_RDS_GROUP_AB_MASK;
rt_ab = bdev->rds_info.radio_text[i+2] &
goto unlock;
}
- data_buffer = kzalloc(BCM2048_MAX_RDS_RADIO_TEXT*5, GFP_KERNEL);
+ data_buffer = kcalloc(BCM2048_MAX_RDS_RADIO_TEXT, 5, GFP_KERNEL);
if (!data_buffer) {
err = -ENOMEM;
goto unlock;
tmpbuf[i] = bdev->rds_info.radio_text[bdev->rd_index+i+2];
tmpbuf[i+1] = bdev->rds_info.radio_text[bdev->rd_index+i+1];
- tmpbuf[i+2] = ((bdev->rds_info.radio_text[bdev->rd_index+i]
- & 0xf0) >> 4);
+ tmpbuf[i+2] = (bdev->rds_info.radio_text[bdev->rd_index + i] & 0xf0) >> 4;
if ((bdev->rds_info.radio_text[bdev->rd_index+i] &
BCM2048_RDS_CRC_MASK) == BCM2048_RDS_CRC_UNRECOVARABLE)
tmpbuf[i+2] |= 0x80;
.id_table = bcm2048_id,
};
-/*
- * Module Interface
- */
-static int __init bcm2048_module_init(void)
-{
- pr_info(BCM2048_DRIVER_DESC "\n");
-
- return i2c_add_driver(&bcm2048_i2c_driver);
-}
-module_init(bcm2048_module_init);
-
-static void __exit bcm2048_module_exit(void)
-{
- i2c_del_driver(&bcm2048_i2c_driver);
-}
-module_exit(bcm2048_module_exit);
+module_i2c_driver(bcm2048_i2c_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR(BCM2048_DRIVER_AUTHOR);
#include <linux/slab.h>
#include <linux/kernel.h>
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/i2c.h>
#include <linux/wait.h>
#include <linux/delay.h>
/* Combine all the fields to make CFG1 register of IPIPEIF */
tmp = val = get_oneshot_mode(ipipeif->input);
if (tmp < 0) {
- pr_err("ipipeif: links setup required");
+ dev_err(&sd->devnode->dev, "ipipeif: links setup required");
return -EINVAL;
}
- val = val << ONESHOT_SHIFT;
+ val <<= ONESHOT_SHIFT;
ipipeif_source = ipipeif_get_source(ipipeif);
val |= ipipeif_source << INPSRC_SHIFT;
.clip = 4095,
},
};
- memset(&ipipeif->config, 0, sizeof(struct ipipeif_params));
memcpy(&ipipeif->config, &ipipeif_defaults,
sizeof(struct ipipeif_params));
}
.out_chr_pos = VPFE_IPIPE_YUV422_CHR_POS_COSITE,
},
};
- memset(&resizer->config, 0, sizeof(struct resizer_params));
memcpy(&resizer->config, &rsz_default_config,
sizeof(struct resizer_params));
}
if (!vpfe_cfg->num_clocks)
return 0;
- vpfe_dev->clks = kzalloc(vpfe_cfg->num_clocks *
- sizeof(struct clock *), GFP_KERNEL);
+ vpfe_dev->clks = kcalloc(vpfe_cfg->num_clocks,
+ sizeof(struct clock *), GFP_KERNEL);
if (vpfe_dev->clks == NULL)
return -ENOMEM;
i2c_adap = i2c_get_adapter(1);
num_subdevs = vpfe_cfg->num_subdevs;
vpfe_dev->sd =
- kzalloc(sizeof(struct v4l2_subdev *)*num_subdevs, GFP_KERNEL);
+ kcalloc(num_subdevs, sizeof(struct v4l2_subdev *),
+ GFP_KERNEL);
if (vpfe_dev->sd == NULL)
return -ENOMEM;
retval = lirc_unregister_driver(minor);
if (retval)
dev_err(&context->usbdev->dev,
- ": %s: unable to deregister from lirc(%d)",
- __func__, retval);
+ "unable to deregister from lirc(%d)", retval);
else
dev_info(&context->usbdev->dev,
"Deregistered iMON driver (minor:%d)\n", minor);
context = usb_get_intfdata(interface);
if (!context) {
- dev_err(&interface->dev,
- "%s: no context found for minor %d\n",
- __func__, subminor);
+ dev_err(&interface->dev, "no context found for minor %d\n",
+ subminor);
retval = -ENODEV;
goto exit;
}
context->tx_urb->actual_length = 0;
init_completion(&context->tx.finished);
- atomic_set(&(context->tx.busy), 1);
+ atomic_set(&context->tx.busy, 1);
retval = usb_submit_urb(context->tx_urb, GFP_KERNEL);
if (retval) {
- atomic_set(&(context->tx.busy), 0);
- dev_err(&context->usbdev->dev,
- "%s: error submitting urb(%d)\n", __func__, retval);
+ atomic_set(&context->tx.busy, 0);
+ dev_err(&context->usbdev->dev, "error submitting urb(%d)\n",
+ retval);
} else {
/* Wait for transmission to complete (or abort) */
mutex_unlock(&context->ctx_lock);
retval = context->tx.status;
if (retval)
dev_err(&context->usbdev->dev,
- "%s: packet tx failed (%d)\n",
- __func__, retval);
+ "packet tx failed (%d)\n", retval);
}
return retval;
retval = send_packet(context);
if (retval) {
dev_err(&context->usbdev->dev,
- "%s: send packet failed for packet #%d\n",
- __func__, seq/2);
+ "send packet failed for packet #%d\n",
+ seq / 2);
goto exit;
} else {
seq += 2;
retval = send_packet(context);
if (retval)
dev_err(&context->usbdev->dev,
- "%s: send packet failed for packet #%d\n",
- __func__, seq/2);
+ "send packet failed for packet #%d\n",
+ seq / 2);
}
exit:
retval = usb_submit_urb(context->rx_urb, GFP_KERNEL);
if (retval) {
- dev_err(dev, "%s: usb_submit_urb failed for intf0 (%d)\n",
- __func__, retval);
+ dev_err(dev, "usb_submit_urb failed for intf0 (%d)\n", retval);
alloc_status = 8;
goto unlock;
}
|| (now.tv_sec == tv.tv_sec
&& now.tv_usec < tv.tv_usec)));
- timeelapsed = ((now.tv_sec + 1 - tv.tv_sec)*1000000
- + (now.tv_usec - tv.tv_usec));
+ timeelapsed = (now.tv_sec + 1 - tv.tv_sec)*1000000
+ + (now.tv_usec - tv.tv_usec);
if (count >= 1000 && timeelapsed > 0) {
if (default_timer == 0) {
/* autodetect timer */
set_current_state(TASK_INTERRUPTIBLE);
while (count < n) {
if (rptr != wptr) {
- if (copy_to_user(buf+count, (char *) &rbuf[rptr],
+ if (copy_to_user(buf+count, &rbuf[rptr],
sizeof(int))) {
result = -EFAULT;
break;
kfree(context);
if (debug)
- pr_info("%s: context deleted\n", __func__);
+ dev_info(&context->dev->dev, "%s: context deleted\n",
+ __func__);
}
static void deregister_from_lirc(struct sasem_context *context)
retval = lirc_unregister_driver(minor);
if (retval)
- pr_err("%s: unable to deregister from lirc (%d)\n",
+ dev_err(&context->dev->dev,
+ "%s: unable to deregister from lirc (%d)\n",
__func__, retval);
else
- pr_info("Deregistered Sasem driver (minor:%d)\n", minor);
+ dev_info(&context->dev->dev,
+ "Deregistered Sasem driver (minor:%d)\n", minor);
}
context = usb_get_intfdata(interface);
if (!context) {
- dev_err(&interface->dev,
- "%s: no context found for minor %d\n",
- __func__, subminor);
+ dev_err(&interface->dev, "no context found for minor %d\n",
+ subminor);
retval = -ENODEV;
goto exit;
}
context->tx_urb->actual_length = 0;
init_completion(&context->tx.finished);
- atomic_set(&(context->tx.busy), 1);
+ atomic_set(&context->tx.busy, 1);
retval = usb_submit_urb(context->tx_urb, GFP_KERNEL);
if (retval) {
- atomic_set(&(context->tx.busy), 0);
- dev_err(&context->dev->dev, "%s: error submitting urb (%d)\n",
- __func__, retval);
+ atomic_set(&context->tx.busy, 0);
+ dev_err(&context->dev->dev, "error submitting urb (%d)\n",
+ retval);
} else {
/* Wait for transmission to complete (or abort) */
mutex_unlock(&context->ctx_lock);
retval = context->tx.status;
if (retval)
dev_err(&context->dev->dev,
- "%s: packet tx failed (%d)\n",
- __func__, retval);
+ "packet tx failed (%d)\n", retval);
}
return retval;
goto exit;
}
- data_buf = memdup_user((void const __user *)buf, n_bytes);
+ data_buf = memdup_user(buf, n_bytes);
if (IS_ERR(data_buf)) {
retval = PTR_ERR(data_buf);
data_buf = NULL;
retval = send_packet(context);
if (retval) {
dev_err(&context->dev->dev,
- "%s: send packet failed for packet #%d\n",
- __func__, i);
+ "send packet failed for packet #%d\n", i);
goto exit;
}
}
if (retval)
dev_err(&context->dev->dev,
- "%s: usb_submit_urb failed for ir_open (%d)\n",
- __func__, retval);
+ "usb_submit_urb failed for ir_open (%d)\n", retval);
else {
context->ir_isopen = 1;
dev_info(&context->dev->dev, "IR port opened\n");
/* How many clocks in a microsecond?, avoiding long long divide */
work = loops_per_sec;
work *= 4295; /* 4295 = 2^32 / 1e6 */
- conv_us_to_clocks = (work >> 32);
+ conv_us_to_clocks = work >> 32;
/*
* Carrier period in clocks, approach good up to 32GHz clock,
result = devm_request_irq(&dev->dev, irq, lirc_irq_handler,
(share_irq ? IRQF_SHARED : 0),
- LIRC_DRIVER_NAME, (void *)&hardware);
+ LIRC_DRIVER_NAME, &hardware);
if (result < 0) {
if (result == -EBUSY)
dev_err(&dev->dev, "IRQ %d busy\n", irq);
nhigh++;
msleep(40);
}
- sense = (nlow >= nhigh ? 1 : 0);
+ sense = nlow >= nhigh ? 1 : 0;
dev_info(&dev->dev, "auto-detected active %s receiver\n",
sense ? "low" : "high");
} else
}
pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq);
- init_timer(&timerlist);
- timerlist.function = sir_timeout;
- timerlist.data = 0xabadcafe;
+ setup_timer(&timerlist, sir_timeout, 0);
return 0;
}
struct IR *ir = filep->private_data;
if (ir == NULL) {
- dev_err(ir->l.dev,
- "close: no private_data attached to the file!\n");
+ pr_err("ir: close: no private_data attached to the file!\n");
return -ENODEV;
}
remaining -= (dev->i2c_wr_max - 1)) {
len = remaining;
if (len > (dev->i2c_wr_max - 1))
- len = (dev->i2c_wr_max - 1);
+ len = dev->i2c_wr_max - 1;
ret = regmap_bulk_write(dev->regmap[0], 0xf6,
&fw->data[fw->size - remaining], len);
#include "mn88473_priv.h"
static int mn88473_get_tune_settings(struct dvb_frontend *fe,
- struct dvb_frontend_tune_settings *s)
+ struct dvb_frontend_tune_settings *s)
{
s->min_delay_ms = 1000;
return 0;
u8 delivery_system_val, if_val[3], bw_val[7];
dev_dbg(&client->dev,
- "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
- c->delivery_system, c->modulation,
- c->frequency, c->bandwidth_hz, c->symbol_rate,
- c->inversion, c->stream_id);
+ "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
+ c->delivery_system,
+ c->modulation,
+ c->frequency,
+ c->bandwidth_hz,
+ c->symbol_rate,
+ c->inversion,
+ c->stream_id);
if (!dev->warm) {
ret = -EAGAIN;
break;
default:
dev_err(&client->dev, "IF frequency %d not supported\n",
- if_frequency);
+ if_frequency);
ret = -EINVAL;
goto err;
}
}
dev_info(&client->dev, "downloading firmware from file '%s'\n",
- fw_file);
+ fw_file);
ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
if (ret)
remaining -= (dev->i2c_wr_max - 1)) {
len = remaining;
if (len > (dev->i2c_wr_max - 1))
- len = (dev->i2c_wr_max - 1);
+ len = dev->i2c_wr_max - 1;
ret = regmap_bulk_write(dev->regmap[0], 0xf6,
- &fw->data[fw->size - remaining], len);
+ &fw->data[fw->size - remaining], len);
if (ret) {
dev_err(&client->dev, "firmware download failed=%d\n",
- ret);
+ ret);
goto err;
}
}
};
static int mn88473_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
+ const struct i2c_device_id *id)
{
struct mn88473_config *config = client->dev.platform_data;
struct mn88473_dev *dev;
subdev = v4l2_i2c_new_subdev_board(&iss->v4l2_dev, adapter,
board_info->board_info, NULL);
if (subdev == NULL) {
- dev_err(iss->dev, "%s: Unable to register subdev %s\n",
- __func__, board_info->board_info->type);
+ dev_err(iss->dev, "Unable to register subdev %s\n",
+ board_info->board_info->type);
continue;
}
iss->media_dev.link_notify = iss_pipeline_link_notify;
ret = media_device_register(&iss->media_dev);
if (ret < 0) {
- dev_err(iss->dev, "%s: Media device registration failed (%d)\n",
- __func__, ret);
+ dev_err(iss->dev, "Media device registration failed (%d)\n",
+ ret);
return ret;
}
iss->v4l2_dev.mdev = &iss->media_dev;
ret = v4l2_device_register(iss->dev, &iss->v4l2_dev);
if (ret < 0) {
- dev_err(iss->dev, "%s: V4L2 device registration failed (%d)\n",
- __func__, ret);
+ dev_err(iss->dev, "V4L2 device registration failed (%d)\n",
+ ret);
goto done;
}
break;
default:
- dev_err(iss->dev, "%s: invalid interface type %u\n",
- __func__, subdevs->interface);
+ dev_err(iss->dev, "invalid interface type %u\n",
+ subdevs->interface);
ret = -EINVAL;
goto done;
}
ret = video_register_device(&video->video, VFL_TYPE_GRABBER, -1);
if (ret < 0)
dev_err(video->iss->dev,
- "%s: could not register video device (%d)\n",
- __func__, ret);
+ "could not register video device (%d)\n", ret);
return ret;
}
break;
case NAND_CMD_READID:
state->buf_ptr = 0;
- spinand_read_id(info->spi, (u8 *)state->buf);
+ spinand_read_id(info->spi, state->buf);
break;
case NAND_CMD_PARAM:
state->buf_ptr = 0;
* Allocate our adapter data structure and attach it to the device.
*/
adapter = (struct xlr_adapter *)
- devm_kzalloc(&pdev->dev, sizeof(adapter), GFP_KERNEL);
+ devm_kzalloc(&pdev->dev, sizeof(*adapter), GFP_KERNEL);
if (!adapter) {
err = -ENOMEM;
return err;
Say Y here to enable support for a nVidia compliant embedded
controller.
+ To compile this driver as a module, say M here: the module will be
+ called mfd-nvec
+
config KEYBOARD_NVEC
tristate "Keyboard on nVidia compliant EC"
depends on MFD_NVEC && INPUT
Say Y here to enable support for a keyboard connected to
a nVidia compliant embedded controller.
+ To compile this driver as a module, say M here: the module will be
+ called keyboard-nvec
+
config SERIO_NVEC_PS2
tristate "PS2 on nVidia EC"
depends on MFD_NVEC && SERIO
Say Y here to enable support for a Touchpad / Mouse connected
to a nVidia compliant embedded controller.
+ To compile this driver as a module, say M here: the module will be
+ called serio-nvec-ps2
+
+
config NVEC_POWER
tristate "NVEC charger and battery"
depends on MFD_NVEC && POWER_SUPPLY
Say Y to enable support for battery and charger interface for
nVidia compliant embedded controllers.
+ To compile this driver as a module, say M here: the module will be
+ called nvec-power
+
+
config NVEC_PAZ00
tristate "Support for OEM specific functions on Compal PAZ00 based devices"
depends on MFD_NVEC && LEDS_CLASS
help
Say Y to enable control of the yellow side leds on Compal PAZ00 based
devices, e.g. Toshbia AC100 and Dynabooks AZ netbooks.
+
+ To compile this driver as a module, say M here: the module will be
+ called nvec-paz00
+
}
nvec = devm_kzalloc(&pdev->dev, sizeof(struct nvec_chip), GFP_KERNEL);
- if (nvec == NULL)
+ if (!nvec)
return -ENOMEM;
platform_set_drvdata(pdev, nvec);
int ret = 0;
led = devm_kzalloc(&pdev->dev, sizeof(*led), GFP_KERNEL);
- if (led == NULL)
+ if (!led)
return -ENOMEM;
led->cdev.max_brightness = NVEC_LED_MAX;
struct nvec_chip *nvec = dev_get_drvdata(pdev->dev.parent);
power = devm_kzalloc(&pdev->dev, sizeof(struct nvec_power), GFP_NOWAIT);
- if (power == NULL)
+ if (!power)
return -ENOMEM;
dev_set_drvdata(&pdev->dev, power);
char mouse_reset[] = { NVEC_PS2, SEND_COMMAND, PSMOUSE_RST, 3 };
ser_dev = devm_kzalloc(&pdev->dev, sizeof(struct serio), GFP_KERNEL);
- if (ser_dev == NULL)
+ if (!ser_dev)
return -ENOMEM;
ser_dev->id.type = SERIO_PS_PSTHRU;
return 0;
}
-static struct of_device_id octeon_usb_match[] = {
+static const struct of_device_id octeon_usb_match[] = {
{
.compatible = "cavium,octeon-5750-usbc",
},
return 0;
}
-static struct of_device_id cvm_oct_match[] = {
+static const struct of_device_id cvm_oct_match[] = {
{
.compatible = "cavium,octeon-3860-pip",
},
*/
static struct oz_endpoint *oz_ep_alloc(int buffer_size, gfp_t mem_flags)
{
- struct oz_endpoint *ep =
- kzalloc(sizeof(struct oz_endpoint)+buffer_size, mem_flags);
- if (ep) {
- INIT_LIST_HEAD(&ep->urb_list);
- INIT_LIST_HEAD(&ep->link);
- ep->credit = -1;
- if (buffer_size) {
- ep->buffer_size = buffer_size;
- ep->buffer = (u8 *)(ep+1);
- }
+ struct oz_endpoint *ep;
+
+ ep = kzalloc(sizeof(struct oz_endpoint)+buffer_size, mem_flags);
+ if (!ep)
+ return NULL;
+
+ INIT_LIST_HEAD(&ep->urb_list);
+ INIT_LIST_HEAD(&ep->link);
+ ep->credit = -1;
+ if (buffer_size) {
+ ep->buffer_size = buffer_size;
+ ep->buffer = (u8 *)(ep+1);
}
+
return ep;
}
*/
struct oz_pd *oz_pd_alloc(const u8 *mac_addr)
{
- struct oz_pd *pd = kzalloc(sizeof(struct oz_pd), GFP_ATOMIC);
-
- if (pd) {
- int i;
-
- atomic_set(&pd->ref_count, 2);
- for (i = 0; i < OZ_NB_APPS; i++)
- spin_lock_init(&pd->app_lock[i]);
- pd->last_rx_pkt_num = 0xffffffff;
- oz_pd_set_state(pd, OZ_PD_S_IDLE);
- pd->max_tx_size = OZ_MAX_TX_SIZE;
- ether_addr_copy(pd->mac_addr, mac_addr);
- oz_elt_buf_init(&pd->elt_buff);
- spin_lock_init(&pd->tx_frame_lock);
- INIT_LIST_HEAD(&pd->tx_queue);
- INIT_LIST_HEAD(&pd->farewell_list);
- pd->last_sent_frame = &pd->tx_queue;
- spin_lock_init(&pd->stream_lock);
- INIT_LIST_HEAD(&pd->stream_list);
- tasklet_init(&pd->heartbeat_tasklet, oz_pd_heartbeat_handler,
- (unsigned long)pd);
- tasklet_init(&pd->timeout_tasklet, oz_pd_timeout_handler,
- (unsigned long)pd);
- hrtimer_init(&pd->heartbeat, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
- hrtimer_init(&pd->timeout, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
- pd->heartbeat.function = oz_pd_heartbeat_event;
- pd->timeout.function = oz_pd_timeout_event;
- }
+ struct oz_pd *pd;
+ int i;
+
+ pd = kzalloc(sizeof(struct oz_pd), GFP_ATOMIC);
+ if (!pd)
+ return NULL;
+
+ atomic_set(&pd->ref_count, 2);
+ for (i = 0; i < OZ_NB_APPS; i++)
+ spin_lock_init(&pd->app_lock[i]);
+ pd->last_rx_pkt_num = 0xffffffff;
+ oz_pd_set_state(pd, OZ_PD_S_IDLE);
+ pd->max_tx_size = OZ_MAX_TX_SIZE;
+ ether_addr_copy(pd->mac_addr, mac_addr);
+ oz_elt_buf_init(&pd->elt_buff);
+ spin_lock_init(&pd->tx_frame_lock);
+ INIT_LIST_HEAD(&pd->tx_queue);
+ INIT_LIST_HEAD(&pd->farewell_list);
+ pd->last_sent_frame = &pd->tx_queue;
+ spin_lock_init(&pd->stream_lock);
+ INIT_LIST_HEAD(&pd->stream_list);
+ tasklet_init(&pd->heartbeat_tasklet, oz_pd_heartbeat_handler,
+ (unsigned long)pd);
+ tasklet_init(&pd->timeout_tasklet, oz_pd_timeout_handler,
+ (unsigned long)pd);
+ hrtimer_init(&pd->heartbeat, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ hrtimer_init(&pd->timeout, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ pd->heartbeat.function = oz_pd_heartbeat_event;
+ pd->timeout.function = oz_pd_timeout_event;
+
return pd;
}
*/
int oz_isoc_stream_create(struct oz_pd *pd, u8 ep_num)
{
- struct oz_isoc_stream *st =
- kzalloc(sizeof(struct oz_isoc_stream), GFP_ATOMIC);
+ struct oz_isoc_stream *st;
+
+ st = kzalloc(sizeof(struct oz_isoc_stream), GFP_ATOMIC);
if (!st)
return -ENOMEM;
st->ep_num = ep_num;
kfree_skb(skb);
return;
}
- oz_hdr->control = (OZ_PROTOCOL_VERSION<<OZ_VERSION_SHIFT);
+ oz_hdr->control = OZ_PROTOCOL_VERSION<<OZ_VERSION_SHIFT;
oz_hdr->last_pkt_num = 0;
put_unaligned(0, &oz_hdr->pkt_num);
elt->type = OZ_ELT_CONNECT_RSP;
static int keypad_initialized;
-static char init_in_progress;
-
static void (*lcd_write_cmd)(int);
static void (*lcd_write_data)(int);
static void (*lcd_clear_fast)(void);
static void keypad_send_key(const char *string, int max_len)
{
- if (init_in_progress)
- return;
-
/* send the key to the device only if a process is attached to it. */
if (!atomic_read(&keypad_available)) {
while (max_len-- && keypad_buflen < KEYPAD_BUFFER && *string) {
if (scan_timer.function != NULL)
return; /* already started */
- init_timer(&scan_timer);
+ setup_timer(&scan_timer, (void *)&panel_scan_timer, 0);
scan_timer.expires = jiffies + INPUT_POLL_TIME;
- scan_timer.data = 0;
- scan_timer.function = (void *)&panel_scan_timer;
add_timer(&scan_timer);
}
if (misc_register(&keypad_dev))
goto err_lcd_unreg;
}
+ register_reboot_notifier(&panel_notifier);
return;
err_lcd_unreg:
return;
}
+ unregister_reboot_notifier(&panel_notifier);
+
if (keypad.enabled && keypad_initialized) {
misc_deregister(&keypad_dev);
keypad_initialized = 0;
/* init function */
static int __init panel_init_module(void)
{
- int selected_keypad_type = NOT_SET;
+ int selected_keypad_type = NOT_SET, err;
/* take care of an eventual profile */
switch (profile) {
break;
}
- /*
- * Init lcd struct with load-time values to preserve exact current
- * functionality (at least for now).
- */
- lcd.height = lcd_height;
- lcd.width = lcd_width;
- lcd.bwidth = lcd_bwidth;
- lcd.hwidth = lcd_hwidth;
- lcd.charset = lcd_charset;
- lcd.proto = lcd_proto;
- lcd.pins.e = lcd_e_pin;
- lcd.pins.rs = lcd_rs_pin;
- lcd.pins.rw = lcd_rw_pin;
- lcd.pins.cl = lcd_cl_pin;
- lcd.pins.da = lcd_da_pin;
- lcd.pins.bl = lcd_bl_pin;
-
- /* Leave it for now, just in case */
- lcd.esc_seq.len = -1;
-
/*
* Overwrite selection with module param values (both keypad and lcd),
* where the deprecated params have lower prio.
lcd.enabled = (selected_lcd_type > 0);
+ if (lcd.enabled) {
+ /*
+ * Init lcd struct with load-time values to preserve exact
+ * current functionality (at least for now).
+ */
+ lcd.height = lcd_height;
+ lcd.width = lcd_width;
+ lcd.bwidth = lcd_bwidth;
+ lcd.hwidth = lcd_hwidth;
+ lcd.charset = lcd_charset;
+ lcd.proto = lcd_proto;
+ lcd.pins.e = lcd_e_pin;
+ lcd.pins.rs = lcd_rs_pin;
+ lcd.pins.rw = lcd_rw_pin;
+ lcd.pins.cl = lcd_cl_pin;
+ lcd.pins.da = lcd_da_pin;
+ lcd.pins.bl = lcd_bl_pin;
+
+ /* Leave it for now, just in case */
+ lcd.esc_seq.len = -1;
+ }
+
switch (selected_keypad_type) {
case KEYPAD_TYPE_OLD:
keypad_profile = old_keypad_profile;
break;
}
- /* tells various subsystems about the fact that we are initializing */
- init_in_progress = 1;
-
- if (parport_register_driver(&panel_driver)) {
- pr_err("could not register with parport. Aborting.\n");
- return -EIO;
- }
-
if (!lcd.enabled && !keypad.enabled) {
- /* no device enabled, let's release the parport */
- if (pprt) {
- parport_release(pprt);
- parport_unregister_device(pprt);
- pprt = NULL;
- }
- parport_unregister_driver(&panel_driver);
+ /* no device enabled, let's exit */
pr_err("driver version " PANEL_VERSION " disabled.\n");
return -ENODEV;
}
- register_reboot_notifier(&panel_notifier);
+ err = parport_register_driver(&panel_driver);
+ if (err) {
+ pr_err("could not register with parport. Aborting.\n");
+ return err;
+ }
if (pprt)
pr_info("driver version " PANEL_VERSION
else
pr_info("driver version " PANEL_VERSION
" not yet registered\n");
- /* tells various subsystems about the fact that initialization
- is finished */
- init_in_progress = 0;
return 0;
}
static void __exit panel_cleanup_module(void)
{
- unregister_reboot_notifier(&panel_notifier);
if (scan_timer.function != NULL)
del_timer_sync(&scan_timer);
#include <drv_types.h>
#include <wifi.h>
#include <ieee80211.h>
+#include <asm/unaligned.h>
#ifdef CONFIG_88EU_AP_MODE
if (true) {
u8 *p, *dst_ie, *premainder_ie = NULL;
u8 *pbackup_remainder_ie = NULL;
- __le16 tim_bitmap_le;
uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen;
- tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap);
-
p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_);
if (p != NULL && tim_ielen > 0) {
tim_ielen += 2;
*dst_ie++ = 0;
if (tim_ielen == 4) {
- *dst_ie++ = *(u8 *)&tim_bitmap_le;
+ *dst_ie++ = pstapriv->tim_bitmap & 0xff;
} else if (tim_ielen == 5) {
- memcpy(dst_ie, &tim_bitmap_le, 2);
+ put_unaligned_le16(pstapriv->tim_bitmap, dst_ie);
dst_ie += 2;
}
if (res == _SUCCESS) {
pmlmepriv->scan_start_time = jiffies;
- _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT);
+ mod_timer(&pmlmepriv->scan_to_timer,
+ jiffies + msecs_to_jiffies(SCANNING_TIMEOUT));
rtw_led_control(padapter, LED_CTL_SITE_SURVEY);
if (pcmd->res == H2C_DROPPED) {
/* TODO: cancel timer and do timeout handler directly... */
/* need to make timeout handlerOS independent */
- _set_timer(&pmlmepriv->scan_to_timer, 1);
+ mod_timer(&pmlmepriv->scan_to_timer,
+ jiffies + msecs_to_jiffies(1));
} else if (pcmd->res != H2C_SUCCESS) {
- _set_timer(&pmlmepriv->scan_to_timer, 1);
+ mod_timer(&pmlmepriv->scan_to_timer,
+ jiffies + msecs_to_jiffies(1));
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\n ********Error: MgntActrtw_set_802_11_bssid_LIST_SCAN Fail ************\n\n."));
}
if (pcmd->res == H2C_DROPPED) {
/* TODO: cancel timer and do timeout handler directly... */
/* need to make timeout handlerOS independent */
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
} else if (pcmd->res != H2C_SUCCESS) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("********Error:rtw_select_and_join_from_scanned_queue Wait Sema Fail ************\n"));
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
}
rtw_free_cmd_obj(pcmd);
if (pcmd->res != H2C_SUCCESS) {
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\n ********Error: rtw_createbss_cmd_callback Fail ************\n\n."));
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
}
del_timer_sync(&pmlmepriv->assoc_timer);
while ((rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN_88E)) {
/* Check PG header for section num. */
if ((rtemp8 & 0x1F) == 0x0F) { /* extended header */
- u1temp = ((rtemp8 & 0xE0) >> 5);
+ u1temp = (rtemp8 & 0xE0) >> 5;
rtemp8 = *(phymap+eFuse_Addr);
if ((rtemp8 & 0x0F) == 0x0F) {
eFuse_Addr++;
continue;
} else {
offset = ((rtemp8 & 0xF0) >> 1) | u1temp;
- wren = (rtemp8 & 0x0F);
+ wren = rtemp8 & 0x0F;
eFuse_Addr++;
}
} else {
- offset = ((rtemp8 >> 4) & 0x0f);
- wren = (rtemp8 & 0x0f);
+ offset = (rtemp8 >> 4) & 0x0f;
+ wren = rtemp8 & 0x0f;
}
if (offset < EFUSE_MAX_SECTION_88E) {
#include <wlan_bssdef.h>
u8 RTW_WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 };
-u16 RTW_WPA_VERSION = 1;
u8 WPA_AUTH_KEY_MGMT_NONE[] = { 0x00, 0x50, 0xf2, 0 };
u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x50, 0xf2, 1 };
u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x50, 0xf2, 2 };
/* Search required WPA or WPA2 IE and copy to sec_ie[] */
- cnt = (_TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_);
+ cnt = _TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_;
sec_idx = 0;
select_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv);
if (select_ret == _SUCCESS) {
pmlmepriv->to_join = false;
- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
} else {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == true) {
/* submit createbss_cmd to change to a ADHOC_MASTER */
/* Callback function of LED BlinkTimer, */
/* it just schedules to corresponding BlinkWorkItem/led_blink_hdl */
/* */
-void BlinkTimerCallback(void *data)
+void BlinkTimerCallback(unsigned long data)
{
- struct LED_871x *pLed = data;
+ struct LED_871x *pLed = (struct LED_871x *)data;
struct adapter *padapter = pLed->padapter;
if ((padapter->bSurpriseRemoved) || (padapter->bDriverStopped))
ResetLedStatus(pLed);
- _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed);
+ setup_timer(&(pLed->BlinkTimer), BlinkTimerCallback,
+ (unsigned long)pLed);
INIT_WORK(&(pLed->BlinkWorkItem), BlinkWorkItemCallback);
}
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_NORMAL:
if (pLed->bLedOn)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_SCAN:
pLed->BlinkTimes--;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
}
pLed->bLedScanBlinkInProgress = false;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_BLINK_TXRX:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
}
pLed->BlinkTimes = 0;
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
case LED_BLINK_WPS_STOP: /* WPS success */
if (pLed->BlinkingLedState == RTW_LED_ON)
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
RT_TRACE(_module_rtl8712_led_c_, _drv_info_, ("CurrLedState %d\n", pLed->CurrLedState));
pLed->bLedWPSBlinkInProgress = false;
} else {
pLed->BlinkingLedState = RTW_LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA));
}
break;
default:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_LINK:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_SITE_SURVEY:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_START_WPS: /* wait until xinpin finish */
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_STOP_WPS:
pLed->CurrLedState = LED_BLINK_WPS_STOP;
if (pLed->bLedOn) {
pLed->BlinkingLedState = RTW_LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCCESS_INTERVAL_ALPHA));
} else {
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_STOP_WPS_FAIL:
pLed->BlinkingLedState = RTW_LED_OFF;
else
pLed->BlinkingLedState = RTW_LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = RTW_LED_OFF;
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
if (rtw_select_and_join_from_scanned_queue(pmlmepriv) == _SUCCESS) {
- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
} else {
struct wlan_bssid_ex *pdev_network = &(adapter->registrypriv.dev_network);
u8 *pibss = adapter->registrypriv.dev_network.MacAddress;
pmlmepriv->to_join = false;
s_ret = rtw_select_and_join_from_scanned_queue(pmlmepriv);
if (_SUCCESS == s_ret) {
- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
} else if (s_ret == 2) { /* there is no need to wait for join */
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
rtw_indicate_connect(adapter);
} else if (pnetwork->join_res == -4) {
rtw_reset_securitypriv(adapter);
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == true) {
RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("fail! clear _FW_UNDER_LINKING ^^^fw_state=%x\n", get_fwstate(pmlmepriv)));
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
} else { /* if join_res < 0 (join fails), then try again */
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
* _rtw_join_timeout_handler - Timeout/faliure handler for CMD JoinBss
* @adapter: pointer to struct adapter structure
*/
-void _rtw_join_timeout_handler (void *function_context)
+void _rtw_join_timeout_handler (unsigned long data)
{
- struct adapter *adapter = function_context;
+ struct adapter *adapter = (struct adapter *)data;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
int do_join_r;
* rtw_scan_timeout_handler - Timeout/Faliure handler for CMD SiteSurvey
* @adapter: pointer to struct adapter structure
*/
-void rtw_scan_timeout_handler (void *function_context)
+void rtw_scan_timeout_handler (unsigned long data)
{
- struct adapter *adapter = function_context;
+ struct adapter *adapter = (struct adapter *)data;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
DBG_88E(FUNC_ADPT_FMT" fw_state=%x\n", FUNC_ADPT_ARG(adapter), get_fwstate(pmlmepriv));
}
}
-void rtw_dynamic_check_timer_handlder(void *function_context)
+void rtw_dynamic_check_timer_handlder(unsigned long data)
{
- struct adapter *adapter = (struct adapter *)function_context;
+ struct adapter *adapter = (struct adapter *)data;
struct registry_priv *pregistrypriv = &adapter->registrypriv;
if (!adapter)
rtw_auto_scan_handler(adapter);
}
exit:
- _set_timer(&adapter->mlmepriv.dynamic_chk_timer, 2000);
+ mod_timer(&adapter->mlmepriv.dynamic_chk_timer,
+ jiffies + msecs_to_jiffies(2000));
}
#define RTW_SCAN_RESULT_EXPIRE 2000
p = rtw_get_ie(pie+sizeof(struct ndis_802_11_fixed_ie), _HT_CAPABILITY_IE_, &len, ie_len-sizeof(struct ndis_802_11_fixed_ie));
if (p && len > 0) {
pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2);
- max_ampdu_sz = (pht_capie->ampdu_params_info & IEEE80211_HT_CAP_AMPDU_FACTOR);
+ max_ampdu_sz = pht_capie->ampdu_params_info & IEEE80211_HT_CAP_AMPDU_FACTOR;
max_ampdu_sz = 1 << (max_ampdu_sz+3); /* max_ampdu_sz (kbytes); */
phtpriv->rx_ampdu_maxlen = max_ampdu_sz;
}
break;
case RTW_WLAN_ACTION_ADDBA_RESP: /* ADDBA response */
status = get_unaligned_le16(&frame_body[3]);
- tid = ((frame_body[5] >> 2) & 0x7);
+ tid = (frame_body[5] >> 2) & 0x7;
if (status == 0) { /* successful */
DBG_88E("agg_enable for TID=%d\n", tid);
psta->htpriv.agg_enable_bitmap |= 1 << tid;
/* setting IV for auth seq #3 */
if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key == 1)) {
- val32 = ((pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30));
+ val32 = (pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30);
le_tmp32 = cpu_to_le32(val32);
pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&le_tmp32, &(pattrib->pktlen));
} while (pmlmeinfo->dialogToken == 0);
pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen));
- BA_para_set = (0x1002 | ((status & 0xf) << 2)); /* immediate ack & 64 buffer size */
+ BA_para_set = 0x1002 | ((status & 0xf) << 2); /* immediate ack & 64 buffer size */
le_tmp = cpu_to_le16(BA_para_set);
pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(le_tmp)), &(pattrib->pktlen));
/* and enable a timer */
beacon_timeout = decide_wait_for_beacon_timeout(pmlmeinfo->bcn_interval);
set_link_timer(pmlmeext, beacon_timeout);
- _set_timer(&padapter->mlmepriv.assoc_timer,
- (REAUTH_TO * REAUTH_LIMIT) + (REASSOC_TO*REASSOC_LIMIT) + beacon_timeout);
+ mod_timer(&padapter->mlmepriv.assoc_timer, jiffies +
+ msecs_to_jiffies((REAUTH_TO * REAUTH_LIMIT) + (REASSOC_TO * REASSOC_LIMIT) + beacon_timeout));
pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE;
} else if (caps&cap_IBSS) { /* adhoc client */
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct survey_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct survey_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_KERNEL);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_KERNEL);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
if (psta)
mac_id = (int)psta->mac_id;
else
- mac_id = (-1);
+ mac_id = -1;
pdel_sta_evt->mac_id = mac_id;
if (pcmd_obj == NULL)
return;
- cmdsz = (sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_KERNEL);
if (pevtcmd == NULL) {
kfree(pcmd_obj);
}
}
-void survey_timer_hdl(void *function_context)
+void survey_timer_hdl(unsigned long data)
{
- struct adapter *padapter = function_context;
+ struct adapter *padapter = (struct adapter *)data;
struct cmd_obj *ph2c;
struct sitesurvey_parm *psurveyPara;
struct cmd_priv *pcmdpriv = &padapter->cmdpriv;
return;
}
-void link_timer_hdl(void *function_context)
+void link_timer_hdl(unsigned long data)
{
- struct adapter *padapter = (struct adapter *)function_context;
+ struct adapter *padapter = (struct adapter *)data;
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
return;
}
-void addba_timer_hdl(void *function_context)
+void addba_timer_hdl(unsigned long data)
{
- struct sta_info *psta = function_context;
+ struct sta_info *psta = (struct sta_info *)data;
struct ht_priv *phtpriv;
if (!psta)
psta = rtw_get_stainfo(pstapriv, pparm->addr);
if (psta) {
- ctrl = (BIT(15) | ((pparm->algorithm) << 2));
+ ctrl = BIT(15) | ((pparm->algorithm) << 2);
DBG_88E("r871x_set_stakey_hdl(): enc_algorithm=%d\n", pparm->algorithm);
return H2C_REJECTED;
}
- cam_id = (psta->mac_id + 3);/* 0~3 for default key, cmd_id = macid + 3, macid = aid+1; */
+ cam_id = psta->mac_id + 3;/* 0~3 for default key, cmd_id = macid + 3, macid = aid+1; */
DBG_88E("Write CAM, mac_addr =%x:%x:%x:%x:%x:%x, cam_entry=%d\n", pparm->addr[0],
pparm->addr[1], pparm->addr[2], pparm->addr[3], pparm->addr[4],
if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) ||
((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) {
issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid);
- _set_timer(&psta->addba_retry_timer, ADDBA_TO);
+ mod_timer(&psta->addba_retry_timer,
+ jiffies + msecs_to_jiffies(ADDBA_TO));
} else {
psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid);
}
pwrpriv->ps_processing = false;
}
-static void pwr_state_check_handler(void *FunctionContext)
+static void pwr_state_check_handler(unsigned long data)
{
- struct adapter *padapter = FunctionContext;
+ struct adapter *padapter = (struct adapter *)data;
rtw_ps_cmd(padapter);
}
pwrctrlpriv->btcoex_rfon = false;
- _init_timer(&(pwrctrlpriv->pwr_state_check_timer), padapter->pnetdev, pwr_state_check_handler, (u8 *)padapter);
+ setup_timer(&pwrctrlpriv->pwr_state_check_timer,
+ pwr_state_check_handler,
+ (unsigned long)padapter);
}
inline void rtw_set_ips_deny(struct adapter *padapter, u32 ms)
0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00
};
-void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS);
+void rtw_signal_stat_timer_hdl(unsigned long data);
void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv)
{
res = rtw_hal_init_recv_priv(padapter);
- _init_timer(&precvpriv->signal_stat_timer, padapter->pnetdev, RTW_TIMER_HDL_NAME(signal_stat), padapter);
+ setup_timer(&precvpriv->signal_stat_timer,
+ rtw_signal_stat_timer_hdl,
+ (unsigned long)padapter);
precvpriv->signal_stat_sampling_interval = 1000; /* ms */
/* recv_indicatepkts_in_order(padapter, preorder_ctrl, true); */
if (recv_indicatepkts_in_order(padapter, preorder_ctrl, false)) {
- _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);
+ mod_timer(&preorder_ctrl->reordering_ctrl_timer,
+ jiffies + msecs_to_jiffies(REORDER_WAIT_TIME));
spin_unlock_bh(&ppending_recvframe_queue->lock);
} else {
spin_unlock_bh(&ppending_recvframe_queue->lock);
return _FAIL;
}
-void rtw_reordering_ctrl_timeout_handler(void *pcontext)
+void rtw_reordering_ctrl_timeout_handler(unsigned long data)
{
- struct recv_reorder_ctrl *preorder_ctrl = pcontext;
+ struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)data;
struct adapter *padapter = preorder_ctrl->padapter;
struct __queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
spin_lock_bh(&ppending_recvframe_queue->lock);
if (recv_indicatepkts_in_order(padapter, preorder_ctrl, true) == true)
- _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);
+ mod_timer(&preorder_ctrl->reordering_ctrl_timer,
+ jiffies + msecs_to_jiffies(REORDER_WAIT_TIME));
spin_unlock_bh(&ppending_recvframe_queue->lock);
}
return ret;
}
-void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS)
+void rtw_signal_stat_timer_hdl(unsigned long data)
{
- struct adapter *adapter = (struct adapter *)FunctionContext;
+ struct adapter *adapter = (struct adapter *)data;
struct recv_priv *recvpriv = &adapter->recvpriv;
u32 tmp_s, tmp_q;
/* update value of signal_strength, rssi, signal_qual */
if (check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) == false) {
- tmp_s = (avg_signal_strength+(_alpha-1)*recvpriv->signal_strength);
+ tmp_s = avg_signal_strength+(_alpha-1)*recvpriv->signal_strength;
if (tmp_s % _alpha)
tmp_s = tmp_s/_alpha + 1;
else
if (tmp_s > 100)
tmp_s = 100;
- tmp_q = (avg_signal_qual+(_alpha-1)*recvpriv->signal_qual);
+ tmp_q = avg_signal_qual+(_alpha-1)*recvpriv->signal_qual;
if (tmp_q % _alpha)
tmp_q = tmp_q/_alpha + 1;
else
u8 add1b[4];
u8 add1bf7[4];
u8 rotl[4];
- u8 swap_halfs[4];
+ u8 swap_halves[4];
u8 andf7[4];
u8 rotr[4];
u8 temp[4];
add1b[i] = 0x00;
}
- swap_halfs[0] = in[2]; /* Swap halves */
- swap_halfs[1] = in[3];
- swap_halfs[2] = in[0];
- swap_halfs[3] = in[1];
+ swap_halves[0] = in[2]; /* Swap halves */
+ swap_halves[1] = in[3];
+ swap_halves[2] = in[0];
+ swap_halves[3] = in[1];
rotl[0] = in[3]; /* Rotate left 8 bits */
rotl[1] = in[0];
rotr[3] = temp[0];
xor_32(add1bf7, rotr, temp);
- xor_32(swap_halfs, rotl, tempb);
+ xor_32(swap_halves, rotl, tempb);
xor_32(temp, tempb, out);
}
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
- frsubtype = frsubtype>>4;
+ frsubtype >>= 4;
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
num_blocks = plen / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
/* uint offset = 0; */
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
- frsubtype = frsubtype>>4;
+ frsubtype >>= 4;
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
num_blocks = (plen-8) / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
if (WIFI_STATUS_SUCCESS != psrtpriv->Wifi_Error_Status) {
DBG_88E("==>%s error_status(0x%x)\n", __func__, psrtpriv->Wifi_Error_Status);
- status = (psrtpriv->Wifi_Error_Status & (~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL)));
+ status = psrtpriv->Wifi_Error_Status & (~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL));
}
DBG_88E("==> %s wifi_status(0x%x)\n", __func__, status);
unsigned char networktype_to_raid(unsigned char network_type)
{
- unsigned char raid;
-
switch (network_type) {
case WIRELESS_11B:
- raid = RATR_INX_WIRELESS_B;
- break;
+ return RATR_INX_WIRELESS_B;
case WIRELESS_11A:
case WIRELESS_11G:
- raid = RATR_INX_WIRELESS_G;
- break;
+ return RATR_INX_WIRELESS_G;
case WIRELESS_11BG:
- raid = RATR_INX_WIRELESS_GB;
- break;
+ return RATR_INX_WIRELESS_GB;
case WIRELESS_11_24N:
case WIRELESS_11_5N:
- raid = RATR_INX_WIRELESS_N;
- break;
+ return RATR_INX_WIRELESS_N;
case WIRELESS_11A_5N:
case WIRELESS_11G_24N:
- raid = RATR_INX_WIRELESS_NG;
- break;
+ return RATR_INX_WIRELESS_NG;
case WIRELESS_11BG_24N:
- raid = RATR_INX_WIRELESS_NGB;
- break;
+ return RATR_INX_WIRELESS_NGB;
default:
- raid = RATR_INX_WIRELESS_GB;
- break;
+ return RATR_INX_WIRELESS_GB;
}
- return raid;
}
u8 judge_network_type(struct adapter *padapter, unsigned char *rate, int ratelen)
static unsigned char ratetbl_val_2wifirate(unsigned char rate)
{
- unsigned char val = 0;
-
switch (rate & 0x7f) {
case 0:
- val = IEEE80211_CCK_RATE_1MB;
- break;
+ return IEEE80211_CCK_RATE_1MB;
case 1:
- val = IEEE80211_CCK_RATE_2MB;
- break;
+ return IEEE80211_CCK_RATE_2MB;
case 2:
- val = IEEE80211_CCK_RATE_5MB;
- break;
+ return IEEE80211_CCK_RATE_5MB;
case 3:
- val = IEEE80211_CCK_RATE_11MB;
- break;
+ return IEEE80211_CCK_RATE_11MB;
case 4:
- val = IEEE80211_OFDM_RATE_6MB;
- break;
+ return IEEE80211_OFDM_RATE_6MB;
case 5:
- val = IEEE80211_OFDM_RATE_9MB;
- break;
+ return IEEE80211_OFDM_RATE_9MB;
case 6:
- val = IEEE80211_OFDM_RATE_12MB;
- break;
+ return IEEE80211_OFDM_RATE_12MB;
case 7:
- val = IEEE80211_OFDM_RATE_18MB;
- break;
+ return IEEE80211_OFDM_RATE_18MB;
case 8:
- val = IEEE80211_OFDM_RATE_24MB;
- break;
+ return IEEE80211_OFDM_RATE_24MB;
case 9:
- val = IEEE80211_OFDM_RATE_36MB;
- break;
+ return IEEE80211_OFDM_RATE_36MB;
case 10:
- val = IEEE80211_OFDM_RATE_48MB;
- break;
+ return IEEE80211_OFDM_RATE_48MB;
case 11:
- val = IEEE80211_OFDM_RATE_54MB;
- break;
+ return IEEE80211_OFDM_RATE_54MB;
+ default:
+ return 0;
}
- return val;
}
static int is_basicrate(struct adapter *padapter, unsigned char rate)
for (j = 5; j >= 0; j--) {
switch (j) {
case 0:
- val = (ctrl | (mac[0] << 16) | (mac[1] << 24));
+ val = ctrl | (mac[0] << 16) | (mac[1] << 24);
break;
case 1:
- val = (mac[2] | (mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24));
+ val = mac[2] | (mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24);
break;
default:
i = (j - 2) << 2;
- val = (key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24));
+ val = key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24);
break;
}
/* AIFS = AIFSN * slot time + SIFS - r2t phy delay */
AIFS = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN & 0x0f) * pmlmeinfo->slotTime + aSifsTime;
- ECWMin = (pmlmeinfo->WMM_param.ac_param[i].CW & 0x0f);
+ ECWMin = pmlmeinfo->WMM_param.ac_param[i].CW & 0x0f;
ECWMax = (pmlmeinfo->WMM_param.ac_param[i].CW & 0xf0) >> 4;
TXOP = le16_to_cpu(pmlmeinfo->WMM_param.ac_param[i].TXOP_limit);
pxmitpriv->wmm_para_seq[i] = inx[i];
DBG_88E("wmm_para_seq(%d): %d\n", i, pxmitpriv->wmm_para_seq[i]);
}
-
- return;
}
static void bwmode_update_check(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
} else {
/* modify from fw by Thomas 2010/11/17 */
if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3))
- max_AMPDU_len = (pIE->data[i] & 0x3);
+ max_AMPDU_len = pIE->data[i] & 0x3;
else
- max_AMPDU_len = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3);
+ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x3;
if ((pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) > (pIE->data[i] & 0x1c))
- min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c);
+ min_MPDU_spacing = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c;
else
- min_MPDU_spacing = (pIE->data[i] & 0x1c);
+ min_MPDU_spacing = pIE->data[i] & 0x1c;
pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing;
}
else
pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i];
}
- return;
}
void HT_info_handler(struct adapter *padapter, struct ndis_802_11_var_ie *pIE)
pmlmeinfo->HT_info_enable = 1;
memcpy(&(pmlmeinfo->HT_info), pIE->data, pIE->Length);
- return;
}
void HTOnAssocRsp(struct adapter *padapter)
static int wifirate2_ratetbl_inx(unsigned char rate)
{
- int inx = 0;
rate = rate & 0x7f;
switch (rate) {
case 54*2:
- inx = 11;
- break;
+ return 11;
case 48*2:
- inx = 10;
- break;
+ return 10;
case 36*2:
- inx = 9;
- break;
+ return 9;
case 24*2:
- inx = 8;
- break;
+ return 8;
case 18*2:
- inx = 7;
- break;
+ return 7;
case 12*2:
- inx = 6;
- break;
+ return 6;
case 9*2:
- inx = 5;
- break;
+ return 5;
case 6*2:
- inx = 4;
- break;
+ return 4;
case 11*2:
- inx = 3;
- break;
+ return 3;
case 11:
- inx = 2;
- break;
+ return 2;
case 2*2:
- inx = 1;
- break;
+ return 1;
case 1*2:
- inx = 0;
- break;
+ return 0;
+ default:
+ return 0;
}
- return inx;
}
unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz)
{
unsigned int mask = 0;
- mask = ((pHT_caps->u.HT_cap_element.MCS_rate[0] << 12) | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 20));
+ mask = (pHT_caps->u.HT_cap_element.MCS_rate[0] << 12) | (pHT_caps->u.HT_cap_element.MCS_rate[1] << 20);
return mask;
}
if (!(pmlmeinfo->HT_enable))
return _FAIL;
- if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK))
+ if (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK)
return _FAIL;
bit_offset = (pmlmeext->cur_bwmode & HT_CHANNEL_WIDTH_40) ? 6 : 5;
pxmitpriv->hwxmit_entry = HWXMIT_ENTRY;
- pxmitpriv->hwxmits = kzalloc(sizeof(struct hw_xmit) * pxmitpriv->hwxmit_entry, GFP_KERNEL);
+ pxmitpriv->hwxmits = kcalloc(pxmitpriv->hwxmit_entry,
+ sizeof(struct hw_xmit), GFP_KERNEL);
hwxmits = pxmitpriv->hwxmits;
break;
}
- j = j >> 1;
+ j >>= 1;
temp_stage = (pRaInfo->PTStage + 1) >> 1;
if (temp_stage > j)
stage_id = temp_stage-j;
struct odm_ra_info *pRaInfo = &dm_odm->RAInfo[macid];
u8 WirelessMode = 0xFF; /* invalid value */
u8 max_rate_idx = 0x13; /* MCS7 */
+
if (dm_odm->pWirelessMode != NULL)
WirelessMode = *(dm_odm->pWirelessMode);
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
- DecisionRate = (dm_odm->RAInfo[macid].DecisionRate);
+ DecisionRate = dm_odm->RAInfo[macid].DecisionRate;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
(" macid =%d DecisionRate = 0x%x\n", macid, DecisionRate));
return DecisionRate;
if ((NULL == dm_odm) || (macid >= ASSOCIATE_ENTRY_NUM))
return 0;
- PTStage = (dm_odm->RAInfo[macid].PTStage);
+ PTStage = dm_odm->RAInfo[macid].PTStage;
ODM_RT_TRACE(dm_odm, ODM_COMP_RATE_ADAPTIVE, ODM_DBG_TRACE,
("macid =%d PTStage = 0x%x\n", macid, PTStage));
return PTStage;
static void store_pwrindex_offset(struct adapter *Adapter, u32 regaddr, u32 bitmask, u32 data)
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(Adapter);
+ u8 pwrGrpCnt = hal_data->pwrGroupCnt;
if (regaddr == rTxAGC_A_Rate18_06)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][0] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][0] = data;
if (regaddr == rTxAGC_A_Rate54_24)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][1] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][1] = data;
if (regaddr == rTxAGC_A_CCK1_Mcs32)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][6] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][6] = data;
if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][7] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][7] = data;
if (regaddr == rTxAGC_A_Mcs03_Mcs00)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][2] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][2] = data;
if (regaddr == rTxAGC_A_Mcs07_Mcs04)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][3] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][3] = data;
if (regaddr == rTxAGC_A_Mcs11_Mcs08)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][4] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][4] = data;
if (regaddr == rTxAGC_A_Mcs15_Mcs12) {
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][5] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][5] = data;
if (hal_data->rf_type == RF_1T1R)
hal_data->pwrGroupCnt++;
}
if (regaddr == rTxAGC_B_Rate18_06)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][8] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][8] = data;
if (regaddr == rTxAGC_B_Rate54_24)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][9] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][9] = data;
if (regaddr == rTxAGC_B_CCK1_55_Mcs32)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][14] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][14] = data;
if (regaddr == rTxAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][15] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][15] = data;
if (regaddr == rTxAGC_B_Mcs03_Mcs00)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][10] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][10] = data;
if (regaddr == rTxAGC_B_Mcs07_Mcs04)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][11] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][11] = data;
if (regaddr == rTxAGC_B_Mcs11_Mcs08)
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][12] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][12] = data;
if (regaddr == rTxAGC_B_Mcs15_Mcs12) {
- hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt][13] = data;
+ hal_data->MCSTxPowerLevelOriginalOffset[pwrGrpCnt][13] = data;
if (hal_data->rf_type != RF_1T1R)
hal_data->pwrGroupCnt++;
}
}
-static void rtl_addr_delay(struct adapter *adapt, u32 addr, u32 bit_mask, u32 data)
+static void rtl_addr_delay(struct adapter *adapt,
+ u32 addr, u32 bit_mask, u32 data)
{
- if (addr == 0xfe) {
+ switch (addr) {
+ case 0xfe:
msleep(50);
- } else if (addr == 0xfd) {
+ break;
+ case 0xfd:
mdelay(5);
- } else if (addr == 0xfc) {
+ break;
+ case 0xfc:
mdelay(1);
- } else if (addr == 0xfb) {
+ break;
+ case 0xfb:
udelay(50);
- } else if (addr == 0xfa) {
+ break;
+ case 0xfa:
udelay(5);
- } else if (addr == 0xf9) {
+ break;
+ case 0xf9:
udelay(1);
- } else{
+ break;
+ default:
store_pwrindex_offset(adapt, addr, bit_mask, data);
}
}
break;
} while (counter++ < POLLING_READY_TIMEOUT_COUNT);
- if (counter >= POLLING_READY_TIMEOUT_COUNT) {
+ if (counter >= POLLING_READY_TIMEOUT_COUNT)
goto exit;
- }
value32 = usb_read32(adapt, REG_MCUFWDL);
value32 |= MCUFWDL_RDY;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
- FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16);
+ FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000)>>16;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff);
- FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);
+ FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000)>>16;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
- FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
+ FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000)>>16;
ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
ret_value = phy_query_bb_reg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord);
FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff);
- FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16);
+ FalseAlmCnt->Cnt_BW_USC = (ret_value & 0xffff0000)>>16;
/* hold cck counter */
phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1);
/* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
/* The RSSI formula should be modified according to the gain table */
/* In 88E, cck_highpwr is always set to 1 */
- LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
- VGA_idx = (cck_agc_rpt & 0x1F);
+ LNA_idx = (cck_agc_rpt & 0xE0) >> 5;
+ VGA_idx = cck_agc_rpt & 0x1F;
switch (LNA_idx) {
case 7:
if (VGA_idx <= 27)
if (bitmask != bMaskDWord) { /* if not "double word" write */
original_value = usb_read32(adapt, regaddr);
bit_shift = cal_bit_shift(bitmask);
- data = ((original_value & (~bitmask)) | (data << bit_shift));
+ data = (original_value & (~bitmask)) | (data << bit_shift);
}
usb_write32(adapt, regaddr, data);
u32 ret = 0;
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
struct bb_reg_def *phyreg = &hal_data->PHYRegDef[rfpath];
- u32 newoffset;
u32 tmplong, tmplong2;
u8 rfpi_enable = 0;
offset &= 0xff;
- newoffset = offset;
tmplong = phy_query_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord);
if (rfpath == RF_PATH_A)
bMaskDWord);
tmplong2 = (tmplong2 & (~bLSSIReadAddress)) |
- (newoffset<<23) | bLSSIReadEdge;
+ (offset<<23) | bLSSIReadEdge;
phy_set_bb_reg(adapt, rFPGA0_XA_HSSIParameter2, bMaskDWord,
tmplong&(~bLSSIReadEdge));
u32 data_and_addr = 0;
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
struct bb_reg_def *phyreg = &hal_data->PHYRegDef[rfpath];
- u32 newoffset;
- newoffset = offset & 0xff;
- data_and_addr = ((newoffset<<20) | (data&0x000fffff)) & 0x0fffffff;
+ offset &= 0xff;
+ data_and_addr = ((offset<<20) | (data&0x000fffff)) & 0x0fffffff;
phy_set_bb_reg(adapt, phyreg->rf3wireOffset, bMaskDWord, data_and_addr);
}
if (bit_mask != bRFRegOffsetMask) {
original_value = rf_serial_read(adapt, rf_path, reg_addr);
bit_shift = cal_bit_shift(bit_mask);
- data = ((original_value & (~bit_mask)) | (data << bit_shift));
+ data = (original_value & (~bit_mask)) | (data << bit_shift);
}
rf_serial_write(adapt, rf_path, reg_addr, data);
}
/* Set RF related register */
- switch (hal_data->rf_chip) {
- case RF_8225:
- break;
- case RF_8256:
- break;
- case RF_8258:
- break;
- case RF_PSEUDO_11N:
- break;
- case RF_6052:
+ if (hal_data->rf_chip == RF_6052)
rtl88eu_phy_rf6052_set_bandwidth(adapt, hal_data->CurrentChannelBW);
- break;
- default:
- break;
- }
}
void phy_set_bw_mode(struct adapter *adapt, enum ht_channel_width bandwidth,
{
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
u8 tmpchannel = hal_data->CurrentChannel;
- bool result = true;
if (hal_data->rf_chip == RF_PSEUDO_11N)
return;
hal_data->CurrentChannel = channel;
- if ((!adapt->bDriverStopped) && (!adapt->bSurpriseRemoved)) {
+ if ((!adapt->bDriverStopped) && (!adapt->bSurpriseRemoved))
phy_sw_chnl_callback(adapt, channel);
-
- if (!result)
- hal_data->CurrentChannel = tmpchannel;
-
- } else {
+ else
hal_data->CurrentChannel = tmpchannel;
- }
}
#define ODM_TXPWRTRACK_MAX_IDX_88E 6
static u8 get_right_chnl_for_iqk(u8 chnl)
{
+ u8 place;
u8 channel_all[ODM_TARGET_CHNL_NUM_2G_5G] = {
- 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64,
100, 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122,
124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153,
155, 157, 159, 161, 163, 165
};
- u8 place = chnl;
if (chnl > 14) {
- for (place = 14; place < sizeof(channel_all); place++) {
+ for (place = 0; place < sizeof(channel_all); place++) {
if (channel_all[place] == chnl)
- return place-13;
+ return ++place;
}
}
return 0;
if (dm_odm->BbSwingIdxOfdm <= dm_odm->BbSwingIdxOfdmBase) {
*direction = 1;
- pwr_value = (dm_odm->BbSwingIdxOfdmBase -
- dm_odm->BbSwingIdxOfdm);
+ pwr_value = dm_odm->BbSwingIdxOfdmBase -
+ dm_odm->BbSwingIdxOfdm;
} else {
*direction = 2;
- pwr_value = (dm_odm->BbSwingIdxOfdm -
- dm_odm->BbSwingIdxOfdmBase);
+ pwr_value = dm_odm->BbSwingIdxOfdm -
+ dm_odm->BbSwingIdxOfdmBase;
}
} else if (type == 1) { /* For CCK adjust. */
if (dm_odm->BbSwingIdxCck <= dm_odm->BbSwingIdxCckBase) {
*direction = 1;
- pwr_value = (dm_odm->BbSwingIdxCckBase -
- dm_odm->BbSwingIdxCck);
+ pwr_value = dm_odm->BbSwingIdxCckBase -
+ dm_odm->BbSwingIdxCck;
} else {
*direction = 2;
- pwr_value = (dm_odm->BbSwingIdxCck -
- dm_odm->BbSwingIdxCckBase);
+ pwr_value = dm_odm->BbSwingIdxCck -
+ dm_odm->BbSwingIdxCckBase;
}
}
u8 thermal_val = 0, delta, delta_lck, delta_iqk, offset;
u8 thermal_avg_count = 0;
u32 thermal_avg = 0;
- s32 ele_a = 0, ele_d, temp_cck, x, value32;
- s32 y, ele_c = 0;
+ s32 ele_d, temp_cck;
s8 ofdm_index[2], cck_index = 0;
s8 ofdm_index_old[2] = {0, 0}, cck_index_old = 0;
u32 i = 0, j = 0;
bool is2t = false;
u8 ofdm_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB */
- u8 indexforchannel = 0;
s8 ofdm_index_mapping[2][index_mapping_NUM_88E] = {
/* 2.4G, decrease power */
{0, 0, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 10, 10, 11},
temp_cck = dm_odm->RFCalibrateInfo.RegA24;
for (i = 0; i < CCK_TABLE_SIZE; i++) {
- if (dm_odm->RFCalibrateInfo.bCCKinCH14) {
- if (memcmp(&temp_cck, &CCKSwingTable_Ch14[i][2], 4)) {
- cck_index_old = (u8)i;
- dm_odm->BbSwingIdxCckBase = (u8)i;
- break;
- }
- } else {
- if (memcmp(&temp_cck, &CCKSwingTable_Ch1_Ch13[i][2], 4)) {
+ if ((dm_odm->RFCalibrateInfo.bCCKinCH14 &&
+ memcmp(&temp_cck, &CCKSwingTable_Ch14[i][2], 4)) ||
+ memcmp(&temp_cck, &CCKSwingTable_Ch1_Ch13[i][2], 4)) {
cck_index_old = (u8)i;
dm_odm->BbSwingIdxCckBase = (u8)i;
break;
- }
}
}
if (thermal_avg_count)
thermal_val = (u8)(thermal_avg / thermal_avg_count);
- if (dm_odm->RFCalibrateInfo.bReloadtxpowerindex) {
- delta = thermal_val > hal_data->EEPROMThermalMeter ?
- (thermal_val - hal_data->EEPROMThermalMeter) :
- (hal_data->EEPROMThermalMeter - thermal_val);
- dm_odm->RFCalibrateInfo.bReloadtxpowerindex = false;
- dm_odm->RFCalibrateInfo.bDoneTxpower = false;
- } else if (dm_odm->RFCalibrateInfo.bDoneTxpower) {
- delta = (thermal_val > dm_odm->RFCalibrateInfo.ThermalValue) ?
- (thermal_val - dm_odm->RFCalibrateInfo.ThermalValue) :
- (dm_odm->RFCalibrateInfo.ThermalValue - thermal_val);
- } else {
- delta = thermal_val > hal_data->EEPROMThermalMeter ?
- (thermal_val - hal_data->EEPROMThermalMeter) :
- (hal_data->EEPROMThermalMeter - thermal_val);
+ if (dm_odm->RFCalibrateInfo.bDoneTxpower &&
+ !dm_odm->RFCalibrateInfo.bReloadtxpowerindex)
+ delta = abs(thermal_val - dm_odm->RFCalibrateInfo.ThermalValue);
+ else {
+ delta = abs(thermal_val - hal_data->EEPROMThermalMeter);
+ if (dm_odm->RFCalibrateInfo.bReloadtxpowerindex) {
+ dm_odm->RFCalibrateInfo.bReloadtxpowerindex = false;
+ dm_odm->RFCalibrateInfo.bDoneTxpower = false;
+ }
}
- delta_lck = (thermal_val > dm_odm->RFCalibrateInfo.ThermalValue_LCK) ?
- (thermal_val - dm_odm->RFCalibrateInfo.ThermalValue_LCK) :
- (dm_odm->RFCalibrateInfo.ThermalValue_LCK - thermal_val);
- delta_iqk = (thermal_val > dm_odm->RFCalibrateInfo.ThermalValue_IQK) ?
- (thermal_val - dm_odm->RFCalibrateInfo.ThermalValue_IQK) :
- (dm_odm->RFCalibrateInfo.ThermalValue_IQK - thermal_val);
+
+ delta_lck = abs(dm_odm->RFCalibrateInfo.ThermalValue_LCK - thermal_val);
+ delta_iqk = abs(dm_odm->RFCalibrateInfo.ThermalValue_IQK - thermal_val);
/* Delta temperature is equal to or larger than 20 centigrade.*/
if ((delta_lck >= 8)) {
}
if (delta > 0 && dm_odm->RFCalibrateInfo.TxPowerTrackControl) {
- delta = thermal_val > hal_data->EEPROMThermalMeter ?
- (thermal_val - hal_data->EEPROMThermalMeter) :
- (hal_data->EEPROMThermalMeter - thermal_val);
+ delta = abs(hal_data->EEPROMThermalMeter - thermal_val);
+
/* calculate new OFDM / CCK offset */
if (thermal_val > hal_data->EEPROMThermalMeter)
j = 1;
}
if (offset >= index_mapping_NUM_88E)
offset = index_mapping_NUM_88E-1;
- for (i = 0; i < rf; i++)
- ofdm_index[i] = dm_odm->RFCalibrateInfo.OFDM_index[i] + ofdm_index_mapping[j][offset];
- cck_index = dm_odm->RFCalibrateInfo.CCK_index + ofdm_index_mapping[j][offset];
+ /* Updating ofdm_index values with new OFDM / CCK offset */
for (i = 0; i < rf; i++) {
+ ofdm_index[i] = dm_odm->RFCalibrateInfo.OFDM_index[i] + ofdm_index_mapping[j][offset];
if (ofdm_index[i] > OFDM_TABLE_SIZE_92D-1)
ofdm_index[i] = OFDM_TABLE_SIZE_92D-1;
else if (ofdm_index[i] < ofdm_min_index)
ofdm_index[i] = ofdm_min_index;
}
+ cck_index = dm_odm->RFCalibrateInfo.CCK_index + ofdm_index_mapping[j][offset];
if (cck_index > CCK_TABLE_SIZE-1)
cck_index = CCK_TABLE_SIZE-1;
else if (cck_index < 0)
if (dm_odm->RFCalibrateInfo.TxPowerTrackControl) {
dm_odm->RFCalibrateInfo.bDoneTxpower = true;
- /* Adujst OFDM Ant_A according to IQK result */
- ele_d = (OFDMSwingTable[(u8)ofdm_index[0]] & 0xFFC00000)>>22;
- x = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[indexforchannel].Value[0][0];
- y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[indexforchannel].Value[0][1];
-
/* Revse TX power table. */
dm_odm->BbSwingIdxOfdm = (u8)ofdm_index[0];
dm_odm->BbSwingIdxCck = (u8)cck_index;
dm_odm->BbSwingIdxCckCurrent = dm_odm->BbSwingIdxCck;
dm_odm->BbSwingFlagCck = true;
}
-
- if (x != 0) {
- if ((x & 0x00000200) != 0)
- x = x | 0xFFFFFC00;
- ele_a = ((x * ele_d)>>8)&0x000003FF;
-
- /* new element C = element D x Y */
- if ((y & 0x00000200) != 0)
- y = y | 0xFFFFFC00;
- ele_c = ((y * ele_d)>>8)&0x000003FF;
-
- }
-
- if (is2t) {
- ele_d = (OFDMSwingTable[(u8)ofdm_index[1]] & 0xFFC00000)>>22;
-
- /* new element A = element D x X */
- x = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[indexforchannel].Value[0][4];
- y = dm_odm->RFCalibrateInfo.IQKMatrixRegSetting[indexforchannel].Value[0][5];
-
- if ((x != 0) && (*(dm_odm->pBandType) == ODM_BAND_2_4G)) {
- if ((x & 0x00000200) != 0) /* consider minus */
- x = x | 0xFFFFFC00;
- ele_a = ((x * ele_d)>>8)&0x000003FF;
-
- /* new element C = element D x Y */
- if ((y & 0x00000200) != 0)
- y = y | 0xFFFFFC00;
- ele_c = ((y * ele_d)>>8)&0x00003FF;
-
- /* wtite new elements A, C, D to regC88 and regC9C, element B is always 0 */
- value32 = (ele_d<<22) | ((ele_c&0x3F)<<16) | ele_a;
- phy_set_bb_reg(adapt, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
-
- value32 = (ele_c&0x000003C0)>>6;
- phy_set_bb_reg(adapt, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
-
- value32 = ((x * ele_d)>>7)&0x01;
- phy_set_bb_reg(adapt, rOFDM0_ECCAThreshold, BIT28, value32);
- } else {
- phy_set_bb_reg(adapt, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)ofdm_index[1]]);
- phy_set_bb_reg(adapt, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00);
- phy_set_bb_reg(adapt, rOFDM0_ECCAThreshold, BIT28, 0x00);
- }
-
- }
-
}
}
u32 path_on;
u32 i;
- path_on = is_path_a_on ? 0x04db25a4 : 0x0b1b25a4;
if (!is2t) {
path_on = 0x0bdb25a0;
phy_set_bb_reg(adapt, adda_reg[0], bMaskDWord, 0x0b1b25a0);
} else {
+ path_on = is_path_a_on ? 0x04db25a4 : 0x0b1b25a4;
phy_set_bb_reg(adapt, adda_reg[0], bMaskDWord, path_on);
}
static bool simularity_compare(struct adapter *adapt, s32 resulta[][8],
u8 c1, u8 c2)
{
- u32 i, j, diff, sim_bitmap, bound = 0;
+ u32 i, j, diff, sim_bitmap = 0, bound;
struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);
struct odm_dm_struct *dm_odm = &hal_data->odmpriv;
u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */
bool result = true;
- bool is2t;
s32 tmp1 = 0, tmp2 = 0;
if ((dm_odm->RFType == ODM_2T2R) || (dm_odm->RFType == ODM_2T3R) ||
(dm_odm->RFType == ODM_2T4R))
- is2t = true;
- else
- is2t = false;
-
- if (is2t)
bound = 8;
else
bound = 4;
- sim_bitmap = 0;
-
for (i = 0; i < bound; i++) {
if ((i == 1) || (i == 3) || (i == 5) || (i == 7)) {
if ((resulta[c1][i] & 0x00000200) != 0)
RT_TRACE(_module_hal_init_c_, _drv_info_,
("rtl88eu_pwrseqcmdparsing: PWR_CMD_END\n"));
return true;
- break;
default:
RT_TRACE(_module_hal_init_c_, _drv_err_,
("rtl88eu_pwrseqcmdparsing: Unknown CMD!!\n"));
break;
case 2: /* Better regulatory */
/* don't increase any power diff */
- write_val = ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
+ write_val = (index < 2) ? powerbase0[rf] : powerbase1[rf];
break;
case 3: /* Customer defined power diff. */
/* increase power diff defined by customer. */
return false;
cond = condition & 0x0000FF00;
- cond = cond >> 8;
+ cond >>= 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = condition & 0x00FF0000;
- cond = cond >> 16;
+ cond >>= 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter);
if (!AutoLoadFail)
- pHalData->BoardType = ((hwinfo[EEPROM_RF_BOARD_OPTION_88E]&0xE0)>>5);
+ pHalData->BoardType = (hwinfo[EEPROM_RF_BOARD_OPTION_88E]
+ & 0xE0) >> 5;
else
pHalData->BoardType = 0;
DBG_88E("Board Type: 0x%2x\n", pHalData->BoardType);
_rtw_init_queue(&precvpriv->free_recv_buf_queue);
precvpriv->pallocated_recv_buf =
- kzalloc(NR_RECVBUFF * sizeof(struct recv_buf), GFP_KERNEL);
+ kcalloc(NR_RECVBUFF, sizeof(struct recv_buf), GFP_KERNEL);
if (precvpriv->pallocated_recv_buf == NULL) {
res = _FAIL;
RT_TRACE(_module_rtl871x_recv_c_, _drv_err_,
memcpy(eeprom->mac_addr, &hwinfo[EEPROM_MAC_ADDR_88EU], ETH_ALEN);
}
RT_TRACE(_module_hci_hal_init_c_, _drv_notice_,
- ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %02x-%02x-%02x-%02x-%02x-%02x\n",
- eeprom->mac_addr[0], eeprom->mac_addr[1],
- eeprom->mac_addr[2], eeprom->mac_addr[3],
- eeprom->mac_addr[4], eeprom->mac_addr[5]));
+ ("Hal_EfuseParseMACAddr_8188EU: Permanent Address = %pM\n",
+ eeprom->mac_addr));
}
static void
/* Set RTS initial rate */
while (BrateCfg > 0x1) {
- BrateCfg = (BrateCfg >> 1);
+ BrateCfg >>= 1;
RateIndex++;
}
/* Ziv - Check */
#define WPA_SELECTOR_LEN 4
extern u8 RTW_WPA_OUI_TYPE[];
-extern u16 RTW_WPA_VERSION;
extern u8 WPA_AUTH_KEY_MGMT_NONE[];
extern u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[];
extern u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[];
return ret;
}
-static inline void _init_timer(struct timer_list *ptimer,
- struct net_device *nic_hdl,
- void *pfunc, void *cntx)
-{
- ptimer->function = pfunc;
- ptimer->data = (unsigned long)cntx;
- init_timer(ptimer);
-}
-
-static inline void _set_timer(struct timer_list *ptimer, u32 delay_time)
-{
- mod_timer(ptimer , (jiffies+msecs_to_jiffies(delay_time)));
-}
-
-#define RTW_TIMER_HDL_ARGS void *FunctionContext
-#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl
-#define RTW_DECLARE_TIMER_HDL(name) \
- void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS)
-
static inline int rtw_netif_queue_stopped(struct net_device *pnetdev)
{
return netif_tx_queue_stopped(netdev_get_tx_queue(pnetdev, 0)) &&
(adapt)->ledpriv.LedControlHandler((adapt), (action)); \
} while (0)
-void BlinkTimerCallback(void *data);
+void BlinkTimerCallback(unsigned long data);
void BlinkWorkItemCallback(struct work_struct *work);
void ResetLedStatus(struct LED_871x *pLed);
void rtw_get_encrypt_decrypt_from_registrypriv(struct adapter *adapter);
-void _rtw_join_timeout_handler(void *function_context);
-void rtw_scan_timeout_handler(void *function_context);
+void _rtw_join_timeout_handler(unsigned long data);
+void rtw_scan_timeout_handler(unsigned long data);
-void rtw_dynamic_check_timer_handlder(void *function_context);
+void rtw_dynamic_check_timer_handlder(unsigned long data);
#define rtw_is_scan_deny(adapter) false
#define rtw_clear_scan_deny(adapter) do {} while (0)
#define rtw_set_scan_deny_timer_hdl(adapter) do {} while (0)
void linked_status_chk(struct adapter *padapter);
-void survey_timer_hdl(void *function_context);
-void link_timer_hdl(void *funtion_context);
-void addba_timer_hdl(void *function_context);
+void survey_timer_hdl(unsigned long data);
+void link_timer_hdl(unsigned long data);
+void addba_timer_hdl(unsigned long data);
#define set_survey_timer(mlmeext, ms) \
- do { \
- _set_timer(&(mlmeext)->survey_timer, (ms)); \
- } while (0)
+ mod_timer(&mlmeext->survey_timer, jiffies + \
+ msecs_to_jiffies(ms))
#define set_link_timer(mlmeext, ms) \
- do { \
- _set_timer(&(mlmeext)->link_timer, (ms)); \
- } while (0)
+ mod_timer(&mlmeext->link_timer, jiffies + \
+ msecs_to_jiffies(ms))
int cckrates_included(unsigned char *rate, int ratelen);
int cckratesonly_included(unsigned char *rate, int ratelen);
#define RTW_PWR_STATE_CHK_INTERVAL 2000
#define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \
- do { \
- _set_timer(&(pwrctrlpriv)->pwr_state_check_timer, (ms)); \
- } while (0)
+ mod_timer(&pwrctrlpriv->pwr_state_check_timer, \
+ jiffies + msecs_to_jiffies(ms))
#define rtw_set_pwr_state_check_timer(pwrctrl) \
_rtw_set_pwr_state_check_timer((pwrctrl), \
};
#define rtw_set_signal_stat_timer(recvpriv) \
- _set_timer(&(recvpriv)->signal_stat_timer, \
- (recvpriv)->signal_stat_sampling_interval)
+ mod_timer(&(recvpriv)->signal_stat_timer, jiffies + \
+ msecs_to_jiffies((recvpriv)->signal_stat_sampling_interval))
struct sta_recv_priv {
spinlock_t lock;
struct __queue *pfree_recv_queue);
u32 rtw_free_uc_swdec_pending_queue(struct adapter *adapter);
-void rtw_reordering_ctrl_timeout_handler(void *pcontext);
+void rtw_reordering_ctrl_timeout_handler(unsigned long data);
static inline u8 *get_rxmem(struct recv_frame *precvframe)
{
};
extern const u32 Te0[256];
-extern const u32 Te1[256];
-extern const u32 Te2[256];
-extern const u32 Te3[256];
-extern const u32 Te4[256];
extern const u32 Td0[256];
extern const u32 Td1[256];
extern const u32 Td2[256];
#define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
#define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
#define TE3(i) rotr(Te0[(i) & 0xff], 24)
-#define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000)
-#define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000)
-#define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00)
-#define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff)
-#define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000)
-#define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000)
-#define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00)
-#define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff)
-#define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff)
-
-#define TD0(i) Td0[((i) >> 24) & 0xff]
-#define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
-#define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
-#define TD3(i) rotr(Td0[(i) & 0xff], 24)
-#define TD41(i) (Td4s[((i) >> 24) & 0xff] << 24)
-#define TD42(i) (Td4s[((i) >> 16) & 0xff] << 16)
-#define TD43(i) (Td4s[((i) >> 8) & 0xff] << 8)
-#define TD44(i) (Td4s[(i) & 0xff])
-#define TD0_(i) Td0[(i) & 0xff]
-#define TD1_(i) rotr(Td0[(i) & 0xff], 8)
-#define TD2_(i) rotr(Td0[(i) & 0xff], 16)
-#define TD3_(i) rotr(Td0[(i) & 0xff], 24)
#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \
((u32)(pt)[2] << 8) ^ ((u32)(pt)[3]))
#define GetPrivacy(pbuf) \
(((*(__le16 *)(pbuf)) & cpu_to_le16(_PRIVACY_)) != 0)
-#define ClearPrivacy(pbuf) \
- *(__le16 *)(pbuf) &= (~cpu_to_le16(_PRIVACY_))
-
-
#define GetOrder(pbuf) \
(((*(__le16 *)(pbuf)) & cpu_to_le16(_ORDER_)) != 0)
#define GetFrameType(pbuf) \
(le16_to_cpu(*(__le16 *)(pbuf)) & (BIT(3) | BIT(2)))
-#define SetFrameType(pbuf, type) \
- do { \
- *(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | BIT(2))); \
- *(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \
- } while (0)
-
#define GetFrameSubType(pbuf) (le16_to_cpu(*(__le16 *)(pbuf)) & (BIT(7) |\
BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2)))
#define GetFragNum(pbuf) \
(le16_to_cpu(*(__le16 *)((size_t)(pbuf) + 22)) & 0x0f)
-#define GetTupleCache(pbuf) \
- (cpu_to_le16(*(unsigned short *)((size_t)(pbuf) + 22)))
-
-#define SetFragNum(pbuf, num) \
- do { \
- *(unsigned short *)((size_t)(pbuf) + 22) = \
- ((*(unsigned short *)((size_t)(pbuf) + 22)) & \
- le16_to_cpu(~(0x000f))) | \
- cpu_to_le16(0x0f & (num)); \
- } while (0)
-
#define SetSeqNum(pbuf, num) \
do { \
*(__le16 *)((size_t)(pbuf) + 22) = \
#define GetAMsdu(pbuf) (((le16_to_cpu(*(__le16 *)pbuf)) >> 7) & 0x1)
-#define SetAMsdu(pbuf, amsdu) \
- *(__le16 *)(pbuf) |= cpu_to_le16((amsdu & 1) << 7)
-
#define GetAid(pbuf) (le16_to_cpu(*(__le16 *)((size_t)(pbuf) + 2)) & 0x3fff)
-#define GetTid(pbuf) (le16_to_cpu(*(__le16 *)((size_t)(pbuf) + \
- (((GetToDs(pbuf)<<1) | GetFrDs(pbuf)) == 3 ? \
- 30 : 24))) & 0x000f)
-
#define GetAddr1Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 4))
#define GetAddr2Ptr(pbuf) ((unsigned char *)((size_t)(pbuf) + 10))
#define P2P_STATUS_FAIL_INCOMPATIBLE_PROVSION 0x0A
#define P2P_STATUS_FAIL_USER_REJECT 0x0B
-/* Value of Inviation Flags Attribute */
+/* Value of Invitation Flags Attribute */
#define P2P_INVITATION_FLAGS_PERSISTENT BIT(0)
#define DMP_P2P_DEVCAP_SUPPORT (P2P_DEVCAP_SERVICE_DISCOVERY | \
#define P2P_WILDCARD_SSID_LEN 7
-/* default value, used when: (1)p2p disabed or (2)p2p enabled
+/* default value, used when: (1)p2p disabled or (2)p2p enabled
* but only do 1 scan phase */
#define P2P_FINDPHASE_EX_NONE 0
/* used when p2p enabled and want to do 1 scan phase and
P2P_STATE_TX_PROVISION_DIS_REQ = 6,
P2P_STATE_RX_PROVISION_DIS_RSP = 7,
P2P_STATE_RX_PROVISION_DIS_REQ = 8,
- /* Doing the group owner negoitation handshake */
+ /* Doing the group owner negotiation handshake */
P2P_STATE_GONEGO_ING = 9,
- /* finish the group negoitation handshake with success */
+ /* finish the group negotiation handshake with success */
P2P_STATE_GONEGO_OK = 10,
- /* finish the group negoitation handshake with failure */
+ /* finish the group negotiation handshake with failure */
P2P_STATE_GONEGO_FAIL = 11,
- /* receiving the P2P Inviation request and match with the profile. */
+ /* receiving the P2P Invitation request and match with the profile. */
P2P_STATE_RECV_INVITE_REQ_MATCH = 12,
/* Doing the P2P WPS */
P2P_STATE_PROVISIONING_ING = 13,
P2P_STATE_TX_INVITE_REQ = 15,
/* Receiving the P2P Invitation response */
P2P_STATE_RX_INVITE_RESP_OK = 16,
- /* receiving the P2P Inviation request and dismatch with the profile. */
+ /* receiving the P2P Invitation request and dismatch with the profile. */
P2P_STATE_RECV_INVITE_REQ_DISMATCH = 17,
- /* receiving the P2P Inviation request and this wifi is GO. */
+ /* receiving the P2P Invitation request and this wifi is GO. */
P2P_STATE_RECV_INVITE_REQ_GO = 18,
- /* receiving the P2P Inviation request to join an existing P2P Group. */
+ /* receiving the P2P Invitation request to join an existing P2P Group. */
P2P_STATE_RECV_INVITE_REQ_JOIN = 19,
- /* recveing the P2P Inviation response with failure */
+ /* receiving the P2P Invitation response with failure */
P2P_STATE_RX_INVITE_RESP_FAIL = 20,
- /* receiving p2p negoitation response with information is not available */
+ /* receiving p2p negotiation response with information is not available */
P2P_STATE_RX_INFOR_NOREADY = 21,
- /* sending p2p negoitation response with information is not available */
+ /* sending p2p negotiation response with information is not available */
P2P_STATE_TX_INFOR_NOREADY = 22,
};
Ndis802_11ReloadWEPKeys
};
-/* Key mapping keys require a BSSID */
-struct ndis_802_11_key {
- u32 Length; /* Length of this structure */
- u32 KeyIndex;
- u32 KeyLength; /* length of key in bytes */
- unsigned char BSSID[ETH_ALEN];
- unsigned long long KeyRSC;
- u8 KeyMaterial[32]; /* var len depending on above field */
-};
-
struct ndis_802_11_remove_key {
u32 Length; /* Length */
u32 KeyIndex;
#include <rtw_iol.h>
#include <linux/vmalloc.h>
+#include <linux/etherdevice.h>
+
#include "osdep_intf.h"
#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 30)
memset(&wrqu, 0, sizeof(union iwreq_data));
wrqu.ap_addr.sa_family = ARPHRD_ETHER;
- memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu.ap_addr.sa_data);
DBG_88E_LEVEL(_drv_always_, "indicate disassoc\n");
wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL);
for (j = 0; j < NUM_PMKID_CACHE; j++) {
if (!memcmp(psecuritypriv->PMKIDList[j].Bssid, strIssueBssid, ETH_ALEN)) {
/* BSSID is matched, the same AP => Remove this PMKID information and reset it. */
- memset(psecuritypriv->PMKIDList[j].Bssid, 0x00, ETH_ALEN);
+ eth_zero_addr(psecuritypriv->PMKIDList[j].Bssid);
psecuritypriv->PMKIDList[j].bUsed = false;
break;
}
wrqu->ap_addr.sa_family = ARPHRD_ETHER;
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_wx_get_wap\n"));
((check_fwstate(pmlmepriv, WIFI_AP_STATE)) == true))
memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN);
else
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
return 0;
}
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra)
{
- int ret;
struct adapter *padapter = (struct adapter *)rtw_netdev_priv(dev);
- ret = rtw_set_wpa_ie(padapter, extra, wrqu->data.length);
- return ret;
+ return rtw_set_wpa_ie(padapter, extra, wrqu->data.length);
}
static int rtw_wx_set_auth(struct net_device *dev,
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- _init_timer(&(pmlmepriv->assoc_timer), padapter->pnetdev, _rtw_join_timeout_handler, padapter);
- _init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev, rtw_scan_timeout_handler, padapter);
- _init_timer(&(pmlmepriv->dynamic_chk_timer), padapter->pnetdev, rtw_dynamic_check_timer_handlder, padapter);
+ setup_timer(&pmlmepriv->assoc_timer, _rtw_join_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->scan_to_timer, rtw_scan_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->dynamic_chk_timer,
+ rtw_dynamic_check_timer_handlder, (unsigned long)padapter);
}
void rtw_os_indicate_connect(struct adapter *adapter)
/* We have to backup the PMK information for WiFi PMK Caching test item. */
/* Backup the btkip_countermeasure information. */
/* When the countermeasure is trigger, the driver have to disconnect with AP for 60 seconds. */
- memset(&backup_pmkid[0], 0x00, sizeof(struct rt_pmkid_list) * NUM_PMKID_CACHE);
memcpy(&backup_pmkid[0], &adapter->securitypriv.PMKIDList[0], sizeof(struct rt_pmkid_list) * NUM_PMKID_CACHE);
backup_index = adapter->securitypriv.PMKIDIndex;
backup_counter = adapter->securitypriv.btkip_countermeasure;
void init_addba_retry_timer(struct adapter *padapter, struct sta_info *psta)
{
- _init_timer(&psta->addba_retry_timer, padapter->pnetdev, addba_timer_hdl, psta);
+ setup_timer(&psta->addba_retry_timer, addba_timer_hdl,
+ (unsigned long)psta);
}
void init_mlme_ext_timer(struct adapter *padapter)
{
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
- _init_timer(&pmlmeext->survey_timer, padapter->pnetdev, survey_timer_hdl, padapter);
- _init_timer(&pmlmeext->link_timer, padapter->pnetdev, link_timer_hdl, padapter);
+ setup_timer(&pmlmeext->survey_timer, survey_timer_hdl,
+ (unsigned long)padapter);
+ setup_timer(&pmlmeext->link_timer, link_timer_hdl,
+ (unsigned long)padapter);
}
#ifdef CONFIG_88EU_AP_MODE
#define RTW_NOTCH_FILTER 0 /* 0:Disable, 1:Enable, */
/* module param defaults */
-static int rtw_chip_version = 0x00;
+static int rtw_chip_version;
static int rtw_rfintfs = HWPI;
static int rtw_lbkmode;/* RTL8712_AIR_TRX; */
static int rtw_network_mode = Ndis802_11IBSS;/* Ndis802_11Infrastructure; infra, ad-hoc, auto */
}
padapter->net_closed = false;
- _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
+ mod_timer(&padapter->mlmepriv.dynamic_chk_timer,
+ jiffies + msecs_to_jiffies(2000));
padapter->pwrctrlpriv.bips_processing = false;
rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
padapter->intf_start(padapter);
rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv);
- _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 5000);
+ mod_timer(&padapter->mlmepriv.dynamic_chk_timer,
+ jiffies + msecs_to_jiffies(5000));
return _SUCCESS;
void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl)
{
- struct adapter *padapter = preorder_ctrl->padapter;
- _init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter->pnetdev, rtw_reordering_ctrl_timeout_handler, preorder_ctrl);
+ setup_timer(&preorder_ctrl->reordering_ctrl_timer,
+ rtw_reordering_ctrl_timeout_handler,
+ (unsigned long)preorder_ctrl);
}
{
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+usb_intf_stop\n"));
- /* disabel_hw_interrupt */
+ /* disable_hw_interrupt */
if (!padapter->bSurpriseRemoved) {
/* device still exists, so driver can do i/o operation */
/* TODO: */
{
int i;
struct recv_buf *precvbuf;
+
precvbuf = (struct recv_buf *)padapter->recvpriv.precv_buf;
DBG_88E("%s\n", __func__);
u16 index;
u16 len;
u8 data;
- int ret;
request = 0x05;
requesttype = 0x00;/* write_out */
wvalue = (u16)(addr&0x0000ffff);
len = 1;
data = val;
- ret = usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
- return ret;
+ return usbctrl_vendorreq(adapter, request, wvalue,
+ index, &data, len, requesttype);
}
int usb_write16(struct adapter *adapter, u32 addr, u16 val)
u16 index;
u16 len;
__le32 data;
- int ret;
request = 0x05;
data = cpu_to_le32(val & 0x0000ffff);
- ret = usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
+ return usbctrl_vendorreq(adapter, request, wvalue,
+ index, &data, len, requesttype);
- return ret;
}
int usb_write32(struct adapter *adapter, u32 addr, u32 val)
u16 index;
u16 len;
__le32 data;
- int ret;
request = 0x05;
len = 4;
data = cpu_to_le32(val);
- ret = usbctrl_vendorreq(adapter, request, wvalue, index, &data, len, requesttype);
+ return usbctrl_vendorreq(adapter, request, wvalue,
+ index, &data, len, requesttype);
- return ret;
}
static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs)
(GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen > 0)
#define IS_EQUAL_CIE_SRC(__pIeeeDev, __pTa) \
- eqMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
+ ether_addr_equal_unaligned(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, \
+ __pTa)
#define UPDATE_CIE_SRC(__pIeeeDev, __pTa) \
cpMacAddr(GET_DOT11D_INFO(__pIeeeDev)->CountryIeSrcAddr, __pTa)
-#define IS_COUNTRY_IE_CHANGED(__pIeeeDev, __Ie) \
- (((__Ie).Length == 0 || (__Ie).Length != \
- GET_DOT11D_INFO(__pIeeeDev)->CountryIeLen) ? \
- false : (!memcmp(GET_DOT11D_INFO(__pIeeeDev)->CountryIeBuf, \
- (__Ie).Octet, (__Ie).Length)))
-
#define CIE_WATCHDOG_TH 1
#define GET_CIE_WATCHDOG(__pIeeeDev) \
(GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog)
0x0e, bMask12Bits, 0x021);
} else {
- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
- "unknown hardware version\n");
+ RT_TRACE(COMP_ERR,
+ "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
}
break;
0x0e, bMask12Bits, 0x0e1);
} else {
- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): "
- "unknown hardware version\n");
+ RT_TRACE(COMP_ERR,
+ "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
}
break;
default:
- RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown "
- "Bandwidth: %#X\n", Bandwidth);
+ RT_TRACE(COMP_ERR,
+ "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",
+ Bandwidth);
break;
}
rtStatus = rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF,
(enum rf90_radio_path)eRFPath);
if (!rtStatus) {
- RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check "
- "Radio[%d] Fail!!\n", eRFPath);
+ RT_TRACE(COMP_ERR,
+ "PHY_RF8256_Config():Check Radio[%d] Fail!!\n",
+ eRFPath);
goto phy_RF8256_Config_ParaFile_Fail;
}
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck,
bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final "
- "value: %x\n", eRFPath,
- RegOffSetToBeCheck, RF3_Final_Value);
+ RT_TRACE(COMP_RF,
+ "RF %d %d register final value: %x\n",
+ eRFPath, RegOffSetToBeCheck,
+ RF3_Final_Value);
RetryTimes--;
}
break;
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck,
bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final "
- "value: %x\n", eRFPath,
- RegOffSetToBeCheck, RF3_Final_Value);
+ RT_TRACE(COMP_RF,
+ "RF %d %d register final value: %x\n",
+ eRFPath, RegOffSetToBeCheck,
+ RF3_Final_Value);
RetryTimes--;
}
break;
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck,
bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final "
- "value: %x\n", eRFPath,
- RegOffSetToBeCheck, RF3_Final_Value);
+ RT_TRACE(COMP_RF,
+ "RF %d %d register final value: %x\n",
+ eRFPath, RegOffSetToBeCheck,
+ RF3_Final_Value);
RetryTimes--;
}
break;
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev,
(enum rf90_radio_path)eRFPath,
RegOffSetToBeCheck, bMask12Bits);
- RT_TRACE(COMP_RF, "RF %d %d register final "
- "value: %x\n", eRFPath,
- RegOffSetToBeCheck, RF3_Final_Value);
+ RT_TRACE(COMP_RF,
+ "RF %d %d register final value: %x\n",
+ eRFPath, RegOffSetToBeCheck,
+ RF3_Final_Value);
RetryTimes--;
}
break;
}
if (ret) {
- RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():"
- "Radio[%d] Fail!!", eRFPath);
+ RT_TRACE(COMP_ERR,
+ "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!",
+ eRFPath);
goto phy_RF8256_Config_ParaFile_Fail;
}
do {
if ((buffer_len - frag_offset) > frag_threshold) {
- frag_length = frag_threshold ;
+ frag_length = frag_threshold;
bLastIniPkt = 0;
} else {
switch (element_id) {
case RX_TX_FEEDBACK:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_TX_FEEDBACK\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_TX_FEEDBACK\n");
cmpk_handle_tx_feedback(dev, pcmd_buff);
cmd_length = CMPK_RX_TX_FB_SIZE;
break;
case RX_INTERRUPT_STATUS:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_INTERRUPT_STATUS\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_INTERRUPT_STATUS\n");
cmpk_handle_interrupt_status(dev, pcmd_buff);
cmd_length = sizeof(struct cmpk_intr_sta);
break;
case BOTH_QUERY_CONFIG:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "BOTH_QUERY_CONFIG\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():BOTH_QUERY_CONFIG\n");
cmpk_handle_query_config_rx(dev, pcmd_buff);
cmd_length = CMPK_BOTH_QUERY_CONFIG_SIZE;
break;
case RX_TX_STATUS:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_TX_STATUS\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_TX_STATUS\n");
cmpk_handle_tx_status(dev, pcmd_buff);
cmd_length = CMPK_RX_TX_STS_SIZE;
break;
case RX_TX_PER_PKT_FEEDBACK:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_TX_PER_PKT_FEEDBACK\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_TX_PER_PKT_FEEDBACK\n");
cmd_length = CMPK_RX_TX_FB_SIZE;
break;
case RX_TX_RATE_HISTORY:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "RX_TX_HISTORY\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():RX_TX_HISTORY\n");
cmpk_handle_tx_rate_history(dev, pcmd_buff);
cmd_length = CMPK_TX_RAHIS_SIZE;
break;
default:
- RT_TRACE(COMP_CMDPKT, "---->cmpk_message_handle_rx():"
- "unknown CMD Element\n");
+ RT_TRACE(COMP_CMDPKT,
+ "---->cmpk_message_handle_rx():unknown CMD Element\n");
return 1;
}
break;
default:
- printk(KERN_INFO "SetHwReg8185(): invalid ACI: %d !\n",
- eACI);
+ netdev_info(dev, "SetHwReg8185(): invalid ACI: %d !\n",
+ eACI);
break;
}
priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACM_CTRL,
break;
default:
- RT_TRACE(COMP_QOS, "SetHwReg8185(): [HW_VAR_"
- "ACM_CTRL] acm set failed: eACI is "
- "%d\n", eACI);
+ RT_TRACE(COMP_QOS,
+ "SetHwReg8185(): [HW_VAR_ACM_CTRL] acm set failed: eACI is %d\n",
+ eACI);
break;
}
} else {
}
}
- RT_TRACE(COMP_QOS, "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write"
- " 0x%X\n", AcmCtrl);
+ RT_TRACE(COMP_QOS,
+ "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
+ AcmCtrl);
write_nic_byte(dev, AcmHwCtrl, AcmCtrl);
break;
}
}
if (!priv->AutoloadFailFlag) {
- priv->eeprom_vid = eprom_read(dev, (EEPROM_VID >> 1));
- priv->eeprom_did = eprom_read(dev, (EEPROM_DID >> 1));
+ priv->eeprom_vid = eprom_read(dev, EEPROM_VID >> 1);
+ priv->eeprom_did = eprom_read(dev, EEPROM_DID >> 1);
usValue = eprom_read(dev, (u16)(EEPROM_Customer_ID>>1)) >> 8;
priv->eeprom_CustomerID = (u8)(usValue & 0xff);
- usValue = eprom_read(dev, (EEPROM_ICVersion_ChannelPlan>>1));
+ usValue = eprom_read(dev, EEPROM_ICVersion_ChannelPlan>>1);
priv->eeprom_ChannelPlan = usValue&0xff;
- IC_Version = ((usValue&0xff00)>>8);
+ IC_Version = (usValue & 0xff00)>>8;
ICVer8192 = (IC_Version&0xf);
- ICVer8256 = ((IC_Version&0xf0)>>4);
+ ICVer8256 = (IC_Version & 0xf0)>>4;
RT_TRACE(COMP_INIT, "\nICVer8192 = 0x%x\n", ICVer8192);
RT_TRACE(COMP_INIT, "\nICVer8256 = 0x%x\n", ICVer8256);
if (ICVer8192 == 0x2) {
if (priv->epromtype == EEPROM_93C46) {
if (!priv->AutoloadFailFlag) {
usValue = eprom_read(dev,
- (EEPROM_TxPwDiff_CrystalCap >> 1));
+ EEPROM_TxPwDiff_CrystalCap >> 1);
priv->EEPROMAntPwDiff = (usValue&0x0fff);
priv->EEPROMCrystalCap = (u8)((usValue & 0xf000)
>> 12);
usValue = EEPROM_Default_TxPower;
*((u16 *)(&priv->EEPROMTxPowerLevelCCK[i])) =
usValue;
- RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index"
- " %d = 0x%02x\n", i,
- priv->EEPROMTxPowerLevelCCK[i]);
- RT_TRACE(COMP_INIT, "CCK Tx Power Level, Index"
- " %d = 0x%02x\n", i+1,
- priv->EEPROMTxPowerLevelCCK[i+1]);
+ RT_TRACE(COMP_INIT,
+ "CCK Tx Power Level, Index %d = 0x%02x\n",
+ i, priv->EEPROMTxPowerLevelCCK[i]);
+ RT_TRACE(COMP_INIT,
+ "CCK Tx Power Level, Index %d = 0x%02x\n",
+ i+1, priv->EEPROMTxPowerLevelCCK[i+1]);
}
for (i = 0; i < 14; i += 2) {
if (!priv->AutoloadFailFlag)
usValue = EEPROM_Default_TxPower;
*((u16 *)(&priv->EEPROMTxPowerLevelOFDM24G[i]))
= usValue;
- RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level,"
- " Index %d = 0x%02x\n", i,
- priv->EEPROMTxPowerLevelOFDM24G[i]);
- RT_TRACE(COMP_INIT, "OFDM 2.4G Tx Power Level,"
- " Index %d = 0x%02x\n", i + 1,
+ RT_TRACE(COMP_INIT,
+ "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n",
+ i, priv->EEPROMTxPowerLevelOFDM24G[i]);
+ RT_TRACE(COMP_INIT,
+ "OFDM 2.4G Tx Power Level, Index %d = 0x%02x\n",
+ i + 1,
priv->EEPROMTxPowerLevelOFDM24G[i+1]);
}
}
priv->EEPROMLegacyHTTxPowerDiff;
priv->AntennaTxPwDiff[0] = (priv->EEPROMAntPwDiff &
0xf);
- priv->AntennaTxPwDiff[1] = ((priv->EEPROMAntPwDiff &
- 0xf0)>>4);
- priv->AntennaTxPwDiff[2] = ((priv->EEPROMAntPwDiff &
- 0xf00)>>8);
+ priv->AntennaTxPwDiff[1] = (priv->EEPROMAntPwDiff &
+ 0xf0) >> 4;
+ priv->AntennaTxPwDiff[2] = (priv->EEPROMAntPwDiff &
+ 0xf00) >> 8;
priv->CrystalCap = priv->EEPROMCrystalCap;
priv->ThermalMeter[0] = (priv->EEPROMThermalMeter &
0xf);
- priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter &
- 0xf0)>>4);
+ priv->ThermalMeter[1] = (priv->EEPROMThermalMeter &
+ 0xf0) >> 4;
} else if (priv->epromtype == EEPROM_93C56) {
for (i = 0; i < 3; i++) {
priv->EEPROMRfCOfdmChnlTxPwLevel[2];
}
for (i = 0; i < 14; i++)
- RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_A"
- "[%d] = 0x%x\n", i,
- priv->TxPowerLevelCCK_A[i]);
+ RT_TRACE(COMP_INIT,
+ "priv->TxPowerLevelCCK_A[%d] = 0x%x\n",
+ i, priv->TxPowerLevelCCK_A[i]);
for (i = 0; i < 14; i++)
- RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM"
- "24G_A[%d] = 0x%x\n", i,
- priv->TxPowerLevelOFDM24G_A[i]);
+ RT_TRACE(COMP_INIT,
+ "priv->TxPowerLevelOFDM24G_A[%d] = 0x%x\n",
+ i, priv->TxPowerLevelOFDM24G_A[i]);
for (i = 0; i < 14; i++)
- RT_TRACE(COMP_INIT, "priv->TxPowerLevelCCK_C"
- "[%d] = 0x%x\n", i,
- priv->TxPowerLevelCCK_C[i]);
+ RT_TRACE(COMP_INIT,
+ "priv->TxPowerLevelCCK_C[%d] = 0x%x\n",
+ i, priv->TxPowerLevelCCK_C[i]);
for (i = 0; i < 14; i++)
- RT_TRACE(COMP_INIT, "priv->TxPowerLevelOFDM"
- "24G_C[%d] = 0x%x\n", i,
- priv->TxPowerLevelOFDM24G_C[i]);
+ RT_TRACE(COMP_INIT,
+ "priv->TxPowerLevelOFDM24G_C[%d] = 0x%x\n",
+ i, priv->TxPowerLevelOFDM24G_C[i]);
priv->LegacyHTTxPowerDiff =
priv->EEPROMLegacyHTTxPowerDiff;
priv->AntennaTxPwDiff[0] = 0;
priv->CrystalCap = priv->EEPROMCrystalCap;
priv->ThermalMeter[0] = (priv->EEPROMThermalMeter &
0xf);
- priv->ThermalMeter[1] = ((priv->EEPROMThermalMeter &
- 0xf0)>>4);
+ priv->ThermalMeter[1] = (priv->EEPROMThermalMeter &
+ 0xf0) >> 4;
}
}
else if (priv->pFirmware->firmware_status == FW_STATUS_5_READY)
ulRegRead |= CPU_GEN_FIRMWARE_RESET;
else
- RT_TRACE(COMP_ERR, "ERROR in %s(): undefined firmware state(%d)"
- "\n", __func__, priv->pFirmware->firmware_status);
+ RT_TRACE(COMP_ERR,
+ "ERROR in %s(): undefined firmware state(%d)\n",
+ __func__, priv->pFirmware->firmware_status);
write_nic_dword(dev, CPU_GEN, ulRegRead);
else if (priv->LoopbackMode == RTL819X_MAC_LOOPBACK)
ulRegRead |= CPU_CCK_LOOPBACK;
else
- RT_TRACE(COMP_ERR, "Serious error: wrong loopback"
- " mode setting\n");
+ RT_TRACE(COMP_ERR,
+ "Serious error: wrong loopback mode setting\n");
write_nic_dword(dev, CPU_GEN, ulRegRead);
__func__);
MgntActSet_RF_State(dev, eRfOff, RF_CHANGE_BY_SW, true);
} else if (priv->rtllib->RfOffReason > RF_CHANGE_BY_PS) {
- RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for"
- " RfOffReason(%d) ----------\n", __func__,
- priv->rtllib->RfOffReason);
+ RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER),
+ "%s(): Turn off RF for RfOffReason(%d) ----------\n",
+ __func__, priv->rtllib->RfOffReason);
MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,
true);
} else if (priv->rtllib->RfOffReason >= RF_CHANGE_BY_IPS) {
- RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER), "%s(): Turn off RF for"
- " RfOffReason(%d) ----------\n", __func__,
- priv->rtllib->RfOffReason);
+ RT_TRACE((COMP_INIT|COMP_RF|COMP_POWER),
+ "%s(): Turn off RF for RfOffReason(%d) ----------\n",
+ __func__, priv->rtllib->RfOffReason);
MgntActSet_RF_State(dev, eRfOff, priv->rtllib->RfOffReason,
true);
} else {
priv->CCKPresentAttentuation_difference = 0;
priv->CCKPresentAttentuation =
priv->CCKPresentAttentuation_20Mdefault;
- RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpower"
- "trackingindex_initial = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->rfa_txpowertrackingindex_initial = %d\n",
priv->rfa_txpowertrackingindex);
- RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpower"
- "trackingindex_real__initial = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->rfa_txpowertrackingindex_real__initial = %d\n",
priv->rfa_txpowertrackingindex_real);
- RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresent"
- "Attentuation_difference_initial = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->CCKPresentAttentuation_difference_initial = %d\n",
priv->CCKPresentAttentuation_difference);
- RT_TRACE(COMP_POWER_TRACKING, "priv->CCKPresent"
- "Attentuation_initial = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "priv->CCKPresentAttentuation_initial = %d\n",
priv->CCKPresentAttentuation);
priv->btxpower_tracking = false;
}
QueueSelect = QSLT_HIGH;
break;
default:
- RT_TRACE(COMP_ERR, "TransmitTCB(): Impossible Queue Selection:"
- " %d\n", QueueID);
+ RT_TRACE(COMP_ERR,
+ "TransmitTCB(): Impossible Queue Selection: %d\n",
+ QueueID);
break;
}
return QueueSelect;
break;
default:
- RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported"
- "Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
- break;
+ RT_TRACE(COMP_RECV,
+ "HwRateToMRate90(): Non supportedRate [%x], bIsHT = %d!!!\n",
+ rate, bIsHT);
+ break;
}
} else {
break;
default:
- RT_TRACE(COMP_RECV, "HwRateToMRate90(): Non supported "
- "Rate [%x], bIsHT = %d!!!\n", rate, bIsHT);
+ RT_TRACE(COMP_RECV,
+ "HwRateToMRate90(): Non supported Rate [%x], bIsHT = %d!!!\n",
+ rate, bIsHT);
break;
}
}
priv->stats.numqry_phystatusCCK++;
if (!reg824_bit9) {
report = pcck_buf->cck_agc_rpt & 0xc0;
- report = report>>6;
+ report >>= 6;
switch (report) {
case 0x3:
rx_pwr_all = -35 - (pcck_buf->cck_agc_rpt &
}
} else {
report = pcck_buf->cck_agc_rpt & 0x60;
- report = report>>5;
+ report >>= 5;
switch (report) {
case 0x3:
rx_pwr_all = -35 -
if (!rtl8192_phy_CheckIsLegalRFPath(priv->rtllib->dev,
rfpath))
continue;
- RT_TRACE(COMP_DBG, "Jacken -> pPreviousstats->RxMIMO"
- "SignalStrength[rfpath] = %d\n",
+ RT_TRACE(COMP_DBG,
+ "Jacken -> pPreviousstats->RxMIMOSignalStrength[rfpath] = %d\n",
prev_st->RxMIMOSignalStrength[rfpath]);
if (priv->stats.rx_rssi_percentage[rfpath] == 0) {
priv->stats.rx_rssi_percentage[rfpath] =
(prev_st->RxMIMOSignalStrength[rfpath])) /
(RX_SMOOTH);
}
- RT_TRACE(COMP_DBG, "Jacken -> priv->RxStats.RxRSSI"
- "Percentage[rfPath] = %d\n",
+ RT_TRACE(COMP_DBG,
+ "Jacken -> priv->RxStats.RxRSSIPercentage[rfPath] = %d\n",
priv->stats.rx_rssi_percentage[rfpath]);
}
}
pDrvInfo);
if (pDrvInfo->FirstAGGR == 1 || pDrvInfo->PartAggr == 1)
- RT_TRACE(COMP_RXDESC, "pDrvInfo->FirstAGGR = %d,"
- " pDrvInfo->PartAggr = %d\n",
+ RT_TRACE(COMP_RXDESC,
+ "pDrvInfo->FirstAGGR = %d, pDrvInfo->PartAggr = %d\n",
pDrvInfo->FirstAGGR, pDrvInfo->PartAggr);
skb_trim(skb, skb->len - 4/*sCrcLng*/);
u32 buffer_len)
{
struct r8192_priv *priv = rtllib_priv(dev);
- bool rt_status = true;
u16 frag_threshold;
u16 frag_length, frag_offset = 0;
int i;
frag_threshold = pfirmware->cmdpacket_frag_thresold;
do {
if ((buffer_len - frag_offset) > frag_threshold) {
- frag_length = frag_threshold ;
+ frag_length = frag_threshold;
bLastIniPkt = 0;
} else {
if (!priv->rtllib->check_nic_enough_desc(dev, tcb_desc->queue_index) ||
(!skb_queue_empty(&priv->rtllib->skb_waitQ[tcb_desc->queue_index])) ||
(priv->rtllib->queue_stop)) {
- RT_TRACE(COMP_FIRMWARE, "===================> tx "
- "full!\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "===================> tx full!\n");
skb_queue_tail(&priv->rtllib->skb_waitQ
[tcb_desc->queue_index], skb);
} else {
write_nic_byte(dev, TPPoll, TPPoll_CQ);
- return rt_status;
+ return true;
}
static bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
u32 CPU_status = 0;
unsigned long timeout;
- timeout = jiffies + MSECS(200);
+ timeout = jiffies + msecs_to_jiffies(200);
while (time_before(jiffies, timeout)) {
CPU_status = read_nic_dword(dev, CPU_GEN);
if (CPU_status & CPU_GEN_PUT_CODE_OK)
(u8)((CPU_status|CPU_GEN_PWR_STB_CPU)&0xff));
mdelay(1);
- timeout = jiffies + MSECS(200);
+ timeout = jiffies + msecs_to_jiffies(200);
while (time_before(jiffies, timeout)) {
CPU_status = read_nic_dword(dev, CPU_GEN);
if (CPU_status&CPU_GEN_BOOT_RDY)
u32 CPU_status = 0;
unsigned long timeout;
- timeout = jiffies + MSECS(20);
+ timeout = jiffies + msecs_to_jiffies(20);
while (time_before(jiffies, timeout)) {
CPU_status = read_nic_dword(dev, CPU_GEN);
if (CPU_status&CPU_GEN_FIRM_RDY)
if (rt_status)
pfirmware->firmware_status = FW_STATUS_3_TURNON_CPU;
else
- RT_TRACE(COMP_FIRMWARE, "CPUcheck_maincodeok_turnon"
- "CPU fail!\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "CPUcheck_maincodeok_turnonCPU fail!\n");
break;
if (rt_status)
pfirmware->firmware_status = FW_STATUS_5_READY;
else
- RT_TRACE(COMP_FIRMWARE, "CPUcheck_firmware_ready fail"
- "(%d)!\n", rt_status);
+ RT_TRACE(COMP_FIRMWARE,
+ "CPUcheck_firmware_ready fail(%d)!\n",
+ rt_status);
break;
default:
rst_opt = OPT_FIRMWARE_RESET;
starting_state = FW_INIT_STEP2_DATA;
} else {
- RT_TRACE(COMP_FIRMWARE, "PlatformInitFirmware: undefined"
- " firmware state\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "PlatformInitFirmware: undefined firmware state\n");
}
for (init_step = starting_state; init_step <= FW_INIT_STEP2_DATA;
fw_name[init_step],
&priv->pdev->dev);
if (rc < 0) {
- RT_TRACE(COMP_FIRMWARE, "request firmware fail!\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "request firmware fail!\n");
goto download_firmware_fail;
}
if (fw_entry->size >
sizeof(pfirmware->firmware_buf[init_step])) {
- RT_TRACE(COMP_FIRMWARE, "img file size "
- "exceed the container struct "
- "buffer fail!\n");
+ RT_TRACE(COMP_FIRMWARE,
+ "img file size exceed the container struct buffer fail!\n");
goto download_firmware_fail;
}
#define PHY_REG_1T2RArrayLengthPciE 296
extern u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE];
#define RadioA_ArrayLengthPciE 246
-extern u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE] ;
+extern u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE];
#define RadioB_ArrayLengthPciE 78
-extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE] ;
+extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE];
#define RadioC_ArrayLengthPciE 2
-extern u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE] ;
+extern u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE];
#define RadioD_ArrayLengthPciE 2
-extern u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE] ;
+extern u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE];
#define MACPHY_ArrayLengthPciE 18
-extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE] ;
+extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE];
#define MACPHY_Array_PGLengthPciE 30
-extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE] ;
+extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE];
#define AGCTAB_ArrayLengthPciE 384
-extern u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE] ;
+extern u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE];
#endif
} else
NewOffset = Offset;
} else {
- RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need"
- " to be 8256\n");
+ RT_TRACE((COMP_PHY|COMP_ERR),
+ "check RF type here, need to be 8256\n");
NewOffset = Offset;
}
rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress,
} else
NewOffset = Offset;
} else {
- RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be"
- " 8256\n");
+ RT_TRACE((COMP_PHY|COMP_ERR),
+ "check RF type here, need to be 8256\n");
NewOffset = Offset;
}
pdwArray = Rtl819XMACPHY_Array;
}
for (i = 0; i < dwArrayLen; i += 3) {
- RT_TRACE(COMP_DBG, "The Rtl8190MACPHY_Array[0] is %x Rtl8190MAC"
- "PHY_Array[1] is %x Rtl8190MACPHY_Array[2] is %x\n",
+ RT_TRACE(COMP_DBG,
+ "The Rtl8190MACPHY_Array[0] is %x Rtl8190MACPHY_Array[1] is %x Rtl8190MACPHY_Array[2] is %x\n",
pdwArray[i], pdwArray[i+1], pdwArray[i+2]);
if (pdwArray[i] == 0x318)
pdwArray[i+2] = 0x00000800;
rtl8192_setBBreg(dev, Rtl819XPHY_REGArray_Table[i],
bMaskDWord,
Rtl819XPHY_REGArray_Table[i+1]);
- RT_TRACE(COMP_DBG, "i: %x, The Rtl819xUsbPHY_REGArray"
- "[0] is %x Rtl819xUsbPHY_REGArray[1] is %x\n",
+ RT_TRACE(COMP_DBG,
+ "i: %x, The Rtl819xUsbPHY_REGArray[0] is %x Rtl819xUsbPHY_REGArray[1] is %x\n",
i, Rtl819XPHY_REGArray_Table[i],
Rtl819XPHY_REGArray_Table[i+1]);
}
rtl8192_setBBreg(dev, Rtl819XAGCTAB_Array_Table[i],
bMaskDWord,
Rtl819XAGCTAB_Array_Table[i+1]);
- RT_TRACE(COMP_DBG, "i:%x, The rtl819XAGCTAB_Array[0] "
- "is %x rtl819XAGCTAB_Array[1] is %x\n", i,
- Rtl819XAGCTAB_Array_Table[i],
+ RT_TRACE(COMP_DBG,
+ "i:%x, The rtl819XAGCTAB_Array[0] is %x rtl819XAGCTAB_Array[1] is %x\n",
+ i, Rtl819XAGCTAB_Array_Table[i],
Rtl819XAGCTAB_Array_Table[i+1]);
}
}
for (i = 0; i < CheckTimes; i++) {
switch (CheckBlock) {
case HW90_BLOCK_MAC:
- RT_TRACE(COMP_ERR, "PHY_CheckBBRFOK(): Never Write "
- "0x100 here!");
+ RT_TRACE(COMP_ERR,
+ "PHY_CheckBBRFOK(): Never Write 0x100 here!");
break;
case HW90_BLOCK_PHY0:
if (dwRegRead != WriteData[i]) {
- RT_TRACE(COMP_ERR, "====>error=====dwRegRead: %x, "
- "WriteData: %x\n", dwRegRead, WriteData[i]);
+ RT_TRACE(COMP_ERR,
+ "====>error=====dwRegRead: %x, WriteData: %x\n",
+ dwRegRead, WriteData[i]);
ret = false;
break;
}
(enum hw90_block)eCheckItem,
(enum rf90_radio_path)0);
if (!rtStatus) {
- RT_TRACE((COMP_ERR | COMP_PHY), "PHY_RF8256_Config():"
- "Check PHY%d Fail!!\n", eCheckItem-1);
+ RT_TRACE((COMP_ERR | COMP_PHY),
+ "PHY_RF8256_Config():Check PHY%d Fail!!\n",
+ eCheckItem-1);
return rtStatus;
}
}
priv->DefaultInitialGain[1] = read_nic_byte(dev, rOFDM0_XBAGCCore1);
priv->DefaultInitialGain[2] = read_nic_byte(dev, rOFDM0_XCAGCCore1);
priv->DefaultInitialGain[3] = read_nic_byte(dev, rOFDM0_XDAGCCore1);
- RT_TRACE(COMP_INIT, "Default initial gain (c50=0x%x, c58=0x%x, "
- "c60=0x%x, c68=0x%x)\n",
+ RT_TRACE(COMP_INIT,
+ "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x)\n",
priv->DefaultInitialGain[0], priv->DefaultInitialGain[1],
priv->DefaultInitialGain[2], priv->DefaultInitialGain[3]);
case RF_8258:
break;
default:
- RT_TRACE(COMP_ERR, "unknown rf chip ID in rtl8192_SetTxPower"
- "Level()\n");
+ RT_TRACE(COMP_ERR,
+ "unknown rf chip ID in rtl8192_SetTxPowerLevel()\n");
break;
}
return;
struct sw_chnl_cmd *pCmd;
if (CmdTable == NULL) {
- RT_TRACE(COMP_ERR, "phy_SetSwChnlCmdArray(): CmdTable cannot "
- "be NULL.\n");
+ RT_TRACE(COMP_ERR,
+ "phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n");
return false;
}
if (CmdTableIdx >= CmdTableSz) {
- RT_TRACE(COMP_ERR, "phy_SetSwChnlCmdArray(): Access invalid"
- " index, please check size of the table, CmdTableIdx:"
- "%d, CmdTableSz:%d\n",
- CmdTableIdx, CmdTableSz);
+ RT_TRACE(COMP_ERR,
+ "phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%d, CmdTableSz:%d\n",
+ CmdTableIdx, CmdTableSz);
return false;
}
switch (priv->rf_chip) {
case RF_8225:
if (!(channel >= 1 && channel <= 14)) {
- RT_TRACE(COMP_ERR, "illegal channel for Zebra "
- "8225: %d\n", channel);
+ RT_TRACE(COMP_ERR,
+ "illegal channel for Zebra 8225: %d\n",
+ channel);
return false;
}
rtl8192_phy_SetSwChnlCmdArray(ieee->RfDependCmd,
case RF_8256:
if (!(channel >= 1 && channel <= 14)) {
- RT_TRACE(COMP_ERR, "illegal channel for Zebra"
- " 8256: %d\n", channel);
+ RT_TRACE(COMP_ERR,
+ "illegal channel for Zebra 8256: %d\n",
+ channel);
return false;
}
rtl8192_phy_SetSwChnlCmdArray(ieee->RfDependCmd,
RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n",
priv->rf_chip);
return false;
- break;
}
&priv->SwChnlStep, &delay)) {
if (delay > 0)
msleep(delay);
- if (IS_NIC_DOWN(priv))
+ if (!priv->up)
break;
}
}
struct r8192_priv *priv = rtllib_priv(dev);
RT_TRACE(COMP_PHY, "=====>%s()\n", __func__);
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_ERR, "%s(): ERR !! driver is not up\n", __func__);
return false;
}
priv->SwChnlStage = 0;
priv->SwChnlStep = 0;
- if (!IS_NIC_DOWN(priv))
+ if (priv->up)
rtl8192_SwChnl_WorkItem(dev);
priv->SwChnlInProgress = false;
return true;
if (priv->CCKPresentAttentuation < 0)
priv->CCKPresentAttentuation = 0;
- RT_TRACE(COMP_POWER_TRACKING, "20M, priv->CCKPresent"
- "Attentuation = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "20M, priv->CCKPresentAttentuation = %d\n",
priv->CCKPresentAttentuation);
if (priv->rtllib->current_network.channel == 14 &&
priv->CCKPresentAttentuation_40Mdefault +
priv->CCKPresentAttentuation_difference;
- RT_TRACE(COMP_POWER_TRACKING, "40M, priv->CCKPresent"
- "Attentuation = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "40M, priv->CCKPresentAttentuation = %d\n",
priv->CCKPresentAttentuation);
if (priv->CCKPresentAttentuation >
(CCKTxBBGainTableLength - 1))
if (priv->Record_CCK_20Mindex == 0)
priv->Record_CCK_20Mindex = 6;
priv->CCK_index = priv->Record_CCK_20Mindex;
- RT_TRACE(COMP_POWER_TRACKING, "20MHz, CCK_Tx_Power_Track_BW_"
- "Switch_ThermalMeter(),CCK_index = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "20MHz, CCK_Tx_Power_Track_BW_Switch_ThermalMeter(),CCK_index = %d\n",
priv->CCK_index);
break;
case HT_CHANNEL_WIDTH_20_40:
priv->CCK_index = priv->Record_CCK_40Mindex;
- RT_TRACE(COMP_POWER_TRACKING, "40MHz, CCK_Tx_Power_Track_BW_"
- "Switch_ThermalMeter(), CCK_index = %d\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "40MHz, CCK_Tx_Power_Track_BW_Switch_ThermalMeter(), CCK_index = %d\n",
priv->CCK_index);
break;
}
struct r8192_priv *priv = rtllib_priv(dev);
u8 regBwOpMode;
- RT_TRACE(COMP_SWBW, "==>rtl8192_SetBWModeWorkItem() Switch to %s "
- "bandwidth\n", priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ?
- "20MHz" : "40MHz");
+ RT_TRACE(COMP_SWBW,
+ "==>rtl8192_SetBWModeWorkItem() Switch to %s bandwidth\n",
+ priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20 ?
+ "20MHz" : "40MHz");
if (priv->rf_chip == RF_PSEUDO_11N) {
priv->SetBWModeInProgress = false;
return;
}
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_ERR, "%s(): ERR!! driver is not up\n", __func__);
return;
}
break;
default:
- RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown "
- "Bandwidth: %#X\n", priv->CurrentChannelBW);
+ RT_TRACE(COMP_ERR,
+ "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n",
+ priv->CurrentChannelBW);
break;
}
rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0);
break;
default:
- RT_TRACE(COMP_ERR, "SetChannelBandwidth819xUsb(): unknown "
- "Bandwidth: %#X\n", priv->CurrentChannelBW);
+ RT_TRACE(COMP_ERR,
+ "SetChannelBandwidth819xUsb(): unknown Bandwidth: %#X\n",
+ priv->CurrentChannelBW);
break;
}
u32 BitMask;
u8 initial_gain;
- if (!IS_NIC_DOWN(priv)) {
+ if (priv->up) {
switch (Operation) {
case IG_Backup:
- RT_TRACE(COMP_SCAN, "IG_Backup, backup the initial"
- " gain.\n");
+ RT_TRACE(COMP_SCAN,
+ "IG_Backup, backup the initial gain.\n");
initial_gain = SCAN_RX_INITIAL_GAIN;
BitMask = bMaskByte0;
if (dm_digtable.dig_algorithm ==
priv->initgain_backup.cca = (u8)rtl8192_QueryBBReg(dev,
rCCK0_CCA, BitMask);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc50 is"
- " %x\n", priv->initgain_backup.xaagccore1);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc58 is"
- " %x\n", priv->initgain_backup.xbagccore1);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc60 is"
- " %x\n", priv->initgain_backup.xcagccore1);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xc68 is"
- " %x\n", priv->initgain_backup.xdagccore1);
- RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xa0a is"
- " %x\n", priv->initgain_backup.cca);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xc50 is %x\n",
+ priv->initgain_backup.xaagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xc58 is %x\n",
+ priv->initgain_backup.xbagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xc60 is %x\n",
+ priv->initgain_backup.xcagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xc68 is %x\n",
+ priv->initgain_backup.xdagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan InitialGainBackup 0xa0a is %x\n",
+ priv->initgain_backup.cca);
RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x\n",
initial_gain);
write_nic_byte(dev, 0xa0a, POWER_DETECTION_TH);
break;
case IG_Restore:
- RT_TRACE(COMP_SCAN, "IG_Restore, restore the initial "
- "gain.\n");
+ RT_TRACE(COMP_SCAN,
+ "IG_Restore, restore the initial gain.\n");
BitMask = 0x7f;
if (dm_digtable.dig_algorithm ==
DIG_ALGO_BY_FALSE_ALARM)
rtl8192_setBBreg(dev, rCCK0_CCA, BitMask,
(u32)priv->initgain_backup.cca);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc50"
- " is %x\n", priv->initgain_backup.xaagccore1);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc58"
- " is %x\n", priv->initgain_backup.xbagccore1);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc60"
- " is %x\n", priv->initgain_backup.xcagccore1);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xc68"
- " is %x\n", priv->initgain_backup.xdagccore1);
- RT_TRACE(COMP_SCAN, "Scan BBInitialGainRestore 0xa0a"
- " is %x\n", priv->initgain_backup.cca);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xc50 is %x\n",
+ priv->initgain_backup.xaagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xc58 is %x\n",
+ priv->initgain_backup.xbagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xc60 is %x\n",
+ priv->initgain_backup.xcagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xc68 is %x\n",
+ priv->initgain_backup.xdagccore1);
+ RT_TRACE(COMP_SCAN,
+ "Scan BBInitialGainRestore 0xa0a is %x\n",
+ priv->initgain_backup.cca);
rtl8192_phy_setTxPower(dev,
priv->rtllib->current_network.channel);
} while (!rtstatus && (InitilizeCount > 0));
if (!rtstatus) {
- RT_TRACE(COMP_ERR, "%s():Initialize Ada"
- "pter fail,return\n",
+ RT_TRACE(COMP_ERR,
+ "%s():Initialize Adapter fail,return\n",
__func__);
priv->SetRFPowerStateInProgress = false;
return false;
QueueID++;
continue;
} else {
- RT_TRACE((COMP_POWER|COMP_RF), "eRf Off"
- "/Sleep: %d times TcbBusyQueue"
- "[%d] !=0 before doze!\n",
+ RT_TRACE((COMP_POWER|COMP_RF),
+ "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n",
(i+1), QueueID);
udelay(10);
i++;
}
if (i >= MAX_DOZE_WAITING_TIMES_9x) {
- RT_TRACE(COMP_POWER, "\n\n\n TimeOut!! "
- "SetRFPowerState8190(): eRfOff"
- ": %d times TcbBusyQueue[%d] "
- "!= 0 !!!\n",
+ RT_TRACE(COMP_POWER,
+ "\n\n\n TimeOut!! SetRFPowerState8190(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n",
MAX_DOZE_WAITING_TIMES_9x,
QueueID);
break;
break;
case eRfOff:
- RT_TRACE(COMP_PS, "SetRFPowerState8190() eRfOff/"
- "Sleep !\n");
+ RT_TRACE(COMP_PS,
+ "SetRFPowerState8190() eRfOff/Sleep !\n");
for (QueueID = 0, i = 0; QueueID < MAX_TX_QUEUE; ) {
ring = &priv->tx_ring[QueueID];
QueueID++;
continue;
} else {
- RT_TRACE(COMP_POWER, "eRf Off/Sleep: %d"
- " times TcbBusyQueue[%d] !=0 b"
- "efore doze!\n", (i+1),
- QueueID);
+ RT_TRACE(COMP_POWER,
+ "eRf Off/Sleep: %d times TcbBusyQueue[%d] !=0 before doze!\n",
+ (i+1), QueueID);
udelay(10);
i++;
}
if (i >= MAX_DOZE_WAITING_TIMES_9x) {
- RT_TRACE(COMP_POWER, "\n\n\n SetZebra: "
- "RFPowerState8185B(): eRfOff:"
- " %d times TcbBusyQueue[%d] "
- "!= 0 !!!\n",
+ RT_TRACE(COMP_POWER,
+ "\n\n\n SetZebra: RFPowerState8185B(): eRfOff: %d times TcbBusyQueue[%d] != 0 !!!\n",
MAX_DOZE_WAITING_TIMES_9x,
QueueID);
break;
default:
bResult = false;
- RT_TRACE(COMP_ERR, "SetRFPowerState8190(): unknown state"
- " to set: 0x%X!!!\n", eRFPowerState);
+ RT_TRACE(COMP_ERR,
+ "SetRFPowerState8190(): unknown state to set: 0x%X!!!\n",
+ eRFPowerState);
break;
}
break;
default:
- RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown "
- "RF type\n");
+ RT_TRACE(COMP_ERR,
+ "SetRFPowerState8190(): Unknown RF type\n");
break;
}
}
eRFPowerState);
if (eRFPowerState == priv->rtllib->eRFPowerState &&
priv->bHwRfOffAction == 0) {
- RT_TRACE(COMP_PS, "<--------- SetRFPowerState(): discard the "
- "request for eRFPowerState(%d) is the same.\n",
+ RT_TRACE(COMP_PS,
+ "<--------- SetRFPowerState(): discard the request for eRFPowerState(%d) is the same.\n",
eRFPowerState);
return bResult;
}
struct r8192_priv *priv = rtllib_priv(dev);
struct rtllib_device *ieee = priv->rtllib;
- RT_TRACE(COMP_DBG, "===========>%s():EntryNo is %d,KeyIndex is "
- "%d,KeyType is %d,is_mesh is %d\n", __func__, EntryNo,
- KeyIndex, KeyType, is_mesh);
+ RT_TRACE(COMP_DBG,
+ "===========>%s():EntryNo is %d,KeyIndex is %d,KeyType is %d,is_mesh is %d\n",
+ __func__, EntryNo, KeyIndex, KeyType, is_mesh);
if (!is_mesh) {
ieee->swcamtable[EntryNo].bused = true;
ieee->swcamtable[EntryNo].key_index = KeyIndex;
if (priv->rtllib->RfOffReason > RF_CHANGE_BY_IPS) {
RT_TRACE(COMP_ERR, "%s(): RF is OFF.\n",
__func__);
- return ;
+ return;
} else {
down(&priv->rtllib->ips_sem);
IPSLeave(dev);
if (EntryNo >= TOTAL_CAM_ENTRY)
RT_TRACE(COMP_ERR, "cam entry exceeds in setKey()\n");
- RT_TRACE(COMP_SEC, "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d,"
- "KeyType:%d, MacAddr %pM\n", dev, EntryNo, KeyIndex,
- KeyType, MacAddr);
+ RT_TRACE(COMP_SEC,
+ "====>to setKey(), dev:%p, EntryNo:%d, KeyIndex:%d,KeyType:%d, MacAddr %pM\n",
+ dev, EntryNo, KeyIndex, KeyType, MacAddr);
if (DefaultKey)
usConfig |= BIT15 | (KeyType<<2);
for (EntryId = 0; EntryId < 4; EntryId++) {
MacAddr = CAM_CONST_ADDR[EntryId];
if (priv->rtllib->swcamtable[EntryId].bused) {
- setKey(dev, EntryId , EntryId,
+ setKey(dev, EntryId, EntryId,
priv->rtllib->pairwise_key_type, MacAddr,
0, (u32 *)(&priv->rtllib->swcamtable
[EntryId].key_buf[0]));
(u32 *)(&priv->rtllib->swcamtable[0].key_buf[0])
);
} else {
- RT_TRACE(COMP_ERR, "===>%s():ERR!! ADHOC TKIP "
- ",but 0 entry is have no data\n",
+ RT_TRACE(COMP_ERR,
+ "===>%s():ERR!! ADHOC TKIP ,but 0 entry is have no data\n",
__func__);
return;
}
MacAddr = CAM_CONST_BROAD;
for (EntryId = 1; EntryId < 4; EntryId++) {
if (priv->rtllib->swcamtable[EntryId].bused) {
- setKey(dev, EntryId , EntryId,
+ setKey(dev, EntryId, EntryId,
priv->rtllib->group_key_type,
MacAddr, 0,
(u32 *)(&priv->rtllib->swcamtable[EntryId].key_buf[0]));
if (priv->rtllib->iw_mode == IW_MODE_ADHOC) {
if (priv->rtllib->swcamtable[0].bused) {
- setKey(dev, 0 , 0,
+ setKey(dev, 0, 0,
priv->rtllib->group_key_type,
CAM_CONST_ADDR[0], 0,
(u32 *)(&priv->rtllib->swcamtable[0].key_buf[0]));
} else {
- RT_TRACE(COMP_ERR, "===>%s():ERR!! ADHOC CCMP ,"
- "but 0 entry is have no data\n",
+ RT_TRACE(COMP_ERR,
+ "===>%s():ERR!! ADHOC CCMP ,but 0 entry is have no data\n",
__func__);
return;
}
void write_nic_io_byte(struct net_device *dev, int x, u8 y)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
void write_nic_io_word(struct net_device *dev, int x, u16 y)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
void write_nic_io_dword(struct net_device *dev, int x, u32 y)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
u8 read_nic_io_byte(struct net_device *dev, int x)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
u8 Data = 0;
u16 read_nic_io_word(struct net_device *dev, int x)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
u16 Data = 0;
u32 read_nic_io_dword(struct net_device *dev, int x)
{
- u32 u4bPage = (x >> 8);
+ u32 u4bPage = x >> 8;
u8 u1PageMask = 0;
bool bIsLegalPage = false;
u32 Data = 0;
u16 RFWaitCounter = 0;
unsigned long flag;
- RT_TRACE((COMP_PS | COMP_RF), "===>MgntActSet_RF_State(): "
- "StateToSet(%d)\n", StateToSet);
+ RT_TRACE((COMP_PS | COMP_RF),
+ "===>MgntActSet_RF_State(): StateToSet(%d)\n", StateToSet);
ProtectOrNot = false;
if (priv->RFChangeInProgress) {
spin_unlock_irqrestore(&priv->rf_ps_lock, flag);
RT_TRACE((COMP_PS | COMP_RF),
- "MgntActSet_RF_State(): RF Change in "
- "progress! Wait to set..StateToSet"
- "(%d).\n", StateToSet);
+ "MgntActSet_RF_State(): RF Change in progress! Wait to set..StateToSet(%d).\n",
+ StateToSet);
while (priv->RFChangeInProgress) {
RFWaitCounter++;
RT_TRACE((COMP_PS | COMP_RF),
- "MgntActSet_RF_State(): Wait 1"
- " ms (%d times)...\n",
+ "MgntActSet_RF_State(): Wait 1 ms (%d times)...\n",
RFWaitCounter);
mdelay(1);
if (RFWaitCounter > 100) {
- RT_TRACE(COMP_ERR, "MgntActSet_"
- "RF_State(): Wait too "
- "logn to set RF\n");
+ RT_TRACE(COMP_ERR,
+ "MgntActSet_RF_State(): Wait too logn to set RF\n");
return false;
}
}
ChangeSource >= RF_CHANGE_BY_HW)
bConnectBySSID = true;
} else {
- RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State - "
- "eRfon reject pMgntInfo->RfOffReason= 0x%x,"
- " ChangeSource=0x%X\n",
+ RT_TRACE((COMP_PS | COMP_RF),
+ "MgntActSet_RF_State - eRfon reject pMgntInfo->RfOffReason= 0x%x, ChangeSource=0x%X\n",
priv->rtllib->RfOffReason, ChangeSource);
}
}
if (bActionAllowed) {
- RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): Action is"
- " allowed.... StateToSet(%d), RfOffReason(%#X)\n",
+ RT_TRACE((COMP_PS | COMP_RF),
+ "MgntActSet_RF_State(): Action is allowed.... StateToSet(%d), RfOffReason(%#X)\n",
StateToSet, priv->rtllib->RfOffReason);
PHY_SetRFPowerState(dev, StateToSet);
if (StateToSet == eRfOn) {
}
}
} else {
- RT_TRACE((COMP_PS | COMP_RF), "MgntActSet_RF_State(): "
- "Action is rejected.... StateToSet(%d), ChangeSource"
- "(%#X), RfOffReason(%#X)\n", StateToSet, ChangeSource,
- priv->rtllib->RfOffReason);
+ RT_TRACE((COMP_PS | COMP_RF),
+ "MgntActSet_RF_State(): Action is rejected.... StateToSet(%d), ChangeSource(%#X), RfOffReason(%#X)\n",
+ StateToSet, ChangeSource, priv->rtllib->RfOffReason);
}
if (!ProtectOrNot) {
* between the tail and the head
*/
if ((prio == MGNT_QUEUE) && (skb_queue_len(&ring->queue) > 10))
- RT_TRACE(COMP_DBG, "-----[%d]---------ring->idx=%d "
- "queue_len=%d---------\n", prio, ring->idx,
- skb_queue_len(&ring->queue));
+ RT_TRACE(COMP_DBG,
+ "-----[%d]---------ring->idx=%d queue_len=%d---------\n",
+ prio, ring->idx, skb_queue_len(&ring->queue));
return skb_queue_len(&ring->queue);
}
struct r8192_priv *priv = rtllib_priv(dev);
schedule_work(&priv->reset_wq);
- printk(KERN_INFO "TXTIMEOUT");
+ netdev_info(dev, "TXTIMEOUT");
}
void rtl8192_irq_enable(struct net_device *dev)
if (priv->dot11CurrentPreambleMode != PREAMBLE_SHORT) {
ShortPreamble = true;
priv->dot11CurrentPreambleMode = PREAMBLE_SHORT;
- RT_TRACE(COMP_DBG, "%s(): WLAN_CAPABILITY_SHORT_"
- "PREAMBLE\n", __func__);
+ RT_TRACE(COMP_DBG,
+ "%s(): WLAN_CAPABILITY_SHORT_PREAMBLE\n",
+ __func__);
priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACK_PREAMBLE,
(unsigned char *)&ShortPreamble);
}
if (priv->dot11CurrentPreambleMode != PREAMBLE_LONG) {
ShortPreamble = false;
priv->dot11CurrentPreambleMode = PREAMBLE_LONG;
- RT_TRACE(COMP_DBG, "%s(): WLAN_CAPABILITY_LONG_"
- "PREAMBLE\n", __func__);
+ RT_TRACE(COMP_DBG,
+ "%s(): WLAN_CAPABILITY_LONG_PREAMBLE\n",
+ __func__);
priv->rtllib->SetHwRegHandler(dev, HW_VAR_ACK_PREAMBLE,
(unsigned char *)&ShortPreamble);
}
mutex_lock(&priv->mutex);
if (priv->rtllib->state != RTLLIB_LINKED)
goto success;
- RT_TRACE(COMP_QOS, "qos active process with associate response "
- "received\n");
+ RT_TRACE(COMP_QOS,
+ "qos active process with associate response received\n");
for (i = 0; i < QOS_QUEUE_NUM; i++)
priv->rtllib->SetHwRegHandler(dev, HW_VAR_AC_PARAM, (u8 *)(&i));
network->qos_data.param_count;
priv->rtllib->wmm_acm = network->qos_data.wmm_acm;
queue_work_rsl(priv->priv_wq, &priv->qos_activate);
- RT_TRACE(COMP_QOS, "QoS parameters change call "
- "qos_activate\n");
+ RT_TRACE(COMP_QOS,
+ "QoS parameters change call qos_activate\n");
}
} else {
memcpy(&priv->rtllib->current_network.qos_data.parameters,
if ((network->qos_data.active == 1) && (active_network == 1)) {
queue_work_rsl(priv->priv_wq, &priv->qos_activate);
- RT_TRACE(COMP_QOS, "QoS was disabled call qos_"
- "activate\n");
+ RT_TRACE(COMP_QOS,
+ "QoS was disabled call qos_activate\n");
}
network->qos_data.active = 0;
network->qos_data.supported = 0;
} else if ((bSupportMode & WIRELESS_MODE_B)) {
wireless_mode = WIRELESS_MODE_B;
} else {
- RT_TRACE(COMP_ERR, "%s(), No valid wireless mode "
- "supported (%x)!!!\n", __func__, bSupportMode);
+ RT_TRACE(COMP_ERR,
+ "%s(), No valid wireless mode supported (%x)!!!\n",
+ __func__, bSupportMode);
wireless_mode = WIRELESS_MODE_B;
}
}
spin_lock_irqsave(&priv->rf_ps_lock, flags);
break;
}
- RT_TRACE(COMP_DBG, "===>%s():RF is in progress, need to wait "
- "until rf change is done.\n", __func__);
+ RT_TRACE(COMP_DBG,
+ "===>%s():RF is in progress, need to wait until rf change is done.\n",
+ __func__);
mdelay(1);
RFInProgressTimeOut++;
spin_lock_irqsave(&priv->rf_ps_lock, flags);
priv->AcmControl = 0;
priv->pFirmware = vzalloc(sizeof(struct rt_firmware));
if (!priv->pFirmware)
- printk(KERN_ERR "rtl8192e: Unable to allocate space "
- "for firmware\n");
+ netdev_err(dev,
+ "rtl8192e: Unable to allocate space for firmware\n");
skb_queue_head_init(&priv->rx_queue);
skb_queue_head_init(&priv->skb_queue);
if ((priv->rf_chip != RF_8225) && (priv->rf_chip != RF_8256)
&& (priv->rf_chip != RF_6052)) {
- RT_TRACE(COMP_ERR, "%s: unknown rf chip, can't set channel "
- "map\n", __func__);
+ RT_TRACE(COMP_ERR,
+ "%s: unknown rf chip, can't set channel map\n",
+ __func__);
return -1;
}
if (priv->ChannelPlan >= COUNTRY_CODE_MAX) {
- printk(KERN_INFO "rtl819x_init:Error channel plan! Set to "
- "default.\n");
+ netdev_info(dev,
+ "rtl819x_init:Error channel plan! Set to default.\n");
priv->ChannelPlan = COUNTRY_CODE_FCC;
}
RT_TRACE(COMP_INIT, "Channel plan is %d\n", priv->ChannelPlan);
rtl8192_irq_disable(dev);
if (request_irq(dev->irq, rtl8192_interrupt, IRQF_SHARED,
dev->name, dev)) {
- printk(KERN_ERR "Error allocating IRQ %d", dev->irq);
+ netdev_err(dev, "Error allocating IRQ %d", dev->irq);
return -1;
} else {
priv->irq = dev->irq;
}
if (rtl8192_pci_initdescring(dev) != 0) {
- printk(KERN_ERR "Endopoints initialization failed");
+ netdev_err(dev, "Endopoints initialization failed");
free_irq(dev->irq, dev);
return -1;
}
if ((i == TXCMD_QUEUE) || (i == HCCA_QUEUE))
continue;
if (skb_queue_len(&(&priv->tx_ring[i])->queue) > 0) {
- printk(KERN_INFO "===>tx queue is not empty:%d, %d\n",
+ netdev_info(dev, "===>tx queue is not empty:%d, %d\n",
i, skb_queue_len(&(&priv->tx_ring[i])->queue));
return 0;
}
tcb_desc->nStuckCount++;
bCheckFwTxCnt = true;
if (tcb_desc->nStuckCount > 1)
- printk(KERN_INFO "%s: QueueID=%d tcb_desc->n"
- "StuckCount=%d\n", __func__, QueueID,
- tcb_desc->nStuckCount);
+ netdev_info(dev,
+ "%s: QueueID=%d tcb_desc->nStuckCount=%d\n",
+ __func__, QueueID,
+ tcb_desc->nStuckCount);
}
}
spin_unlock_irqrestore(&priv->irq_th_lock, flags);
if (bCheckFwTxCnt) {
if (priv->ops->TxCheckStuckHandler(dev)) {
- RT_TRACE(COMP_RESET, "TxCheckStuck(): Fw indicates no"
- " Tx condition!\n");
+ RT_TRACE(COMP_RESET,
+ "TxCheckStuck(): Fw indicates no Tx condition!\n");
return RESET_TYPE_SILENT;
}
}
if (TxResetType == RESET_TYPE_NORMAL ||
RxResetType == RESET_TYPE_NORMAL) {
- printk(KERN_INFO "%s(): TxResetType is %d, RxResetType is %d\n",
- __func__, TxResetType, RxResetType);
+ netdev_info(dev, "%s(): TxResetType is %d, RxResetType is %d\n",
+ __func__, TxResetType, RxResetType);
return RESET_TYPE_NORMAL;
} else if (TxResetType == RESET_TYPE_SILENT ||
RxResetType == RESET_TYPE_SILENT) {
- printk(KERN_INFO "%s(): TxResetType is %d, RxResetType is %d\n",
- __func__, TxResetType, RxResetType);
+ netdev_info(dev, "%s(): TxResetType is %d, RxResetType is %d\n",
+ __func__, TxResetType, RxResetType);
return RESET_TYPE_SILENT;
} else {
return RESET_TYPE_NORESET;
if (priv->rtllib->state == RTLLIB_LINKED)
LeisurePSLeave(dev);
- if (IS_NIC_DOWN(priv)) {
- RT_TRACE(COMP_ERR, "%s():the driver is not up! "
- "return\n", __func__);
+ if (priv->up) {
+ RT_TRACE(COMP_ERR,
+ "%s():the driver is not up! return\n",
+ __func__);
up(&priv->wx_sem);
return;
}
RT_TRACE(COMP_RESET, "%s():======>start to down the driver\n",
__func__);
mdelay(1000);
- RT_TRACE(COMP_RESET, "%s():111111111111111111111111======>start"
- " to down the driver\n", __func__);
+ RT_TRACE(COMP_RESET,
+ "%s():111111111111111111111111======>start to down the driver\n",
+ __func__);
if (!netif_queue_stopped(dev))
netif_stop_queue(dev);
if (ieee->state == RTLLIB_LINKED) {
SEM_DOWN_IEEE_WX(&ieee->wx_sem);
- printk(KERN_INFO "ieee->state is RTLLIB_LINKED\n");
+ netdev_info(dev, "ieee->state is RTLLIB_LINKED\n");
rtllib_stop_send_beacons(priv->rtllib);
del_timer_sync(&ieee->associate_timer);
cancel_delayed_work(&ieee->associate_retry_wq);
netif_carrier_off(dev);
SEM_UP_IEEE_WX(&ieee->wx_sem);
} else {
- printk(KERN_INFO "ieee->state is NOT LINKED\n");
+ netdev_info(dev, "ieee->state is NOT LINKED\n");
rtllib_softmac_stop_protocol(priv->rtllib, 0 , true);
}
dm_backup_dynamic_mechanism_state(dev);
up(&priv->wx_sem);
- RT_TRACE(COMP_RESET, "%s():<==========down process is "
- "finished\n", __func__);
+ RT_TRACE(COMP_RESET,
+ "%s():<==========down process is finished\n",
+ __func__);
RT_TRACE(COMP_RESET, "%s():<===========up process start\n",
__func__);
reset_status = _rtl8192_up(dev, true);
- RT_TRACE(COMP_RESET, "%s():<===========up process is "
- "finished\n", __func__);
+ RT_TRACE(COMP_RESET,
+ "%s():<===========up process is finished\n", __func__);
if (reset_status == -1) {
if (reset_times < 3) {
reset_times++;
goto RESET_START;
} else {
- RT_TRACE(COMP_ERR, " ERR!!! %s(): Reset "
- "Failed!!\n", __func__);
+ RT_TRACE(COMP_ERR,
+ " ERR!!! %s(): Reset Failed!!\n",
+ __func__);
}
}
bool bHigherBusyRxTraffic = false;
bool bEnterPS = false;
- if (IS_NIC_DOWN(priv) || priv->bHwRadioOff)
+ if (!priv->up || priv->bHwRadioOff)
return;
if (priv->rtllib->state >= RTLLIB_LINKED) {
if ((ieee->PowerSaveControl.ReturnPoint ==
IPS_CALLBACK_NONE) &&
(!ieee->bNetPromiscuousMode)) {
- RT_TRACE(COMP_PS, "====================>haha: "
- "IPSEnter()\n");
+ RT_TRACE(COMP_PS,
+ "====================>haha: IPSEnter()\n");
IPSEnter(dev);
}
}
if (ieee->eRFPowerState == eRfOff)
RT_TRACE(COMP_ERR, "========>%s()\n", __func__);
- printk(KERN_INFO "===>%s(): AP is power off, chan:%d,"
- " connect another one\n", __func__, priv->chan);
+ netdev_info(dev,
+ "===>%s(): AP is power off, chan:%d, connect another one\n",
+ __func__, priv->chan);
ieee->state = RTLLIB_ASSOCIATING;
queue_delayed_work_rsl(priv->priv_wq, &priv->watch_dog_wq, 0);
mod_timer(&priv->watch_dog_timer, jiffies +
- MSECS(RTLLIB_WATCH_DOG_TIME));
+ msecs_to_jiffies(RTLLIB_WATCH_DOG_TIME));
}
/****************************************************************************
MAX_DEV_ADDR_SIZE);
u8 queue_index = tcb_desc->queue_index;
- if ((priv->rtllib->eRFPowerState == eRfOff) || IS_NIC_DOWN(priv) ||
+ if ((priv->rtllib->eRFPowerState == eRfOff) || !priv->up ||
priv->bResetInProgress) {
kfree_skb(skb);
return;
if (queue_index != TXCMD_QUEUE) {
if ((priv->rtllib->eRFPowerState == eRfOff) ||
- IS_NIC_DOWN(priv) || priv->bResetInProgress) {
+ !priv->up || priv->bResetInProgress) {
kfree_skb(skb);
return 0;
}
u32 fwinfo_size = 0;
if (priv->bdisable_nic) {
- RT_TRACE(COMP_ERR, "%s: ERR!! Nic is disabled! Can't tx packet"
- " len=%d qidx=%d!!!\n", __func__, skb->len,
- tcb_desc->queue_index);
+ RT_TRACE(COMP_ERR,
+ "%s: ERR!! Nic is disabled! Can't tx packet len=%d qidx=%d!!!\n",
+ __func__, skb->len, tcb_desc->queue_index);
return skb->len;
}
pdesc = &ring->desc[idx];
if ((pdesc->OWN == 1) && (tcb_desc->queue_index != BEACON_QUEUE)) {
- RT_TRACE(COMP_ERR, "No more TX desc@%d, ring->idx = %d, idx = "
- "%d, skblen = 0x%x queuelen=%d",
+ RT_TRACE(COMP_ERR,
+ "No more TX desc@%d, ring->idx = %d, idx = %d, skblen = 0x%x queuelen=%d",
tcb_desc->queue_index, ring->idx, idx, skb->len,
skb_queue_len(&ring->queue));
spin_unlock_irqrestore(&priv->irq_th_lock, flags);
down(&priv->wx_sem);
- memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
+ ether_addr_copy(dev->dev_addr, addr->sa_data);
schedule_work(&priv->reset_wq);
up(&priv->wx_sem);
if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
- printk(KERN_INFO "Unable to obtain 32bit DMA for consistent allocations\n");
+ dev_info(&pdev->dev,
+ "Unable to obtain 32bit DMA for consistent allocations\n");
goto err_pci_disable;
}
}
goto err_rel_rtllib;
}
- printk(KERN_INFO "Memory mapped space start: 0x%08lx\n", pmem_start);
+ dev_info(&pdev->dev, "Memory mapped space start: 0x%08lx\n",
+ pmem_start);
if (!request_mem_region(pmem_start, pmem_len, DRV_NAME)) {
RT_TRACE(COMP_ERR, "request_mem_region failed!");
goto err_rel_rtllib;
dev->watchdog_timeo = HZ * 3;
if (dev_alloc_name(dev, ifname) < 0) {
- RT_TRACE(COMP_INIT, "Oops: devname already taken! Trying "
- "wlan%%d...\n");
+ RT_TRACE(COMP_INIT,
+ "Oops: devname already taken! Trying wlan%%d...\n");
dev_alloc_name(dev, ifname);
}
static void rtl8192_pci_disconnect(struct pci_dev *pdev)
{
struct net_device *dev = pci_get_drvdata(pdev);
- struct r8192_priv *priv ;
+ struct r8192_priv *priv;
u32 i;
if (dev) {
rtl8192_free_tx_ring(dev, i);
if (priv->irq) {
- printk(KERN_INFO "Freeing irq %d\n", dev->irq);
+ dev_info(&pdev->dev, "Freeing irq %d\n", dev->irq);
free_irq(dev->irq, dev);
priv->irq = 0;
}
struct rt_pwr_save_ctrl *pPSC = (struct rt_pwr_save_ctrl *)
(&(priv->rtllib->PowerSaveControl));
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_ERR, "ERR!!! %s(): Driver is already down!\n",
__func__);
priv->bdisable_nic = false;
}
bool NicIFDisableNIC(struct net_device *dev)
{
- bool status = true;
struct r8192_priv *priv = rtllib_priv(dev);
u8 tmp_state = 0;
priv->ops->stop_adapter(dev, false);
RT_TRACE(COMP_PS, "<=========%s()\n", __func__);
- return status;
+ return true;
}
static int __init rtl8192_pci_module_init(void)
{
- printk(KERN_INFO "\nLinux kernel driver for RTL8192E WLAN cards\n");
- printk(KERN_INFO "Copyright (c) 2007-2008, Realsil Wlan Driver\n");
+ pr_info("\nLinux kernel driver for RTL8192E WLAN cards\n");
+ pr_info("Copyright (c) 2007-2008, Realsil Wlan Driver\n");
if (0 != pci_register_driver(&rtl8192_pci_driver)) {
DMESG("No device found");
queue_delayed_work_rsl(priv->priv_wq, &priv->gpio_change_rf_wq, 0);
mod_timer(&priv->gpio_polling_timer, jiffies +
- MSECS(RTLLIB_WATCH_DOG_TIME));
+ msecs_to_jiffies(RTLLIB_WATCH_DOG_TIME));
}
/***************************************************************************
#define BIT(_i) (1<<(_i))
#endif
-#define IS_NIC_DOWN(priv) (!(priv)->up)
-
#define IS_ADAPTER_SENDS_BEACON(dev) 0
-#define IS_UNDER_11N_AES_MODE(_rtllib) \
- ((_rtllib->pHTInfo->bCurrentHTSupport == true) && \
- (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
-
#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
u8 read_nic_io_byte(struct net_device *dev, int x);
u32 read_nic_io_dword(struct net_device *dev, int x);
-u16 read_nic_io_word(struct net_device *dev, int x) ;
+u16 read_nic_io_word(struct net_device *dev, int x);
void write_nic_io_byte(struct net_device *dev, int x, u8 y);
void write_nic_io_word(struct net_device *dev, int x, u16 y);
void write_nic_io_dword(struct net_device *dev, int x, u32 y);
u8 read_nic_byte(struct net_device *dev, int x);
u32 read_nic_dword(struct net_device *dev, int x);
-u16 read_nic_word(struct net_device *dev, int x) ;
+u16 read_nic_word(struct net_device *dev, int x);
void write_nic_byte(struct net_device *dev, int x, u8 y);
void write_nic_word(struct net_device *dev, int x, u16 y);
void write_nic_dword(struct net_device *dev, int x, u32 y);
bool bshort_gi_enabled = false;
static u8 ping_rssi_state;
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_RATE, "<---- dm_check_rate_adaptive(): driver is going to unload\n");
return;
}
for (i = 0; i < CCK_Table_length; i++) {
if (TempCCk == (u32)CCKSwingTable_Ch1_Ch13[i][0]) {
priv->CCK_index = (u8) i;
- RT_TRACE(COMP_POWER_TRACKING, "Initial reg0x%x"
- " = 0x%x, CCK_index = 0x%x\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "Initial reg0x%x = 0x%x, CCK_index = 0x%x\n",
rCCK0_TxFilter1, TempCCk,
priv->CCK_index);
break;
priv->Record_CCK_20Mindex = tmpCCK20Mindex;
priv->Record_CCK_40Mindex = tmpCCK40Mindex;
- RT_TRACE(COMP_POWER_TRACKING, "Record_CCK_20Mindex / Record_CCK_40"
- "Mindex = %d / %d.\n",
+ RT_TRACE(COMP_POWER_TRACKING,
+ "Record_CCK_20Mindex / Record_CCK_40Mindex = %d / %d.\n",
priv->Record_CCK_20Mindex, priv->Record_CCK_40Mindex);
if (priv->rtllib->current_network.channel == 14 &&
TM_Trigger = 1;
return;
} else {
- printk(KERN_INFO "===============>Schedule TxPowerTrackingWorkItem\n");
+ netdev_info(dev,
+ "===============>Schedule TxPowerTrackingWorkItem\n");
queue_delayed_work_rsl(priv->priv_wq, &priv->txpower_tracking_wq, 0);
TM_Trigger = 0;
TempVal = 0;
if (!bInCH14) {
TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
- (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
+ (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8));
rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
TempVal = (u32)(priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
- (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
+ (priv->cck_txbbgain_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8));
rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
} else {
TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[0] +
- (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8)) ;
+ (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[1]<<8));
rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[2] +
(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[5]<<24));
rtl8192_setBBreg(dev, rCCK0_TxFilter2, bMaskDWord, TempVal);
TempVal = (u32)(priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[6] +
- (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8)) ;
+ (priv->cck_txbbgain_ch14_table[(u8)(priv->CCKPresentAttentuation)].ccktxbb_valuearray[7]<<8));
rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
}
TempVal = 0;
if (!bInCH14) {
TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][0] +
- (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8) ;
+ (CCKSwingTable_Ch1_Ch13[priv->CCK_index][1]<<8);
rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
rCCK0_TxFilter1, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
rCCK0_TxFilter2, TempVal);
TempVal = CCKSwingTable_Ch1_Ch13[priv->CCK_index][6] +
- (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8) ;
+ (CCKSwingTable_Ch1_Ch13[priv->CCK_index][7]<<8);
rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK not chnl 14, reg 0x%x = 0x%x\n",
rCCK0_DebugPort, TempVal);
} else {
TempVal = CCKSwingTable_Ch14[priv->CCK_index][0] +
- (CCKSwingTable_Ch14[priv->CCK_index][1]<<8) ;
+ (CCKSwingTable_Ch14[priv->CCK_index][1]<<8);
rtl8192_setBBreg(dev, rCCK0_TxFilter1, bMaskHWord, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
rCCK0_TxFilter2, TempVal);
TempVal = CCKSwingTable_Ch14[priv->CCK_index][6] +
- (CCKSwingTable_Ch14[priv->CCK_index][7]<<8) ;
+ (CCKSwingTable_Ch14[priv->CCK_index][7]<<8);
rtl8192_setBBreg(dev, rCCK0_DebugPort, bMaskLWord, TempVal);
RT_TRACE(COMP_POWER_TRACKING, "CCK chnl 14, reg 0x%x = 0x%x\n",
u32 reg_ratr = priv->rate_adaptive.last_ratr;
u32 ratr_value;
- if (IS_NIC_DOWN(priv)) {
+ if (!priv->up) {
RT_TRACE(COMP_RATE, "<---- dm_restore_dynamic_mechanism_state(): driver is going to unload\n");
return;
}
static int wb_tmp;
if (wb_tmp == 0) {
- printk(KERN_INFO "%s():iot peer is %s, bssid:"
- " %pM\n", __func__,
- peername[pHTInfo->IOTPeer],
- priv->rtllib->current_network.bssid);
+ netdev_info(dev,
+ "%s():iot peer is %s, bssid: %pM\n",
+ __func__, peername[pHTInfo->IOTPeer],
+ priv->rtllib->current_network.bssid);
wb_tmp = 1;
}
}
}
priv->rate_record = rate_count;
priv->rateCountDiffRecord = rate_count_diff;
- RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rate"
- "Countdiff %d bSwitchFsync %d\n", priv->rate_record,
- rate_count, rate_count_diff, priv->bswitch_fsync);
+ RT_TRACE(COMP_HALDM,
+ "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
+ priv->rate_record, rate_count, rate_count_diff,
+ priv->bswitch_fsync);
if (priv->undecorated_smoothed_pwdb >
priv->rtllib->fsync_rssi_threshold &&
bSwitchFromCountDiff) {
if (timer_pending(&priv->fsync_timer))
del_timer_sync(&priv->fsync_timer);
priv->fsync_timer.expires = jiffies +
- MSECS(priv->rtllib->fsync_time_interval *
+ msecs_to_jiffies(priv->rtllib->fsync_time_interval *
priv->rtllib->fsync_multiple_timeinterval);
add_timer(&priv->fsync_timer);
} else {
if (timer_pending(&priv->fsync_timer))
del_timer_sync(&priv->fsync_timer);
priv->fsync_timer.expires = jiffies +
- MSECS(priv->rtllib->fsync_time_interval);
+ msecs_to_jiffies(priv->rtllib->fsync_time_interval);
add_timer(&priv->fsync_timer);
}
} else {
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c52cd);
}
RT_TRACE(COMP_HALDM, "ContinueDiffCount %d\n", priv->ContinueDiffCount);
- RT_TRACE(COMP_HALDM, "rateRecord %d rateCount %d, rateCountdiff %d "
- "bSwitchFsync %d\n", priv->rate_record, rate_count,
- rate_count_diff, priv->bswitch_fsync);
+ RT_TRACE(COMP_HALDM,
+ "rateRecord %d rateCount %d, rateCountdiff %d bSwitchFsync %d\n",
+ priv->rate_record, rate_count, rate_count_diff,
+ priv->bswitch_fsync);
}
static void dm_StartHWFsync(struct net_device *dev)
if (timer_pending(&priv->fsync_timer))
del_timer_sync(&priv->fsync_timer);
priv->fsync_timer.expires = jiffies +
- MSECS(priv->rtllib->fsync_time_interval);
+ msecs_to_jiffies(priv->rtllib->fsync_time_interval);
add_timer(&priv->fsync_timer);
write_nic_dword(dev, rOFDM0_RxDetector2, 0x465c12cd);
static u8 reg_c38_State = RegC38_Default;
static u32 reset_cnt;
- RT_TRACE(COMP_HALDM, "RSSI %d TimeInterval %d MultipleTimeInterval "
- "%d\n", priv->rtllib->fsync_rssi_threshold,
+ RT_TRACE(COMP_HALDM,
+ "RSSI %d TimeInterval %d MultipleTimeInterval %d\n",
+ priv->rtllib->fsync_rssi_threshold,
priv->rtllib->fsync_time_interval,
priv->rtllib->fsync_multiple_timeinterval);
- RT_TRACE(COMP_HALDM, "RateBitmap 0x%x FirstDiffRateThreshold %d Second"
- "DiffRateThreshold %d\n", priv->rtllib->fsync_rate_bitmap,
+ RT_TRACE(COMP_HALDM,
+ "RateBitmap 0x%x FirstDiffRateThreshold %d SecondDiffRateThreshold %d\n",
+ priv->rtllib->fsync_rate_bitmap,
priv->rtllib->fsync_firstdiff_ratethreshold,
priv->rtllib->fsync_seconddiff_ratethreshold);
/*------------------------Export global variable----------------------------*/
-/*------------------------Export Marco Definition---------------------------*/
-#define DM_APInitGainChangeNotify(Event) \
- { \
- dm_digtable.CurAPConnectState = Event; \
- }
-/*------------------------Export Marco Definition---------------------------*/
-
-
/*--------------------------Exported Function prototype---------------------*/
/*--------------------------Exported Function prototype---------------------*/
extern void init_hal_dm(struct net_device *dev);
if (DeviceID == 0x8172) {
switch (RevisionID) {
case HAL_HW_PCI_REVISION_ID_8192PCIE:
- printk(KERN_INFO "Adapter(8192 PCI-E) is found - "
- "DeviceID=%x\n", DeviceID);
+ dev_info(&pdev->dev,
+ "Adapter(8192 PCI-E) is found - DeviceID=%x\n",
+ DeviceID);
priv->card_8192 = NIC_8192E;
break;
case HAL_HW_PCI_REVISION_ID_8192SE:
- printk(KERN_INFO "Adapter(8192SE) is found - "
- "DeviceID=%x\n", DeviceID);
+ dev_info(&pdev->dev,
+ "Adapter(8192SE) is found - DeviceID=%x\n",
+ DeviceID);
priv->card_8192 = NIC_8192SE;
break;
default:
- printk(KERN_INFO "UNKNOWN nic type(%4x:%4x)\n",
- pdev->vendor, pdev->device);
+ dev_info(&pdev->dev,
+ "UNKNOWN nic type(%4x:%4x)\n",
+ pdev->vendor, pdev->device);
priv->card_8192 = NIC_UNKNOWN;
return false;
}
}
if (priv->ops->nic_type != priv->card_8192) {
- printk(KERN_INFO "Detect info(%x) and hardware info(%x) not match!\n",
- priv->ops->nic_type, priv->card_8192);
- printk(KERN_INFO "Please select proper driver before install!!!!\n");
+ dev_info(&pdev->dev,
+ "Detect info(%x) and hardware info(%x) not match!\n",
+ priv->ops->nic_type, priv->card_8192);
+ dev_info(&pdev->dev,
+ "Please select proper driver before install!!!!\n");
return false;
}
struct r8192_priv *priv = rtllib_priv(dev);
u32 ulRegRead;
- printk(KERN_INFO "============> r8192E suspend call.\n");
+ netdev_info(dev, "============> r8192E suspend call.\n");
del_timer_sync(&priv->gpio_polling_timer);
cancel_delayed_work(&priv->gpio_change_rf_wq);
priv->polling_timer_on = 0;
if (!netif_running(dev)) {
- printk(KERN_INFO "RTL819XE:UI is open out of suspend "
- "function\n");
+ netdev_info(dev,
+ "RTL819XE:UI is open out of suspend function\n");
goto out_pci_suspend;
}
write_nic_byte(dev, MacBlkCtrl, 0xa);
}
out_pci_suspend:
- printk("r8192E support WOL call??????????????????????\n");
+ netdev_info(dev, "r8192E support WOL call??????????????????????\n");
if (priv->rtllib->bSupportRemoteWakeUp)
- RT_TRACE(COMP_POWER, "r8192E support WOL call!!!!!!!"
- "!!!!!!!!!!!.\n");
+ RT_TRACE(COMP_POWER,
+ "r8192E support WOL call!!!!!!!!!!!!!!!!!!.\n");
pci_save_state(pdev);
pci_disable_device(pdev);
pci_enable_wake(pdev, pci_choose_state(pdev, state),
int err;
u32 val;
- printk(KERN_INFO "================>r8192E resume call.\n");
+ netdev_info(dev, "================>r8192E resume call.\n");
pci_set_power_state(pdev, PCI_D0);
err = pci_enable_device(pdev);
if (err) {
- printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
- dev->name);
+ netdev_err(dev, "pci_enable_device failed on resume\n");
return err;
}
pci_restore_state(pdev);
check_rfctrl_gpio_timer((unsigned long)dev);
if (!netif_running(dev)) {
- printk(KERN_INFO "RTL819XE:UI is open out of resume "
- "function\n");
+ netdev_info(dev,
+ "RTL819XE:UI is open out of resume function\n");
goto out;
}
spin_lock_irqsave(&priv->rf_ps_lock, flags);
if (priv->RFChangeInProgress) {
spin_unlock_irqrestore(&priv->rf_ps_lock, flags);
- RT_TRACE(COMP_DBG, "rtl8192_hw_sleep_down(): RF Change in "
- "progress!\n");
+ RT_TRACE(COMP_DBG,
+ "rtl8192_hw_sleep_down(): RF Change in progress!\n");
return;
}
spin_unlock_irqrestore(&priv->rf_ps_lock, flags);
spin_lock_irqsave(&priv->rf_ps_lock, flags);
if (priv->RFChangeInProgress) {
spin_unlock_irqrestore(&priv->rf_ps_lock, flags);
- RT_TRACE(COMP_DBG, "rtl8192_hw_wakeup(): RF Change in "
- "progress!\n");
+ RT_TRACE(COMP_DBG,
+ "rtl8192_hw_wakeup(): RF Change in progress!\n");
queue_delayed_work_rsl(priv->rtllib->wq,
- &priv->rtllib->hw_wakeup_wq, MSECS(10));
+ &priv->rtllib->hw_wakeup_wq,
+ msecs_to_jiffies(10));
return;
}
spin_unlock_irqrestore(&priv->rf_ps_lock, flags);
spin_lock_irqsave(&priv->ps_lock, flags);
- time -= MSECS(8+16+7);
+ time -= msecs_to_jiffies(8 + 16 + 7);
- if ((time - jiffies) <= MSECS(MIN_SLEEP_TIME)) {
+ if ((time - jiffies) <= msecs_to_jiffies(MIN_SLEEP_TIME)) {
spin_unlock_irqrestore(&priv->ps_lock, flags);
- printk(KERN_INFO "too short to sleep::%lld < %ld\n",
- time - jiffies, MSECS(MIN_SLEEP_TIME));
+ netdev_info(dev, "too short to sleep::%lld < %ld\n",
+ time - jiffies, msecs_to_jiffies(MIN_SLEEP_TIME));
return;
}
- if ((time - jiffies) > MSECS(MAX_SLEEP_TIME)) {
- printk(KERN_INFO "========>too long to sleep:%lld > %ld\n",
- time - jiffies, MSECS(MAX_SLEEP_TIME));
+ if ((time - jiffies) > msecs_to_jiffies(MAX_SLEEP_TIME)) {
+ netdev_info(dev, "========>too long to sleep:%lld > %ld\n",
+ time - jiffies, msecs_to_jiffies(MAX_SLEEP_TIME));
spin_unlock_irqrestore(&priv->ps_lock, flags);
return;
}
__func__);
return;
} else {
- printk(KERN_INFO "=========>%s(): IPSLeave\n",
- __func__);
+ netdev_info(dev, "=========>%s(): IPSLeave\n",
+ __func__);
queue_work_rsl(priv->rtllib->wq,
&priv->rtllib->ips_leave_wq);
}
priv->rtllib->sta_sleep = LPS_IS_WAKE;
spin_lock_irqsave(&(priv->rtllib->mgmt_tx_lock), flags);
- RT_TRACE(COMP_DBG, "LPS leave: notify AP we are awaked"
- " ++++++++++ SendNullFunctionData\n");
+ RT_TRACE(COMP_DBG,
+ "LPS leave: notify AP we are awaked ++++++++++ SendNullFunctionData\n");
rtllib_sta_ps_send_null_frame(priv->rtllib, 0);
spin_unlock_irqrestore(&(priv->rtllib->mgmt_tx_lock), flags);
}
&(priv->rtllib->PowerSaveControl);
RT_TRACE(COMP_PS, "LeisurePSEnter()...\n");
- RT_TRACE(COMP_PS, "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdle"
- "Count is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n",
+ RT_TRACE(COMP_PS,
+ "pPSC->bLeisurePs = %d, ieee->ps = %d,pPSC->LpsIdleCount is %d,RT_CHECK_FOR_HANG_PERIOD is %d\n",
pPSC->bLeisurePs, priv->rtllib->ps, pPSC->LpsIdleCount,
RT_CHECK_FOR_HANG_PERIOD);
if (priv->rtllib->ps == RTLLIB_PS_DISABLED) {
- RT_TRACE(COMP_LPS, "LeisurePSEnter(): Enter "
- "802.11 power save mode...\n");
+ RT_TRACE(COMP_LPS,
+ "LeisurePSEnter(): Enter 802.11 power save mode...\n");
if (!pPSC->bFwCtrlLPS) {
if (priv->rtllib->SetFwCmdHandler)
if (pPSC->bLeisurePs) {
if (priv->rtllib->ps != RTLLIB_PS_DISABLED) {
- RT_TRACE(COMP_LPS, "LeisurePSLeave(): Busy Traffic , "
- "Leave 802.11 power save..\n");
+ RT_TRACE(COMP_LPS,
+ "LeisurePSLeave(): Busy Traffic , Leave 802.11 power save..\n");
MgntActSet_802_11_PowerSaveMode(dev,
RTLLIB_PS_DISABLED);
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true) {
- RT_TRACE(COMP_ERR, "%s():Hw is Radio Off, we can't set "
- "Power,return\n", __func__);
+ if (priv->bHwRadioOff) {
+ RT_TRACE(COMP_ERR,
+ "%s():Hw is Radio Off, we can't set Power,return\n",
+ __func__);
return 0;
}
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
int ret;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
down(&priv->wx_sem);
- printk(KERN_INFO "%s(): set radio ! extra is %d\n", __func__, *extra);
+ netdev_info(dev, "%s(): set radio ! extra is %d\n", __func__, *extra);
if ((*extra != 0) && (*extra != 1)) {
- RT_TRACE(COMP_ERR, "%s(): set radio an err value,must 0(radio "
- "off) or 1(radio on)\n", __func__);
+ RT_TRACE(COMP_ERR,
+ "%s(): set radio an err value,must 0(radio off) or 1(radio on)\n",
+ __func__);
up(&priv->wx_sem);
return -1;
}
down(&priv->wx_sem);
- printk(KERN_INFO "%s(): set lps awake interval ! extra is %d\n",
- __func__, *extra);
+ netdev_info(dev, "%s(): set lps awake interval ! extra is %d\n",
+ __func__, *extra);
pPSC->RegMaxLPSAwakeIntvl = *extra;
up(&priv->wx_sem);
down(&priv->wx_sem);
- printk(KERN_INFO "%s(): force LPS ! extra is %d (1 is open 0 is "
- "close)\n", __func__, *extra);
+ netdev_info(dev,
+ "%s(): force LPS ! extra is %d (1 is open 0 is close)\n",
+ __func__, *extra);
priv->force_lps = *extra;
up(&priv->wx_sem);
return 0;
struct r8192_priv *priv = rtllib_priv(dev);
u8 c = *extra;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
- printk(KERN_INFO "=====>%s(), *extra:%x, debugflag:%x\n", __func__,
- *extra, rt_global_debug_component);
+ netdev_info(dev, "=====>%s(), *extra:%x, debugflag:%x\n", __func__,
+ *extra, rt_global_debug_component);
if (c > 0)
rt_global_debug_component |= (1<<c);
else
enum rt_rf_power_state rtState;
int ret;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
rtState = priv->rtllib->eRFPowerState;
down(&priv->wx_sem);
up(&priv->wx_sem);
return -1;
} else {
- printk(KERN_INFO "=========>%s(): "
- "IPSLeave\n", __func__);
+ netdev_info(dev,
+ "=========>%s(): IPSLeave\n",
+ __func__);
down(&priv->rtllib->ips_sem);
IPSLeave(dev);
up(&priv->rtllib->ips_sem);
return 0;
}
- if (priv->bHwRadioOff == true) {
- printk(KERN_INFO "================>%s(): hwradio off\n",
- __func__);
+ if (priv->bHwRadioOff) {
+ netdev_info(dev, "================>%s(): hwradio off\n",
+ __func__);
return 0;
}
rtState = priv->rtllib->eRFPowerState;
if (rtState == eRfOff) {
if (priv->rtllib->RfOffReason >
RF_CHANGE_BY_IPS) {
- RT_TRACE(COMP_ERR, "%s(): RF is "
- "OFF.\n", __func__);
+ RT_TRACE(COMP_ERR,
+ "%s(): RF is OFF.\n",
+ __func__);
up(&priv->wx_sem);
return -1;
} else {
- RT_TRACE(COMP_PS, "=========>%s(): "
- "IPSLeave\n", __func__);
+ RT_TRACE(COMP_PS,
+ "=========>%s(): IPSLeave\n",
+ __func__);
down(&priv->rtllib->ips_sem);
IPSLeave(dev);
up(&priv->rtllib->ips_sem);
if (!priv->up)
return -ENETDOWN;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
struct r8192_priv *priv = rtllib_priv(dev);
int ret;
- if ((rtllib_act_scanning(priv->rtllib, false)) &&
- !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)) {
- ; /* TODO - get rid of if */
- }
- if (priv->bHwRadioOff == true) {
- printk(KERN_INFO "=========>%s():hw radio off,or Rf state is "
- "eRfOff, return\n", __func__);
+ if (priv->bHwRadioOff) {
+ netdev_info(dev,
+ "=========>%s():hw radio off,or Rf state is eRfOff, return\n",
+ __func__);
return 0;
}
down(&priv->wx_sem);
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
{
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
if (wrqu->frag.disabled)
int ret;
struct r8192_priv *priv = rtllib_priv(dev);
- if ((rtllib_act_scanning(priv->rtllib, false)) &&
- !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN)) {
- ; /* TODO - get rid of if */
- }
-
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
{0x00, 0x00, 0x00, 0x00, 0x00, 0x03} };
int i;
- if ((rtllib_act_scanning(priv->rtllib, false)) &&
- !(priv->rtllib->softmac_features & IEEE_SOFTMAC_SCAN))
- ; /* TODO - get rid of if */
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
if (!priv->up)
set_swcam(dev, key_idx, key_idx, KEY_TYPE_WEP104,
zero_addr[key_idx], 0, hwkey, 0);
} else {
- printk(KERN_INFO "wrong type in WEP, not WEP40 and WEP104\n");
+ netdev_info(dev,
+ "wrong type in WEP, not WEP40 and WEP104\n");
}
}
int *parms = (int *)p;
int mode = parms[0];
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
priv->rtllib->active_scan = mode;
struct r8192_priv *priv = rtllib_priv(dev);
int err = 0;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
short err = 0;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
struct rtllib_device *ieee = priv->rtllib;
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
struct r8192_priv *priv = rtllib_priv(dev);
- if (priv->bHwRadioOff == true)
+ if (priv->bHwRadioOff)
return 0;
down(&priv->wx_sem);
(rtllib_EnableIntelPromiscuousMode(dev, false)) :
(rtllib_DisableIntelPromiscuousMode(dev, false));
- printk(KERN_INFO "=======>%s(), on = %d, filter src sta = %d\n",
- __func__, bPromiscuousOn, bFilterSourceStationFrame);
+ netdev_info(dev,
+ "=======>%s(), on = %d, filter src sta = %d\n",
+ __func__, bPromiscuousOn,
+ bFilterSourceStationFrame);
} else {
return -1;
}
{
pBA->bValid = true;
if (Time != 0)
- mod_timer(&pBA->Timer, jiffies + MSECS(Time));
+ mod_timer(&pBA->Timer, jiffies + msecs_to_jiffies(Time));
}
static void DeActivateBAEntry(struct rtllib_device *ieee, struct ba_record *pBA)
u8 *tag = NULL;
u16 len = ieee->tx_headroom + 9;
- RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA, "========>%s(), frame(%d)"
- " sentd to: %pM, ieee->dev:%p\n", __func__,
- type, Dst, ieee->dev);
+ RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA,
+ "========>%s(), frame(%d) sentd to: %pM, ieee->dev:%p\n",
+ __func__, type, Dst, ieee->dev);
if (pBA == NULL) {
RTLLIB_DEBUG(RTLLIB_DL_ERR, "pBA is NULL\n");
return NULL;
if (net_ratelimit())
RTLLIB_DEBUG(RTLLIB_DL_TRACE | RTLLIB_DL_BA,
- "========>%s(), Reason"
- "Code(%d) sentd to: %pM\n", __func__,
- ReasonCode, dst);
+ "========>%s(), ReasonCode(%d) sentd to: %pM\n",
+ __func__, ReasonCode, dst);
memset(&DelbaParamSet, 0, 2);
RT_TRACE(COMP_DBG, "====>to send ADDBAREQ!!!!!\n");
softmac_mgmt_xmit(skb, ieee);
} else {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function"
- " %s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "alloc skb error in function %s()\n", __func__);
}
}
if (skb)
softmac_mgmt_xmit(skb, ieee);
else
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function"
- " %s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "alloc skb error in function %s()\n", __func__);
}
static void rtllib_send_DELBA(struct rtllib_device *ieee, u8 *dst,
if (skb)
softmac_mgmt_xmit(skb, ieee);
else
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "alloc skb error in function"
- " %s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "alloc skb error in function %s()\n", __func__);
}
int rtllib_rx_ADDBAReq(struct rtllib_device *ieee, struct sk_buff *skb)
struct rx_ts_record *pTS = NULL;
if (skb->len < sizeof(struct rtllib_hdr_3addr) + 9) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in BAREQ(%d / "
- "%d)\n", (int)skb->len,
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ " Invalid skb len in BAREQ(%d / %d)\n",
+ (int)skb->len,
(int)(sizeof(struct rtllib_hdr_3addr) + 9));
return -1;
}
(ieee->pHTInfo->bCurrentHTSupport == false) ||
(ieee->pHTInfo->IOTAction & HT_IOT_ACT_REJECT_ADDBA_REQ)) {
rc = ADDBA_STATUS_REFUSED;
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "Failed to reply on ADDBA_REQ as "
- "some capability is not ready(%d, %d)\n",
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "Failed to reply on ADDBA_REQ as some capability is not ready(%d, %d)\n",
ieee->current_network.qos_data.active,
ieee->pHTInfo->bCurrentHTSupport);
goto OnADDBAReq_Fail;
if (pBaParamSet->field.BAPolicy == BA_POLICY_DELAYED) {
rc = ADDBA_STATUS_INVALID_PARAM;
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "BA Policy is not correct in "
- "%s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "BA Policy is not correct in %s()\n", __func__);
goto OnADDBAReq_Fail;
}
u16 ReasonCode;
if (skb->len < sizeof(struct rtllib_hdr_3addr) + 9) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in BARSP(%d / "
- "%d)\n", (int)skb->len,
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "Invalid skb len in BARSP(%d / %d)\n",
+ (int)skb->len,
(int)(sizeof(struct rtllib_hdr_3addr) + 9));
return -1;
}
if (ieee->current_network.qos_data.active == 0 ||
ieee->pHTInfo->bCurrentHTSupport == false ||
ieee->pHTInfo->bCurrentAMPDUEnable == false) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "reject to ADDBA_RSP as some capab"
- "ility is not ready(%d, %d, %d)\n",
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "reject to ADDBA_RSP as some capability is not ready(%d, %d, %d)\n",
ieee->current_network.qos_data.active,
ieee->pHTInfo->bCurrentHTSupport,
ieee->pHTInfo->bCurrentAMPDUEnable);
if (pAdmittedBA->bValid == true) {
- RTLLIB_DEBUG(RTLLIB_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp."
- " Drop because already admit it!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "OnADDBARsp(): Recv ADDBA Rsp. Drop because already admit it!\n");
return -1;
} else if ((pPendingBA->bValid == false) ||
(*pDialogToken != pPendingBA->DialogToken)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "OnADDBARsp(): Recv ADDBA Rsp. "
- "BA invalid, DELBA!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "OnADDBARsp(): Recv ADDBA Rsp. BA invalid, DELBA!\n");
ReasonCode = DELBA_REASON_UNKNOWN_BA;
goto OnADDBARsp_Reject;
} else {
- RTLLIB_DEBUG(RTLLIB_DL_BA, "OnADDBARsp(): Recv ADDBA Rsp. BA "
- "is admitted! Status code:%X\n", *pStatusCode);
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "OnADDBARsp(): Recv ADDBA Rsp. BA is admitted! Status code:%X\n",
+ *pStatusCode);
DeActivateBAEntry(ieee, pPendingBA);
}
u8 *dst = NULL;
if (skb->len < sizeof(struct rtllib_hdr_3addr) + 6) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, " Invalid skb len in DELBA(%d /"
- " %d)\n", (int)skb->len,
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "Invalid skb len in DELBA(%d / %d)\n",
+ (int)skb->len,
(int)(sizeof(struct rtllib_hdr_3addr) + 6));
return -1;
}
if (ieee->current_network.qos_data.active == 0 ||
ieee->pHTInfo->bCurrentHTSupport == false) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "received DELBA while QOS or HT "
- "is not supported(%d, %d)\n",
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "received DELBA while QOS or HT is not supported(%d, %d)\n",
ieee->current_network. qos_data.active,
ieee->pHTInfo->bCurrentHTSupport);
return -1;
if (!GetTs(ieee, (struct ts_common_info **)&pRxTs, dst,
(u8)pDelBaParamSet->field.TID, RX_DIR, false)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS for RXTS in "
- "%s().dst: %pM TID:%d\n", __func__, dst,
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "can't get TS for RXTS in %s().dst: %pM TID:%d\n",
+ __func__, dst,
(u8)pDelBaParamSet->field.TID);
return -1;
}
if (!GetTs(ieee, (struct ts_common_info **)&pTxTs, dst,
(u8)pDelBaParamSet->field.TID, TX_DIR, false)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't get TS for TXTS in "
- "%s()\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "can't get TS for TXTS in %s()\n",
+ __func__);
return -1;
}
CHNLOP_SWCHNL = 3,
};
-#define CHHLOP_IN_PROGRESS(_pHTInfo) \
- ((_pHTInfo)->ChnlOp > CHNLOP_NONE) ? true : false
-
-/*
-union ht_capability {
- u16 ShortData;
- u8 CharData[2];
- struct
- {
- u16 AdvCoding:1;
- u16 ChlWidth:1;
- u16 MimoPwrSave:2;
- u16 GreenField:1;
- u16 ShortGI20Mhz:1;
- u16 ShortGI40Mhz:1;
- u16 STBC:1;
- u16 BeamForm:1;
- u16 DelayBA:1;
- u16 MaxAMSDUSize:1;
- u16 DssCCk:1;
- u16 PSMP:1;
- u16 Rsvd:3;
- }Field;
-};
-
-union ht_capability_macpara {
- u8 ShortData;
- u8 CharData[1];
- struct
- {
- u8 MaxRxAMPDU:2;
- u8 MPDUDensity:2;
- u8 Rsvd:4;
- }Field;
-};
-*/
-
enum ht_action {
ACT_RECOMMAND_WIDTH = 0,
ACT_MIMO_PWR_SAVE = 1,
extern u8 MCS_FILTER_ALL[16];
extern u8 MCS_FILTER_1SS[16];
-#define PICK_RATE(_nLegacyRate, _nMcsRate) \
- ((_nMcsRate == 0) ? (_nLegacyRate&0x7f) : (_nMcsRate))
-#define LEGACY_WIRELESS_MODE IEEE_MODE_MASK
-
-#define CURRENT_RATE(WirelessMode, LegacyRate, HTRate) \
- ((WirelessMode & (LEGACY_WIRELESS_MODE)) != 0) ? \
- (LegacyRate) : (PICK_RATE(LegacyRate, HTRate))
-
-
-
#define RATE_ADPT_1SS_MASK 0xFF
#define RATE_ADPT_2SS_MASK 0xF0
#define RATE_ADPT_MCS32_MASK 0x01
pHTInfo->RxReorderPendingTime = 30;
}
-void HTDebugHTCapability(u8 *CapIE, u8 *TitleString)
-{
-
- static u8 EWC11NHTCap[] = {0x00, 0x90, 0x4c, 0x33};
- struct ht_capab_ele *pCapELE;
-
- if (!memcmp(CapIE, EWC11NHTCap, sizeof(EWC11NHTCap))) {
- RTLLIB_DEBUG(RTLLIB_DL_HT, "EWC IE in %s()\n", __func__);
- pCapELE = (struct ht_capab_ele *)(&CapIE[4]);
- } else
- pCapELE = (struct ht_capab_ele *)(&CapIE[0]);
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "<Log HT Capability>. Called by %s\n",
- TitleString);
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupported Channel Width = %s\n",
- (pCapELE->ChlWidth) ? "20MHz" : "20/40MHz");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport Short GI for 20M = %s\n",
- (pCapELE->ShortGI20Mhz) ? "YES" : "NO");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport Short GI for 40M = %s\n",
- (pCapELE->ShortGI40Mhz) ? "YES" : "NO");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport TX STBC = %s\n",
- (pCapELE->TxSTBC) ? "YES" : "NO");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMax AMSDU Size = %s\n",
- (pCapELE->MaxAMSDUSize) ? "3839" : "7935");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSupport CCK in 20/40 mode = %s\n",
- (pCapELE->DssCCk) ? "YES" : "NO");
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMax AMPDU Factor = %d\n",
- pCapELE->MaxRxAMPDUFactor);
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMPDU Density = %d\n",
- pCapELE->MPDUDensity);
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tMCS Rate Set = [%x][%x][%x][%x][%x]\n",
- pCapELE->MCS[0], pCapELE->MCS[1], pCapELE->MCS[2],
- pCapELE->MCS[3], pCapELE->MCS[4]);
- return;
-
-}
-
-void HTDebugHTInfo(u8 *InfoIE, u8 *TitleString)
-{
-
- static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34};
- struct ht_info_ele *pHTInfoEle;
-
- if (!memcmp(InfoIE, EWC11NHTInfo, sizeof(EWC11NHTInfo))) {
- RTLLIB_DEBUG(RTLLIB_DL_HT, "EWC IE in %s()\n", __func__);
- pHTInfoEle = (struct ht_info_ele *)(&InfoIE[4]);
- } else
- pHTInfoEle = (struct ht_info_ele *)(&InfoIE[0]);
-
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "<Log HT Information Element>. "
- "Called by %s\n", TitleString);
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tPrimary channel = %d\n",
- pHTInfoEle->ControlChl);
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tSenondary channel =");
- switch (pHTInfoEle->ExtChlOffset) {
- case 0:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Not Present\n");
- break;
- case 1:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Upper channel\n");
- break;
- case 2:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Reserved. Eooro!!!\n");
- break;
- case 3:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Lower Channel\n");
- break;
- }
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tRecommended channel width = %s\n",
- (pHTInfoEle->RecommemdedTxWidth) ? "20Mhz" : "40Mhz");
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tOperation mode for protection = ");
- switch (pHTInfoEle->OptMode) {
- case 0:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "No Protection\n");
- break;
- case 1:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "HT non-member protection mode\n");
- break;
- case 2:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "Suggest to open protection\n");
- break;
- case 3:
- RTLLIB_DEBUG(RTLLIB_DL_HT, "HT mixed mode\n");
- break;
- }
-
- RTLLIB_DEBUG(RTLLIB_DL_HT, "\tBasic MCS Rate Set = [%x][%x][%x][%x]"
- "[%x]\n", pHTInfoEle->BasicMSC[0], pHTInfoEle->BasicMSC[1],
- pHTInfoEle->BasicMSC[2], pHTInfoEle->BasicMSC[3],
- pHTInfoEle->BasicMSC[4]);
-}
-
-static bool IsHTHalfNmode40Bandwidth(struct rtllib_device *ieee)
-{
- bool retValue = false;
- struct rt_hi_throughput *pHTInfo = ieee->pHTInfo;
-
- if (pHTInfo->bCurrentHTSupport == false)
- retValue = false;
- else if (pHTInfo->bRegBW40MHz == false)
- retValue = false;
- else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
- retValue = false;
- else if (((struct ht_capab_ele *)(pHTInfo->PeerHTCapBuf))->ChlWidth)
- retValue = true;
- else
- retValue = false;
-
- return retValue;
-}
-
-static bool IsHTHalfNmodeSGI(struct rtllib_device *ieee, bool is40MHz)
-{
- bool retValue = false;
- struct rt_hi_throughput *pHTInfo = ieee->pHTInfo;
-
- if (pHTInfo->bCurrentHTSupport == false)
- retValue = false;
- else if (!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
- retValue = false;
- else if (is40MHz) {
- if (((struct ht_capab_ele *)
- (pHTInfo->PeerHTCapBuf))->ShortGI40Mhz)
- retValue = true;
- else
- retValue = false;
- } else {
- if (((struct ht_capab_ele *)
- (pHTInfo->PeerHTCapBuf))->ShortGI20Mhz)
- retValue = true;
- else
- retValue = false;
- }
-
- return retValue;
-}
-
-u16 HTHalfMcsToDataRate(struct rtllib_device *ieee, u8 nMcsRate)
-{
-
- u8 is40MHz;
- u8 isShortGI;
-
- is40MHz = (IsHTHalfNmode40Bandwidth(ieee)) ? 1 : 0;
- isShortGI = (IsHTHalfNmodeSGI(ieee, is40MHz)) ? 1 : 0;
-
- return MCS_DATA_RATE[is40MHz][isShortGI][(nMcsRate & 0x7f)];
-}
-
-
u16 HTMcsToDataRate(struct rtllib_device *ieee, u8 nMcsRate)
{
struct rt_hi_throughput *pHTInfo = ieee->pHTInfo;
static bool HTIOTActIsDisableMCS15(struct rtllib_device *ieee)
{
- bool retValue = false;
-
- return retValue;
+ return false;
}
static bool HTIOTActIsDisableMCSTwoSpatialStream(struct rtllib_device *ieee)
struct ht_capab_ele *pCapELE = NULL;
if ((posHTCap == NULL) || (pHT == NULL)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "posHTCap or pHTInfo can't be "
- "null in HTConstructCapabilityElement()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "posHTCap or pHTInfo can't be null in HTConstructCapabilityElement()\n");
return;
}
memset(posHTCap, 0, *len);
pCapELE->LSigTxopProtect = 0;
- RTLLIB_DEBUG(RTLLIB_DL_HT, "TX HT cap/info ele BW=%d MaxAMSDUSize:%d "
- "DssCCk:%d\n", pCapELE->ChlWidth, pCapELE->MaxAMSDUSize,
- pCapELE->DssCCk);
+ RTLLIB_DEBUG(RTLLIB_DL_HT,
+ "TX HT cap/info ele BW=%d MaxAMSDUSize:%d DssCCk:%d\n",
+ pCapELE->ChlWidth, pCapELE->MaxAMSDUSize, pCapELE->DssCCk);
if (IsEncrypt) {
pCapELE->MPDUDensity = 7;
struct ht_info_ele *pHTInfoEle = (struct ht_info_ele *)posHTInfo;
if ((posHTInfo == NULL) || (pHTInfoEle == NULL)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "posHTInfo or pHTInfoEle can't be "
- "null in HTConstructInfoElement()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "posHTInfo or pHTInfoEle can't be null in HTConstructInfoElement()\n");
return;
}
u8 *len)
{
if (posRT2RTAgg == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "posRT2RTAgg can't be null in "
- "HTConstructRT2RTAggElement()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "posRT2RTAgg can't be null in HTConstructRT2RTAggElement()\n");
return;
}
memset(posRT2RTAgg, 0, *len);
u8 i;
if (pOperateMCS == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "pOperateMCS can't be null"
- " in HT_PickMCSRate()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "pOperateMCS can't be null in HT_PickMCSRate()\n");
return false;
}
u8 availableMcsRate[16];
if (pMCSRateSet == NULL || pMCSFilter == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "pMCSRateSet or pMCSFilter can't "
- "be null in HTGetHighestMCSRate()\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "pMCSRateSet or pMCSFilter can't be null in HTGetHighestMCSRate()\n");
return false;
}
for (i = 0; i < 16; i++)
HTMcsToDataRate(ieee, mcsRate))
mcsRate = (8*i+j);
}
- bitMap = bitMap>>1;
+ bitMap >>= 1;
}
}
}
static u8 EWC11NHTInfo[] = {0x00, 0x90, 0x4c, 0x34};
if (pHTInfo->bCurrentHTSupport == false) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "<=== HTOnAssocRsp(): "
- "HT_DISABLE\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "<=== HTOnAssocRsp(): HT_DISABLE\n");
return;
}
RTLLIB_DEBUG(RTLLIB_DL_HT, "===> HTOnAssocRsp_wq(): HT_ENABLE\n");
{
if (ieee->pHTInfo->bCurrentHTSupport) {
if ((IsQoSDataFrame(pFrame) && Frame_Order(pFrame)) == 1) {
- RTLLIB_DEBUG(RTLLIB_DL_HT, "HT CONTROL FILED "
- "EXIST!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_HT,
+ "HT CONTROL FILED EXIST!!\n");
return true;
}
}
#ifndef __INC_QOS_TYPE_H
#define __INC_QOS_TYPE_H
-#include "rtllib_endianfree.h"
-
#define BIT0 0x00000001
#define BIT1 0x00000002
#define BIT2 0x00000004
};
#define QBSS_LOAD_SIZE 5
-#define GET_QBSS_LOAD_STA_COUNT(__pStart) \
- ReadEF2Byte(__pStart)
-#define SET_QBSS_LOAD_STA_COUNT(__pStart, __Value) \
- WriteEF2Byte(__pStart, __Value)
-#define GET_QBSS_LOAD_CHNL_UTILIZATION(__pStart) \
- ReadEF1Byte((u8 *)(__pStart) + 2)
-#define SET_QBSS_LOAD_CHNL_UTILIZATION(__pStart, __Value) \
- WriteEF1Byte((u8 *)(__pStart) + 2, __Value)
-#define GET_QBSS_LOAD_AVAILABLE_CAPACITY(__pStart) \
- ReadEF2Byte((u8 *)(__pStart) + 3)
-#define SET_QBSS_LOAD_AVAILABLE_CAPACITY(__pStart, __Value) \
- WriteEF2Byte((u8 *)(__pStart) + 3, __Value)
struct bss_qos {
QOS_MODE bdQoSMode;
bool bQBssLoadValid;
};
-#define sQoSCtlLng 2
-#define QOS_CTRL_LEN(_QosMode) ((_QosMode > QOS_DISABLE) ? sQoSCtlLng : 0)
-
-
#define IsACValid(ac) ((ac >= 0 && ac <= 7) ? true : false)
pRxTs->RxIndicateSeq =
(pRxTs->RxIndicateSeq + 1) % 4096;
- RTLLIB_DEBUG(RTLLIB_DL_REORDER, "%s(): Indicate"
- " SeqNum: %d\n", __func__,
- pReorderEntry->SeqNum);
+ RTLLIB_DEBUG(RTLLIB_DL_REORDER,
+ "%s(): Indicate SeqNum: %d\n",
+ __func__, pReorderEntry->SeqNum);
ieee->stats_IndicateArray[index] =
pReorderEntry->prxb;
index++;
pRxTs->RxTimeoutIndicateSeq = 0xffff;
if (index > REORDER_WIN_SIZE) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "RxReorderIndicatePacket():"
- " Rx Reorder struct buffer full!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "RxReorderIndicatePacket(): Rx Reorder struct buffer full!!\n");
spin_unlock_irqrestore(&(ieee->reorder_spinlock),
flags);
return;
if (bPktInBuf && (pRxTs->RxTimeoutIndicateSeq == 0xffff)) {
pRxTs->RxTimeoutIndicateSeq = pRxTs->RxIndicateSeq;
mod_timer(&pRxTs->RxPktPendingTimer, jiffies +
- MSECS(ieee->pHTInfo->RxReorderPendingTime));
+ msecs_to_jiffies(ieee->pHTInfo->RxReorderPendingTime));
}
spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
}
TxTsRecord[num]);
TsInitAddBA(ieee, pTxTs, BA_POLICY_IMMEDIATE, false);
- RTLLIB_DEBUG(RTLLIB_DL_BA, "TsAddBaProcess(): ADDBA Req is "
- "started!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "TsAddBaProcess(): ADDBA Req is started!!\n");
}
static void ResetTsCommonInfo(struct ts_common_info *pTsCommonInfo)
if (InactTime != 0)
mod_timer(&pTsCommonInfo->InactTimer, jiffies +
- MSECS(InactTime));
+ msecs_to_jiffies(InactTime));
}
static struct ts_common_info *SearchAdmitTRStream(struct rtllib_device *ieee,
u8 UP = 0;
if (is_multicast_ether_addr(Addr)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR! get TS for Broadcast or "
- "Multicast\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "ERR! get TS for Broadcast or Multicast\n");
return false;
}
if (ieee->current_network.qos_data.supported == 0) {
UP = 0;
} else {
if (!IsACValid(TID)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR! in %s(), TID(%d) is "
- "not valid\n", __func__, TID);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "ERR! in %s(), TID(%d) is not valid\n",
+ __func__, TID);
return false;
}
return true;
} else {
if (!bAddNewTs) {
- RTLLIB_DEBUG(RTLLIB_DL_TS, "add new TS failed"
- "(tid:%d)\n", UP);
+ RTLLIB_DEBUG(RTLLIB_DL_TS,
+ "add new TS failed(tid:%d)\n", UP);
return false;
} else {
union tspec_body TSpec;
ResetRxTsEntry(tmp);
}
- RTLLIB_DEBUG(RTLLIB_DL_TS, "to init current TS"
- ", UP:%d, Dir:%d, addr: %pM"
- " ppTs=%p\n", UP, Dir,
- Addr, *ppTS);
+ RTLLIB_DEBUG(RTLLIB_DL_TS,
+ "to init current TS, UP:%d, Dir:%d, addr: %pM ppTs=%p\n",
+ UP, Dir, Addr, *ppTS);
pTSInfo->field.ucTrafficType = 0;
pTSInfo->field.ucTSID = UP;
pTSInfo->field.ucDirection = Dir;
return true;
} else {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "ERR!!in function "
- "%s() There is not enough dir=%d"
- "(0=up down=1) TS record to be "
- "used!!", __func__, Dir);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "ERR!!in function %s() There is not enough dir=%d(0=up down=1) TS record to be used!!",
+ __func__, Dir);
return false;
}
}
pRxReorderEntry = (struct rx_reorder_entry *)
list_entry(pRxTS->RxPendingPktList.prev,
struct rx_reorder_entry, List);
- RTLLIB_DEBUG(RTLLIB_DL_REORDER, "%s(): Delete SeqNum "
- "%d!\n", __func__,
+ RTLLIB_DEBUG(RTLLIB_DL_REORDER,
+ "%s(): Delete SeqNum %d!\n", __func__,
pRxReorderEntry->SeqNum);
list_del_init(&pRxReorderEntry->List);
{
{
struct ts_common_info *pTS, *pTmpTS;
- printk(KERN_INFO "===========>RemovePeerTS, %pM\n", Addr);
+ netdev_info(ieee->dev, "===========>RemovePeerTS, %pM\n", Addr);
list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Pending_List, List) {
if (memcmp(pTS->Addr, Addr, 6) == 0) {
list_for_each_entry_safe(pTS, pTmpTS, &ieee->Tx_TS_Admit_List, List) {
if (memcmp(pTS->Addr, Addr, 6) == 0) {
- printk(KERN_INFO "====>remove Tx_TS_admin_list\n");
+ netdev_info(ieee->dev,
+ "====>remove Tx_TS_admin_list\n");
RemoveTsEntry(ieee, pTS, TX_DIR);
list_del_init(&pTS->List);
list_add_tail(&pTS->List, &ieee->Tx_TS_Unused_List);
pTxTS->bAddBaReqInProgress = true;
if (pTxTS->bAddBaReqDelayed) {
- RTLLIB_DEBUG(RTLLIB_DL_BA, "TsStartAddBaProcess(): "
- "Delayed Start ADDBA after 60 sec!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "TsStartAddBaProcess(): Delayed Start ADDBA after 60 sec!!\n");
mod_timer(&pTxTS->TsAddBaTimer, jiffies +
- MSECS(TS_ADDBA_DELAY));
+ msecs_to_jiffies(TS_ADDBA_DELAY));
} else {
- RTLLIB_DEBUG(RTLLIB_DL_BA, "TsStartAddBaProcess(): "
- "Immediately Start ADDBA now!!\n");
+ RTLLIB_DEBUG(RTLLIB_DL_BA,
+ "TsStartAddBaProcess(): Immediately Start ADDBA now!!\n");
mod_timer(&pTxTS->TsAddBaTimer, jiffies+10);
}
} else
#define IW_CUSTOM_MAX 256 /* In bytes */
#endif
-#ifndef container_of
-/**
- * container_of - cast a member of a structure out to the containing structure
- *
- * @ptr: the pointer to the member.
- * @type: the type of the container struct this is embedded in.
- * @member: the name of the member within the struct.
- *
- */
-#define container_of(ptr, type, member) ({ \
- const typeof(((type *)0)->member)*__mptr = (ptr); \
- (type *)((char *)__mptr - offsetof(type, member)); })
-#endif
-
#define skb_tail_pointer_rsl(skb) skb_tail_pointer(skb)
#define EXPORT_SYMBOL_RSL(x) EXPORT_SYMBOL(x)
#define IEEE_CRYPT_ALG_NAME_LEN 16
#define MAX_IE_LEN 0xff
-#define RT_ASSERT_RET(_Exp) do {} while (0)
-#define RT_ASSERT_RET_VALUE(_Exp, Ret) \
- do {} while (0)
struct ieee_param {
u32 cmd;
#define IW_QUAL_NOISE_UPDATED 0x4
#endif
-#define MSECS(t) msecs_to_jiffies(t)
#define msleep_interruptible_rsl msleep_interruptible
#define RTLLIB_DATA_LEN 2304
#define RTLLIB_DL_TRACE (1<<29)
#define RTLLIB_DL_DATA (1<<30)
#define RTLLIB_DL_ERR (1<<31)
-#define RTLLIB_ERROR(f, a...) printk(KERN_ERR "rtllib: " f, ## a)
-#define RTLLIB_WARNING(f, a...) printk(KERN_WARNING "rtllib: " f, ## a)
+#define RTLLIB_ERROR(f, a...) pr_err("rtllib: " f, ## a)
+#define RTLLIB_WARNING(f, a...) pr_warn("rtllib: " f, ## a)
#define RTLLIB_DEBUG_INFO(f, a...) RTLLIB_DEBUG(RTLLIB_DL_INFO, f, ## a)
#define RTLLIB_DEBUG_WX(f, a...) RTLLIB_DEBUG(RTLLIB_DL_WX, f, ## a)
#define RTLLIB_DEBUG_RX(f, a...) RTLLIB_DEBUG(RTLLIB_DL_RX, f, ## a)
#define RTLLIB_DEBUG_QOS(f, a...) RTLLIB_DEBUG(RTLLIB_DL_QOS, f, ## a)
-/* Added by Annie, 2005-11-22. */
-#define MAX_STR_LEN 64
-/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. */
-#define PRINTABLE(_ch) (_ch > '!' && _ch < '~')
-#define RTLLIB_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \
- if ((_Comp) & level) { \
- int __i; \
- u8 struct buffer[MAX_STR_LEN]; \
- int length = (_Len < MAX_STR_LEN) ? _Len : (MAX_STR_LEN-1) ;\
- memset(struct buffer, 0, MAX_STR_LEN); \
- memcpy(struct buffer, (u8 *)_Ptr, length); \
- for (__i = 0; __i < MAX_STR_LEN; __i++) { \
- if (!PRINTABLE(struct buffer[__i])) \
- struct buffer[__i] = '?'; \
- } \
- struct buffer[length] = '\0'; \
- printk(KERN_INFO "Rtl819x: "); \
- printk(_TitleString); \
- printk(": %d, <%s>\n", _Len, struct buffer); \
- }
#ifndef ETH_P_PAE
#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */
#define ETH_P_IP 0x0800 /* Internet Protocol packet */
struct list_head list;
};
-#if 1
enum rtllib_state {
/* the card is not linked at all */
*/
RTLLIB_LINKED_SCANNING,
};
-#else
-enum rtllib_state {
- RTLLIB_UNINITIALIZED = 0,
- RTLLIB_INITIALIZED,
- RTLLIB_ASSOCIATING,
- RTLLIB_ASSOCIATED,
- RTLLIB_AUTHENTICATING,
- RTLLIB_AUTHENTICATED,
- RTLLIB_SHUTDOWN
-};
-#endif
#define DEFAULT_MAX_SCAN_AGE (15 * HZ)
#define DEFAULT_FTS 2346
#define RTLLIB_52GHZ_MAX_CHANNEL 165
#define RTLLIB_52GHZ_CHANNELS (RTLLIB_52GHZ_MAX_CHANNEL - \
RTLLIB_52GHZ_MIN_CHANNEL + 1)
-#ifndef eqMacAddr
-#define eqMacAddr(a, b) \
- (((a)[0] == (b)[0] && (a)[1] == (b)[1] && (a)[2] == (b)[2] && \
- (a)[3] == (b)[3] && (a)[4] == (b)[4] && (a)[5] == (b)[5]) ? 1 : 0)
-#endif
struct tx_pending {
int frag;
struct rtllib_txb *txb;
short raw_tx;
/* used if IEEE_SOFTMAC_TX_QUEUE is set */
short queue_stop;
- short scanning_continue ;
+ short scanning_continue;
short proto_started;
short proto_stoppping;
struct iw_request_info *info,
union iwreq_data *wrqu, char *extra);
#define MAX_RECEIVE_BUFFER_SIZE 9100
-extern void HTDebugHTCapability(u8 *CapIE, u8 *TitleString);
-extern void HTDebugHTInfo(u8 *InfoIE, u8 *TitleString);
void HTSetConnectBwMode(struct rtllib_device *ieee,
enum ht_channel_width Bandwidth,
extern u8 HTGetHighestMCSRate(struct rtllib_device *ieee, u8 *pMCSRateSet,
u8 *pMCSFilter);
extern u8 MCS_FILTER_ALL[];
-extern u16 MCS_DATA_RATE[2][2][77] ;
+extern u16 MCS_DATA_RATE[2][2][77];
extern u8 HTCCheck(struct rtllib_device *ieee, u8 *pFrame);
extern void HTResetIOTSetting(struct rt_hi_throughput *pHTInfo);
extern bool IsHTHalfNmodeAPs(struct rtllib_device *ieee);
-extern u16 HTHalfMcsToDataRate(struct rtllib_device *ieee, u8 nMcsRate);
extern u16 HTMcsToDataRate(struct rtllib_device *ieee, u8 nMcsRate);
extern u16 TxCountToDataRate(struct rtllib_device *ieee, u8 nDataRate);
extern int rtllib_rx_ADDBAReq(struct rtllib_device *ieee, struct sk_buff *skb);
spin_lock_irqsave(info->lock, flags);
rtllib_crypt_deinit_entries(info, 0);
if (!list_empty(&info->crypt_deinit_list)) {
- printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
- "deletion list\n", info->name);
+ printk(KERN_DEBUG
+ "%s: entries remaining in delayed crypt deletion list\n",
+ info->name);
info->crypt_deinit_timer.expires = jiffies + HZ;
add_timer(&info->crypt_deinit_timer);
}
spin_unlock_irqrestore(&hcrypt->lock, flags);
if (del_alg) {
- printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm "
- "'%s'\n", ops->name);
+ printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm '%s'\n",
+ ops->name);
kfree(del_alg);
}
struct rtllib_crypto_alg *alg =
(struct rtllib_crypto_alg *) ptr;
list_del(ptr);
- printk(KERN_DEBUG "rtllib_crypt: unregistered algorithm "
- "'%s' (deinit)\n", alg->ops->name);
+ printk(KERN_DEBUG
+ "rtllib_crypt: unregistered algorithm '%s' (deinit)\n",
+ alg->ops->name);
kfree(alg);
}
priv->tfm = (void *)crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tfm)) {
- pr_debug("rtllib_crypt_ccmp: could not allocate "
- "crypto API aes\n");
+ pr_debug("rtllib_crypt_ccmp: could not allocate crypto API aes\n");
priv->tfm = NULL;
goto fail;
}
keyidx = pos[3];
if (!(keyidx & (1 << 5))) {
if (net_ratelimit()) {
- pr_debug("CCMP: received packet without ExtIV"
- " flag from %pM\n", hdr->addr2);
+ pr_debug("CCMP: received packet without ExtIV flag from %pM\n",
+ hdr->addr2);
}
key->dot11RSNAStatsCCMPFormatErrors++;
return -2;
}
keyidx >>= 6;
if (key->key_idx != keyidx) {
- pr_debug("CCMP: RX tkey->key_idx=%d frame "
- "keyidx=%d priv=%p\n", key->key_idx, keyidx, priv);
+ pr_debug("CCMP: RX tkey->key_idx=%d frame keyidx=%d priv=%p\n",
+ key->key_idx, keyidx, priv);
return -6;
}
if (!key->key_set) {
if (net_ratelimit()) {
- pr_debug("CCMP: received packet from %pM"
- " with keyid=%d that does not have a configured"
- " key\n", hdr->addr2, keyidx);
+ pr_debug("CCMP: received packet from %pM with keyid=%d that does not have a configured key\n",
+ hdr->addr2, keyidx);
}
return -3;
}
if (memcmp(mic, a, CCMP_MIC_LEN) != 0) {
if (net_ratelimit()) {
- pr_debug("CCMP: decrypt failed: STA="
- " %pM\n", hdr->addr2);
+ pr_debug("CCMP: decrypt failed: STA= %pM\n",
+ hdr->addr2);
}
key->dot11RSNAStatsCCMPDecryptErrors++;
return -5;
struct rtllib_ccmp_data *ccmp = priv;
seq_printf(m,
- "key[%d] alg=CCMP key_set=%d "
- "tx_pn=%pM rx_pn=%pM "
- "format_errors=%d replays=%d decrypt_errors=%d\n",
+ "key[%d] alg=CCMP key_set=%d tx_pn=%pM rx_pn=%pM format_errors=%d replays=%d decrypt_errors=%d\n",
ccmp->key_idx, ccmp->key_set,
ccmp->tx_pn, ccmp->rx_pn,
ccmp->dot11RSNAStatsCCMPFormatErrors,
priv->tx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tx_tfm_arc4)) {
- printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
- "crypto API arc4\n");
+ printk(KERN_DEBUG
+ "rtllib_crypt_tkip: could not allocate crypto API arc4\n");
priv->tx_tfm_arc4 = NULL;
goto fail;
}
priv->tx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tx_tfm_michael)) {
- printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
- "crypto API michael_mic\n");
+ printk(KERN_DEBUG
+ "rtllib_crypt_tkip: could not allocate crypto API michael_mic\n");
priv->tx_tfm_michael = NULL;
goto fail;
}
priv->rx_tfm_arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0,
CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->rx_tfm_arc4)) {
- printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
- "crypto API arc4\n");
+ printk(KERN_DEBUG
+ "rtllib_crypt_tkip: could not allocate crypto API arc4\n");
priv->rx_tfm_arc4 = NULL;
goto fail;
}
priv->rx_tfm_michael = crypto_alloc_hash("michael_mic", 0,
CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->rx_tfm_michael)) {
- printk(KERN_DEBUG "rtllib_crypt_tkip: could not allocate "
- "crypto API michael_mic\n");
+ printk(KERN_DEBUG
+ "rtllib_crypt_tkip: could not allocate crypto API michael_mic\n");
priv->rx_tfm_michael = NULL;
goto fail;
}
keyidx = pos[3];
if (!(keyidx & (1 << 5))) {
if (net_ratelimit()) {
- printk(KERN_DEBUG "TKIP: received packet without ExtIV"
- " flag from %pM\n", hdr->addr2);
+ printk(KERN_DEBUG
+ "TKIP: received packet without ExtIV flag from %pM\n",
+ hdr->addr2);
}
return -2;
}
keyidx >>= 6;
if (tkey->key_idx != keyidx) {
- printk(KERN_DEBUG "TKIP: RX tkey->key_idx=%d frame "
- "keyidx=%d priv=%p\n", tkey->key_idx, keyidx, priv);
+ printk(KERN_DEBUG
+ "TKIP: RX tkey->key_idx=%d frame keyidx=%d priv=%p\n",
+ tkey->key_idx, keyidx, priv);
return -6;
}
if (!tkey->key_set) {
if (net_ratelimit()) {
- printk(KERN_DEBUG "TKIP: received packet from %pM"
- " with keyid=%d that does not have a configured"
- " key\n", hdr->addr2, keyidx);
+ printk(KERN_DEBUG
+ "TKIP: received packet from %pM with keyid=%d that does not have a configured key\n",
+ hdr->addr2, keyidx);
}
return -3;
}
(iv32 == tkey->rx_iv32 && iv16 <= tkey->rx_iv16)) &&
tkey->initialized) {
if (net_ratelimit()) {
- printk(KERN_DEBUG "TKIP: replay detected: STA="
- " %pM previous TSC %08x%04x received "
- "TSC %08x%04x\n", hdr->addr2,
- tkey->rx_iv32, tkey->rx_iv16, iv32, iv16);
+ printk(KERN_DEBUG
+ "TKIP: replay detected: STA= %pM previous TSC %08x%04x received TSC %08x%04x\n",
+ hdr->addr2, tkey->rx_iv32, tkey->rx_iv16,
+ iv32, iv16);
}
tkey->dot11RSNAStatsTKIPReplays++;
return -4;
crypto_blkcipher_setkey(tkey->rx_tfm_arc4, rc4key, 16);
if (crypto_blkcipher_decrypt(&desc, &sg, &sg, plen + 4)) {
if (net_ratelimit()) {
- printk(KERN_DEBUG ": TKIP: failed to decrypt "
- "received packet from %pM\n",
+ printk(KERN_DEBUG
+ ": TKIP: failed to decrypt received packet from %pM\n",
hdr->addr2);
}
return -7;
tkey->rx_phase1_done = 0;
}
if (net_ratelimit()) {
- printk(KERN_DEBUG "TKIP: ICV error detected: STA="
- " %pM\n", hdr->addr2);
+ printk(KERN_DEBUG
+ "TKIP: ICV error detected: STA= %pM\n",
+ hdr->addr2);
}
tkey->dot11RSNAStatsTKIPICVErrors++;
return -5;
struct scatterlist sg[2];
if (tfm_michael == NULL) {
- printk(KERN_WARNING "michael_mic: tfm_michael == NULL\n");
+ pr_warn("michael_mic: tfm_michael == NULL\n");
return -1;
}
sg_init_table(sg, 2);
hdr = (struct rtllib_hdr_4addr *) skb->data;
if (skb_tailroom(skb) < 8 || skb->len < hdr_len) {
- printk(KERN_DEBUG "Invalid packet for Michael MIC add "
- "(tailroom=%d hdr_len=%d skb->len=%d)\n",
+ printk(KERN_DEBUG
+ "Invalid packet for Michael MIC add (tailroom=%d hdr_len=%d skb->len=%d)\n",
skb_tailroom(skb), hdr_len, skb->len);
return -1;
}
struct rtllib_hdr_4addr *hdr;
hdr = (struct rtllib_hdr_4addr *) skb->data;
- printk(KERN_DEBUG "%s: Michael MIC verification failed for "
- "MSDU from %pM keyidx=%d\n",
+ printk(KERN_DEBUG
+ "%s: Michael MIC verification failed for MSDU from %pM keyidx=%d\n",
skb->dev ? skb->dev->name : "N/A", hdr->addr2,
keyidx);
printk(KERN_DEBUG "%d\n",
memcmp(mic, skb->data + skb->len - 8, 8) != 0);
if (skb->dev) {
- printk(KERN_INFO "skb->dev != NULL\n");
+ pr_info("skb->dev != NULL\n");
rtllib_michael_mic_failure(skb->dev, hdr, keyidx);
}
tkey->dot11RSNAStatsTKIPLocalMICFailures++;
struct rtllib_tkip_data *tkip = priv;
seq_printf(m,
- "key[%d] alg=TKIP key_set=%d "
- "tx_pn=%02x%02x%02x%02x%02x%02x "
- "rx_pn=%02x%02x%02x%02x%02x%02x "
- "replays=%d icv_errors=%d local_mic_failures=%d\n",
+ "key[%d] alg=TKIP key_set=%d tx_pn=%02x%02x%02x%02x%02x%02x rx_pn=%02x%02x%02x%02x%02x%02x replays=%d icv_errors=%d local_mic_failures=%d\n",
tkip->key_idx, tkip->key_set,
(tkip->tx_iv32 >> 24) & 0xff,
(tkip->tx_iv32 >> 16) & 0xff,
priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tx_tfm)) {
- pr_debug("rtllib_crypt_wep: could not allocate "
- "crypto API arc4\n");
+ pr_debug("rtllib_crypt_wep: could not allocate crypto API arc4\n");
priv->tx_tfm = NULL;
goto fail;
}
priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->rx_tfm)) {
- pr_debug("rtllib_crypt_wep: could not allocate "
- "crypto API arc4\n");
+ pr_debug("rtllib_crypt_wep: could not allocate crypto API arc4\n");
priv->rx_tfm = NULL;
goto fail;
}
if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
skb->len < hdr_len){
- printk(KERN_ERR "Error!!! headroom=%d tailroom=%d skblen=%d"
- " hdr_len=%d\n", skb_headroom(skb), skb_tailroom(skb),
- skb->len, hdr_len);
+ pr_err("Error!!! headroom=%d tailroom=%d skblen=%d hdr_len=%d\n",
+ skb_headroom(skb), skb_tailroom(skb), skb->len, hdr_len);
return -1;
}
len = skb->len - hdr_len;
#define assert(expr) \
do { \
if (!(expr)) { \
- printk(KERN_INFO "Assertion failed! %s,%s,%s,line=%d\n", \
+ pr_info("Assertion failed! %s,%s,%s,line=%d\n", \
#expr, __FILE__, __func__, __LINE__); \
} \
} while (0);
+++ /dev/null
-#ifndef __INC_ENDIANFREE_H
-#define __INC_ENDIANFREE_H
-
-/*
- * Call endian free function when
- * 1. Read/write packet content.
- * 2. Before write integer to IO.
- * 3. After read integer from IO.
- */
-
-#define __MACHINE_LITTLE_ENDIAN 1234 /* LSB first: i386, vax */
-#define __MACHINE_BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net, ppc */
-
-#define BYTE_ORDER __MACHINE_LITTLE_ENDIAN
-
-#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
-#define EF1Byte(_val) ((u8)(_val))
-#define EF2Byte(_val) ((u16)(_val))
-#define EF4Byte(_val) ((u32)(_val))
-
-#else
-#define EF1Byte(_val) ((u8)(_val))
-#define EF2Byte(_val) \
- (((((u16)(_val))&0x00ff)<<8)|((((u16)(_val))&0xff00)>>8))
-#define EF4Byte(_val) \
- (((((u32)(_val))&0x000000ff)<<24)|\
- ((((u32)(_val))&0x0000ff00)<<8)|\
- ((((u32)(_val))&0x00ff0000)>>8)|\
- ((((u32)(_val))&0xff000000)>>24))
-#endif
-
-#define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr)))
-#define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr)))
-#define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr)))
-
-#define WriteEF1Byte(_ptr, _val) ((*((u8 *)(_ptr))) = EF1Byte(_val))
-#define WriteEF2Byte(_ptr, _val) ((*((u16 *)(_ptr))) = EF2Byte(_val))
-#define WriteEF4Byte(_ptr, _val) ((*((u32 *)(_ptr))) = EF4Byte(_val))
-#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
-#define H2N1BYTE(_val) ((u8)(_val))
-#define H2N2BYTE(_val) (((((u16)(_val))&0x00ff)<<8)|\
- ((((u16)(_val))&0xff00)>>8))
-#define H2N4BYTE(_val) (((((u32)(_val))&0x000000ff)<<24)|\
- ((((u32)(_val))&0x0000ff00)<<8) |\
- ((((u32)(_val))&0x00ff0000)>>8) |\
- ((((u32)(_val))&0xff000000)>>24))
-#else
-#define H2N1BYTE(_val) ((u8)(_val))
-#define H2N2BYTE(_val) ((u16)(_val))
-#define H2N4BYTE(_val) ((u32)(_val))
-#endif
-
-#if BYTE_ORDER == __MACHINE_LITTLE_ENDIAN
-#define N2H1BYTE(_val) ((u8)(_val))
-#define N2H2BYTE(_val) (((((u16)(_val))&0x00ff)<<8)|\
- ((((u16)(_val))&0xff00)>>8))
-#define N2H4BYTE(_val) (((((u32)(_val))&0x000000ff)<<24)|\
- ((((u32)(_val))&0x0000ff00)<<8) |\
- ((((u32)(_val))&0x00ff0000)>>8) |\
- ((((u32)(_val))&0xff000000)>>24))
-#else
-#define N2H1BYTE(_val) ((u8)(_val))
-#define N2H2BYTE(_val) ((u16)(_val))
-#define N2H4BYTE(_val) ((u32)(_val))
-#endif
-
-#define BIT_LEN_MASK_32(__BitLen) (0xFFFFFFFF >> (32 - (__BitLen)))
-#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) \
- (BIT_LEN_MASK_32(__BitLen) << (__BitOffset))
-
-#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) (EF4Byte(*((u32 *)(__pStart))))
-
-#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
- ( \
- (LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset)) \
- & \
- BIT_LEN_MASK_32(__BitLen) \
- )
-
-#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \
- ( \
- LE_P4BYTE_TO_HOST_4BYTE(__pStart) \
- & \
- (~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen)) \
- )
-
-#define BIT_LEN_MASK_16(__BitLen) \
- (0xFFFF >> (16 - (__BitLen)))
-
-#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \
- (BIT_LEN_MASK_16(__BitLen) << (__BitOffset))
-
-#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \
- (EF2Byte(*((u16 *)(__pStart))))
-
-#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \
- ( \
- (LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset)) \
- & \
- BIT_LEN_MASK_16(__BitLen) \
- )
-
-#define BIT_LEN_MASK_8(__BitLen) \
- (0xFF >> (8 - (__BitLen)))
-
-#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \
- (BIT_LEN_MASK_8(__BitLen) << (__BitOffset))
-
-#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \
- (EF1Byte(*((u8 *)(__pStart))))
-
-#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \
- ( \
- (LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset)) \
- & \
- BIT_LEN_MASK_8(__BitLen) \
- )
-
-#define N_BYTE_ALIGMENT(__Value, __Aligment) \
- ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / \
- __Aligment) * __Aligment))
-#endif
ieee->networks = kzalloc(
MAX_NETWORK_COUNT * sizeof(struct rtllib_network),
GFP_KERNEL);
- if (!ieee->networks) {
- printk(KERN_WARNING "%s: Out of memory allocating beacons\n",
- ieee->dev->name);
+ if (!ieee->networks)
return -ENOMEM;
- }
return 0;
}
rtllib_softmac_init(ieee);
ieee->pHTInfo = kzalloc(sizeof(struct rt_hi_throughput), GFP_KERNEL);
- if (ieee->pHTInfo == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "can't alloc memory for HTInfo\n");
+ if (ieee->pHTInfo == NULL)
return NULL;
- }
+
HTUpdateDefaultSetting(ieee);
HTInitializeHTInfo(ieee);
TSInitialize(ieee);
static int show_debug_level(struct seq_file *m, void *v)
{
- return seq_printf(m, "0x%08X\n", rtllib_debug_level);
+ seq_printf(m, "0x%08X\n", rtllib_debug_level);
+
+ return 0;
}
static ssize_t write_debug_level(struct file *file, const char __user *buffer,
}
if (p == &ieee->ibss_mac_hash[index]) {
entry = kmalloc(sizeof(struct ieee_ibss_seq), GFP_ATOMIC);
- if (!entry) {
- printk(KERN_WARNING "Cannot malloc new mac entry\n");
+ if (!entry)
return 0;
- }
+
memcpy(entry->mac, mac, ETH_ALEN);
entry->seq_num[tid] = seq;
entry->frag_num[tid] = frag;
del_timer_sync(&pTS->RxPktPendingTimer);
while (!list_empty(&pTS->RxPendingPktList)) {
if (RfdCnt >= REORDER_WIN_SIZE) {
- printk(KERN_INFO "-------------->%s() error! RfdCnt >= REORDER_WIN_SIZE\n", __func__);
+ netdev_info(ieee->dev,
+ "-------------->%s() error! RfdCnt >= REORDER_WIN_SIZE\n",
+ __func__);
break;
}
__func__);
pTS->RxTimeoutIndicateSeq = pTS->RxIndicateSeq;
mod_timer(&pTS->RxPktPendingTimer, jiffies +
- MSECS(pHTInfo->RxReorderPendingTime));
+ msecs_to_jiffies(pHTInfo->RxReorderPendingTime));
}
spin_unlock_irqrestore(&(ieee->reorder_spinlock), flags);
}
(nSubframe_Length << 8);
if (skb->len < (ETHERNET_HEADER_SIZE + nSubframe_Length)) {
- printk(KERN_INFO "%s: A-MSDU parse error!! pRfd->nTotalSubframe : %d\n",\
- __func__, rxb->nr_subframes);
- printk(KERN_INFO "%s: A-MSDU parse error!! Subframe Length: %d\n", __func__,
- nSubframe_Length);
- printk(KERN_INFO "nRemain_Length is %d and nSubframe_Length is : %d\n", skb->len,
- nSubframe_Length);
- printk(KERN_INFO "The Packet SeqNum is %d\n", SeqNum);
+ netdev_info(ieee->dev,
+ "%s: A-MSDU parse error!! pRfd->nTotalSubframe : %d\n",
+ __func__, rxb->nr_subframes);
+ netdev_info(ieee->dev,
+ "%s: A-MSDU parse error!! Subframe Length: %d\n",
+ __func__, nSubframe_Length);
+ netdev_info(ieee->dev,
+ "nRemain_Length is %d and nSubframe_Length is : %d\n",
+ skb->len, nSubframe_Length);
+ netdev_info(ieee->dev,
+ "The Packet SeqNum is %d\n",
+ SeqNum);
return 0;
}
hdrlen = rtllib_get_hdrlen(fc);
if (HTCCheck(ieee, skb->data)) {
if (net_ratelimit())
- printk(KERN_INFO "%s: find HTCControl!\n", __func__);
+ netdev_info(ieee->dev, "%s: find HTCControl!\n",
+ __func__);
hdrlen += 4;
rx_stats->bContainHTC = true;
}
keyidx = rtllib_rx_frame_decrypt(ieee, skb, crypt);
if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) && (keyidx < 0)) {
- printk(KERN_INFO "%s: decrypt frame error\n", __func__);
+ netdev_info(ieee->dev, "%s: decrypt frame error\n", __func__);
return -1;
}
flen -= hdrlen;
if (frag_skb->tail + flen > frag_skb->end) {
- printk(KERN_WARNING "%s: host decrypted and reassembled frame did not fit skb\n",
- __func__);
+ netdev_warn(ieee->dev,
+ "%s: host decrypted and reassembled frame did not fit skb\n",
+ __func__);
rtllib_frag_cache_invalidate(ieee, hdr);
return -1;
}
* encrypted/authenticated */
if (ieee->host_decrypt && (fc & RTLLIB_FCTL_WEP) &&
rtllib_rx_frame_decrypt_msdu(ieee, skb, keyidx, crypt)) {
- printk(KERN_INFO "%s: ==>decrypt msdu error\n", __func__);
+ netdev_info(ieee->dev, "%s: ==>decrypt msdu error\n", __func__);
return -1;
}
}
if (rtllib_is_eapol_frame(ieee, skb, hdrlen))
- printk(KERN_WARNING "RX: IEEE802.1X EAPOL frame!\n");
+ netdev_warn(ieee->dev, "RX: IEEE802.1X EAPOL frame!\n");
return 0;
}
int i = 0;
if (rxb == NULL) {
- printk(KERN_INFO "%s: rxb is NULL!!\n", __func__);
- return ;
+ netdev_info(dev, "%s: rxb is NULL!!\n", __func__);
+ return;
}
for (i = 0; i < rxb->nr_subframes; i++) {
}
}
kfree(rxb);
- rxb = NULL;
}
static int rtllib_rx_InfraAdhoc(struct rtllib_device *ieee, struct sk_buff *skb,
/*Filter pkt has too small length */
hdrlen = rtllib_rx_get_hdrlen(ieee, skb, rx_stats);
if (skb->len < hdrlen) {
- printk(KERN_INFO "%s():ERR!!! skb->len is smaller than hdrlen\n", __func__);
+ netdev_info(dev, "%s():ERR!!! skb->len is smaller than hdrlen\n",
+ __func__);
goto rx_dropped;
}
/* skb: hdr + (possible reassembled) full plaintext payload */
payload = skb->data + hdrlen;
rxb = kmalloc(sizeof(struct rtllib_rxb), GFP_ATOMIC);
- if (rxb == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR,
- "%s(): kmalloc rxb error\n", __func__);
+ if (rxb == NULL)
goto rx_dropped;
- }
+
/* to parse amsdu packets */
/* qos data packets & reserved bit is 1 */
if (parse_subframe(ieee, skb, rx_stats, rxb, src, dst) == 0) {
size_t hdrlen = rtllib_get_hdrlen(fc);
if (skb->len < hdrlen) {
- printk(KERN_INFO "%s():ERR!!! skb->len is smaller than hdrlen\n", __func__);
+ netdev_info(ieee->dev,
+ "%s():ERR!!! skb->len is smaller than hdrlen\n",
+ __func__);
return 0;
}
if (HTCCheck(ieee, skb->data)) {
if (net_ratelimit())
- printk(KERN_INFO "%s: Find HTCControl!\n", __func__);
+ netdev_info(ieee->dev, "%s: Find HTCControl!\n",
+ __func__);
hdrlen += 4;
}
int ret = 0;
if ((NULL == ieee) || (NULL == skb) || (NULL == rx_stats)) {
- printk(KERN_INFO "%s: Input parameters NULL!\n", __func__);
+ pr_info("%s: Input parameters NULL!\n", __func__);
goto rx_dropped;
}
if (skb->len < 10) {
- printk(KERN_INFO "%s: SKB length < 10\n", __func__);
+ netdev_info(ieee->dev, "%s: SKB length < 10\n", __func__);
goto rx_dropped;
}
ret = rtllib_rx_Mesh(ieee, skb, rx_stats);
break;
default:
- printk(KERN_INFO"%s: ERR iw mode!!!\n", __func__);
+ netdev_info(ieee->dev, "%s: ERR iw mode!!!\n", __func__);
break;
}
if (!IS_COUNTRY_IE_VALID(ieee)) {
if (rtllib_act_scanning(ieee, false) && ieee->FirstIe_InScan)
- printk(KERN_INFO "Received beacon ContryIE, SSID: <%s>\n", network->ssid);
+ netdev_info(ieee->dev,
+ "Received beacon ContryIE, SSID: <%s>\n",
+ network->ssid);
Dot11d_UpdateCountryIe(ieee, addr2, info_element->len, info_element->data);
}
}
info_element->data[2] == 0x4c &&
info_element->data[3] == 0x033) {
- tmp_htcap_len = min(info_element->len, (u8)MAX_IE_LEN);
+ tmp_htcap_len = min_t(u8, info_element->len, MAX_IE_LEN);
if (tmp_htcap_len != 0) {
network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf) ?
info_element->data[1] == 0x90 &&
info_element->data[2] == 0x4c &&
info_element->data[3] == 0x034) {
- tmp_htinfo_len = min(info_element->len, (u8)MAX_IE_LEN);
+ tmp_htinfo_len = min_t(u8, info_element->len, MAX_IE_LEN);
if (tmp_htinfo_len != 0) {
network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
if (tmp_htinfo_len) {
info_element->data[1] == 0xe0 &&
info_element->data[2] == 0x4c &&
info_element->data[3] == 0x02) {
- ht_realtek_agg_len = min(info_element->len, (u8)MAX_IE_LEN);
+ ht_realtek_agg_len = min_t(u8, info_element->len, MAX_IE_LEN);
memcpy(ht_realtek_agg_buf, info_element->data, info_element->len);
}
if (ht_realtek_agg_len >= 5) {
case MFIE_TYPE_HT_CAP:
RTLLIB_DEBUG_SCAN("MFIE_TYPE_HT_CAP: %d bytes\n",
info_element->len);
- tmp_htcap_len = min(info_element->len, (u8)MAX_IE_LEN);
+ tmp_htcap_len = min_t(u8, info_element->len, MAX_IE_LEN);
if (tmp_htcap_len != 0) {
network->bssht.bdHTSpecVer = HT_SPEC_VER_EWC;
network->bssht.bdHTCapLen = tmp_htcap_len > sizeof(network->bssht.bdHTCapBuf) ?
case MFIE_TYPE_HT_INFO:
RTLLIB_DEBUG_SCAN("MFIE_TYPE_HT_INFO: %d bytes\n",
info_element->len);
- tmp_htinfo_len = min(info_element->len, (u8)MAX_IE_LEN);
+ tmp_htinfo_len = min_t(u8, info_element->len, MAX_IE_LEN);
if (tmp_htinfo_len) {
network->bssht.bdHTSpecVer = HT_SPEC_VER_IEEE;
network->bssht.bdHTInfoLen = tmp_htinfo_len >
}
break;
case MFIE_TYPE_QOS_PARAMETER:
- printk(KERN_ERR
- "QoS Error need to parse QOS_PARAMETER IE\n");
+ netdev_err(ieee->dev,
+ "QoS Error need to parse QOS_PARAMETER IE\n");
break;
case MFIE_TYPE_COUNTRY:
static int IsPassiveChannel(struct rtllib_device *rtllib, u8 channel)
{
if (MAX_CHANNEL_NUMBER < channel) {
- printk(KERN_INFO "%s(): Invalid Channel\n", __func__);
+ netdev_info(rtllib->dev, "%s(): Invalid Channel\n", __func__);
return 0;
}
int rtllib_legal_channel(struct rtllib_device *rtllib, u8 channel)
{
if (MAX_CHANNEL_NUMBER < channel) {
- printk(KERN_INFO "%s(): Invalid Channel\n", __func__);
+ netdev_info(rtllib->dev, "%s(): Invalid Channel\n", __func__);
return 0;
}
if (rtllib->active_channel_map[channel] > 0)
if (WLAN_FC_GET_STYPE(le16_to_cpu(beacon->header.frame_ctl)) ==
RTLLIB_STYPE_PROBE_RESP) {
if (IsPassiveChannel(ieee, network->channel)) {
- printk(KERN_INFO "GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n",
- network->channel);
+ netdev_info(ieee->dev,
+ "GetScanInfo(): For Global Domain, filter probe response at channel(%d).\n",
+ network->channel);
goto free_network;
}
}
*tag++ = 0x00;
*tag_p = tag;
- printk(KERN_ALERT "This is enable turbo mode IE process\n");
+ netdev_alert(ieee->dev, "This is enable turbo mode IE process\n");
}
static void enqueue_mgmt(struct rtllib_device *ieee, struct sk_buff *skb)
if (QueryRate == 0) {
QueryRate = 12;
- printk(KERN_INFO "No BasicRate found!!\n");
+ netdev_info(ieee->dev, "No BasicRate found!!\n");
}
return QueryRate;
}
/* as for the completion function, it does not need
* to check it any more.
* */
- printk(KERN_INFO "%s():insert to waitqueue, queue_index"
- ":%d!\n", __func__, tcb_desc->queue_index);
+ netdev_info(ieee->dev,
+ "%s():insert to waitqueue, queue_index:%d!\n",
+ __func__, tcb_desc->queue_index);
skb_queue_tail(&ieee->skb_waitQ[tcb_desc->queue_index],
skb);
} else {
if (ieee->beacon_txing && ieee->ieee_up)
mod_timer(&ieee->beacon_timer, jiffies +
- (MSECS(ieee->current_network.beacon_interval - 5)));
+ (msecs_to_jiffies(ieee->current_network.beacon_interval - 5)));
}
{
struct rtllib_device *ieee = netdev_priv_rsl(dev);
- printk(KERN_INFO "========>Enter Monitor Mode\n");
+ netdev_info(dev, "========>Enter Monitor Mode\n");
ieee->AllowAllDestAddrHandler(dev, true, !bInitState);
}
{
struct rtllib_device *ieee = netdev_priv_rsl(dev);
- printk(KERN_INFO "========>Exit Monitor Mode\n");
+ netdev_info(dev, "========>Exit Monitor Mode\n");
ieee->AllowAllDestAddrHandler(dev, false, !bInitState);
}
struct rtllib_device *ieee = netdev_priv_rsl(dev);
- printk(KERN_INFO "========>Enter Intel Promiscuous Mode\n");
+ netdev_info(dev, "========>Enter Intel Promiscuous Mode\n");
ieee->AllowAllDestAddrHandler(dev, true, !bInitState);
ieee->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID,
struct rtllib_device *ieee = netdev_priv_rsl(dev);
- printk(KERN_INFO "========>Exit Intel Promiscuous Mode\n");
+ netdev_info(dev, "========>Exit Intel Promiscuous Mode\n");
ieee->AllowAllDestAddrHandler(dev, false, !bInitState);
ieee->SetHwRegHandler(dev, HW_VAR_CECHK_BSSID,
if (ieee->state == RTLLIB_LINKED)
goto out;
if (ieee->sync_scan_hurryup) {
- printk(KERN_INFO "============>sync_scan_hurryup out\n");
+ netdev_info(ieee->dev,
+ "============>sync_scan_hurryup out\n");
goto out;
}
down(&ieee->scan_sem);
if (ieee->eRFPowerState == eRfOff) {
- printk(KERN_INFO "======>%s():rf state is eRfOff, return\n",
- __func__);
+ netdev_info(ieee->dev,
+ "======>%s():rf state is eRfOff, return\n",
+ __func__);
goto out1;
}
rtllib_send_probe_requests(ieee, 0);
queue_delayed_work_rsl(ieee->wq, &ieee->softmac_scan_wq,
- MSECS(RTLLIB_SOFTMAC_SCAN_TIME));
+ msecs_to_jiffies(RTLLIB_SOFTMAC_SCAN_TIME));
up(&ieee->scan_sem);
return;
PMKCacheIdx = SecIsInPMKIDList(ieee, ieee->current_network.bssid);
if (PMKCacheIdx >= 0) {
wpa_ie_len += 18;
- printk(KERN_INFO "[PMK cache]: WPA2 IE length: %x\n",
- wpa_ie_len);
+ netdev_info(ieee->dev, "[PMK cache]: WPA2 IE length: %x\n",
+ wpa_ie_len);
}
len = sizeof(struct rtllib_assoc_request_frame) + 2
+ beacon->ssid_len
if (ieee->assocreq_ies)
memcpy(ieee->assocreq_ies, ies, ieee->assocreq_ies_len);
else {
- printk(KERN_INFO "%s()Warning: can't alloc memory for assocreq"
- "_ies\n", __func__);
+ netdev_info(ieee->dev,
+ "%s()Warning: can't alloc memory for assocreq_ies\n",
+ __func__);
ieee->assocreq_ies_len = 0;
}
return skb;
if (!skb)
rtllib_associate_abort(ieee);
else {
- ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATING ;
+ ieee->state = RTLLIB_ASSOCIATING_AUTHENTICATING;
RTLLIB_DEBUG_MGMT("Sending authentication request\n");
softmac_mgmt_xmit(skb, ieee);
if (!timer_pending(&ieee->associate_timer)) {
*(c++) = chlen;
memcpy(c, challenge, chlen);
- RTLLIB_DEBUG_MGMT("Sending authentication challenge "
- "response\n");
+ RTLLIB_DEBUG_MGMT("Sending authentication challenge response\n");
rtllib_encrypt_fragment(ieee, skb,
sizeof(struct rtllib_hdr_3addr));
associate_complete_wq);
struct rt_pwr_save_ctrl *pPSC = (struct rt_pwr_save_ctrl *)
(&(ieee->PowerSaveControl));
- printk(KERN_INFO "Associated successfully\n");
+ netdev_info(ieee->dev, "Associated successfully\n");
if (!ieee->is_silent_reset) {
- printk(KERN_INFO "normal associate\n");
+ netdev_info(ieee->dev, "normal associate\n");
notify_wx_assoc_event(ieee);
}
if (rtllib_is_54g(&ieee->current_network) &&
(ieee->modulation & RTLLIB_OFDM_MODULATION)) {
ieee->rate = 108;
- printk(KERN_INFO"Using G rates:%d\n", ieee->rate);
+ netdev_info(ieee->dev, "Using G rates:%d\n", ieee->rate);
} else {
ieee->rate = 22;
ieee->SetWirelessMode(ieee->dev, IEEE_B);
- printk(KERN_INFO"Using B rates:%d\n", ieee->rate);
+ netdev_info(ieee->dev, "Using B rates:%d\n", ieee->rate);
}
if (ieee->pHTInfo->bCurrentHTSupport && ieee->pHTInfo->bEnableHT) {
- printk(KERN_INFO "Successfully associated, ht enabled\n");
+ netdev_info(ieee->dev, "Successfully associated, ht enabled\n");
HTOnAssocRsp(ieee);
} else {
- printk(KERN_INFO "Successfully associated, ht not "
- "enabled(%d, %d)\n",
- ieee->pHTInfo->bCurrentHTSupport,
- ieee->pHTInfo->bEnableHT);
+ netdev_info(ieee->dev,
+ "Successfully associated, ht not enabled(%d, %d)\n",
+ ieee->pHTInfo->bCurrentHTSupport,
+ ieee->pHTInfo->bEnableHT);
memset(ieee->dot11HTOperationalRateSet, 0, 16);
}
ieee->LinkDetectInfo.SlotNum = 2 * (1 +
ieee->link_change(ieee->dev);
if (ieee->is_silent_reset) {
- printk(KERN_INFO "silent reset associate\n");
+ netdev_info(ieee->dev, "silent reset associate\n");
ieee->is_silent_reset = false;
}
ieee->current_network.channel);
HTSetConnectBwMode(ieee, HT_CHANNEL_WIDTH_20, HT_EXTCHNL_OFFSET_NO_EXT);
if (ieee->eRFPowerState == eRfOff) {
- RT_TRACE(COMP_DBG, "=============>%s():Rf state is eRfOff,"
- " schedule ipsleave wq again,return\n", __func__);
+ RT_TRACE(COMP_DBG,
+ "=============>%s():Rf state is eRfOff, schedule ipsleave wq again,return\n",
+ __func__);
if (ieee->rtllib_ips_leave_wq != NULL)
ieee->rtllib_ips_leave_wq(ieee->dev);
up(&ieee->wx_sem);
IW_ESSID_MAX_SIZE);
ieee->current_network.ssid_len = tmp_ssid_len;
}
- printk(KERN_INFO"Linking with %s,channel:%d, qos:%d, "
- "myHT:%d, networkHT:%d, mode:%x cur_net.flags"
- ":0x%x\n", ieee->current_network.ssid,
- ieee->current_network.channel,
- ieee->current_network.qos_data.supported,
- ieee->pHTInfo->bEnableHT,
- ieee->current_network.bssht.bdSupportHT,
- ieee->current_network.mode,
- ieee->current_network.flags);
+ netdev_info(ieee->dev,
+ "Linking with %s,channel:%d, qos:%d, myHT:%d, networkHT:%d, mode:%x cur_net.flags:0x%x\n",
+ ieee->current_network.ssid,
+ ieee->current_network.channel,
+ ieee->current_network.qos_data.supported,
+ ieee->pHTInfo->bEnableHT,
+ ieee->current_network.bssht.bdSupportHT,
+ ieee->current_network.mode,
+ ieee->current_network.flags);
if ((rtllib_act_scanning(ieee, false)) &&
!(ieee->softmac_features & IEEE_SOFTMAC_SCAN))
(ieee->modulation & RTLLIB_OFDM_MODULATION)) {
ieee->rate = 108;
ieee->SetWirelessMode(ieee->dev, IEEE_G);
- printk(KERN_INFO"Using G rates\n");
+ netdev_info(ieee->dev, "Using G rates\n");
} else {
ieee->rate = 22;
ieee->SetWirelessMode(ieee->dev, IEEE_B);
- printk(KERN_INFO"Using B rates\n");
+ netdev_info(ieee->dev, "Using B rates\n");
}
memset(ieee->dot11HTOperationalRateSet, 0, 16);
ieee->state = RTLLIB_LINKED;
if (assoc_rq_parse(skb, dest) != -1)
rtllib_resp_to_assoc_rq(ieee, dest);
- printk(KERN_INFO"New client associated: %pM\n", dest);
+ netdev_info(ieee->dev, "New client associated: %pM\n", dest);
}
void rtllib_sta_ps_send_null_frame(struct rtllib_device *ieee, short pwr)
if (dtim & (RTLLIB_DTIM_UCAST & ieee->ps))
return 2;
- if (!time_after(jiffies, ieee->dev->trans_start + MSECS(timeout)))
+ if (!time_after(jiffies,
+ ieee->dev->trans_start + msecs_to_jiffies(timeout)))
return 0;
- if (!time_after(jiffies, ieee->last_rx_ps_time + MSECS(timeout)))
+ if (!time_after(jiffies,
+ ieee->last_rx_ps_time + msecs_to_jiffies(timeout)))
return 0;
if ((ieee->softmac_features & IEEE_SOFTMAC_SINGLE_QUEUE) &&
(ieee->mgmt_queue_tail != ieee->mgmt_queue_head))
}
*time = ieee->current_network.last_dtim_sta_time
- + MSECS(ieee->current_network.beacon_interval *
+ + msecs_to_jiffies(ieee->current_network.beacon_interval *
LPSAwakeIntvl_tmp);
}
}
if ((ieee->ps == RTLLIB_PS_DISABLED ||
ieee->iw_mode != IW_MODE_INFRA ||
ieee->state != RTLLIB_LINKED)) {
- RT_TRACE(COMP_DBG, "=====>%s(): no need to ps,wake up!! "
- "ieee->ps is %d, ieee->iw_mode is %d, ieee->state"
- " is %d\n", __func__, ieee->ps, ieee->iw_mode,
- ieee->state);
+ RT_TRACE(COMP_DBG,
+ "=====>%s(): no need to ps,wake up!! ieee->ps is %d, ieee->iw_mode is %d, ieee->state is %d\n",
+ __func__, ieee->ps, ieee->iw_mode, ieee->state);
spin_lock_irqsave(&ieee->mgmt_tx_lock, flags2);
rtllib_sta_wakeup(ieee, 1);
u8 category = 0;
if (act == NULL) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "error to get payload of "
- "action frame\n");
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "error to get payload of action frame\n");
return;
}
memcpy(ieee->assocresp_ies, ies,
ieee->assocresp_ies_len);
else {
- printk(KERN_INFO "%s()Warning: can't alloc "
- "memory for assocresp_ies\n", __func__);
+ netdev_info(ieee->dev,
+ "%s()Warning: can't alloc memory for assocresp_ies\n",
+ __func__);
ieee->assocresp_ies_len = 0;
}
rtllib_associate_complete(ieee);
} else {
/* aid could not been allocated */
ieee->softmac_stats.rx_ass_err++;
- printk(KERN_INFO "Association response status code 0x%x\n",
- errcode);
+ netdev_info(ieee->dev,
+ "Association response status code 0x%x\n",
+ errcode);
RTLLIB_DEBUG_MGMT(
"Association response status code 0x%x\n",
errcode);
if (ieee->current_network.mode ==
IEEE_N_24G && bHalfSupportNmode) {
- printk(KERN_INFO "======>enter "
- "half N mode\n");
+ netdev_info(ieee->dev,
+ "======>enter half N mode\n");
ieee->bHalfWirelessN24GMode =
true;
} else
}
} else {
ieee->softmac_stats.rx_auth_rs_err++;
- RTLLIB_DEBUG_MGMT("Authentication respose"
- " status code 0x%x", errcode);
+ RTLLIB_DEBUG_MGMT("Authentication respose status code 0x%x",
+ errcode);
- printk(KERN_INFO "Authentication respose "
- "status code 0x%x", errcode);
+ netdev_info(ieee->dev,
+ "Authentication respose status code 0x%x",
+ errcode);
rtllib_associate_abort(ieee);
}
if ((ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE) &&
ieee->state == RTLLIB_LINKED &&
(ieee->iw_mode == IW_MODE_INFRA)) {
- printk(KERN_INFO "==========>received disassoc/deauth(%x) "
- "frame, reason code:%x\n",
- WLAN_FC_GET_STYPE(header->frame_ctl),
- ((struct rtllib_disassoc *)skb->data)->reason);
+ netdev_info(ieee->dev,
+ "==========>received disassoc/deauth(%x) frame, reason code:%x\n",
+ WLAN_FC_GET_STYPE(header->frame_ctl),
+ ((struct rtllib_disassoc *)skb->data)->reason);
ieee->state = RTLLIB_ASSOCIATING;
ieee->softmac_stats.reassoc++;
ieee->is_roaming = true;
break;
default:
return -1;
- break;
}
return 0;
}
* on the semaphore
*/
if (!ieee->proto_started) {
- printk(KERN_INFO "==========oh driver down return\n");
+ netdev_info(ieee->dev, "==========oh driver down return\n");
return;
}
down(&ieee->wx_sem);
/* the network definitively is not here.. create a new cell */
if (ieee->state == RTLLIB_NOLINK) {
- printk(KERN_INFO "creating new IBSS cell\n");
+ netdev_info(ieee->dev, "creating new IBSS cell\n");
ieee->current_network.channel = ieee->IbssStartChnl;
if (!ieee->wap_set)
rtllib_randomize_cell(ieee);
ieee->current_network.capability = WLAN_CAPABILITY_IBSS;
}
- printk(KERN_INFO "%s(): ieee->mode = %d\n", __func__, ieee->mode);
+ netdev_info(ieee->dev, "%s(): ieee->mode = %d\n", __func__, ieee->mode);
if ((ieee->mode == IEEE_N_24G) || (ieee->mode == IEEE_N_5G))
HTUseDefaultSetting(ieee);
else
inline void rtllib_start_ibss(struct rtllib_device *ieee)
{
- queue_delayed_work_rsl(ieee->wq, &ieee->start_ibss_wq, MSECS(150));
+ queue_delayed_work_rsl(ieee->wq, &ieee->start_ibss_wq,
+ msecs_to_jiffies(150));
}
/* this is called only in user context, with wx_sem held */
{
/* This is called when wpa_supplicant loads and closes the driver
* interface. */
- printk(KERN_INFO "%s WPA\n", value ? "enabling" : "disabling");
+ netdev_info(ieee->dev, "%s WPA\n", value ? "enabling" : "disabling");
ieee->wpa_enabled = value;
memset(ieee->ap_mac_addr, 0, 6);
return 0;
break;
default:
- printk(KERN_INFO "Unknown MLME request: %d\n", command);
+ netdev_info(ieee->dev, "Unknown MLME request: %d\n", command);
ret = -EOPNOTSUPP;
}
break;
default:
- printk(KERN_INFO "Unknown WPA param: %d\n", name);
+ netdev_info(ieee->dev, "Unknown WPA param: %d\n", name);
ret = -EOPNOTSUPP;
}
if (param_len !=
(int) ((char *) param->u.crypt.key - (char *) param) +
param->u.crypt.key_len) {
- printk(KERN_INFO "Len mismatch %d, %d\n", param_len,
- param->u.crypt.key_len);
+ netdev_info(ieee->dev, "Len mismatch %d, %d\n", param_len,
+ param->u.crypt.key_len);
return -EINVAL;
}
if (is_broadcast_ether_addr(param->sta_addr)) {
ops = lib80211_get_crypto_ops(param->u.crypt.alg);
}
if (ops == NULL) {
- printk(KERN_INFO "unknown crypto alg '%s'\n",
- param->u.crypt.alg);
+ netdev_info(ieee->dev, "unknown crypto alg '%s'\n",
+ param->u.crypt.alg);
param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
ret = -EINVAL;
goto done;
lib80211_crypt_delayed_deinit(&ieee->crypt_info, crypt);
- new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
+ new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
if (new_crypt == NULL) {
ret = -ENOMEM;
goto done;
}
- memset(new_crypt, 0, sizeof(struct lib80211_crypt_data));
new_crypt->ops = ops;
if (new_crypt->ops)
new_crypt->priv =
(*crypt)->ops->set_key(param->u.crypt.key,
param->u.crypt.key_len, param->u.crypt.seq,
(*crypt)->priv) < 0) {
- printk(KERN_INFO "key setting failed\n");
+ netdev_info(ieee->dev, "key setting failed\n");
param->u.crypt.err = IEEE_CRYPT_ERR_KEY_SET_FAILED;
ret = -EINVAL;
goto done;
ieee->iw_mode != IW_MODE_INFRA &&
ieee->reset_port &&
ieee->reset_port(ieee->dev)) {
- printk(KERN_INFO "reset_port failed\n");
+ netdev_info(ieee->dev, "reset_port failed\n");
param->u.crypt.err = IEEE_CRYPT_ERR_CARD_CONF_FAILED;
return -EINVAL;
}
break;
default:
- printk(KERN_INFO "Unknown WPA supplicant request: %d\n",
- param->cmd);
+ netdev_info(ieee->dev, "Unknown WPA supplicant request: %d\n",
+ param->cmd);
ret = -EOPNOTSUPP;
break;
}
ETH_ALEN);
else {
- printk(KERN_INFO "%s(): Tell user space disconnected\n",
- __func__);
- memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+ netdev_info(ieee->dev, "%s(): Tell user space disconnected\n",
+ __func__);
+ eth_zero_addr(wrqu.ap_addr.sa_data);
}
wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
}
ieee->state != RTLLIB_LINKED_SCANNING &&
ieee->wap_set == 0)
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
else
memcpy(wrqu->ap_addr.sa_data,
ieee->current_network.bssid, ETH_ALEN);
else
ieee->raw_tx = 0;
- printk(KERN_INFO"raw TX is %s\n",
- ieee->raw_tx ? "enabled" : "disabled");
+ netdev_info(ieee->dev, "raw TX is %s\n",
+ ieee->raw_tx ? "enabled" : "disabled");
if (ieee->iw_mode == IW_MODE_MONITOR) {
if (prev == 0 && ieee->raw_tx) {
if ((!ieee->sta_wake_up) ||
(!ieee->enter_sleep_state) ||
(!ieee->ps_is_queue_empty)) {
- RTLLIB_DEBUG(RTLLIB_DL_ERR, "%s(): PS mode is tried to be use "
- "but driver missed a callback\n\n", __func__);
+ RTLLIB_DEBUG(RTLLIB_DL_ERR,
+ "%s(): PS mode is tried to be use but driver missed a callback\n\n",
+ __func__);
return -1;
}
crypt = ieee->crypt_info.crypt[ieee->crypt_info.tx_keyidx];
if (!(crypt && crypt->ops)) {
- printk(KERN_INFO "=========>%s(), crypt is null\n", __func__);
+ netdev_info(ieee->dev, "=========>%s(), crypt is null\n",
+ __func__);
return -1;
}
/* To encrypt, frame format is:
atomic_dec(&crypt->refcnt);
if (res < 0) {
- printk(KERN_INFO "%s: Encryption failed: len=%d.\n",
- ieee->dev->name, frag->len);
+ netdev_info(ieee->dev, "%s: Encryption failed: len=%d.\n",
+ ieee->dev->name, frag->len);
ieee->ieee_stats.tx_discards++;
return -1;
}
if (pHTInfo->bCurrentAMPDUEnable) {
if (!GetTs(ieee, (struct ts_common_info **)(&pTxTs), hdr->addr1,
skb->priority, TX_DIR, true)) {
- printk(KERN_INFO "%s: can't get TS\n", __func__);
+ netdev_info(ieee->dev, "%s: can't get TS\n", __func__);
return;
}
if (pTxTs->TxAdmittedBARecord.bValid == false) {
}
}
+static u8 rtllib_current_rate(struct rtllib_device *ieee)
+{
+ if (ieee->mode & IEEE_MODE_MASK)
+ return ieee->rate;
+
+ if (ieee->HTCurrentOperaRate)
+ return ieee->HTCurrentOperaRate;
+ else
+ return ieee->rate & 0x7F;
+}
+
int rtllib_xmit_inter(struct sk_buff *skb, struct net_device *dev)
{
struct rtllib_device *ieee = (struct rtllib_device *)
IEEE_SOFTMAC_TX_QUEUE)) ||
((!ieee->softmac_data_hard_start_xmit &&
(ieee->softmac_features & IEEE_SOFTMAC_TX_QUEUE)))) {
- printk(KERN_WARNING "%s: No xmit handler.\n",
- ieee->dev->name);
+ netdev_warn(ieee->dev, "No xmit handler.\n");
goto success;
}
if (likely(ieee->raw_tx == 0)) {
if (unlikely(skb->len < SNAP_SIZE + sizeof(u16))) {
- printk(KERN_WARNING "%s: skb too small (%d).\n",
- ieee->dev->name, skb->len);
+ netdev_warn(ieee->dev, "skb too small (%d).\n",
+ skb->len);
goto success;
}
/* Save source and destination addresses */
if (ieee->iw_mode == IW_MODE_MONITOR) {
txb = rtllib_alloc_txb(1, skb->len, GFP_ATOMIC);
if (unlikely(!txb)) {
- printk(KERN_WARNING "%s: Could not allocate "
- "TXB\n",
- ieee->dev->name);
+ netdev_warn(ieee->dev,
+ "Could not allocate TXB\n");
goto failed;
}
}
}
} else if (ETH_P_ARP == ether_type) {
- printk(KERN_INFO "=================>DHCP "
- "Protocol start tx ARP pkt!!\n");
+ netdev_info(ieee->dev,
+ "=================>DHCP Protocol start tx ARP pkt!!\n");
bdhcp = true;
ieee->LPSDelayCnt =
ieee->current_network.tim.tim_count;
/* in case we are a client verify acm is not set for this ac */
while (unlikely(ieee->wmm_acm & (0x01 << skb->priority))) {
- printk(KERN_INFO "skb->priority = %x\n", skb->priority);
+ netdev_info(ieee->dev, "skb->priority = %x\n",
+ skb->priority);
if (wme_downgrade_ac(skb))
break;
- printk(KERN_INFO "converted skb->priority = %x\n",
+ netdev_info(ieee->dev, "converted skb->priority = %x\n",
skb->priority);
}
qos_ctl |= skb->priority;
txb = rtllib_alloc_txb(nr_frags, frag_size +
ieee->tx_headroom, GFP_ATOMIC);
if (unlikely(!txb)) {
- printk(KERN_WARNING "%s: Could not allocate TXB\n",
- ieee->dev->name);
+ netdev_warn(ieee->dev, "Could not allocate TXB\n");
goto failed;
}
txb->encrypted = encrypt;
}
} else {
if (unlikely(skb->len < sizeof(struct rtllib_hdr_3addr))) {
- printk(KERN_WARNING "%s: skb too small (%d).\n",
- ieee->dev->name, skb->len);
+ netdev_warn(ieee->dev, "skb too small (%d).\n",
+ skb->len);
goto success;
}
txb = rtllib_alloc_txb(1, skb->len, GFP_ATOMIC);
if (!txb) {
- printk(KERN_WARNING "%s: Could not allocate TXB\n",
- ieee->dev->name);
+ netdev_warn(ieee->dev, "Could not allocate TXB\n");
goto failed;
}
if (tcb_desc->bMulticast || tcb_desc->bBroadcast)
tcb_desc->data_rate = ieee->basic_rate;
else
- tcb_desc->data_rate = CURRENT_RATE(ieee->mode,
- ieee->rate, ieee->HTCurrentOperaRate);
+ tcb_desc->data_rate = rtllib_current_rate(ieee);
if (bdhcp) {
if (ieee->pHTInfo->IOTAction &
#include <linux/wireless.h>
#include <linux/kmod.h>
#include <linux/module.h>
-
+#include <linux/etherdevice.h>
#include "rtllib.h"
struct modes_unit {
char *mode_string;
/* First entry *MUST* be the AP MAC address */
iwe.cmd = SIOCGIWAP;
iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
- memcpy(iwe.u.ap_addr.sa_data, network->bssid, ETH_ALEN);
+ ether_addr_copy(iwe.u.ap_addr.sa_data, network->bssid);
start = iwe_stream_add_event_rsl(info, start, stop,
&iwe, IW_EV_ADDR_LEN);
/* Remaining entries will be displayed in the order we provide them */
iwe.cmd = SIOCGIWESSID;
iwe.u.data.flags = 1;
if (network->ssid_len > 0) {
- iwe.u.data.length = min(network->ssid_len, (u8)32);
+ iwe.u.data.length = min_t(u8, network->ssid_len, 32);
start = iwe_stream_add_point_rsl(info, start, stop, &iwe,
network->ssid);
} else if (network->hidden_ssid_len == 0) {
start = iwe_stream_add_point_rsl(info, start, stop,
&iwe, "<hidden>");
} else {
- iwe.u.data.length = min(network->hidden_ssid_len, (u8)32);
+ iwe.u.data.length = min_t(u8, network->hidden_ssid_len, 32);
start = iwe_stream_add_point_rsl(info, start, stop, &iwe,
network->hidden_ssid);
}
ev = rtl819x_translate_scan(ieee, ev, stop, network,
info);
else
- RTLLIB_DEBUG_SCAN("Not showing network '%s ("
- " %pM)' due to age (%lums).\n",
+ RTLLIB_DEBUG_SCAN("Not showing network '%s ( %pM)' due to age (%lums).\n",
escape_essid(network->ssid,
network->ssid_len),
network->bssid,
if (key_provided)
break;
lib80211_crypt_delayed_deinit(&ieee->crypt_info,
- &ieee->crypt_info.crypt[i]);
+ &ieee->crypt_info.crypt[i]);
}
}
kfree(new_crypt);
new_crypt = NULL;
- printk(KERN_WARNING "%s: could not initialize WEP: "
- "load module rtllib_crypt_wep\n",
- dev->name);
+ netdev_warn(dev,
+ "%s: could not initialize WEP: load module rtllib_crypt_wep\n",
+ dev->name);
return -EOPNOTSUPP;
}
*crypt = new_crypt;
NULL, (*crypt)->priv);
if (len == 0) {
/* Set a default key of all 0 */
- printk(KERN_INFO "Setting key %d to all zero.\n",
+ netdev_info(ieee->dev, "Setting key %d to all zero.\n",
key);
- RTLLIB_DEBUG_WX("Setting key %d to all zero.\n",
- key);
memset(sec.keys[key], 0, 13);
(*crypt)->ops->set_key(sec.keys[key], 13, NULL,
(*crypt)->priv);
/* No key data - just set the default TX key index */
if (key_provided) {
- RTLLIB_DEBUG_WX(
- "Setting key %d to default Tx key.\n", key);
+ RTLLIB_DEBUG_WX("Setting key %d to default Tx key.\n",
+ key);
ieee->crypt_info.tx_keyidx = key;
sec.active_key = key;
sec.flags |= SEC_ACTIVE_KEY;
if (ieee->reset_on_keychange &&
ieee->iw_mode != IW_MODE_INFRA &&
ieee->reset_port && ieee->reset_port(dev)) {
- printk(KERN_DEBUG "%s: reset_port failed\n", dev->name);
+ netdev_dbg(dev, "%s: reset_port failed\n", dev->name);
return -EINVAL;
}
return 0;
ret = -EINVAL;
goto done;
}
- printk(KERN_INFO "alg name:%s\n", alg);
+ netdev_info(dev, "alg name:%s\n", alg);
ops = lib80211_get_crypto_ops(alg);
if (ops == NULL) {
ops = lib80211_get_crypto_ops(alg);
}
if (ops == NULL) {
- RTLLIB_DEBUG_WX("%s: unknown crypto alg %d\n",
- dev->name, ext->alg);
- printk(KERN_INFO "========>unknown crypto alg %d\n", ext->alg);
+ netdev_info(dev, "========>unknown crypto alg %d\n", ext->alg);
ret = -EINVAL;
goto done;
}
if (ext->key_len > 0 && (*crypt)->ops->set_key &&
(*crypt)->ops->set_key(ext->key, ext->key_len, ext->rx_seq,
(*crypt)->priv) < 0) {
- RTLLIB_DEBUG_WX("%s: key setting failed\n", dev->name);
- printk(KERN_INFO "key setting failed\n");
+ netdev_info(dev, "key setting failed\n");
ret = -EINVAL;
goto done;
}
case IW_MLME_DISASSOC:
if (deauth)
- printk(KERN_INFO "disauth packet !\n");
+ netdev_info(ieee->dev, "disauth packet !\n");
else
- printk(KERN_INFO "dis associate packet!\n");
+ netdev_info(ieee->dev, "dis associate packet!\n");
ieee->cannot_notify = true;
{
PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(ieee);
- pDot11dInfo->bEnabled = 0;
+ pDot11dInfo->bEnabled = false;
pDot11dInfo->State = DOT11D_STATE_NONE;
pDot11dInfo->CountryIeLen = 0;
#define CIE_WATCHDOG_TH 1
#define GET_CIE_WATCHDOG(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->CountryIeWatchdog)
-#define RESET_CIE_WATCHDOG(__pIeeeDev) GET_CIE_WATCHDOG(__pIeeeDev) = 0
+#define RESET_CIE_WATCHDOG(__pIeeeDev) (GET_CIE_WATCHDOG(__pIeeeDev) = 0)
#define UPDATE_CIE_WATCHDOG(__pIeeeDev) (++GET_CIE_WATCHDOG(__pIeeeDev))
#define IS_DOT11D_STATE_DONE(__pIeeeDev) (GET_DOT11D_INFO(__pIeeeDev)->State == DOT11D_STATE_DONE)
#define IEEE80211_DEBUG_RX(f, a...) IEEE80211_DEBUG(IEEE80211_DL_RX, f, ## a)
#define IEEE80211_DEBUG_QOS(f, a...) IEEE80211_DEBUG(IEEE80211_DL_QOS, f, ## a)
-#ifdef CONFIG_IEEE80211_DEBUG
-/* Added by Annie, 2005-11-22. */
-#define MAX_STR_LEN 64
-/* I want to see ASCII 33 to 126 only. Otherwise, I print '?'. Annie, 2005-11-22.*/
-#define PRINTABLE(_ch) (_ch>'!' && _ch<'~')
-#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) \
- if((_Comp) & level) \
- { \
- int __i; \
- u8 buffer[MAX_STR_LEN]; \
- int length = (_Len<MAX_STR_LEN)? _Len : (MAX_STR_LEN-1) ; \
- memset(buffer, 0, MAX_STR_LEN); \
- memcpy(buffer, (u8 *)_Ptr, length ); \
- for( __i=0; __i<MAX_STR_LEN; __i++ ) \
- { \
- if( !PRINTABLE(buffer[__i]) ) buffer[__i] = '?'; \
- } \
- buffer[length] = '\0'; \
- printk("Rtl819x: "); \
- printk(_TitleString); \
- printk(": %d, <%s>\n", _Len, buffer); \
- }
-#else
-#define IEEE80211_PRINT_STR(_Comp, _TitleString, _Ptr, _Len) do {} while (0)
-#endif
-
-#include <linux/netdevice.h>
#include <linux/if_arp.h> /* ARPHRD_ETHER */
#ifndef WIRELESS_SPY
u8 ctrl; /* always 0x03 */
u8 oui[P80211_OUI_LEN]; /* organizational universal id */
-} __attribute__ ((packed));
+} __packed;
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
u8 keys[WEP_KEYS][SCM_KEY_LEN];
u8 level;
u16 flags;
-} __attribute__ ((packed));
+} __packed;
/*
__le16 frame_ctl;
__le16 duration_id;
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_1addr {
__le16 frame_ctl;
__le16 duration_id;
u8 addr1[ETH_ALEN];
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_2addr {
__le16 frame_ctl;
u8 addr1[ETH_ALEN];
u8 addr2[ETH_ALEN];
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_3addr {
__le16 frame_ctl;
u8 addr3[ETH_ALEN];
__le16 seq_ctl;
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_4addr {
__le16 frame_ctl;
__le16 seq_ctl;
u8 addr4[ETH_ALEN];
u8 payload[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_3addrqos {
__le16 frame_ctl;
__le16 seq_ctl;
u8 payload[0];
__le16 qos_ctl;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_hdr_4addrqos {
__le16 frame_ctl;
u8 addr4[ETH_ALEN];
u8 payload[0];
__le16 qos_ctl;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_info_element {
u8 id;
u8 len;
u8 data[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_authentication {
struct ieee80211_hdr_3addr header;
__le16 status;
/*challenge*/
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_disassoc {
struct ieee80211_hdr_3addr header;
__le16 reason;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_probe_request {
struct ieee80211_hdr_3addr header;
/* SSID, supported rates */
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_probe_response {
struct ieee80211_hdr_3addr header;
/* SSID, supported rates, FH params, DS params,
* CF params, IBSS params, TIM (if beacon), RSN */
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
/* Alias beacon for probe_response */
#define ieee80211_beacon ieee80211_probe_response
__le16 listen_interval;
/* SSID, supported rates, RSN */
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_reassoc_request_frame {
struct ieee80211_hdr_3addr header;
u8 current_ap[ETH_ALEN];
/* SSID, supported rates, RSN */
struct ieee80211_info_element info_element[0];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_assoc_response_frame {
struct ieee80211_hdr_3addr header;
__le16 status;
__le16 aid;
struct ieee80211_info_element info_element[0]; /* supported rates */
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_txb {
u8 nr_frags;
struct ieee80211_drv_agg_txb {
u8 nr_drv_agg_frames;
struct sk_buff *tx_agg_frames[MAX_TX_AGG_COUNT];
-}__attribute__((packed));
+} __packed;
#define MAX_SUBFRAME_COUNT 64
struct ieee80211_rxb {
struct sk_buff *subframes[MAX_SUBFRAME_COUNT];
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
-}__attribute__((packed));
+} __packed;
typedef union _frameqos {
u16 shortdata;
u8 qui_subtype;
u8 version;
u8 ac_info;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_qos_ac_parameter {
u8 aci_aifsn;
u8 ecw_min_max;
__le16 tx_op_limit;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_qos_parameter_info {
struct ieee80211_qos_information_element info_element;
u8 reserved;
struct ieee80211_qos_ac_parameter ac_params_record[QOS_QUEUE_NUM];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_qos_parameters {
__le16 cw_min[QOS_QUEUE_NUM];
u8 aifs[QOS_QUEUE_NUM];
u8 flag[QOS_QUEUE_NUM];
__le16 tx_op_limit[QOS_QUEUE_NUM];
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_qos_data {
struct ieee80211_qos_parameters parameters;
struct ieee80211_tim_parameters {
u8 tim_count;
u8 tim_period;
-} __attribute__ ((packed));
+} __packed;
//#else
struct ieee80211_wmm_ac_param {
u8 ac_dir_tid;
u8 ac_up_psb;
u8 reserved;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_wmm_tspec_elem {
struct ieee80211_wmm_ts_info ts_info;
u32 min_phy_rate;
u16 surp_band_allow;
u16 medium_time;
-}__attribute__((packed));
+} __packed;
enum eap_type {
EAP_PACKET = 0,
EAPOL_START,
u8 version;
u8 type;
u16 length;
-} __attribute__ ((packed));
+} __packed;
struct ieee80211_softmac_stats{
unsigned int rx_ass_ok;
struct ieee80211_info_element_hdr {
u8 id;
u8 len;
-} __attribute__ ((packed));
+} __packed;
/*
* These are the data types that can make up management packets
u16 listen_interval;
struct {
u16 association_id:14, reserved:2;
- } __attribute__ ((packed));
+ } __packed;
u32 time_stamp[2];
u16 reason;
u16 status;
u8 ether_dhost[ETHER_ADDR_LEN];
u8 ether_shost[ETHER_ADDR_LEN];
u16 ether_type;
-} __attribute__((packed));
+} __packed;
#ifndef ETHERTYPE_PAE
#define ETHERTYPE_PAE 0x888e /* EAPOL PAE/802.1x */
#define ETHERTYPE_IP 0x0800 /* IP protocol */
#endif
-typedef struct _bss_ht{
-
- bool support_ht;
-
- // HT related elements
- u8 ht_cap_buf[32];
- u16 ht_cap_len;
- u8 ht_info_buf[32];
- u16 ht_info_len;
-
- HT_SPEC_VER ht_spec_ver;
- //HT_CAPABILITY_ELE bdHTCapEle;
- //HT_INFORMATION_ELE bdHTInfoEle;
-
- bool aggregation;
- bool long_slot_time;
-}bss_ht, *pbss_ht;
-
typedef enum _erp_t{
ERP_NonERPpresent = 0x01,
ERP_UseProtection = 0x02,
*
*/
-//#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
-#include <asm/string.h>
-#include <asm/errno.h>
+#include <linux/string.h>
+#include <linux/errno.h>
#include "ieee80211.h"
spin_lock_irqsave(&ieee->lock, flags);
ieee80211_crypt_deinit_entries(ieee, 0);
if (!list_empty(&ieee->crypt_deinit_list)) {
- printk(KERN_DEBUG "%s: entries remaining in delayed crypt "
- "deletion list\n", ieee->dev->name);
+ netdev_dbg(ieee->dev, "%s: entries remaining in delayed crypt deletion list\n",
+ ieee->dev->name);
ieee->crypt_deinit_timer.expires = jiffies + HZ;
add_timer(&ieee->crypt_deinit_timer);
}
list_add(&alg->list, &hcrypt->algs);
spin_unlock_irqrestore(&hcrypt->lock, flags);
- printk(KERN_DEBUG "ieee80211_crypt: registered algorithm '%s'\n",
+ pr_debug("ieee80211_crypt: registered algorithm '%s'\n",
ops->name);
return 0;
spin_unlock_irqrestore(&hcrypt->lock, flags);
if (del_alg) {
- printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
- "'%s'\n", ops->name);
+ pr_debug("ieee80211_crypt: unregistered algorithm '%s'\n",
+ ops->name);
kfree(del_alg);
}
struct ieee80211_crypto_alg *alg =
(struct ieee80211_crypto_alg *) ptr;
list_del(ptr);
- printk(KERN_DEBUG "ieee80211_crypt: unregistered algorithm "
- "'%s' (deinit)\n", alg->ops->name);
+ pr_debug("ieee80211_crypt: unregistered algorithm '%s' (deinit)\n",
+ alg->ops->name);
kfree(alg);
}
* more details.
*/
-//#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/netdevice.h>
#include <linux/if_ether.h>
#include <linux/if_arp.h>
-#include <asm/string.h>
+#include <linux/string.h>
#include <linux/wireless.h>
#include "ieee80211.h"
qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
(WLAN_FC_GET_STYPE(fc) & 0x08));
*/
- // fixed by David :2006.9.6
- qc_included = ((WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
- (WLAN_FC_GET_STYPE(fc) & 0x80));
+ /* fixed by David :2006.9.6 */
+ qc_included = (WLAN_FC_GET_TYPE(fc) == IEEE80211_FTYPE_DATA) &&
+ (WLAN_FC_GET_STYPE(fc) & 0x80);
aad_len = 22;
if (a4_included)
aad_len += 6;
pos = skb_push(skb, CCMP_HDR_LEN);
memmove(pos, pos + CCMP_HDR_LEN, hdr_len);
pos += hdr_len;
-// mic = skb_put(skb, CCMP_MIC_LEN);
+ /* mic = skb_put(skb, CCMP_MIC_LEN); */
i = CCMP_PN_LEN - 1;
while (i >= 0) {
u8 *e = key->tx_e;
u8 *s0 = key->tx_s0;
- //mic is moved to here by john
+ /* mic is moved to here by john */
mic = skb_put(skb, CCMP_MIC_LEN);
ccmp_init_blocks(key->tfm, hdr, key->tx_pn, data_len, b0, b, s0);
void ieee80211_ccmp_null(void)
{
-// printk("============>%s()\n", __func__);
+ /* printk("============>%s()\n", __func__); */
return;
}
* more details.
*/
-//#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/netdevice.h>
#include <linux/if_ether.h>
#include <linux/if_arp.h>
-#include <asm/string.h>
+#include <linux/string.h>
#include "ieee80211.h"
* more details.
*/
-//#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/skbuff.h>
-#include <asm/string.h>
+#include <linux/string.h>
#include "ieee80211.h"
priv->tx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->tx_tfm)) {
- printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
+ pr_debug("ieee80211_crypt_wep: could not allocate "
"crypto API arc4\n");
priv->tx_tfm = NULL;
goto fail;
}
priv->rx_tfm = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
if (IS_ERR(priv->rx_tfm)) {
- printk(KERN_DEBUG "ieee80211_crypt_wep: could not allocate "
+ pr_debug("ieee80211_crypt_wep: could not allocate "
"crypto API arc4\n");
priv->rx_tfm = NULL;
goto fail;
u32 crc;
u8 *icv;
struct scatterlist sg;
+
if (skb_headroom(skb) < 4 || skb_tailroom(skb) < 4 ||
skb->len < hdr_len)
return -1;
* can be used to speedup attacks, so avoid using them. */
if ((wep->iv & 0xff00) == 0xff00) {
u8 B = (wep->iv >> 16) & 0xff;
+
if (B >= 3 && B < klen)
wep->iv += 0x0100;
}
u32 crc;
u8 icv[4];
struct scatterlist sg;
+
if (skb->len < hdr_len + 8)
return -1;
static char *prism2_wep_print_stats(char *p, void *priv)
{
struct prism2_wep_data *wep = priv;
+
p += sprintf(p, "key[%d] alg=WEP len=%d\n",
wep->key_idx, wep->key_len);
return p;
*******************************************************************************/
#include <linux/compiler.h>
-//#include <linux/config.h>
+/* #include <linux/config.h> */
#include <linux/errno.h>
#include <linux/if_arp.h>
#include <linux/in6.h>
ieee->ieee802_1x = 1; /* Default to supporting 802.1x */
INIT_LIST_HEAD(&ieee->crypt_deinit_list);
- init_timer(&ieee->crypt_deinit_timer);
- ieee->crypt_deinit_timer.data = (unsigned long)ieee;
- ieee->crypt_deinit_timer.function = ieee80211_crypt_deinit_handler;
+ setup_timer(&ieee->crypt_deinit_timer,
+ ieee80211_crypt_deinit_handler, (unsigned long)ieee);
spin_lock_init(&ieee->lock);
spin_lock_init(&ieee->wpax_suitlist_lock);
spin_lock_init(&ieee->bw_spinlock);
spin_lock_init(&ieee->reorder_spinlock);
- //added by WB
+ /* added by WB */
atomic_set(&(ieee->atm_chnlop), 0);
atomic_set(&(ieee->atm_swbw), 0);
ieee->ieee802_1x = 1;
ieee->raw_tx = 0;
//ieee->hwsec_support = 1; //defalt support hw security. //use module_param instead.
- ieee->hwsec_active = 0; //disable hwsec, switch it on when necessary.
+ ieee->hwsec_active = 0; /* disable hwsec, switch it on when necessary. */
ieee80211_softmac_init(ieee);
goto failed;
}
HTUpdateDefaultSetting(ieee);
- HTInitializeHTInfo(ieee); //may move to other place.
+ HTInitializeHTInfo(ieee); /* may move to other place. */
TSInitialize(ieee);
for (i = 0; i < IEEE_IBSS_MAC_HASH_SIZE; i++)
ieee->last_packet_time[i] = 0;
}
-//These function were added to load crypte module autoly
+/* These function were added to load crypte module autoly */
ieee80211_tkip_null();
ieee80211_wep_null();
ieee80211_ccmp_null();
{
struct ieee80211_device *ieee = netdev_priv(dev);
int i;
- //struct list_head *p, *q;
+ /* struct list_head *p, *q; */
// del_timer_sync(&ieee->SwBwTimer);
kfree(ieee->pHTInfo);
ieee->pHTInfo = NULL;
// IEEE80211_DL_REORDER|
// IEEE80211_DL_TRACE |
//IEEE80211_DL_DATA |
- IEEE80211_DL_ERR //awayls open this flags to show error out
+ IEEE80211_DL_ERR /* awayls open this flags to show error out */
;
static struct proc_dir_entry *ieee80211_proc;
static int show_debug_level(struct seq_file *m, void *v)
{
- return seq_printf(m, "0x%08X\n", ieee80211_debug_level);
+ seq_printf(m, "0x%08X\n", ieee80211_debug_level);
+
+ return 0;
}
static ssize_t write_debug_level(struct file *file, const char __user *buffer,
" proc directory\n");
return -EIO;
}
- e = proc_create("debug_level", S_IRUGO | S_IWUSR,
+ e = proc_create("debug_level", S_IRUGO | S_IWUSR,
ieee80211_proc, &fops);
if (!e) {
remove_proc_entry(DRV_NAME, init_net.proc_net);
}
}
-#include <linux/moduleparam.h>
module_param(debug, int, 0444);
MODULE_PARM_DESC(debug, "debug output mask");
#endif
#include <linux/compiler.h>
-//#include <linux/config.h>
#include <linux/errno.h>
#include <linux/if_arp.h>
#include <linux/in6.h>
#include <linux/types.h>
#include <linux/wireless.h>
#include <linux/etherdevice.h>
-#include <asm/uaccess.h>
+#include <linux/uaccess.h>
#include <linux/ctype.h>
#include "ieee80211.h"
skb_pull(skb, ieee80211_get_hdrlen(fc));
skb->pkt_type = PACKET_OTHERHOST;
- skb->protocol = __constant_htons(ETH_P_80211_RAW);
+ skb->protocol = htons(ETH_P_80211_RAW);
memset(skb->cb, 0, sizeof(skb->cb));
netif_rx(skb);
}
rx_stats->len = skb->len;
ieee80211_rx_mgt(ieee,(struct ieee80211_hdr_4addr *)skb->data,rx_stats);
- //if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN)))
- if ((memcmp(hdr->addr1, ieee->dev->dev_addr, ETH_ALEN)))//use ADDR1 to perform address matching for Management frames
+ /* if ((ieee->state == IEEE80211_LINKED) && (memcmp(hdr->addr3, ieee->current_network.bssid, ETH_ALEN))) */
+ if ((memcmp(hdr->addr1, ieee->dev->dev_addr, ETH_ALEN)))/* use ADDR1 to perform address matching for Management frames */
{
dev_kfree_skb_any(skb);
return 0;
if(net_ratelimit())
printk("find HTCControl\n");
hdrlen += 4;
- rx_stats->bContainHTC = 1;
+ rx_stats->bContainHTC = true;
}
//IEEE80211_DEBUG_DATA(IEEE80211_DL_DATA, skb->data, skb->len);
crypt = ieee->crypt[ieee->tx_keyidx];
else crypt = NULL;
- encrypt = (crypt && crypt->ops);
+ encrypt = crypt && crypt->ops;
if (encrypt)
assoc->capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
else if(ieee->is_silent_reset == 1)
{
printk("==================>silent reset associate\n");
- ieee->is_silent_reset = 0;
+ ieee->is_silent_reset = false;
}
if (ieee->data_hard_resume)
return;
}
+
+void ieee80211_check_auth_response(struct ieee80211_device *ieee,
+ struct sk_buff *skb)
+{
+ /* default support N mode, disable halfNmode */
+ bool bSupportNmode = true, bHalfSupportNmode = false;
+ u16 errcode;
+ u8 *challenge;
+ int chlen = 0;
+ u32 iotAction;
+
+ errcode = auth_parse(skb, &challenge, &chlen);
+ if (!errcode) {
+ if (ieee->open_wep || !challenge) {
+ ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
+ ieee->softmac_stats.rx_auth_rs_ok++;
+ iotAction = ieee->pHTInfo->IOTAction;
+ if (!(iotAction & HT_IOT_ACT_PURE_N_MODE)) {
+ if (!ieee->GetNmodeSupportBySecCfg(ieee->dev)) {
+ /* WEP or TKIP encryption */
+ if (IsHTHalfNmodeAPs(ieee)) {
+ bSupportNmode = true;
+ bHalfSupportNmode = true;
+ } else {
+ bSupportNmode = false;
+ bHalfSupportNmode = false;
+ }
+ netdev_dbg(ieee->dev, "SEC(%d, %d)\n",
+ bSupportNmode,
+ bHalfSupportNmode);
+ }
+ }
+ /* Dummy wirless mode setting- avoid encryption issue */
+ if (bSupportNmode) {
+ /* N mode setting */
+ ieee->SetWirelessMode(ieee->dev,
+ ieee->current_network.mode);
+ } else {
+ /* b/g mode setting - TODO */
+ ieee->SetWirelessMode(ieee->dev, IEEE_G);
+ }
+
+ if (ieee->current_network.mode == IEEE_N_24G &&
+ bHalfSupportNmode == true) {
+ netdev_dbg(ieee->dev, "enter half N mode\n");
+ ieee->bHalfWirelessN24GMode = true;
+ } else
+ ieee->bHalfWirelessN24GMode = false;
+
+ ieee80211_associate_step2(ieee);
+ } else {
+ ieee80211_auth_challenge(ieee, challenge, chlen);
+ }
+ } else {
+ ieee->softmac_stats.rx_auth_rs_err++;
+ IEEE80211_DEBUG_MGMT("Auth response status code 0x%x", errcode);
+ ieee80211_associate_abort(ieee);
+ }
+}
+
inline int
ieee80211_rx_frame_softmac(struct ieee80211_device *ieee, struct sk_buff *skb,
struct ieee80211_rx_stats *rx_stats, u16 type,
{
struct ieee80211_hdr_3addr *header = (struct ieee80211_hdr_3addr *) skb->data;
u16 errcode;
- u8 *challenge;
- int chlen=0;
int aid;
struct ieee80211_assoc_response_frame *assoc_resp;
// struct ieee80211_info_element *info_element;
- bool bSupportNmode = true, bHalfSupportNmode = false; //default support N mode, disable halfNmode
if(!ieee->proto_started)
return 0;
case IEEE80211_STYPE_AUTH:
if (ieee->softmac_features & IEEE_SOFTMAC_ASSOCIATE){
- if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING &&
- ieee->iw_mode == IW_MODE_INFRA){
+ if (ieee->state == IEEE80211_ASSOCIATING_AUTHENTICATING
+ && ieee->iw_mode == IW_MODE_INFRA) {
- IEEE80211_DEBUG_MGMT("Received authentication response");
-
- errcode = auth_parse(skb, &challenge, &chlen);
- if (!errcode) {
- if(ieee->open_wep || !challenge){
- ieee->state = IEEE80211_ASSOCIATING_AUTHENTICATED;
- ieee->softmac_stats.rx_auth_rs_ok++;
- if(!(ieee->pHTInfo->IOTAction&HT_IOT_ACT_PURE_N_MODE))
- {
- if (!ieee->GetNmodeSupportBySecCfg(ieee->dev))
- {
- // WEP or TKIP encryption
- if(IsHTHalfNmodeAPs(ieee))
- {
- bSupportNmode = true;
- bHalfSupportNmode = true;
- }
- else
- {
- bSupportNmode = false;
- bHalfSupportNmode = false;
- }
- printk("==========>to link with AP using SEC(%d, %d)", bSupportNmode, bHalfSupportNmode);
- }
- }
- /* Dummy wirless mode setting to avoid encryption issue */
- if(bSupportNmode) {
- //N mode setting
- ieee->SetWirelessMode(ieee->dev, \
- ieee->current_network.mode);
- }else{
- //b/g mode setting
- /*TODO*/
- ieee->SetWirelessMode(ieee->dev, IEEE_G);
- }
-
- if (ieee->current_network.mode == IEEE_N_24G && bHalfSupportNmode == true)
- {
- printk("===============>entern half N mode\n");
- ieee->bHalfWirelessN24GMode = true;
- }
- else
- ieee->bHalfWirelessN24GMode = false;
-
- ieee80211_associate_step2(ieee);
- }else{
- ieee80211_auth_challenge(ieee, challenge, chlen);
- }
- }else{
- ieee->softmac_stats.rx_auth_rs_err++;
- IEEE80211_DEBUG_MGMT("Authentication response status code 0x%x",errcode);
- ieee80211_associate_abort(ieee);
- }
-
- }else if (ieee->iw_mode == IW_MODE_MASTER){
- ieee80211_rx_auth_rq(ieee, skb);
- }
+ IEEE80211_DEBUG_MGMT("Received auth response");
+ ieee80211_check_auth_response(ieee, skb);
+ } else if (ieee->iw_mode == IW_MODE_MASTER) {
+ ieee80211_rx_auth_rq(ieee, skb);
}
+ }
break;
case IEEE80211_STYPE_PROBE_REQ:
break;
default:
return -1;
- break;
}
//dev_kfree_skb_any(skb);
return 0;
}
-/* following are for a simpler TX queue management.
- * Instead of using netif_[stop/wake]_queue the driver
- * will uses these two function (plus a reset one), that
- * will internally uses the kernel netif_* and takes
- * care of the ieee802.11 fragmentation.
- * So the driver receives a fragment per time and might
- * call the stop function when it want without take care
- * to have enought room to TX an entire packet.
- * This might be useful if each fragment need it's own
- * descriptor, thus just keep a total free memory > than
- * the max fragmentation treshold is not enought.. If the
- * ieee802.11 stack passed a TXB struct then you needed
+/* The following are for a simpler TX queue management.
+ * Instead of using netif_[stop/wake]_queue, the driver
+ * will use these two functions (plus a reset one) that
+ * will internally call the kernel netif_* and take care
+ * of the ieee802.11 fragmentation.
+ * So, the driver receives a fragment at a time and might
+ * call the stop function when it wants, without taking
+ * care to have enough room to TX an entire packet.
+ * This might be useful if each fragment needs its own
+ * descriptor. Thus, just keeping a total free memory > than
+ * the max fragmentation threshold is not enough. If the
+ * ieee802.11 stack passed a TXB struct, then you would need
* to keep N free descriptors where
- * N = MAX_PACKET_SIZE / MIN_FRAG_TRESHOLD
+ * N = MAX_PACKET_SIZE / MIN_FRAG_THRESHOLD.
* In this way you need just one and the 802.11 stack
* will take care of buffering fragments and pass them to
* to the driver later, when it wakes the queue.
ieee->sta_edca_param[2] = 0x005E4342;
ieee->sta_edca_param[3] = 0x002F3262;
ieee->aggregation = true;
- ieee->enable_rx_imm_BA = 1;
+ ieee->enable_rx_imm_BA = true;
ieee->tx_pending.txb = NULL;
- init_timer(&ieee->associate_timer);
- ieee->associate_timer.data = (unsigned long)ieee;
- ieee->associate_timer.function = ieee80211_associate_abort_cb;
+ setup_timer(&ieee->associate_timer, ieee80211_associate_abort_cb,
+ (unsigned long)ieee);
- init_timer(&ieee->beacon_timer);
- ieee->beacon_timer.data = (unsigned long) ieee;
- ieee->beacon_timer.function = ieee80211_send_beacon_cb;
+ setup_timer(&ieee->beacon_timer, ieee80211_send_beacon_cb,
+ (unsigned long)ieee);
ieee->wq = create_workqueue(DRV_NAME);
ieee80211_crypt_delayed_deinit(ieee, crypt);
- new_crypt = kmalloc(sizeof(*new_crypt), GFP_KERNEL);
+ new_crypt = kzalloc(sizeof(*new_crypt), GFP_KERNEL);
if (new_crypt == NULL) {
ret = -ENOMEM;
goto done;
}
- memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
new_crypt->ops = ops;
if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
new_crypt->priv =
if (ieee->state == IEEE80211_LINKED)
memcpy(wrqu.ap_addr.sa_data, ieee->current_network.bssid, ETH_ALEN);
else
- memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu.ap_addr.sa_data);
wireless_send_event(ieee->dev, SIOCGIWAP, &wrqu, NULL);
}
EXPORT_SYMBOL(notify_wx_assoc_event);
ieee->state != IEEE80211_LINKED_SCANNING &&
ieee->wap_set == 0)
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
else
memcpy(wrqu->ap_addr.sa_data,
ieee->current_network.bssid, ETH_ALEN);
******************************************************************************/
#include <linux/compiler.h>
-//#include <linux/config.h>
#include <linux/errno.h>
#include <linux/if_arp.h>
#include <linux/in6.h>
#ifdef TO_DO_LIST
if(!IsDataFrame(pFrame))
{
- pTcb->bTxDisableRateFallBack = TRUE;
- pTcb->bTxUseDriverAssingedRate = TRUE;
+ pTcb->bTxDisableRateFallBack = true;
+ pTcb->bTxUseDriverAssingedRate = true;
pTcb->RATRIndex = 7;
return;
}
if(pMgntInfo->ForcedDataRate!= 0)
{
- pTcb->bTxDisableRateFallBack = TRUE;
- pTcb->bTxUseDriverAssingedRate = TRUE;
+ pTcb->bTxDisableRateFallBack = true;
+ pTcb->bTxUseDriverAssingedRate = true;
return;
}
#endif
static bool HTIOTActIsDisableMCSTwoSpatialStream(struct ieee80211_device *ieee,
u8 *PeerMacAddr)
{
- bool retValue = false;
-
#ifdef TODO
// Apply for 819u only
#endif
- return retValue;
+ return false;
}
/********************************************************************************************************************
* *****************************************************************************************************************/
static u8 HTIOTActIsDisableEDCATurbo(struct ieee80211_device *ieee,
u8 *PeerMacAddr)
-{
- u8 retValue = false; // default enable EDCA Turbo mode.
- // Set specific EDCA parameter for different AP in DM handler.
-
- return retValue;
+{ /* default enable EDCA Turbo mode. */
+ return false;
}
/********************************************************************************************************************
if(HTMcsToDataRate(ieee, (8*i+j)) > HTMcsToDataRate(ieee, mcsRate))
mcsRate = (8*i+j);
}
- bitMap = bitMap>>1;
+ bitMap >>= 1;
}
}
}
#ifndef _TSTYPE_H_
#define _TSTYPE_H_
#include "rtl819x_Qos.h"
-#define TS_SETUP_TIMEOUT 60 // In millisecond
+#define TS_SETUP_TIMEOUT 60 /* In millisecond */
#define TS_INACT_TIMEOUT 60
#define TS_ADDBA_DELAY 60
#define TOTAL_TS_NUM 16
#define TCLAS_NUM 4
-// This define the Tx/Rx directions
+/* This define the Tx/Rx directions */
typedef enum _TR_SELECT {
TX_DIR = 0,
RX_DIR = 1,
typedef struct _TX_TS_RECORD{
TS_COMMON_INFO TsCommonInfo;
u16 TxCurSeq;
- BA_RECORD TxPendingBARecord; // For BA Originator
- BA_RECORD TxAdmittedBARecord; // For BA Originator
-// QOS_DL_RECORD DLRecord;
+ BA_RECORD TxPendingBARecord; /* For BA Originator */
+ BA_RECORD TxAdmittedBARecord; /* For BA Originator */
+/* QOS_DL_RECORD DLRecord; */
u8 bAddBaReqInProgress;
u8 bAddBaReqDelayed;
u8 bUsingBa;
u16 RxTimeoutIndicateSeq;
struct list_head RxPendingPktList;
struct timer_list RxPktPendingTimer;
- BA_RECORD RxAdmittedBARecord; // For BA Recipient
+ BA_RECORD RxAdmittedBARecord; /* For BA Recipient */
u16 RxLastSeqNum;
u8 RxLastFragNum;
u8 num;
-// QOS_DL_RECORD DLRecord;
+/* QOS_DL_RECORD DLRecord; */
} RX_TS_RECORD, *PRX_TS_RECORD;
pTxTS->num = count;
// The timers for the operation of Traffic Stream and Block Ack.
// DLS related timer will be add here in the future!!
- init_timer(&pTxTS->TsCommonInfo.SetupTimer);
- pTxTS->TsCommonInfo.SetupTimer.data = (unsigned long)pTxTS;
- pTxTS->TsCommonInfo.SetupTimer.function = TsSetupTimeOut;
-
- init_timer(&pTxTS->TsCommonInfo.InactTimer);
- pTxTS->TsCommonInfo.InactTimer.data = (unsigned long)pTxTS;
- pTxTS->TsCommonInfo.InactTimer.function = TsInactTimeout;
-
- init_timer(&pTxTS->TsAddBaTimer);
- pTxTS->TsAddBaTimer.data = (unsigned long)pTxTS;
- pTxTS->TsAddBaTimer.function = TsAddBaProcess;
-
- init_timer(&pTxTS->TxPendingBARecord.Timer);
- pTxTS->TxPendingBARecord.Timer.data = (unsigned long)pTxTS;
- pTxTS->TxPendingBARecord.Timer.function = BaSetupTimeOut;
-
- init_timer(&pTxTS->TxAdmittedBARecord.Timer);
- pTxTS->TxAdmittedBARecord.Timer.data = (unsigned long)pTxTS;
- pTxTS->TxAdmittedBARecord.Timer.function = TxBaInactTimeout;
-
+ setup_timer(&pTxTS->TsCommonInfo.SetupTimer, TsSetupTimeOut,
+ (unsigned long)pTxTS);
+ setup_timer(&pTxTS->TsCommonInfo.InactTimer, TsInactTimeout,
+ (unsigned long)pTxTS);
+ setup_timer(&pTxTS->TsAddBaTimer, TsAddBaProcess,
+ (unsigned long)pTxTS);
+ setup_timer(&pTxTS->TxPendingBARecord.Timer, BaSetupTimeOut,
+ (unsigned long)pTxTS);
+ setup_timer(&pTxTS->TxAdmittedBARecord.Timer,
+ TxBaInactTimeout, (unsigned long)pTxTS);
ResetTxTsEntry(pTxTS);
list_add_tail(&pTxTS->TsCommonInfo.List, &ieee->Tx_TS_Unused_List);
pTxTS++;
{
pRxTS->num = count;
INIT_LIST_HEAD(&pRxTS->RxPendingPktList);
-
- init_timer(&pRxTS->TsCommonInfo.SetupTimer);
- pRxTS->TsCommonInfo.SetupTimer.data = (unsigned long)pRxTS;
- pRxTS->TsCommonInfo.SetupTimer.function = TsSetupTimeOut;
-
- init_timer(&pRxTS->TsCommonInfo.InactTimer);
- pRxTS->TsCommonInfo.InactTimer.data = (unsigned long)pRxTS;
- pRxTS->TsCommonInfo.InactTimer.function = TsInactTimeout;
-
- init_timer(&pRxTS->RxAdmittedBARecord.Timer);
- pRxTS->RxAdmittedBARecord.Timer.data = (unsigned long)pRxTS;
- pRxTS->RxAdmittedBARecord.Timer.function = RxBaInactTimeout;
-
- init_timer(&pRxTS->RxPktPendingTimer);
- pRxTS->RxPktPendingTimer.data = (unsigned long)pRxTS;
- pRxTS->RxPktPendingTimer.function = RxPktPendingTimeout;
-
+ setup_timer(&pRxTS->TsCommonInfo.SetupTimer, TsSetupTimeOut,
+ (unsigned long)pRxTS);
+ setup_timer(&pRxTS->TsCommonInfo.InactTimer, TsInactTimeout,
+ (unsigned long)pRxTS);
+ setup_timer(&pRxTS->RxAdmittedBARecord.Timer,
+ RxBaInactTimeout, (unsigned long)pRxTS);
+ setup_timer(&pRxTS->RxPktPendingTimer, RxPktPendingTimeout,
+ (unsigned long)pRxTS);
ResetRxTsEntry(pRxTS);
list_add_tail(&pRxTS->TsCommonInfo.List, &ieee->Rx_TS_Unused_List);
pRxTS++;
//for(dir = DIR_UP; dir <= DIR_BI_DIR; dir++)
for(dir = 0; dir <= DIR_BI_DIR; dir++)
{
- if(search_dir[dir] ==false )
+ if (!search_dir[dir])
continue;
list_for_each_entry(pRet, psearch_list, List){
// IEEE80211_DEBUG(IEEE80211_DL_TS, "ADD:%pM, TID:%d, dir:%d\n", pRet->Addr, pRet->TSpec.f.TSInfo.field.ucTSID, pRet->TSpec.f.TSInfo.field.ucDirection);
}
else
{
- if(bAddNewTs == false)
- {
+ if (!bAddNewTs) {
IEEE80211_DEBUG(IEEE80211_DL_TS, "add new TS failed(tid:%d)\n", UP);
return false;
}
struct r8192_priv *priv = ieee80211_priv(dev);
TxAGC = powerlevel;
- if (priv->bDynamicTxLowPower == TRUE) {
+ if (priv->bDynamicTxLowPower) {
if (priv->CustomerID == RT_CID_819x_Netcore)
TxAGC = 0x22;
else
priv->Pwr_Track = writeVal_tmp;
}
- if (priv->bDynamicTxHighPower == TRUE) {
+ if (priv->bDynamicTxHighPower) {
/*Add by Jacken 2008/03/06
*Emily, 20080613. Set low tx power for both MCS and legacy OFDM
*/
#ifndef RTL8225H
#define RTL8225H
-#define RTL819X_TOTAL_RF_PATH 2 //for 8192U
-extern void PHY_SetRF8256Bandwidth(struct net_device *dev , HT_CHANNEL_WIDTH Bandwidth);
+#define RTL819X_TOTAL_RF_PATH 2 /* for 8192U */
+extern void PHY_SetRF8256Bandwidth(struct net_device *dev,
+ HT_CHANNEL_WIDTH Bandwidth);
extern void PHY_RF8256_Config(struct net_device *dev);
extern void phy_RF8256_Config_ParaFile(struct net_device *dev);
extern void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel);
#define RTL8192U
#define RTL819xU_MODULE_NAME "rtl819xU"
/* HW security */
-#define FALSE 0
-#define TRUE 1
#define MAX_KEY_LEN 61
#define KEY_BUF_SIZE 5
netdev_warn(dev, "skb_queue not empty\n");
skb_queue_purge(&priv->skb_queue);
- return;
}
inline u16 ieeerate2rtlrate(int rate)
ret = rtl8192_tx(dev, skb);
spin_unlock_irqrestore(&priv->tx_lock, flags);
-
- return;
}
/* This is a rough attempt to TX a frame
memcpy(ieee->Regdot11HTOperationalRateSet, ieee->RegHTSuppRateSet, 16);
else
memset(ieee->Regdot11HTOperationalRateSet, 0, 16);
- return;
}
static u8 rtl8192_getSupportedWireleeMode(struct net_device *dev)
case RF_8225:
case RF_8256:
case RF_PSEUDO_11N:
- ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);
+ ret = WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B;
break;
case RF_8258:
- ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);
+ ret = WIRELESS_MODE_A|WIRELESS_MODE_N_5G;
break;
default:
ret = WIRELESS_MODE_B;
//for silent reset
priv->IrpPendingCount = 1;
priv->ResetProgress = RESET_TYPE_NORESET;
- priv->bForcedSilentReset = 0;
+ priv->bForcedSilentReset = false;
priv->bDisableNormalResetCheck = false;
priv->force_reset = false;
}
if (bLoad_From_EEPOM) {
- tmpValue = eprom_read(dev, (EEPROM_VID>>1));
+ tmpValue = eprom_read(dev, EEPROM_VID>>1);
priv->eeprom_vid = endian_swap(&tmpValue);
- priv->eeprom_pid = eprom_read(dev, (EEPROM_PID>>1));
- tmpValue = eprom_read(dev, (EEPROM_ChannelPlan>>1));
- priv->eeprom_ChannelPlan = ((tmpValue&0xff00)>>8);
+ priv->eeprom_pid = eprom_read(dev, EEPROM_PID>>1);
+ tmpValue = eprom_read(dev, EEPROM_ChannelPlan>>1);
+ priv->eeprom_ChannelPlan = (tmpValue & 0xff00)>>8;
priv->btxpowerdata_readfromEEPORM = true;
priv->eeprom_CustomerID = eprom_read(dev, (EEPROM_Customer_ID>>1)) >>8;
} else {
}
} else if (priv->EEPROM_Def_Ver == 1) {
if (bLoad_From_EEPOM) {
- tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_CCK_V1>>1));
+ tmpValue = eprom_read(dev,
+ EEPROM_TxPwIndex_CCK_V1 >> 1);
tmpValue = (tmpValue & 0xff00) >> 8;
} else {
tmpValue = 0x10;
tmpValue = 0x1010;
*((u16 *)(&priv->EEPROMTxPowerLevelCCK_V1[1])) = tmpValue;
if (bLoad_From_EEPOM)
- tmpValue = eprom_read(dev, (EEPROM_TxPwIndex_OFDM_24G_V1>>1));
+ tmpValue = eprom_read(dev,
+ EEPROM_TxPwIndex_OFDM_24G_V1 >> 1);
else
tmpValue = 0x1010;
*((u16 *)(&priv->EEPROMTxPowerLevelOFDM24G[0])) = tmpValue;
// Antenna B gain offset to antenna A, bit0~3
priv->AntennaTxPwDiff[0] = (priv->EEPROMTxPowerDiff & 0xf);
// Antenna C gain offset to antenna A, bit4~7
- priv->AntennaTxPwDiff[1] = ((priv->EEPROMTxPowerDiff & 0xf0)>>4);
+ priv->AntennaTxPwDiff[1] = (priv->EEPROMTxPowerDiff & 0xf0)>>4;
// CrystalCap, bit12~15
priv->CrystalCap = priv->EEPROMCrystalCap;
// ThermalMeter, bit0~3 for RFIC1, bit4~7 for RFIC2
//we need init DIG RATR table here again.
RT_TRACE(COMP_EPROM, "<===========%s()\n", __func__);
- return;
}
static short rtl8192_get_channel_map(struct net_device *dev)
rtl8192_read_eeprom_info(dev);
rtl8192_get_channel_map(dev);
init_hal_dm(dev);
- init_timer(&priv->watch_dog_timer);
- priv->watch_dog_timer.data = (unsigned long)dev;
- priv->watch_dog_timer.function = watch_dog_timer_callback;
+ setup_timer(&priv->watch_dog_timer, watch_dog_timer_callback,
+ (unsigned long)dev);
if (rtl8192_usb_initendpoints(dev) != 0) {
DMESG("Endopoints initialization failed");
return -ENOMEM;
read_nic_dword(dev, CPU_GEN, &dwRegRead);
if (priv->LoopbackMode == RTL819xU_NO_LOOPBACK)
- dwRegRead = ((dwRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET);
+ dwRegRead = (dwRegRead & CPU_GEN_NO_LOOPBACK_MSK) | CPU_GEN_NO_LOOPBACK_SET;
else if (priv->LoopbackMode == RTL819xU_MAC_LOOPBACK)
dwRegRead |= CPU_CCK_LOOPBACK;
else
//
#ifdef TO_DO_LIST
if (Adapter->ResetProgress == RESET_TYPE_NORESET) {
- if (pMgntInfo->RegRfOff == TRUE) { /* User disable RF via registry. */
+ if (pMgntInfo->RegRfOff == true) { /* User disable RF via registry. */
RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter819xUsb(): Turn off RF for RegRfOff ----------\n"));
MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW);
// Those actions will be discard in MgntActSet_RF_State because of the same state
u8 tmpvalue;
read_nic_byte(dev, 0x301, &tmpvalue);
if (tmpvalue == 0x03) {
- priv->bDcut = TRUE;
+ priv->bDcut = true;
RT_TRACE(COMP_POWER_TRACKING, "D-cut\n");
} else {
- priv->bDcut = FALSE;
+ priv->bDcut = false;
RT_TRACE(COMP_POWER_TRACKING, "C-cut\n");
}
dm_initialize_txpower_tracking(dev);
- if (priv->bDcut == TRUE) {
+ if (priv->bDcut) {
u32 i, TempCCk;
u32 tmpRegA = rtl8192_QueryBBReg(dev, rOFDM0_XATxIQImbalance, bMaskDWord);
for (i = 0; i < TxBBGainTableLength; i++) {
{
struct r8192_priv *priv = ieee80211_priv(dev);
u16 RegTxCounter;
- bool bStuck = FALSE;
+ bool bStuck = false;
read_nic_word(dev, 0x128, &RegTxCounter);
RT_TRACE(COMP_RESET, "%s():RegTxCounter is %d,TxCounter is %d\n", __func__, RegTxCounter, priv->TxCounter);
if (priv->TxCounter == RegTxCounter)
- bStuck = TRUE;
+ bStuck = true;
priv->TxCounter = RegTxCounter;
{
u16 RegRxCounter;
struct r8192_priv *priv = ieee80211_priv(dev);
- bool bStuck = FALSE;
+ bool bStuck = false;
static u8 rx_chk_cnt;
read_nic_word(dev, 0x130, &RegRxCounter);
RT_TRACE(COMP_RESET, "%s(): RegRxCounter is %d,RxCounter is %d\n", __func__, RegRxCounter, priv->RxCounter);
}
if (priv->RxCounter == RegRxCounter)
- bStuck = TRUE;
+ bStuck = true;
priv->RxCounter = RegRxCounter;
static RESET_TYPE RxCheckStuck(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- bool bRxCheck = FALSE;
+ bool bRxCheck = false;
if (priv->IrpPendingCount > 1)
- bRxCheck = TRUE;
+ bRxCheck = true;
if (bRxCheck) {
if (HalRxCheckStuck819xUsb(dev)) {
ret_rate = MGN_MCS15;
break;
case DESC90_RATEMCS32:
- ret_rate = (0x80|0x20);
+ ret_rate = 0x80|0x20;
break;
default:
if (!priv->bCckHighPower) {
report = pcck_buf->cck_agc_rpt & 0xc0;
- report = report>>6;
+ report >>= 6;
switch (report) {
//Fixed by Jacken from Bryant 2008-03-20
//Original value is -38 , -26 , -14 , -2
}
} else {
report = pcck_buf->cck_agc_rpt & 0x60;
- report = report>>5;
+ report >>= 5;
switch (report) {
case 0x3:
rx_pwr_all = -35 - ((pcck_buf->cck_agc_rpt & 0x1f)<<1);
struct net_device *dev = info->dev;
struct r8192_priv *priv = (struct r8192_priv *)ieee80211_priv(dev);
bool bpacket_match_bssid, bpacket_toself;
- bool bPacketBeacon = FALSE, bToSelfBA = FALSE;
+ bool bPacketBeacon = false, bToSelfBA = false;
static struct ieee80211_rx_stats previous_stats;
struct ieee80211_hdr_3addr *hdr;//by amy
u16 fc, type;
praddr = hdr->addr1;
/* Check if the received packet is acceptable. */
- bpacket_match_bssid = ((IEEE80211_FTYPE_CTL != type) &&
+ bpacket_match_bssid = (IEEE80211_FTYPE_CTL != type) &&
(eqMacAddr(priv->ieee80211->current_network.bssid, (fc & IEEE80211_FCTL_TODS) ? hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 : hdr->addr3))
- && (!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV));
+ && (!pstats->bHwError) && (!pstats->bCRC) && (!pstats->bICV);
bpacket_toself = bpacket_match_bssid & (eqMacAddr(praddr, priv->ieee80211->dev->dev_addr));
if (WLAN_FC_GET_FRAMETYPE(fc) == IEEE80211_STYPE_BEACON)
skb_pull(skb, stats->RxBufShift + stats->RxDrvInfoSize);
}
- /* for debug 2008.5.29 */
-
- //added by vivi, for MP, 20080108
- stats->RxIs40MHzPacket = driver_info->BW;
- if (stats->RxDrvInfoSize != 0)
+ if (driver_info) {
+ stats->RxIs40MHzPacket = driver_info->BW;
TranslateRxSignalStuff819xUsb(skb, stats, driver_info);
-
+ }
}
static void rtl8192_rx_nomal(struct sk_buff *skb)
/*------------------------Define global variable-----------------------------*/
/* Debug variable ? */
-dig_t dm_digtable;
+struct dig dm_digtable;
/* Store current software write register content for MAC PHY. */
u8 dm_shadow[16][256] = { {0} };
/* For Dynamic Rx Path Selection by Signal Strength */
-DRxPathSel DM_RxPathSelTable;
+struct dynamic_rx_path_sel DM_RxPathSelTable;
+
/*------------------------Define global variable-----------------------------*/
static void dm_TXPowerTrackingCallback_TSSI(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- bool bHighpowerstate, viviflag = FALSE;
+ bool bHighpowerstate, viviflag = false;
DCMD_TXCMD_T tx_cmd;
u8 powerlevelOFDM24G;
int i = 0, j = 0, k = 0;
/* check if the report value is right */
for (k = 0; k < 5; k++) {
if (tmp_report[k] <= 20) {
- viviflag = TRUE;
+ viviflag = true;
break;
}
}
- if (viviflag == TRUE) {
+ if (viviflag == true) {
write_nic_byte(dev, 0x1ba, 0);
- viviflag = FALSE;
+ viviflag = false;
RT_TRACE(COMP_POWER_TRACKING, "we filtered the data\n");
for (k = 0; k < 5; k++)
tmp_report[k] = 0;
delta = TSSI_13dBm - Avg_TSSI_Meas_from_driver;
if (delta <= E_FOR_TX_POWER_TRACK) {
- priv->ieee80211->bdynamic_txpower_enable = TRUE;
+ priv->ieee80211->bdynamic_txpower_enable = true;
write_nic_byte(dev, 0x1ba, 0);
RT_TRACE(COMP_POWER_TRACKING, "tx power track is done\n");
RT_TRACE(COMP_POWER_TRACKING, "priv->rfa_txpowertrackingindex = %d\n", priv->rfa_txpowertrackingindex);
if (priv->cck_present_attentuation > -1 && priv->cck_present_attentuation < 23) {
if (priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = TRUE;
+ priv->bcck_in_ch14 = true;
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
} else if (priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = FALSE;
+ priv->bcck_in_ch14 = false;
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
} else
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
RT_TRACE(COMP_POWER_TRACKING, "priv->cck_present_attentuation = %d\n", priv->cck_present_attentuation);
if (priv->cck_present_attentuation_difference <= -12 || priv->cck_present_attentuation_difference >= 24) {
- priv->ieee80211->bdynamic_txpower_enable = TRUE;
+ priv->ieee80211->bdynamic_txpower_enable = true;
write_nic_byte(dev, 0x1ba, 0);
RT_TRACE(COMP_POWER_TRACKING, "tx power track--->limited\n");
return;
break;
}
}
- priv->ieee80211->bdynamic_txpower_enable = TRUE;
+ priv->ieee80211->bdynamic_txpower_enable = true;
write_nic_byte(dev, 0x1ba, 0);
}
break;
}
}
- priv->btxpower_trackingInit = TRUE;
+ priv->btxpower_trackingInit = true;
/*pHalData->TXPowercount = 0;*/
return;
}
if (tmpCCK40Mindex >= CCK_Table_length)
tmpCCK40Mindex = CCK_Table_length-1;
} else {
- tmpval = ((u8)tmpRegA - priv->ThermalMeter[0]);
+ tmpval = (u8)tmpRegA - priv->ThermalMeter[0];
if (tmpval >= 6) /* higher temperature */
tmpOFDMindex = tmpCCK20Mindex = 0; /* max to +6dB */
tmpCCKindex = tmpCCK20Mindex;
if (priv->ieee80211->current_network.channel == 14 && !priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = TRUE;
+ priv->bcck_in_ch14 = true;
CCKSwingNeedUpdate = 1;
} else if (priv->ieee80211->current_network.channel != 14 && priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = FALSE;
+ priv->bcck_in_ch14 = false;
CCKSwingNeedUpdate = 1;
}
struct r8192_priv *priv = container_of(dwork, struct r8192_priv, txpower_tracking_wq);
struct net_device *dev = priv->ieee80211->dev;
- if (priv->bDcut == TRUE)
+ if (priv->bDcut == true)
dm_TXPowerTrackingCallback_TSSI(dev);
else
dm_TXPowerTrackingCallback_ThermalMeter(dev);
priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[6] = 0x00;
priv->cck_txbbgain_ch14_table[22].ccktxbb_valuearray[7] = 0x00;
- priv->btxpower_tracking = TRUE;
+ priv->btxpower_tracking = true;
priv->txpower_count = 0;
- priv->btxpower_trackingInit = FALSE;
+ priv->btxpower_trackingInit = false;
}
* 3-wire by driver causes RF to go into a wrong state.
*/
if (priv->ieee80211->FwRWRF)
- priv->btxpower_tracking = TRUE;
+ priv->btxpower_tracking = true;
else
- priv->btxpower_tracking = FALSE;
+ priv->btxpower_tracking = false;
priv->txpower_count = 0;
- priv->btxpower_trackingInit = FALSE;
+ priv->btxpower_trackingInit = false;
}
void dm_initialize_txpower_tracking(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- if (priv->bDcut == TRUE)
+ if (priv->bDcut == true)
dm_InitializeTXPowerTracking_TSSI(dev);
else
dm_InitializeTXPowerTracking_ThermalMeter(dev);
#ifdef RTL8190P
dm_CheckTXPowerTracking_TSSI(dev);
#else
- if (priv->bDcut == TRUE)
+ if (priv->bDcut == true)
dm_CheckTXPowerTracking_TSSI(dev);
else
dm_CheckTXPowerTracking_ThermalMeter(dev);
{ /* dm_CCKTxPowerAdjust */
struct r8192_priv *priv = ieee80211_priv(dev);
- if (priv->bDcut == TRUE)
+ if (priv->bDcut == true)
dm_CCKTxPowerAdjust_TSSI(dev, binch14);
else
dm_CCKTxPowerAdjust_ThermalMeter(dev, binch14);
dm_digtable.rssi_low_thresh = dm_value;
} else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH) {
dm_digtable.rssi_high_power_highthresh = dm_value;
- } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_HIGH) {
- dm_digtable.rssi_high_power_highthresh = dm_value;
+ } else if (dm_type == DIG_TYPE_THRESH_HIGHPWR_LOW) {
+ dm_digtable.rssi_high_power_lowthresh = dm_value;
} else if (dm_type == DIG_TYPE_ENABLE) {
dm_digtable.dig_state = DM_STA_DIG_MAX;
dm_digtable.dig_enable_flag = true;
/* For Each time updating EDCA parameter, reset EDCA turbo mode status. */
dm_init_edca_turbo(dev);
u1bAIFS = qos_parameters->aifs[0] * ((mode&(IEEE_G|IEEE_N_24G)) ? 9 : 20) + aSifsTime;
- u4bAcParam = ((((u32)(qos_parameters->tx_op_limit[0])) << AC_PARAM_TXOP_LIMIT_OFFSET)|
+ u4bAcParam = (((u32)(qos_parameters->tx_op_limit[0])) << AC_PARAM_TXOP_LIMIT_OFFSET)|
(((u32)(qos_parameters->cw_max[0])) << AC_PARAM_ECW_MAX_OFFSET)|
(((u32)(qos_parameters->cw_min[0])) << AC_PARAM_ECW_MIN_OFFSET)|
- ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET));
+ ((u32)u1bAIFS << AC_PARAM_AIFS_OFFSET);
/*write_nic_dword(dev, WDCAPARA_ADD[i], u4bAcParam);*/
write_nic_dword(dev, EDCAPARA_BE, u4bAcParam);
{
struct r8192_priv *priv = ieee80211_priv((struct net_device *)dev);
- priv->ieee80211->bCTSToSelfEnable = TRUE;
+ priv->ieee80211->bCTSToSelfEnable = true;
priv->ieee80211->CTSToSelfTH = CTSToSelfTHVal;
}
unsigned long curTxOkCnt = 0;
unsigned long curRxOkCnt = 0;
- if (priv->ieee80211->bCTSToSelfEnable != TRUE) {
+ if (priv->ieee80211->bCTSToSelfEnable != true) {
pHTInfo->IOTAction &= ~HT_IOT_ACT_FORCED_CTS2SELF;
return;
}
/* Check Bit 0-3, it means if RF A-D is enabled. */
for (i = 0; i < RF90_PATH_MAX; i++) {
if (rfpath & (0x01<<i))
- priv->brfpath_rxenable[i] = 1;
+ priv->brfpath_rxenable[i] = true;
else
- priv->brfpath_rxenable[i] = 0;
+ priv->brfpath_rxenable[i] = false;
}
if (!DM_RxPathSelTable.Enable)
return;
priv->ieee80211->fsync_seconddiff_ratethreshold = 200;
priv->ieee80211->fsync_state = Default_Fsync;
priv->framesyncMonitor = 1; /* current default 0xc38 monitor on */
-
- init_timer(&priv->fsync_timer);
- priv->fsync_timer.data = (unsigned long)dev;
- priv->fsync_timer.function = dm_fsync_timer_callback;
+ setup_timer(&priv->fsync_timer, dm_fsync_timer_callback,
+ (unsigned long)dev);
}
static void dm_deInit_fsync(struct net_device *dev)
/*------------------------------Define structure----------------------------*/
/* 2007/10/04 MH Define upper and lower threshold of DIG enable or disable. */
-typedef struct _dynamic_initial_gain_threshold_ {
+struct dig {
u8 dig_enable_flag;
u8 dig_algorithm;
u8 dbg_mode;
bool initialgain_lowerbound_state;
long rssi_val;
-} dig_t;
+};
typedef enum tag_dynamic_init_gain_state_definition {
DM_STA_DIG_OFF = 0,
DIG_CS_RATIO_HIGHER = 1,
DIG_CS_MAX
} dm_dig_cs_ratio_e;
-typedef struct _Dynamic_Rx_Path_Selection_ {
+struct dynamic_rx_path_sel {
u8 Enable;
u8 DbgMode;
u8 cck_method;
u8 rf_rssi[4];
u8 rf_enable_rssi_th[4];
long cck_pwdb_sta[4];
-} DRxPathSel;
+};
typedef enum tag_CCK_Rx_Path_Method_Definition {
CCK_Rx_Version_1 = 0,
/*------------------------Export global variable----------------------------*/
-extern dig_t dm_digtable;
+extern struct dig dm_digtable;
extern u8 dm_shadow[16][256];
-extern DRxPathSel DM_RxPathSelTable;
+extern struct dynamic_rx_path_sel DM_RxPathSelTable;
/*------------------------Export global variable----------------------------*/
down(&priv->wx_sem);
- printk("%s(): force reset ! extra is %d\n", __func__, *extra);
+ netdev_dbg(dev, "%s(): force reset ! extra is %d\n", __func__, *extra);
priv->force_reset = *extra;
up(&priv->wx_sem);
return 0;
if (!priv->up)
return -ENETDOWN;
- if (priv->ieee80211->LinkDetectInfo.bBusyTraffic == true)
+ if (priv->ieee80211->LinkDetectInfo.bBusyTraffic)
return -EAGAIN;
if (wrqu->data.flags & IW_SCAN_THIS_ESSID) {
struct iw_scan_req *req = (struct iw_scan_req *)b;
/*
- This is part of rtl8180 OpenSource driver - v 0.3
- Copyright (C) Andrea Merello 2004 <andrea.merello@gmail.com>
- Released under the terms of GPL (General Public Licence)
+ * This is part of rtl8180 OpenSource driver - v 0.3
+ * Copyright (C) Andrea Merello 2004 <andrea.merello@gmail.com>
+ * Released under the terms of GPL (General Public Licence)
+ *
+ * Parts of this driver are based on the GPL part of the official realtek driver
+ * Parts of this driver are based on the rtl8180 driver skeleton from Patric
+ * Schenke & Andres Salomon
+ * Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
+ *
+ * We want to thank the Authors of such projects and the Ndiswrapper project
+ * Authors.
+ */
- Parts of this driver are based on the GPL part of the official realtek driver
- Parts of this driver are based on the rtl8180 driver skeleton from Patric Schenke & Andres Salomon
- Parts of this driver are based on the Intel Pro Wireless 2100 GPL driver
-
- We want to thank the Authors of such projects and the Ndiswrapper project Authors.
-*/
-
-/* this file (will) contains wireless extension handlers*/
+/* this file (will) contains wireless extension handlers */
#ifndef R8180_WX_H
#define R8180_WX_H
-//#include <linux/wireless.h>
extern struct iw_handler_def r8192_wx_handlers_def;
/* Enable the rtl819x_core.c to share this function, david 2008.9.22 */
bool rt_status = true;
u16 frag_threshold;
u16 frag_length, frag_offset = 0;
- //u16 total_size;
int i;
rt_firmware *pfirmware = priv->pFirmware;
u8 index;
firmware_init_param(dev);
- //Fragmentation might be required
+ /* Fragmentation might be required */
frag_threshold = pfirmware->cmdpacket_frag_thresold;
do {
if ((buffer_len - frag_offset) > frag_threshold) {
}
-//-----------------------------------------------------------------------------
-// Procedure: Check whether main code is download OK. If OK, turn on CPU
-//
-// Description: CPU register locates in different page against general register.
-// Switch to CPU register in the begin and switch back before return
-//
-//
-// Arguments: The pointer of the adapter
-//
-// Returns:
-// NDIS_STATUS_FAILURE - the following initialization process should be terminated
-// NDIS_STATUS_SUCCESS - if firmware initialization process success
-//-----------------------------------------------------------------------------
+/*
+ * Procedure: Check whether main code is download OK. If OK, turn on CPU
+ *
+ * Description: CPU register locates in different page against general register.
+ * Switch to CPU register in the begin and switch back before return
+ *
+ *
+ * Arguments: The pointer of the adapter
+ *
+ * Returns:
+ * NDIS_STATUS_FAILURE - the following initialization process should
+ * be terminated
+ * NDIS_STATUS_SUCCESS - if firmware initialization process success
+ */
static bool CPUcheck_maincodeok_turnonCPU(struct net_device *dev)
{
bool rt_status = true;
CPUCheckMainCodeOKAndTurnOnCPU_Fail:
RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__);
- rt_status = FALSE;
+ rt_status = false;
return rt_status;
}
bool init_firmware(struct net_device *dev)
{
struct r8192_priv *priv = ieee80211_priv(dev);
- bool rt_status = TRUE;
+ bool rt_status = true;
u32 file_length = 0;
u8 *mapped_file = NULL;
/* it is called by reset */
rst_opt = OPT_SYSTEM_RESET;
starting_state = FW_INIT_STEP0_BOOT;
- // TODO: system reset
+ /* TODO: system reset */
} else if (pfirmware->firmware_status == FW_STATUS_5_READY) {
/* it is called by Initialize */
if (rst_opt == OPT_SYSTEM_RESET)
release_firmware(fw_entry);
- if (rt_status != TRUE)
+ if (!rt_status)
goto download_firmware_fail;
switch (init_step) {
* will set polling bit when firmware code is also configured
*/
pfirmware->firmware_status = FW_STATUS_1_MOVE_BOOT_CODE;
- //mdelay(1000);
+ /* mdelay(1000); */
/*
* To initialize IMEM, CPU move code from 0x80000080,
* hence, we send 0x80 byte packet
/* Check Put Code OK and Turn On CPU */
rt_status = CPUcheck_maincodeok_turnonCPU(dev);
- if (rt_status != TRUE) {
+ if (!rt_status) {
RT_TRACE(COMP_ERR, "CPUcheck_maincodeok_turnonCPU fail!\n");
goto download_firmware_fail;
}
mdelay(1);
rt_status = CPUcheck_firmware_ready(dev);
- if (rt_status != TRUE) {
+ if (!rt_status) {
RT_TRACE(COMP_ERR, "CPUcheck_firmware_ready fail(%d)!\n",rt_status);
goto download_firmware_fail;
}
}
RT_TRACE(COMP_FIRMWARE, "Firmware Download Success\n");
- //assert(pfirmware->firmware_status == FW_STATUS_5_READY, ("Firmware Download Fail\n"));
-
return rt_status;
download_firmware_fail:
RT_TRACE(COMP_ERR, "ERR in %s()\n", __func__);
- rt_status = FALSE;
+ rt_status = false;
return rt_status;
}
/******************************************************************************
* function: This function reads specific bits from BB register
* input: net_device *dev
- * u32 reg_addr //target addr to be readback
- * u32 bitmask //taget bit pos to be readback
+ * u32 reg_addr //target addr to be readback
+ * u32 bitmask //taget bit pos to be readback
* output: none
- * return: u32 data //the readback register value
+ * return: u32 data //the readback register value
* notice:
******************************************************************************/
u32 rtl8192_QueryBBReg(struct net_device *dev, u32 reg_addr, u32 bitmask)
return 0;
if (priv->Rf_Mode == RF_OP_By_FW) {
reg = phy_FwRFSerialRead(dev, eRFPath, reg_addr);
- bitshift = rtl8192_CalculateBitShift(bitmask);
- reg = (reg & bitmask) >> bitshift;
udelay(200);
- return reg;
} else {
reg = rtl8192_phy_RFSerialRead(dev, eRFPath, reg_addr);
- bitshift = rtl8192_CalculateBitShift(bitmask);
- reg = (reg & bitmask) >> bitshift;
- return reg;
}
+ bitshift = rtl8192_CalculateBitShift(bitmask);
+ reg = (reg & bitmask) >> bitshift;
+ return reg;
+
}
/******************************************************************************
/******************************************************************************
* function: This function reads BB parameters from header file we generate,
* and do register read/write
- * input: net_device *dev
+ * input: net_device *dev
* output: none
* return: none
* notice: BB parameters may change all the time, so please make
write_nic_byte_E(dev, 0x5e, 0x00);
if (priv->card_8192_version == (u8)VERSION_819xU_A) {
/* Antenna gain offset from B/C/D to A */
- reg_u32 = (priv->AntennaTxPwDiff[1]<<4 |
- priv->AntennaTxPwDiff[0]);
+ reg_u32 = priv->AntennaTxPwDiff[1]<<4 |
+ priv->AntennaTxPwDiff[0];
rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC),
reg_u32);
read_nic_byte(dev, rOFDM0_RxDetector3, &priv->framesync);
read_nic_byte(dev, rOFDM0_RxDetector2, &tmp);
priv->framesyncC34 = tmp;
- RT_TRACE(COMP_INIT, "Default framesync (0x%x) = 0x%x \n",
+ RT_TRACE(COMP_INIT, "Default framesync (0x%x) = 0x%x\n",
rOFDM0_RxDetector3, priv->framesync);
/* Read SIFS (save the value read fome MACPHY_REG.txt) */
if (eRFPowerState == priv->ieee80211->eRFPowerState)
return false;
- if (priv->SetRFPowerStateInProgress == true)
+ if (priv->SetRFPowerStateInProgress)
return false;
priv->SetRFPowerStateInProgress = true;
/* Turn on RF we are still linked, which might
happen when we quickly turn off and on HW RF.
*/
- if (pMgntInfo->bMediaConnect == TRUE)
+ if (pMgntInfo->bMediaConnect)
Adapter->HalFunc.LedControlHandler(Adapter, LED_CTL_LINK);
else
/* Turn off LED if RF is not ON. */
default:
RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip);
return true;
- break;
}
if ((*stage) == 2) {
(*delay) = CurrentCmd->msDelay;
return true;
- } else {
- (*stage)++;
- (*step) = 0;
- continue;
}
+ (*stage)++;
+ (*step) = 0;
+ continue;
}
switch (CurrentCmd->CmdID) {
priv->cck_present_attentuation);
if (priv->chan == 14 && !priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = TRUE;
+ priv->bcck_in_ch14 = true;
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
} else if (priv->chan != 14 && priv->bcck_in_ch14) {
- priv->bcck_in_ch14 = FALSE;
+ priv->bcck_in_ch14 = false;
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
} else {
dm_cck_txpower_adjust(dev, priv->bcck_in_ch14);
RT_TRACE(COMP_SCAN, "Scan InitialGainBackup 0xa0a is %x\n",
priv->initgain_backup.cca);
- RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x \n",
+ RT_TRACE(COMP_SCAN, "Write scan initial gain = 0x%x\n",
initial_gain);
write_nic_byte(dev, rOFDM0_XAAGCCore1, initial_gain);
write_nic_byte(dev, rOFDM0_XBAGCCore1, initial_gain);
write_nic_byte(dev, rOFDM0_XCAGCCore1, initial_gain);
write_nic_byte(dev, rOFDM0_XDAGCCore1, initial_gain);
- RT_TRACE(COMP_SCAN, "Write scan 0xa0a = 0x%x \n",
+ RT_TRACE(COMP_SCAN, "Write scan 0xa0a = 0x%x\n",
POWER_DETECTION_TH);
write_nic_byte(dev, 0xa0a, POWER_DETECTION_TH);
break;
rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1);
break;
default:
- RT_TRACE(COMP_SCAN, "Unknown IG Operation. \n");
+ RT_TRACE(COMP_SCAN, "Unknown IG Operation.\n");
break;
}
}
static void fill_fwpriv(struct _adapter *padapter, struct fw_priv *pfwpriv)
{
- struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv;
+ struct dvobj_priv *pdvobj = &padapter->dvobjpriv;
struct registry_priv *pregpriv = &padapter->registrypriv;
memset(pfwpriv, 0, sizeof(struct fw_priv));
#include "drv_types.h"
#include "mlme_osdep.h"
-static void sitesurvey_ctrl_handler(void *FunctionContext)
+static void sitesurvey_ctrl_handler(unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_r8712_sitesurvey_ctrl_handler(adapter);
- _set_timer(&adapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer,
- 3000);
+ mod_timer(&adapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer,
+ jiffies + msecs_to_jiffies(3000));
}
-static void join_timeout_handler (void *FunctionContext)
+static void join_timeout_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_r8712_join_timeout_handler(adapter);
}
-static void _scan_timeout_handler (void *FunctionContext)
+static void _scan_timeout_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
r8712_scan_timeout_handler(adapter);
}
-static void dhcp_timeout_handler (void *FunctionContext)
+static void dhcp_timeout_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_r8712_dhcp_timeout_handler(adapter);
}
-static void wdg_timeout_handler (void *FunctionContext)
+static void wdg_timeout_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_r8712_wdg_timeout_handler(adapter);
- _set_timer(&adapter->mlmepriv.wdg_timer, 2000);
+ mod_timer(&adapter->mlmepriv.wdg_timer,
+ jiffies + msecs_to_jiffies(2000));
}
void r8712_init_mlme_timer(struct _adapter *padapter)
{
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
- _init_timer(&(pmlmepriv->assoc_timer), padapter->pnetdev,
- join_timeout_handler, (pmlmepriv->nic_hdl));
- _init_timer(&(pmlmepriv->sitesurveyctrl.sitesurvey_ctrl_timer),
- padapter->pnetdev, sitesurvey_ctrl_handler,
- (u8 *)(pmlmepriv->nic_hdl));
- _init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev,
- _scan_timeout_handler, (pmlmepriv->nic_hdl));
- _init_timer(&(pmlmepriv->dhcp_timer), padapter->pnetdev,
- dhcp_timeout_handler, (u8 *)(pmlmepriv->nic_hdl));
- _init_timer(&(pmlmepriv->wdg_timer), padapter->pnetdev,
- wdg_timeout_handler, (u8 *)(pmlmepriv->nic_hdl));
+ setup_timer(&pmlmepriv->assoc_timer, join_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->sitesurveyctrl.sitesurvey_ctrl_timer,
+ sitesurvey_ctrl_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->scan_to_timer, _scan_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->dhcp_timer, dhcp_timeout_handler,
+ (unsigned long)padapter);
+ setup_timer(&pmlmepriv->wdg_timer, wdg_timeout_handler,
+ (unsigned long)padapter);
}
void r8712_os_indicate_connect(struct _adapter *adapter)
btkip_countermeasure;
memset((unsigned char *)&adapter->securitypriv, 0,
sizeof(struct security_priv));
- _init_timer(&(adapter->securitypriv.tkip_timer),
- adapter->pnetdev, r8712_use_tkipkey_handler,
- adapter);
+ setup_timer(&adapter->securitypriv.tkip_timer,
+ r8712_use_tkipkey_handler,
+ (unsigned long)adapter);
/* Restore the PMK information to securitypriv structure
* for the following connection. */
memcpy(&adapter->securitypriv.PMKIDList[0],
static void start_drv_timers(struct _adapter *padapter)
{
- _set_timer(&padapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer,
- 5000);
- _set_timer(&padapter->mlmepriv.wdg_timer, 2000);
+ mod_timer(&padapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer,
+ jiffies + msecs_to_jiffies(5000));
+ mod_timer(&padapter->mlmepriv.wdg_timer,
+ jiffies + msecs_to_jiffies(2000));
}
void r8712_stop_drv_timers(struct _adapter *padapter)
{
- _cancel_timer_ex(&padapter->mlmepriv.assoc_timer);
- _cancel_timer_ex(&padapter->securitypriv.tkip_timer);
- _cancel_timer_ex(&padapter->mlmepriv.scan_to_timer);
- _cancel_timer_ex(&padapter->mlmepriv.dhcp_timer);
- _cancel_timer_ex(&padapter->mlmepriv.wdg_timer);
- _cancel_timer_ex(&padapter->mlmepriv.sitesurveyctrl.
- sitesurvey_ctrl_timer);
+ del_timer_sync(&padapter->mlmepriv.assoc_timer);
+ del_timer_sync(&padapter->securitypriv.tkip_timer);
+ del_timer_sync(&padapter->mlmepriv.scan_to_timer);
+ del_timer_sync(&padapter->mlmepriv.dhcp_timer);
+ del_timer_sync(&padapter->mlmepriv.wdg_timer);
+ del_timer_sync(&padapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer);
}
static u8 init_default_value(struct _adapter *padapter)
_r8712_init_recv_priv(&padapter->recvpriv, padapter);
memset((unsigned char *)&padapter->securitypriv, 0,
sizeof(struct security_priv));
- _init_timer(&(padapter->securitypriv.tkip_timer), padapter->pnetdev,
- r8712_use_tkipkey_handler, padapter);
+ setup_timer(&padapter->securitypriv.tkip_timer,
+ r8712_use_tkipkey_handler, (unsigned long)padapter);
_r8712_init_sta_priv(&padapter->stapriv);
padapter->stapriv.padapter = padapter;
r8712_init_bcmc_stainfo(padapter);
#define LIST_CONTAINOR(ptr, type, member) \
((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member)))
-static inline void _init_timer(struct timer_list *ptimer,
- struct net_device *padapter,
- void *pfunc, void *cntx)
-{
- ptimer->function = pfunc;
- ptimer->data = (addr_t)cntx;
- init_timer(ptimer);
-}
-
-static inline void _set_timer(struct timer_list *ptimer, u32 delay_time)
-{
- mod_timer(ptimer, (jiffies+msecs_to_jiffies(delay_time)));
-}
-
-static inline void _cancel_timer(struct timer_list *ptimer, u8 *bcancelled)
-{
- del_timer(ptimer);
- *bcancelled = true; /*true ==1; false==0*/
-}
-
#ifndef BIT
#define BIT(x) (1 << (x))
#endif
schedule_timeout(delta);
}
-static inline unsigned char _cancel_timer_ex(struct timer_list *ptimer)
-{
- return del_timer(ptimer);
-}
-
static inline void flush_signals_thread(void)
{
if (signal_pending(current))
else
ev.flags |= IW_MICFAILURE_PAIRWISE;
ev.src_addr.sa_family = ARPHRD_ETHER;
- memcpy(ev.src_addr.sa_data, &pmlmepriv->assoc_bssid[0], ETH_ALEN);
+ ether_addr_copy(ev.src_addr.sa_data, &pmlmepriv->assoc_bssid[0]);
memset(&wrqu, 0x00, sizeof(wrqu));
wrqu.data.length = sizeof(ev);
wireless_send_event(padapter->pnetdev, IWEVMICHAELMICFAILURE, &wrqu,
precvpriv->rx_drop++;
}
-static void _r8712_reordering_ctrl_timeout_handler (void *FunctionContext)
+static void _r8712_reordering_ctrl_timeout_handler (unsigned long data)
{
struct recv_reorder_ctrl *preorder_ctrl =
- (struct recv_reorder_ctrl *)FunctionContext;
+ (struct recv_reorder_ctrl *)data;
r8712_reordering_ctrl_timeout_handler(preorder_ctrl);
}
void r8712_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl)
{
- struct _adapter *padapter = preorder_ctrl->padapter;
-
- _init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter->pnetdev,
- _r8712_reordering_ctrl_timeout_handler, preorder_ctrl);
+ setup_timer(&preorder_ctrl->reordering_ctrl_timer,
+ _r8712_reordering_ctrl_timeout_handler,
+ (unsigned long)preorder_ctrl);
}
val32 = r8712_read32(padapter, IOCMD_DATA_REG);
else /* time out */
val32 = 0;
- val32 = val32 >> 4;
+ val32 >>= 4;
padapter->recvpriv.fw_rssi =
(u8)r8712_signal_scale_mapping(val32);
}
pLed->bLedBlinkInProgress = false;
pLed->BlinkTimes = 0;
pLed->BlinkingLedState = LED_UNKNOWN;
- _init_timer(&(pLed->BlinkTimer), nic, BlinkTimerCallback, pLed);
+ setup_timer(&pLed->BlinkTimer, BlinkTimerCallback,
+ (unsigned long)pLed);
INIT_WORK(&pLed->BlinkWorkItem, BlinkWorkItemCallback);
}
*/
static void DeInitLed871x(struct LED_871x *pLed)
{
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
/* We should reset bLedBlinkInProgress if we cancel
* the LedControlTimer, */
pLed->bLedBlinkInProgress = false;
/* Schedule a timer to toggle LED state. */
switch (pLed->CurrLedState) {
case LED_BLINK_NORMAL:
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
break;
case LED_BLINK_SLOWLY:
case LED_BLINK_StartToBlink:
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
break;
case LED_BLINK_WPS:
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LONG_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LONG_INTERVAL));
break;
default:
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
break;
}
}
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_NORMAL:
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
break;
case LED_SCAN_BLINK:
pLed->BlinkTimes--;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_SLOWLY;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
pLed->bLedScanBlinkInProgress = false;
} else {
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
} else if (!check_fwstate(pmlmepriv, _FW_LINKED)) {
pLed->bLedNoLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_SLOWLY;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
pLed->BlinkTimes = 0;
pLed->bLedBlinkInProgress = false;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
case LED_BLINK_WPS_STOP: /* WPS success */
if (pLed->BlinkingLedState == LED_ON) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
bStopBlinking = false;
} else
bStopBlinking = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
}
pLed->bLedWPSBlinkInProgress = false;
break;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
default:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
case LED_BLINK_WPS_STOP: /*WPS success*/
if (pLed->BlinkingLedState == LED_ON) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
bStopBlinking = false;
} else
bStopBlinking = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_BLINK_StartToBlink:
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
break;
case LED_SCAN_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
pLed->bLedScanBlinkInProgress = false;
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
pLed->bLedBlinkInProgress = false;
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
break;
case LED_BLINK_WPS_STOP: /*WPS authentication fail*/
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
break;
case LED_BLINK_WPS_STOP_OVERLAP: /*WPS session overlap */
pLed->BlinkTimes--;
if (bStopBlinking) {
pLed->BlinkTimes = 10;
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
break;
default:
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
if (!pLed->bLedOn)
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
pLed->bLedScanBlinkInProgress = false;
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_TXRX_BLINK:
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
if (!pLed->bLedOn)
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
pLed->bLedBlinkInProgress = false;
} else {
if (pLed->bLedOn)
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
default:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_BLINK_WPS:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
break;
default:
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_LINK:
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_SITE_SURVEY:
if (IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
pLed->bLedBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_START_WPS_BOTTON:
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_STOP_WPS:
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress)
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
else
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_WPS_STOP;
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_STOP_WPS_FAIL:
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedNoLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
default:
break;
return;
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_START_WPS: /*wait until xinpin finish*/
case LED_CTL_START_WPS_BOTTON:
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
pLed->bLedWPSBlinkInProgress = false;
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_STOP_WPS_FAIL:
pLed->bLedWPSBlinkInProgress = false;
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_START_TO_LINK:
if (!IS_LED_BLINKING(pLed)) {
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
default:
break;
if (IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_LINK:
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_START_WPS: /* wait until xinpin finish */
case LED_CTL_START_WPS_BOTTON:
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_STOP_WPS:
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&(pLed->BlinkTimer));
pLed->bLedWPSBlinkInProgress = false;
} else
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_WPS_STOP;
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_STOP_WPS_FAIL:
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_START_TO_LINK:
case LED_CTL_NO_LINK:
if (!IS_LED_BLINKING(pLed)) {
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
default:
break;
case LED_CTL_START_TO_LINK:
if (pLed1->bLedWPSBlinkInProgress) {
pLed1->bLedWPSBlinkInProgress = false;
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
pLed1->BlinkingLedState = LED_OFF;
pLed1->CurrLedState = LED_OFF;
if (pLed1->bLedOn)
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
if (pLed->bLedStartToLinkBlinkInProgress == false) {
if (pLed->CurrLedState == LED_SCAN_BLINK ||
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
pLed->bLedStartToLinkBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_StartToBlink;
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
}
break;
if (LedAction == LED_CTL_LINK) {
if (pLed1->bLedWPSBlinkInProgress) {
pLed1->bLedWPSBlinkInProgress = false;
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
pLed1->BlinkingLedState = LED_OFF;
pLed1->CurrLedState = LED_OFF;
if (pLed1->bLedOn)
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
}
if (pLed->bLedNoLinkBlinkInProgress == false) {
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
}
break;
case LED_CTL_SITE_SURVEY:
if (IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
IS_LED_WPS_BLINKING(pLed))
return;
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
pLed->bLedBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_START_WPS: /*wait until xinpin finish*/
case LED_CTL_START_WPS_BOTTON:
if (pLed1->bLedWPSBlinkInProgress) {
pLed1->bLedWPSBlinkInProgress = false;
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&(pLed1->BlinkTimer));
pLed1->BlinkingLedState = LED_OFF;
pLed1->CurrLedState = LED_OFF;
if (pLed1->bLedOn)
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
}
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedNoLinkBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->CurrLedState = LED_BLINK_WPS;
if (pLed->bLedOn) {
pLed->BlinkingLedState = LED_OFF;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SLOWLY_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SLOWLY_INTERVAL));
} else {
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
}
}
break;
case LED_CTL_STOP_WPS: /*WPS connect success*/
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
break;
case LED_CTL_STOP_WPS_FAIL: /*WPS authentication fail*/
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
/*LED1 settings*/
if (pLed1->bLedWPSBlinkInProgress)
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
else
pLed1->bLedWPSBlinkInProgress = true;
pLed1->CurrLedState = LED_BLINK_WPS_STOP;
pLed1->BlinkingLedState = LED_OFF;
else
pLed1->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
break;
case LED_CTL_STOP_WPS_FAIL_OVERLAP: /*WPS session overlap*/
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->bLedNoLinkBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_NO_LINK_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NO_LINK_INTERVAL_ALPHA));
/*LED1 settings*/
if (pLed1->bLedWPSBlinkInProgress)
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
else
pLed1->bLedWPSBlinkInProgress = true;
pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP;
pLed1->BlinkingLedState = LED_OFF;
else
pLed1->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_NORMAL_INTERVAL));
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedNoLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedNoLinkBlinkInProgress = false;
}
if (pLed->bLedLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedLinkBlinkInProgress = false;
}
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
if (pLed->bLedScanBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedScanBlinkInProgress = false;
}
if (pLed->bLedStartToLinkBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedStartToLinkBlinkInProgress = false;
}
if (pLed1->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed1->BlinkTimer));
+ del_timer_sync(&pLed1->BlinkTimer);
pLed1->bLedWPSBlinkInProgress = false;
}
pLed1->BlinkingLedState = LED_UNKNOWN;
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
pLed->bLedBlinkInProgress = false;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_SITE_SURVEY:
if ((pmlmepriv->sitesurveyctrl.traffic_busy) &&
; /* dummy branch */
else if (pLed->bLedScanBlinkInProgress == false) {
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedScanBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_TX:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
SwLedOff(padapter, pLed);
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
pLed->bLedBlinkInProgress = false;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&(pLed->BlinkTimer), jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_TX:
case LED_CTL_RX:
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_FASTER_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_FASTER_INTERVAL_ALPHA));
}
break;
case LED_CTL_START_WPS: /*wait until xinpin finish*/
case LED_CTL_START_WPS_BOTTON:
if (pLed->bLedWPSBlinkInProgress == false) {
if (pLed->bLedBlinkInProgress == true) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
pLed->bLedWPSBlinkInProgress = true;
pLed->BlinkingLedState = LED_OFF;
else
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer),
- LED_BLINK_SCAN_INTERVAL_ALPHA);
+ mod_timer(&pLed->BlinkTimer, jiffies +
+ msecs_to_jiffies(LED_BLINK_SCAN_INTERVAL_ALPHA));
}
break;
case LED_CTL_STOP_WPS_FAIL:
case LED_CTL_STOP_WPS:
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
pLed->CurrLedState = LED_ON;
pLed->BlinkingLedState = LED_ON;
- _set_timer(&(pLed->BlinkTimer), 0);
+ mod_timer(&pLed->BlinkTimer,
+ jiffies + msecs_to_jiffies(0));
break;
case LED_CTL_POWER_OFF:
pLed->CurrLedState = LED_OFF;
pLed->BlinkingLedState = LED_OFF;
if (pLed->bLedBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedBlinkInProgress = false;
}
if (pLed->bLedWPSBlinkInProgress) {
- _cancel_timer_ex(&(pLed->BlinkTimer));
+ del_timer_sync(&pLed->BlinkTimer);
pLed->bLedWPSBlinkInProgress = false;
}
SwLedOff(padapter, pLed);
u16 drvinfo_sz = 0;
drvinfo_sz = (le32_to_cpu(prxstat->rxdw0)&0x000f0000)>>16;
- drvinfo_sz = drvinfo_sz<<3;
+ drvinfo_sz <<= 3;
/*TODO:
* Offset 0 */
pattrib->bdecrypted = ((le32_to_cpu(prxstat->rxdw0) & BIT(27)) >> 27)
? 0 : 1;
- pattrib->crc_err = ((le32_to_cpu(prxstat->rxdw0) & BIT(14)) >> 14);
+ pattrib->crc_err = (le32_to_cpu(prxstat->rxdw0) & BIT(14)) >> 14;
/*Offset 4*/
/*Offset 8*/
/*Offset 12*/
poffset = (u8 *)prxcmdbuf;
voffset = *(uint *)poffset;
prxstat = (struct recv_stat *)prxcmdbuf;
- drvinfo_sz = ((le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16);
- drvinfo_sz = drvinfo_sz << 3;
+ drvinfo_sz = (le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16;
+ drvinfo_sz <<= 3;
poffset += RXDESC_SIZE + drvinfo_sz;
do {
voffset = *(uint *)poffset;
*/
if (r8712_recv_indicatepkts_in_order(padapter, preorder_ctrl, false) ==
true) {
- _set_timer(&preorder_ctrl->reordering_ctrl_timer,
- REORDER_WAIT_TIME);
+ mod_timer(&preorder_ctrl->reordering_ctrl_timer,
+ jiffies + msecs_to_jiffies(REORDER_WAIT_TIME));
spin_unlock_irqrestore(&ppending_recvframe_queue->lock, irql);
} else {
spin_unlock_irqrestore(&ppending_recvframe_queue->lock, irql);
- _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
+ del_timer(&preorder_ctrl->reordering_ctrl_timer);
}
return _SUCCESS;
_err_exit:
*/
if (!cck_highpwr) {
report = pcck_buf->cck_agc_rpt & 0xc0;
- report = report >> 6;
+ report >>= 6;
switch (report) {
/* Modify the RF RNA gain value to -40, -20,
* -2, 14 by Jenyu's suggestion
} else {
report = ((u8)(le32_to_cpu(pphy_stat->phydw1) >> 8)) &
0x60;
- report = report >> 5;
+ report >>= 5;
switch (report) {
case 0x3:
rx_pwr_all = -40 - ((pcck_buf->cck_agc_rpt &
frag = (le32_to_cpu(prxstat->rxdw2) >> 12) & 0xf;
/* uint 2^3 = 8 bytes */
drvinfo_sz = (le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16;
- drvinfo_sz = drvinfo_sz<<3;
+ drvinfo_sz <<= 3;
if (pkt_len <= 0)
goto _exit_recvbuf2recvframe;
/* Qos data, wireless lan header length is 26 */
}
set_fwstate(pmlmepriv, _FW_UNDER_SURVEY);
r8712_enqueue_cmd(pcmdpriv, ph2c);
- _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT);
+ mod_timer(&pmlmepriv->scan_to_timer,
+ jiffies + msecs_to_jiffies(SCANNING_TIMEOUT));
padapter->ledpriv.LedControlHandler(padapter, LED_CTL_SITE_SURVEY);
padapter->blnEnableRxFF0Filter = 0;
return _SUCCESS;
* the driver just has the bssid information for PMKIDList searching.
*/
if (pmlmepriv->assoc_by_bssid == false)
- memcpy(&pmlmepriv->assoc_bssid[0],
- &pnetwork->network.MacAddress[0], ETH_ALEN);
+ ether_addr_copy(&pmlmepriv->assoc_bssid[0],
+ &pnetwork->network.MacAddress[0]);
psecnetwork->IELength = r8712_restruct_sec_ie(padapter,
&pnetwork->network.IEs[0],
&psecnetwork->IEs[0],
init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_);
ph2c->rsp = (u8 *) psetstakey_rsp;
ph2c->rspsz = sizeof(struct set_stakey_rsp);
- memcpy(psetstakey_para->addr, sta->hwaddr, ETH_ALEN);
+ ether_addr_copy(psetstakey_para->addr, sta->hwaddr);
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE))
psetstakey_para->algorithm = (unsigned char)
psecuritypriv->PrivacyAlgrthm;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, psetMacAddr_para,
_SetMacAddress_CMD_);
- memcpy(psetMacAddr_para->MacAddr, mac_addr, ETH_ALEN);
+ ether_addr_copy(psetMacAddr_para->MacAddr, mac_addr);
r8712_enqueue_cmd(pcmdpriv, ph2c);
return _SUCCESS;
}
init_h2fwcmd_w_parm_no_rsp(ph2c, psetassocsta_para, _SetAssocSta_CMD_);
ph2c->rsp = (u8 *) psetassocsta_rsp;
ph2c->rspsz = sizeof(struct set_assocsta_rsp);
- memcpy(psetassocsta_para->addr, mac_addr, ETH_ALEN);
+ ether_addr_copy(psetassocsta_para->addr, mac_addr);
r8712_enqueue_cmd(pcmdpriv, ph2c);
return _SUCCESS;
}
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
if (pcmd->res != H2C_SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
r8712_free_cmd_obj(pcmd);
}
struct cmd_obj *pcmd)
{
unsigned long irqL;
- u8 timer_cancelled;
struct sta_info *psta = NULL;
struct wlan_network *pwlan = NULL;
struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
struct wlan_network *tgt_network = &(pmlmepriv->cur_network);
if (pcmd->res != H2C_SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer, 1);
- _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
+ del_timer_sync(&pmlmepriv->assoc_timer);
#ifdef __BIG_ENDIAN
/* endian_convert */
pnetwork->Length = le32_to_cpu(pnetwork->Length);
udelay(CLOCK_RATE);
up_clk(padapter, &x);
down_clk(padapter, &x);
- mask = mask >> 1;
+ mask >>= 1;
} while (mask);
if (padapter->bSurpriseRemoved == true)
goto out;
x &= ~(_EEDO | _EEDI);
d = 0;
for (i = 0; i < 16; i++) {
- d = d << 1;
+ d <<= 1;
up_clk(padapter, &x);
if (padapter->bSurpriseRemoved == true)
goto out;
#include <linux/semaphore.h>
#include <net/iw_handler.h>
#include <linux/if_arp.h>
+#include <linux/etherdevice.h>
+
#define RTL_IOCTL_WPA_SUPPLICANT (SIOCIWFIRSTPRIV + 0x1E)
union iwreq_data wrqu;
wrqu.ap_addr.sa_family = ARPHRD_ETHER;
- memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu.ap_addr.sa_data);
wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL);
}
memcpy(psta->tkiprxmickey. skey, &(param->u.crypt.
key[24]), 8);
padapter->securitypriv. busetkipkey = false;
- _set_timer(&padapter->securitypriv.tkip_timer, 50);
+ mod_timer(&padapter->securitypriv.tkip_timer,
+ jiffies + msecs_to_jiffies(50));
}
r8712_setstakey_cmd(padapter, (unsigned char *)psta, true);
}
if (padapter->registrypriv.power_mgnt > PS_MODE_ACTIVE) {
if (padapter->registrypriv.power_mgnt != padapter->
pwrctrlpriv.pwr_mode)
- _set_timer(&(padapter->mlmepriv.dhcp_timer),
- 60000);
+ mod_timer(&padapter->mlmepriv.dhcp_timer,
+ jiffies + msecs_to_jiffies(60000));
}
}
}
/* AP MAC address */
iwe.cmd = SIOCGIWAP;
iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
- memcpy(iwe.u.ap_addr.sa_data, pnetwork->network.MacAddress, ETH_ALEN);
+ ether_addr_copy(iwe.u.ap_addr.sa_data, pnetwork->network.MacAddress);
start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN);
/* Add the ESSID */
iwe.cmd = SIOCGIWESSID;
strIssueBssid, ETH_ALEN)) {
/* BSSID is matched, the same AP => Remove
* this PMKID information and reset it. */
- memset(psecuritypriv->PMKIDList[j].Bssid,
- 0x00, ETH_ALEN);
+ eth_zero_addr(psecuritypriv->PMKIDList[j].Bssid);
psecuritypriv->PMKIDList[j].bUsed = false;
break;
}
wrqu->ap_addr.sa_family = ARPHRD_ETHER;
if (check_fwstate(pmlmepriv, _FW_LINKED | WIFI_ADHOC_MASTER_STATE |
WIFI_AP_STATE))
- memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN);
+ ether_addr_copy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress);
else
- memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN);
+ eth_zero_addr(wrqu->ap_addr.sa_data);
return 0;
}
ret = r8712_select_and_join_from_scan(pmlmepriv);
if (ret == _SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(MAX_JOIN_TIMEOUT));
else {
if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) {
/* submit r8712_createbss_cmd to change to an
spin_lock_irqsave(&pmlmepriv->lock, irqL);
if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == true) {
- u8 timer_cancelled;
-
- _cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled);
+ del_timer_sync(&pmlmepriv->scan_to_timer);
_clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY);
}
if (r8712_select_and_join_from_scan(pmlmepriv)
== _SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer,
- MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer, jiffies +
+ msecs_to_jiffies(MAX_JOIN_TIMEOUT));
else {
struct wlan_bssid_ex *pdev_network =
&(adapter->registrypriv.dev_network);
set_fwstate(pmlmepriv, _FW_UNDER_LINKING);
if (r8712_select_and_join_from_scan(pmlmepriv) ==
_SUCCESS)
- _set_timer(&pmlmepriv->assoc_timer,
- MAX_JOIN_TIMEOUT);
+ mod_timer(&pmlmepriv->assoc_timer, jiffies +
+ msecs_to_jiffies(MAX_JOIN_TIMEOUT));
else
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
padapter->ledpriv.LedControlHandler(padapter, LED_CTL_LINK);
r8712_os_indicate_connect(padapter);
if (padapter->registrypriv.power_mgnt > PS_MODE_ACTIVE)
- _set_timer(&pmlmepriv->dhcp_timer, 60000);
+ mod_timer(&pmlmepriv->dhcp_timer,
+ jiffies + msecs_to_jiffies(60000));
}
}
if (padapter->pwrctrlpriv.pwr_mode !=
padapter->registrypriv.power_mgnt) {
- _cancel_timer_ex(&pmlmepriv->dhcp_timer);
+ del_timer_sync(&pmlmepriv->dhcp_timer);
r8712_set_ps_mode(padapter, padapter->registrypriv.power_mgnt,
padapter->registrypriv.smart_ps);
}
void r8712_joinbss_event_callback(struct _adapter *adapter, u8 *pbuf)
{
unsigned long irqL = 0, irqL2;
- u8 timer_cancelled;
struct sta_info *ptarget_sta = NULL, *pcur_sta = NULL;
struct sta_priv *pstapriv = &adapter->stapriv;
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
if (sizeof(struct list_head) == 4 * sizeof(u32)) {
pnetwork = kmalloc(sizeof(struct wlan_network), GFP_ATOMIC);
+ if (!pnetwork)
+ return;
memcpy((u8 *)pnetwork+16, (u8 *)pbuf + 8,
sizeof(struct wlan_network) - 16);
} else
if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)
== true)
r8712_indicate_connect(adapter);
- _cancel_timer(&pmlmepriv->assoc_timer,
- &timer_cancelled);
+ del_timer_sync(&pmlmepriv->assoc_timer);
} else
goto ignore_joinbss_callback;
} else {
if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == true) {
- _set_timer(&pmlmepriv->assoc_timer, 1);
+ mod_timer(&pmlmepriv->assoc_timer,
+ jiffies + msecs_to_jiffies(1));
_clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING);
}
}
iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid);
if (iEntry < 0)
return ielength;
- else {
- if (authmode == _WPA2_IE_ID_) {
- out_ie[ielength] = 1;
- ielength++;
- out_ie[ielength] = 0; /*PMKID count = 0x0100*/
- ielength++;
- memcpy(&out_ie[ielength],
- &psecuritypriv->PMKIDList[iEntry].PMKID, 16);
- ielength += 16;
- out_ie[13] += 18;/*PMKID length = 2+16*/
- }
+ if (authmode == _WPA2_IE_ID_) {
+ out_ie[ielength] = 1;
+ ielength++;
+ out_ie[ielength] = 0; /*PMKID count = 0x0100*/
+ ielength++;
+ memcpy(&out_ie[ielength],
+ &psecuritypriv->PMKIDList[iEntry].PMKID, 16);
+ ielength += 16;
+ out_ie[13] += 18;/*PMKID length = 2+16*/
}
return ielength;
}
u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D, tmpAGC;
TxAGCOffset_B = (ulTxAGCOffset&0x000000ff);
- TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8);
- TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16);
+ TxAGCOffset_C = (ulTxAGCOffset & 0x0000ff00)>>8;
+ TxAGCOffset_D = (ulTxAGCOffset & 0x00ff0000)>>16;
tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B);
set_bb_reg(pAdapter, rFPGA0_TxGainStage,
(bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC);
if (pwrpriv->cpwm_tog == ((preportpwrstate->state) & 0x80))
return;
- _cancel_timer_ex(&padapter->pwrctrlpriv. rpwm_check_timer);
+ del_timer_sync(&padapter->pwrctrlpriv.rpwm_check_timer);
_enter_pwrlock(&pwrpriv->lock);
pwrpriv->cpwm = (preportpwrstate->state) & 0xf;
if (pwrpriv->cpwm >= PS_STATE_S2) {
}
}
-static void rpwm_check_handler (void *FunctionContext)
+static void rpwm_check_handler (unsigned long data)
{
- struct _adapter *adapter = (struct _adapter *)FunctionContext;
+ struct _adapter *adapter = (struct _adapter *)data;
_rpwm_check_handler(adapter);
}
r8712_write8(padapter, 0x1025FE58, 0);
INIT_WORK(&pwrctrlpriv->SetPSModeWorkItem, SetPSModeWorkItemCallback);
INIT_WORK(&pwrctrlpriv->rpwm_workitem, rpwm_workitem_callback);
- _init_timer(&(pwrctrlpriv->rpwm_check_timer),
- padapter->pnetdev, rpwm_check_handler, (u8 *)padapter);
+ setup_timer(&pwrctrlpriv->rpwm_check_timer, rpwm_check_handler,
+ (unsigned long)padapter);
}
/*
return _FAIL;
if (psta == NULL)
return _FAIL;
- else
- precv_frame->u.hdr.psta = psta;
+ precv_frame->u.hdr.psta = psta;
pattrib->amsdu = 0;
/* parsing QC field */
if (pattrib->qos == 1) {
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
- frsubtype = frsubtype >> 4;
+ frsubtype >>= 4;
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
memset((void *)mic_header2, 0, 16);
payload_remainder = plen % 16;
num_blocks = plen / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
bitwise_xor(aes_out, mic_header1, chain_buffer);
uint frtype = GetFrameType(pframe);
uint frsubtype = GetFrameSubType(pframe);
- frsubtype = frsubtype >> 4;
+ frsubtype >>= 4;
memset((void *)mic_iv, 0, 16);
memset((void *)mic_header1, 0, 16);
memset((void *)mic_header2, 0, 16);
payload_remainder = (plen - 8) % 16;
num_blocks = (plen - 8) / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
bitwise_xor(aes_out, mic_header1, chain_buffer);
return _SUCCESS;
}
-void r8712_use_tkipkey_handler(void *FunctionContext)
+void r8712_use_tkipkey_handler(unsigned long data)
{
- struct _adapter *padapter = (struct _adapter *)FunctionContext;
+ struct _adapter *padapter = (struct _adapter *)data;
padapter->securitypriv.busetkipkey = true;
}
u32 r8712_aes_decrypt(struct _adapter *padapter, u8 *precvframe);
u32 r8712_tkip_decrypt(struct _adapter *padapter, u8 *precvframe);
void r8712_wep_decrypt(struct _adapter *padapter, u8 *precvframe);
-void r8712_use_tkipkey_handler(void *FunctionContext);
+void r8712_use_tkipkey_handler(unsigned long data);
#endif /*__RTL871X_SECURITY_H_ */
* cancel reordering_ctrl_timer */
for (i = 0; i < 16; i++) {
preorder_ctrl = &psta->recvreorder_ctrl[i];
- _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
+ del_timer_sync(&preorder_ctrl->reordering_ctrl_timer);
}
spin_lock(&(pfree_sta_queue->lock));
/* insert into free_sta_queue; 20061114 */
pattrib->ether_type = ntohs(etherhdr.h_proto);
{
- u8 bool;
/*If driver xmit ARP packet, driver can set ps mode to initial
* setting. It stands for getting DHCP or fix IP.*/
if (pattrib->ether_type == 0x0806) {
if (padapter->pwrctrlpriv.pwr_mode !=
padapter->registrypriv.power_mgnt) {
- _cancel_timer(&(pmlmepriv->dhcp_timer), &bool);
+ del_timer_sync(&pmlmepriv->dhcp_timer);
r8712_set_ps_mode(padapter, padapter->registrypriv.
power_mgnt, padapter->registrypriv.smart_ps);
}
#define GetPrivacy(pbuf) (((*(unsigned short *)(pbuf)) & \
le16_to_cpu(_PRIVACY_)) != 0)
-#define ClearPrivacy(pbuf) ({ \
- *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PRIVACY_)); \
-})
-
-
#define GetOrder(pbuf) (((*(unsigned short *)(pbuf)) & \
le16_to_cpu(_ORDER_)) != 0)
#define SetFrameType(pbuf, type) \
do { \
- *(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | \
+ *(unsigned short *)(pbuf) &= cpu_to_le16(~(BIT(3) | \
BIT(2))); \
- *(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \
+ *(unsigned short *)(pbuf) |= cpu_to_le16(type); \
} while (0)
#define GetFrameSubType(pbuf) (cpu_to_le16(*(unsigned short *)(pbuf)) & \
#define GetFragNum(pbuf) (cpu_to_le16(*(unsigned short *)((addr_t)\
(pbuf) + 22)) & 0x0f)
-#define GetTupleCache(pbuf) (cpu_to_le16(*(unsigned short *)\
- ((addr_t)(pbuf) + 22)))
-
-#define SetFragNum(pbuf, num) ({ \
- *(unsigned short *)((addr_t)(pbuf) + 22) = \
- ((*(unsigned short *)((addr_t)(pbuf) + 22)) & \
- le16_to_cpu(~(0x000f))) | \
- cpu_to_le16(0x0f & (num)); \
-})
-
#define SetSeqNum(pbuf, num) ({ \
*(unsigned short *)((addr_t)(pbuf) + 22) = \
((*(unsigned short *)((addr_t)(pbuf) + 22)) & \
#define GetAMsdu(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 7) & 0x1)
-#define SetAMsdu(pbuf, amsdu) ({ \
- *(unsigned short *)(pbuf) |= cpu_to_le16((amsdu & 1) << 7); \
-})
-
#define GetAid(pbuf) (cpu_to_le16(*(unsigned short *)((addr_t)(pbuf) + 2)) \
& 0x3fff)
-#define GetTid(pbuf) (cpu_to_le16(*(unsigned short *)((addr_t)(pbuf) + \
- (((GetToDs(pbuf) << 1)|GetFrDs(pbuf)) == 3 ? \
- 30 : 24))) & 0x000f)
-
#define GetAddr1Ptr(pbuf) ((unsigned char *)((addr_t)(pbuf) + 4))
#define GetAddr2Ptr(pbuf) ((unsigned char *)((addr_t)(pbuf) + 10))
#include <wifi.h>
#include <rtl8723a_cmd.h>
#include <rtl8723a_hal.h>
+#include <asm/unaligned.h>
extern unsigned char WMM_OUI23A[];
extern unsigned char WPS_OUI23A[];
struct wlan_bssid_ex *pnetwork_mlmeext = &pmlmeinfo->network;
unsigned char *pie = pnetwork_mlmeext->IEs;
u8 *p, *dst_ie, *premainder_ie = NULL, *pbackup_remainder_ie = NULL;
- __le16 tim_bitmap_le;
uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen;
- tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap);
-
p = rtw_get_ie23a(pie, WLAN_EID_TIM, &tim_ielen,
pnetwork_mlmeext->IELength);
if (p != NULL && tim_ielen > 0) {
*dst_ie++ = 0;
if (tim_ielen == 4) {
- *dst_ie++ = *(u8 *)&tim_bitmap_le;
+ *dst_ie++ = pstapriv->tim_bitmap & 0xff;
} else if (tim_ielen == 5) {
- memcpy(dst_ie, &tim_bitmap_le, 2);
+ put_unaligned_le16(pstapriv->tim_bitmap, dst_ie);
dst_ie += 2;
}
struct wlan_bssid_ex *pbss_network = &pmlmepriv->cur_network.network;
u8 *ie = pbss_network->IEs;
u8 *pbuf = mgmt->u.beacon.variable;
+
len -= offsetof(struct ieee80211_mgmt, u.beacon.variable);
/* SSID */
/* Supported rates */
if (psta->flags & WLAN_STA_HT) {
u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info);
- DBG_8723A("HT: STA " MAC_FMT " HT Capabilities "
- "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab);
+ DBG_8723A("HT: STA " MAC_FMT " HT Capabilities Info: 0x%04x\n",
+ MAC_ARG(psta->hwaddr), ht_capab);
if (psta->no_ht_set) {
psta->no_ht_set = 0;
RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
("\nCan't alloc sta_info when "
"createbss_cmd_callback\n"));
- goto createbss_cmd_fail ;
+ goto createbss_cmd_fail;
}
}
}
data = rtl8723au_read8(Adapter, EFUSE_CTRL);
return data;
- }
- else
+ } else
return 0xFF;
}/* EFUSE_Read1Byte23a */
IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK;
} else {
/* immediate ack & 64 buffer size */
- BA_para_set = (0x1002 | ((status & 0xf) << 2));
+ BA_para_set = 0x1002 | ((status & 0xf) << 2);
}
put_unaligned_le16(BA_para_set,
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct survey_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct survey_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
if (psta)
mac_id = (int)psta->mac_id;
else
- mac_id = (-1);
+ mac_id = -1;
pdel_sta_evt->mac_id = mac_id;
if (!pcmd_obj)
return;
- cmdsz = (sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header));
+ cmdsz = sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header);
pevtcmd = kzalloc(cmdsz, GFP_ATOMIC);
if (!pevtcmd) {
kfree(pcmd_obj);
/* 0~3 for default key, cmd_id = macid + 3,
macid = aid+1; */
- cam_id = (psta->mac_id + 3);
+ cam_id = psta->mac_id + 3;
DBG_8723A("Write CAM, mac_addr =%x:%x:%x:%x:%x:%x, "
"cam_entry =%d\n", pparm->addr[0],
/* update value of signal_strength, rssi, signal_qual */
if (!check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY)) {
- tmp_s = (avg_signal_strength + (_alpha - 1) *
- recvpriv->signal_strength);
+ tmp_s = avg_signal_strength + (_alpha - 1) *
+ recvpriv->signal_strength;
if (tmp_s %_alpha)
tmp_s = tmp_s / _alpha + 1;
else
}
-static int bcrc32initialized = 0;
+static int bcrc32initialized;
static u32 crc32_table[256];
static u8 crc32_reverseBit(u8 data)
num_blocks = plen / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
num_blocks = (plen-8) / 16;
/* Find start of payload */
- payload_index = (hdrlen + 8);
+ payload_index = hdrlen + 8;
/* Calculate MIC */
aes128k128d(key, mic_iv, aes_out);
#define DPK_DELTA_MAPPING_NUM 13
#define index_mapping_HP_NUM 15
/* 091212 chiyokolin */
-static void
-odm_TXPowerTrackingCallback_ThermalMeter_92C(
- struct rtw_adapter *Adapter)
+static void
+odm_TXPowerTrackingCallback_ThermalMeter_92C(struct rtw_adapter *Adapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
s8 OFDM_index[2], CCK_index = 0, OFDM_index_old[2] = {0};
s8 CCK_index_old = 0;
int i = 0;
- bool is2T = IS_92C_SERIAL(pHalData->VersionID);
u8 OFDM_min_index = 6, rf; /* OFDM BB Swing should be less than +3.0dB*/
u8 ThermalValue_HP_count = 0;
u32 ThermalValue_HP = 0;
rtl8723a_phy_ap_calibrate(Adapter, (ThermalValue -
pHalData->EEPROMThermalMeter));
- if (is2T)
+ if (pHalData->rf_type == RF_2T2R)
rf = 2;
else
rf = 1;
if (ThermalValue) {
/* Query OFDM path A default setting */
- ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance,
- bMaskDWord)&bMaskOFDM_D;
+ ele_D = rtl8723au_read32(Adapter, rOFDM0_XATxIQImbalance) &
+ bMaskOFDM_D;
for (i = 0; i < OFDM_TABLE_SIZE_92C; i++) {
/* find the index */
if (ele_D == (OFDMSwingTable23A[i]&bMaskOFDM_D)) {
}
/* Query OFDM path B default setting */
- if (is2T) {
- ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XBTxIQImbalance,
- bMaskDWord)&bMaskOFDM_D;
+ if (pHalData->rf_type == RF_2T2R) {
+ ele_D = rtl8723au_read32(Adapter,
+ rOFDM0_XBTxIQImbalance);
+ ele_D &= bMaskOFDM_D;
for (i = 0; i < OFDM_TABLE_SIZE_92C; i++) { /* find the index */
if (ele_D == (OFDMSwingTable23A[i]&bMaskOFDM_D)) {
OFDM_index_old[1] = (u8)i;
}
/* Query CCK default setting From 0xa24 */
- TempCCk = PHY_QueryBBReg(Adapter, rCCK0_TxFilter2,
- bMaskDWord)&bMaskCCK;
+ TempCCk = rtl8723au_read32(Adapter, rCCK0_TxFilter2) & bMaskCCK;
for (i = 0 ; i < CCK_TABLE_SIZE ; i++) {
if (pdmpriv->bCCKinCH14) {
if (!memcmp(&TempCCk,
}
if (CCK_index > (CCK_TABLE_SIZE-1))
- CCK_index = (CCK_TABLE_SIZE-1);
+ CCK_index = CCK_TABLE_SIZE-1;
else if (CCK_index < 0)
CCK_index = 0;
}
- if (pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0)) {
+ if (pdmpriv->TxPowerTrackControl &&
+ (delta != 0 || delta_HP != 0)) {
/* Adujst OFDM Ant_A according to IQK result */
ele_D = (OFDMSwingTable23A[OFDM_index[0]] & 0xFFC00000)>>22;
X = pdmpriv->RegE94;
/* write new elements A, C, D to regC80 and regC94, element B is always 0 */
value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A;
- PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
+ rtl8723au_write32(Adapter,
+ rOFDM0_XATxIQImbalance,
+ value32);
value32 = (ele_C&0x000003C0)>>6;
PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold,
BIT(29), value32);
} else {
- PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance,
- bMaskDWord,
- OFDMSwingTable23A[OFDM_index[0]]);
+ rtl8723au_write32(Adapter,
+ rOFDM0_XATxIQImbalance,
+ OFDMSwingTable23A[OFDM_index[0]]);
PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE,
bMaskH4Bits, 0x00);
PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold,
rtl8723au_write8(Adapter, 0xa29, CCKSwingTable_Ch1423A[CCK_index][7]);
}
- if (is2T) {
+ if (pHalData->rf_type == RF_2T2R) {
ele_D = (OFDMSwingTable23A[(u8)OFDM_index[1]] & 0xFFC00000)>>22;
/* new element A = element D x X */
/* write new elements A, C, D to regC88 and regC9C, element B is always 0 */
value32 = (ele_D<<22)|((ele_C&0x3F)<<16) | ele_A;
- PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32);
+ rtl8723au_write32(Adapter, rOFDM0_XBTxIQImbalance, value32);
value32 = (ele_C&0x000003C0)>>6;
PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32);
rOFDM0_ECCAThreshold,
BIT(25), value32);
} else {
- PHY_SetBBReg(Adapter,
- rOFDM0_XBTxIQImbalance,
- bMaskDWord,
- OFDMSwingTable23A[OFDM_index[1]]);
+ rtl8723au_write32(Adapter,
+ rOFDM0_XBTxIQImbalance,
+ OFDMSwingTable23A[OFDM_index[1]]);
PHY_SetBBReg(Adapter,
rOFDM0_XDTxAFE,
bMaskH4Bits, 0x00);
odm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter);
}
-static void odm_CheckTXPowerTracking_ThermalMeter(struct rtw_adapter *Adapter)
+void rtl8723a_odm_check_tx_power_tracking(struct rtw_adapter *Adapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
- struct dm_odm_t *podmpriv = &pHalData->odmpriv;
-
- if (!(podmpriv->SupportAbility & ODM_RF_TX_PWR_TRACK))
- return;
if (!pdmpriv->TM_Trigger) { /* at least delay 1 sec */
PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
}
}
-void rtl8723a_odm_check_tx_power_tracking(struct rtw_adapter *Adapter)
-{
- odm_CheckTXPowerTracking_ThermalMeter(Adapter);
-}
-
/* IQK */
#define MAX_TOLERANCE 5
#define IQK_DELAY_TIME 1 /* ms */
struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
/* path-A IQK setting */
- PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
- PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
- PHY_SetBBReg(pAdapter, rTx_IQK_PI_A, bMaskDWord, 0x82140102);
+ rtl8723au_write32(pAdapter, rTx_IQK_Tone_A, 0x10008c1f);
+ rtl8723au_write32(pAdapter, rRx_IQK_Tone_A, 0x10008c1f);
+ rtl8723au_write32(pAdapter, rTx_IQK_PI_A, 0x82140102);
- PHY_SetBBReg(pAdapter, rRx_IQK_PI_A, bMaskDWord, configPathB ? 0x28160202 :
+ rtl8723au_write32(pAdapter, rRx_IQK_PI_A, configPathB ? 0x28160202 :
IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)?0x28160202:0x28160502);
/* path-B IQK setting */
if (configPathB) {
- PHY_SetBBReg(pAdapter, rTx_IQK_Tone_B, bMaskDWord, 0x10008c22);
- PHY_SetBBReg(pAdapter, rRx_IQK_Tone_B, bMaskDWord, 0x10008c22);
- PHY_SetBBReg(pAdapter, rTx_IQK_PI_B, bMaskDWord, 0x82140102);
- PHY_SetBBReg(pAdapter, rRx_IQK_PI_B, bMaskDWord, 0x28160202);
+ rtl8723au_write32(pAdapter, rTx_IQK_Tone_B, 0x10008c22);
+ rtl8723au_write32(pAdapter, rRx_IQK_Tone_B, 0x10008c22);
+ rtl8723au_write32(pAdapter, rTx_IQK_PI_B, 0x82140102);
+ rtl8723au_write32(pAdapter, rRx_IQK_PI_B, 0x28160202);
}
/* LO calibration setting */
- PHY_SetBBReg(pAdapter, rIQK_AGC_Rsp, bMaskDWord, 0x001028d1);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Rsp, 0x001028d1);
/* One shot, path A LOK & IQK */
- PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
- PHY_SetBBReg(pAdapter, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Pts, 0xf9000000);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Pts, 0xf8000000);
/* delay x ms */
- udelay(IQK_DELAY_TIME*1000);/* PlatformStallExecution(IQK_DELAY_TIME*1000); */
+ /* PlatformStallExecution(IQK_DELAY_TIME*1000); */
+ udelay(IQK_DELAY_TIME*1000);
/* Check failed */
- regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
- regE94 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord);
- regE9C = PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord);
- regEA4 = PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord);
+ regEAC = rtl8723au_read32(pAdapter, rRx_Power_After_IQK_A_2);
+ regE94 = rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_A);
+ regE9C = rtl8723au_read32(pAdapter, rTx_Power_After_IQK_A);
+ regEA4 = rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_A_2);
if (!(regEAC & BIT(28)) &&
(((regE94 & 0x03FF0000)>>16) != 0x142) &&
else /* if Tx not OK, ignore Rx */
return result;
- if (!(regEAC & BIT(27)) && /* if Tx is OK, check whether Rx is OK */
+ if (!(regEAC & BIT(27)) && /* if Tx is OK, check whether Rx is OK */
(((regEA4 & 0x03FF0000)>>16) != 0x132) &&
(((regEAC & 0x03FF0000)>>16) != 0x36))
result |= 0x02;
u8 result = 0x00;
/* One shot, path B LOK & IQK */
- PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000002);
- PHY_SetBBReg(pAdapter, rIQK_AGC_Cont, bMaskDWord, 0x00000000);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Cont, 0x00000002);
+ rtl8723au_write32(pAdapter, rIQK_AGC_Cont, 0x00000000);
/* delay x ms */
udelay(IQK_DELAY_TIME*1000);
/* Check failed */
- regEAC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord);
- regEB4 = PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord);
- regEBC = PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord);
- regEC4 = PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord);
- regECC = PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord);
+ regEAC = rtl8723au_read32(pAdapter, rRx_Power_After_IQK_A_2);
+ regEB4 = rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_B);
+ regEBC = rtl8723au_read32(pAdapter, rTx_Power_After_IQK_B);
+ regEC4 = rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_B_2);
+ regECC = rtl8723au_read32(pAdapter, rRx_Power_After_IQK_B_2);
if (!(regEAC & BIT(31)) &&
(((regEB4 & 0x03FF0000)>>16) != 0x142) &&
if (final_candidate == 0xFF) {
return;
} else if (bIQKOK) {
- Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
+ Oldval_0 = rtl8723au_read32(pAdapter, rOFDM0_XATxIQImbalance);
+ Oldval_0 = (Oldval_0 >> 22) & 0x3FF;
X = result[final_candidate][0];
if ((X & 0x00000200) != 0)
X = X | 0xFFFFFC00;
TX0_A = (X * Oldval_0) >> 8;
PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A);
- PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X * Oldval_0>>7) & 0x1));
+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31),
+ ((X * Oldval_0>>7) & 0x1));
Y = result[final_candidate][1];
if ((Y & 0x00000200) != 0)
Y = Y | 0xFFFFFC00;
TX0_C = (Y * Oldval_0) >> 8;
- PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6));
- PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F));
- PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y * Oldval_0>>7) & 0x1));
+ PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000,
+ ((TX0_C&0x3C0)>>6));
+ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000,
+ (TX0_C&0x3F));
+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29),
+ ((Y * Oldval_0>>7) & 0x1));
if (bTxOnly) {
DBG_8723A("_PHY_PathAFillIQKMatrix only Tx OK\n");
if (final_candidate == 0xFF) {
return;
} else if (bIQKOK) {
- Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF;
+ Oldval_1 = rtl8723au_read32(pAdapter, rOFDM0_XBTxIQImbalance);
+ Oldval_1 = (Oldval_1 >> 22) & 0x3FF;
X = result[final_candidate][4];
if ((X & 0x00000200) != 0)
X = X | 0xFFFFFC00;
TX1_A = (X * Oldval_1) >> 8;
PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A);
- PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X * Oldval_1>>7) & 0x1));
+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27),
+ ((X * Oldval_1 >> 7) & 0x1));
Y = result[final_candidate][5];
if ((Y & 0x00000200) != 0)
Y = Y | 0xFFFFFC00;
TX1_C = (Y * Oldval_1) >> 8;
- PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6));
- PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F));
- PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y * Oldval_1>>7) & 0x1));
+ PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000,
+ ((TX1_C & 0x3C0) >> 6));
+ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000,
+ (TX1_C & 0x3F));
+ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25),
+ ((Y * Oldval_1 >> 7) & 0x1));
if (bTxOnly)
return;
u32 i;
for (i = 0 ; i < RegisterNum ; i++) {
- ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord);
+ ADDABackup[i] = rtl8723au_read32(pAdapter, ADDAReg[i]);
}
}
-static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32 *MACBackup)
+static void _PHY_SaveMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg,
+ u32 *MACBackup)
{
u32 i;
MACBackup[i] = rtl8723au_read32(pAdapter, MACReg[i]);
}
-static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter, u32 *ADDAReg, u32 *ADDABackup, u32 RegiesterNum)
+static void _PHY_ReloadADDARegisters(struct rtw_adapter *pAdapter,
+ u32 *ADDAReg, u32 *ADDABackup,
+ u32 RegiesterNum)
{
u32 i;
for (i = 0 ; i < RegiesterNum ; i++) {
- PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]);
+ rtl8723au_write32(pAdapter, ADDAReg[i], ADDABackup[i]);
}
}
-static void _PHY_ReloadMACRegisters(struct rtw_adapter *pAdapter, u32 *MACReg, u32 *MACBackup)
+static void _PHY_ReloadMACRegisters(struct rtw_adapter *pAdapter,
+ u32 *MACReg, u32 *MACBackup)
{
u32 i;
rtl8723au_write32(pAdapter, MACReg[i], MACBackup[i]);
}
-static void _PHY_PathADDAOn(struct rtw_adapter *pAdapter, u32 *ADDAReg, bool isPathAOn, bool is2T)
+static void _PHY_PathADDAOn(struct rtw_adapter *pAdapter, u32 *ADDAReg,
+ bool isPathAOn, bool is2T)
{
u32 pathOn;
u32 i;
pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4;
if (!is2T) {
pathOn = 0x0bdb25a0;
- PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0);
+ rtl8723au_write32(pAdapter, ADDAReg[0], 0x0b1b25a0);
} else {
- PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn);
+ rtl8723au_write32(pAdapter, ADDAReg[0], pathOn);
}
for (i = 1 ; i < IQK_ADDA_REG_NUM ; i++)
- PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn);
+ rtl8723au_write32(pAdapter, ADDAReg[i], pathOn);
}
-static void _PHY_MACSettingCalibration(struct rtw_adapter *pAdapter, u32 *MACReg, u32 *MACBackup)
+static void _PHY_MACSettingCalibration(struct rtw_adapter *pAdapter,
+ u32 *MACReg, u32 *MACBackup)
{
u32 i = 0;
static void _PHY_PathAStandBy(struct rtw_adapter *pAdapter)
{
- PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x0);
- PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000);
- PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
+ rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x0);
+ rtl8723au_write32(pAdapter, 0x840, 0x00010000);
+ rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x80800000);
}
static void _PHY_PIModeSwitch(struct rtw_adapter *pAdapter, bool PIMode)
u32 mode;
mode = PIMode ? 0x01000100 : 0x01000000;
- PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode);
- PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode);
+ rtl8723au_write32(pAdapter, 0x820, mode);
+ rtl8723au_write32(pAdapter, 0x828, mode);
}
/*
u32 i, j, diff, SimularityBitMap, bound = 0;
struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
u8 final_candidate[2] = {0xFF, 0xFF}; /* for path A and path B */
- bool bResult = true, is2T = IS_92C_SERIAL(pHalData->VersionID);
+ bool bResult = true;
- if (is2T)
+ if (pHalData->rf_type == RF_2T2R)
bound = 8;
else
bound = 4;
for (i = 0; i < 4; i++)
result[3][i] = result[c1][i];
return false;
- } else if (!(SimularityBitMap & 0xF0) && is2T) {
+ } else if (!(SimularityBitMap & 0xF0) && pHalData->rf_type == RF_2T2R) {
/* path B OK */
for (i = 4; i < 8; i++)
result[3][i] = result[c1][i];
u32 bbvalue;
if (t == 0) {
- bbvalue = PHY_QueryBBReg(pAdapter, rFPGA0_RFMOD, bMaskDWord);
+ bbvalue = rtl8723au_read32(pAdapter, rFPGA0_RFMOD);
/* Save ADDA parameters, turn Path A ADDA on */
_PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM);
}
PHY_SetBBReg(pAdapter, rFPGA0_RFMOD, BIT(24), 0x00);
- PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskDWord, 0x03a05600);
- PHY_SetBBReg(pAdapter, rOFDM0_TRMuxPar, bMaskDWord, 0x000800e4);
- PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22204000);
+ rtl8723au_write32(pAdapter, rOFDM0_TRxPathEnable, 0x03a05600);
+ rtl8723au_write32(pAdapter, rOFDM0_TRMuxPar, 0x000800e4);
+ rtl8723au_write32(pAdapter, rFPGA0_XCD_RFInterfaceSW, 0x22204000);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(10), 0x01);
PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT(26), 0x01);
PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT(10), 0x00);
PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT(10), 0x00);
if (is2T) {
- PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00010000);
- PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00010000);
+ rtl8723au_write32(pAdapter,
+ rFPGA0_XA_LSSIParameter, 0x00010000);
+ rtl8723au_write32(pAdapter,
+ rFPGA0_XB_LSSIParameter, 0x00010000);
}
/* MAC settings */
_PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup);
/* Page B init */
- PHY_SetBBReg(pAdapter, rConfig_AntA, bMaskDWord, 0x00080000);
+ rtl8723au_write32(pAdapter, rConfig_AntA, 0x00080000);
if (is2T)
- PHY_SetBBReg(pAdapter, rConfig_AntB, bMaskDWord, 0x00080000);
+ rtl8723au_write32(pAdapter, rConfig_AntB, 0x00080000);
/* IQ calibration setting */
- PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0x80800000);
- PHY_SetBBReg(pAdapter, rTx_IQK, bMaskDWord, 0x01007c00);
- PHY_SetBBReg(pAdapter, rRx_IQK, bMaskDWord, 0x01004800);
+ rtl8723au_write32(pAdapter, rFPGA0_IQK, 0x80800000);
+ rtl8723au_write32(pAdapter, rTx_IQK, 0x01007c00);
+ rtl8723au_write32(pAdapter, rRx_IQK, 0x01004800);
for (i = 0 ; i < retryCount ; i++) {
PathAOK = _PHY_PathA_IQK(pAdapter, is2T);
if (PathAOK == 0x03) {
DBG_8723A("Path A IQK Success!!\n");
- result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
- result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
- result[t][2] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
- result[t][3] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16;
+ result[t][0] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_A)&0x3FF0000)>>16;
+ result[t][1] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_A)&0x3FF0000)>>16;
+ result[t][2] = (rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_A_2)&0x3FF0000)>>16;
+ result[t][3] = (rtl8723au_read32(pAdapter, rRx_Power_After_IQK_A_2)&0x3FF0000)>>16;
break;
} else if (i == (retryCount-1) && PathAOK == 0x01) {
/* Tx IQK OK */
DBG_8723A("Path A IQK Only Tx Success!!\n");
- result[t][0] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;
- result[t][1] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;
+ result[t][0] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_A)&0x3FF0000)>>16;
+ result[t][1] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_A)&0x3FF0000)>>16;
}
}
PathBOK = _PHY_PathB_IQK(pAdapter);
if (PathBOK == 0x03) {
DBG_8723A("Path B IQK Success!!\n");
- result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
- result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
- result[t][6] = (PHY_QueryBBReg(pAdapter, rRx_Power_Before_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
- result[t][7] = (PHY_QueryBBReg(pAdapter, rRx_Power_After_IQK_B_2, bMaskDWord)&0x3FF0000)>>16;
+ result[t][4] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_B)&0x3FF0000)>>16;
+ result[t][5] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_B)&0x3FF0000)>>16;
+ result[t][6] = (rtl8723au_read32(pAdapter, rRx_Power_Before_IQK_B_2)&0x3FF0000)>>16;
+ result[t][7] = (rtl8723au_read32(pAdapter, rRx_Power_After_IQK_B_2)&0x3FF0000)>>16;
break;
} else if (i == (retryCount - 1) && PathBOK == 0x01) {
/* Tx IQK OK */
DBG_8723A("Path B Only Tx IQK Success!!\n");
- result[t][4] = (PHY_QueryBBReg(pAdapter, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
- result[t][5] = (PHY_QueryBBReg(pAdapter, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
+ result[t][4] = (rtl8723au_read32(pAdapter, rTx_Power_Before_IQK_B)&0x3FF0000)>>16;
+ result[t][5] = (rtl8723au_read32(pAdapter, rTx_Power_After_IQK_B)&0x3FF0000)>>16;
}
}
}
/* Back to BB mode, load original value */
- PHY_SetBBReg(pAdapter, rFPGA0_IQK, bMaskDWord, 0);
+ rtl8723au_write32(pAdapter, rFPGA0_IQK, 0);
if (t != 0) {
if (!pdmpriv->bRfPiEnable) {
_PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM);
/* Restore RX initial gain */
- PHY_SetBBReg(pAdapter, rFPGA0_XA_LSSIParameter, bMaskDWord, 0x00032ed3);
+ rtl8723au_write32(pAdapter,
+ rFPGA0_XA_LSSIParameter, 0x00032ed3);
if (is2T) {
- PHY_SetBBReg(pAdapter, rFPGA0_XB_LSSIParameter, bMaskDWord, 0x00032ed3);
+ rtl8723au_write32(pAdapter,
+ rFPGA0_XB_LSSIParameter, 0x00032ed3);
}
/* load 0xe30 IQC default value */
- PHY_SetBBReg(pAdapter, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
- PHY_SetBBReg(pAdapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
+ rtl8723au_write32(pAdapter, rTx_IQK_Tone_A, 0x01008c00);
+ rtl8723au_write32(pAdapter, rRx_IQK_Tone_A, 0x01008c00);
}
}
is13simular = false;
for (i = 0; i < 3; i++) {
- if (IS_92C_SERIAL(pHalData->VersionID)) {
- _PHY_IQCalibrate(pAdapter, result, i, true);
- } else {
- /* For 88C 1T1R */
+ if (pHalData->rf_type == RF_2T2R)
+ _PHY_IQCalibrate(pAdapter, result, i, true);
+ else /* For 88C 1T1R */
_PHY_IQCalibrate(pAdapter, result, i, false);
- }
if (i == 1) {
is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1);
if ((RegE94 != 0)/*&&(RegEA4 != 0)*/)
_PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0));
- if (IS_92C_SERIAL(pHalData->VersionID)) {
+ if (pHalData->rf_type == RF_2T2R) {
if ((RegEB4 != 0)/*&&(RegEC4 != 0)*/)
- _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0));
+ _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result,
+ final_candidate, (RegEC4 == 0));
}
_PHY_SaveADDARegisters(pAdapter, IQK_BB_REG_92C, pdmpriv->IQK_BB_backup_recover, 9);
if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS)
return;
- if (IS_92C_SERIAL(pHalData->VersionID)) {
+ if (pHalData->rf_type == RF_2T2R)
_PHY_LCCalibrate(pAdapter, true);
- } else {
- /* For 88C 1T1R */
+ else /* For 88C 1T1R */
_PHY_LCCalibrate(pAdapter, false);
- }
}
void
return false;
cond = Condition & 0x0000FF00;
- cond = cond >> 8;
+ cond >>= 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = Condition & 0x00FF0000;
- cond = cond >> 16;
+ cond >>= 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
void ODM_ReadAndConfig_AGC_TAB_1T_8723A(struct dm_odm_t *pDM_Odm)
{
-
u32 hex;
u32 i;
u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_AGC_TAB_1T_8723A)/sizeof(u32);
u32 *Array = Array_AGC_TAB_1T_8723A;
hex = board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2) {
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
- odm_ConfigBB_AGC_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_AGC_8723A(pDM_Odm, v1, v2);
continue;
} else {
if (!CheckCondition(Array[i], hex)) {
- /* Discard the following (offset, data) pairs. */
+ /* Discard the following (offset, data) pairs */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
READ_NEXT_PAIR(v1, v2, i);
i -= 2; /* prevent from for-loop += 2 */
} else {
- /* Configure matched pairs and skip to end of if-else. */
+ /* Configure matched pairs and skip to
+ end of if-else. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen - 2) {
- odm_ConfigBB_AGC_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_AGC_8723A(pDM_Odm, v1, v2);
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen - 2)
u32 hex = 0;
u32 i = 0;
u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_PHY_REG_1T_8723A)/sizeof(u32);
u32 *Array = Array_PHY_REG_1T_8723A;
hex += board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2) {
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
- odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2);
continue;
} else {
if (!CheckCondition(Array[i], hex)) {
- /* Discard the following (offset, data) pairs. */
+ /* Discard the following (offset, data) pairs */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
READ_NEXT_PAIR(v1, v2, i);
i -= 2; /* prevent from for-loop += 2 */
} else {
- /* Configure matched pairs and skip to end of if-else. */
+ /* Configure matched pairs and skip to
+ end of if-else. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen - 2) {
- odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2);
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen - 2)
void ODM_ReadAndConfig_PHY_REG_MP_8723A(struct dm_odm_t *pDM_Odm)
{
- u32 hex = 0;
- u32 i = 0;
- u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
- u8 board = pDM_Odm->BoardType;
- u32 ArrayLen = sizeof(Array_PHY_REG_MP_8723A)/sizeof(u32);
- u32 *Array = Array_PHY_REG_MP_8723A;
+ u32 hex = 0;
+ u32 i;
+ u8 platform = 0x04;
+ u8 board = pDM_Odm->BoardType;
+ u32 ArrayLen = sizeof(Array_PHY_REG_MP_8723A)/sizeof(u32);
+ u32 *Array = Array_PHY_REG_MP_8723A;
hex += board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2) {
/* This (offset, data) pair meets the condition. */
if (v1 < 0xCDCDCDCD) {
- odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2);
continue;
} else {
if (!CheckCondition(Array[i], hex)) {
- /* Discard the following (offset, data) pairs. */
+ /* Discard the following (offset, data) pairs */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
READ_NEXT_PAIR(v1, v2, i);
i -= 2; /* prevent from for-loop += 2 */
} else {
- /* Configure matched pairs and skip to end of if-else. */
+ /* Configure matched pairs and skip to
+ end of if-else. */
READ_NEXT_PAIR(v1, v2, i);
while (v2 != 0xDEAD &&
v2 != 0xCDEF &&
v2 != 0xCDCD && i < ArrayLen - 2) {
- odm_ConfigBB_PHY_8723A(pDM_Odm, v1, bMaskDWord, v2);
+ odm_ConfigBB_PHY_8723A(pDM_Odm, v1, v2);
READ_NEXT_PAIR(v1, v2, i);
}
while (v2 != 0xDEAD && i < ArrayLen - 2)
return false;
cond = Condition & 0x0000FF00;
- cond = cond >> 8;
+ cond >>= 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = Condition & 0x00FF0000;
- cond = cond >> 16;
+ cond >>= 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
u32 hex = 0;
u32 i = 0;
u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_MAC_REG_8723A)/sizeof(u32);
u32 *Array = Array_MAC_REG_8723A;
hex += board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
for (i = 0; i < ArrayLen; i += 2) {
return false;
cond = Condition & 0x0000FF00;
- cond = cond >> 8;
+ cond >>= 8;
if ((_interface & cond) == 0 && cond != 0x07)
return false;
cond = Condition & 0x00FF0000;
- cond = cond >> 16;
+ cond >>= 16;
if ((_platform & cond) == 0 && cond != 0x0F)
return false;
return true;
u32 hex = 0;
u32 i = 0;
u8 platform = 0x04;
- u8 interfaceValue = pDM_Odm->SupportInterface;
u8 board = pDM_Odm->BoardType;
u32 ArrayLen = sizeof(Array_RadioA_1T_8723A)/sizeof(u32);
u32 *Array = Array_RadioA_1T_8723A;
hex += board;
- hex += interfaceValue << 8;
+ hex += ODM_ITRF_USB << 8;
hex += platform << 16;
hex += 0xFF000000;
("HalPwrSeqCmdParsing23a: "
"PWR_CMD_END\n"));
return true;
- break;
default:
RT_TRACE(_module_hal_init_c_, _drv_err_,
#define _HAL_INIT_C_
-void dump_chip_info23a(struct hal_version ChipVersion)
-{
- int cnt = 0;
- u8 buf[128];
-
- cnt += sprintf((buf + cnt), "Chip Version Info: CHIP_8723A_");
-
- cnt += sprintf((buf + cnt), "%s_", IS_NORMAL_CHIP(ChipVersion) ?
- "Normal_Chip" : "Test_Chip");
- cnt += sprintf((buf + cnt), "%s_",
- IS_CHIP_VENDOR_TSMC(ChipVersion) ? "TSMC" : "UMC");
- if (IS_A_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "A_CUT_");
- else if (IS_B_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "B_CUT_");
- else if (IS_C_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "C_CUT_");
- else if (IS_D_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "D_CUT_");
- else if (IS_E_CUT(ChipVersion))
- cnt += sprintf((buf + cnt), "E_CUT_");
- else
- cnt += sprintf((buf + cnt), "UNKNOWN_CUT(%d)_",
- ChipVersion.CUTVersion);
-
- if (IS_1T1R(ChipVersion))
- cnt += sprintf((buf + cnt), "1T1R_");
- else if (IS_1T2R(ChipVersion))
- cnt += sprintf((buf + cnt), "1T2R_");
- else if (IS_2T2R(ChipVersion))
- cnt += sprintf((buf + cnt), "2T2R_");
- else
- cnt += sprintf((buf + cnt), "UNKNOWN_RFTYPE(%d)_",
- ChipVersion.RFType);
-
- cnt += sprintf((buf + cnt), "RomVer(%d)\n", ChipVersion.ROMVer);
-
- DBG_8723A("%s", buf);
-}
-
#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
/* return the final channel plan decision */
rate_index = 0;
/* Set RTS initial rate */
while (brate_cfg > 0x1) {
- brate_cfg = (brate_cfg >> 1);
+ brate_cfg >>= 1;
rate_index++;
}
/* Ziv - Check */
rtl8723au_write8(padapter, REG_INIRTS_RATE_SEL, rate_index);
-
- return;
}
static void _OneOutPipeMapping(struct rtw_adapter *pAdapter)
/* END---------BB POWER SAVE----------------------- */
-void odm_RefreshRateAdaptiveMask23aCE23a(struct dm_odm_t *pDM_Odm);
-
void odm_DynamicTxPower23aInit(struct dm_odm_t *pDM_Odm);
-void odm_RSSIMonitorCheck23aCE(struct dm_odm_t *pDM_Odm);
-void odm_RSSIMonitorCheck23a(struct dm_odm_t *pDM_Odm);
+static void odm_RSSIMonitorCheck(struct dm_odm_t *pDM_Odm);
void odm_DynamicTxPower23a(struct dm_odm_t *pDM_Odm);
-void odm_RefreshRateAdaptiveMask23a(struct dm_odm_t *pDM_Odm);
-
-void ODM_TXPowerTrackingCheck23a(struct dm_odm_t *pDM_Odm);
+static void odm_RefreshRateAdaptiveMask(struct dm_odm_t *pDM_Odm);
void odm_RateAdaptiveMaskInit23a(struct dm_odm_t *pDM_Odm);
-void odm_TXPowerTrackingThermalMeterInit23a(struct dm_odm_t *pDM_Odm);
-
-void odm_TXPowerTrackingInit23a(struct dm_odm_t *pDM_Odm);
-
-void odm_TXPowerTrackingCheckCE23a(struct dm_odm_t *pDM_Odm);
+static void odm_TXPowerTrackingInit(struct dm_odm_t *pDM_Odm);
static void odm_EdcaTurboCheck23a(struct dm_odm_t *pDM_Odm);
static void ODM_EdcaTurboInit23a(struct dm_odm_t *pDM_Odm);
#define RxDefaultAnt2 0x569a
bool odm_StaDefAntSel(struct dm_odm_t *pDM_Odm,
- u32 OFDM_Ant1_Cnt,
- u32 OFDM_Ant2_Cnt,
- u32 CCK_Ant1_Cnt,
- u32 CCK_Ant2_Cnt,
- u8 *pDefAnt
+ u32 OFDM_Ant1_Cnt,
+ u32 OFDM_Ant2_Cnt,
+ u32 CCK_Ant1_Cnt,
+ u32 CCK_Ant2_Cnt,
+ u8 *pDefAnt
);
void odm_SetRxIdleAnt(struct dm_odm_t *pDM_Odm,
u8 Ant,
- bool bDualPath
+ bool bDualPath
);
/* 3 Export Interface */
odm23a_DynBBPSInit(pDM_Odm);
odm_DynamicTxPower23aInit(pDM_Odm);
- odm_TXPowerTrackingInit23a(pDM_Odm);
+ odm_TXPowerTrackingInit(pDM_Odm);
ODM_EdcaTurboInit23a(pDM_Odm);
}
odm_CmnInfoUpdate_Debug23a(pDM_Odm);
odm_CommonInfoSelfUpdate(pHalData);
odm_FalseAlarmCounterStatistics23a(pDM_Odm);
- odm_RSSIMonitorCheck23a(pDM_Odm);
+ odm_RSSIMonitorCheck(pDM_Odm);
/* 8723A or 8189ES platform */
/* NeilChen--2012--08--24-- */
if (pwrctrlpriv->bpower_saving)
return;
- odm_RefreshRateAdaptiveMask23a(pDM_Odm);
+ odm_RefreshRateAdaptiveMask(pDM_Odm);
odm_DynamicBBPowerSaving23a(pDM_Odm);
- ODM_TXPowerTrackingCheck23a(pDM_Odm);
odm_EdcaTurboCheck23a(pDM_Odm);
-
- odm_dtc(pDM_Odm);
}
/* */
/* */
switch (CmnInfo) {
/* Fixed ODM value. */
- case ODM_CMNINFO_PLATFORM:
- break;
- case ODM_CMNINFO_INTERFACE:
- pDM_Odm->SupportInterface = (u8)Value;
- break;
case ODM_CMNINFO_MP_TEST_CHIP:
pDM_Odm->bIsMPChip = (u8)Value;
break;
case ODM_CMNINFO_FAB_VER:
pDM_Odm->FabVersion = (u8)Value;
break;
- case ODM_CMNINFO_RF_TYPE:
- pDM_Odm->RFType = (u8)Value;
- break;
case ODM_CMNINFO_BOARD_TYPE:
pDM_Odm->BoardType = (u8)Value;
break;
case ODM_CMNINFO_EXT_TRSW:
pDM_Odm->ExtTRSW = (u8)Value;
break;
- case ODM_CMNINFO_PATCH_ID:
- pDM_Odm->PatchID = (u8)Value;
- break;
case ODM_CMNINFO_BINHCT_TEST:
pDM_Odm->bInHctTest = (bool)Value;
break;
/* do nothing */
break;
}
-
- /* */
- /* Tx power tracking BB swing table. */
- /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */
- /* */
- pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */
- pDM_Odm->BbSwingIdxOfdmCurrent = 12;
- pDM_Odm->BbSwingFlagOfdm = false;
-
}
void ODM_CmnInfoPtrArrayHook23a(struct dm_odm_t *pDM_Odm, enum odm_cmninfo CmnInfo,
{
/* This init variable may be changed in run time. */
switch (CmnInfo) {
- case ODM_CMNINFO_RF_TYPE:
- pDM_Odm->RFType = (u8)Value;
- break;
case ODM_CMNINFO_WIFI_DIRECT:
pDM_Odm->bWIFI_Direct = (bool)Value;
break;
}
-void odm_CommonInfoSelfInit23a(struct dm_odm_t *pDM_Odm
- )
+void odm_CommonInfoSelfInit23a(struct dm_odm_t *pDM_Odm)
{
- pDM_Odm->bCckHighPower =
- (bool) ODM_GetBBReg(pDM_Odm, rFPGA0_XA_HSSIParameter2, BIT(9));
+ u32 val32;
+
+ val32 = rtl8723au_read32(pDM_Odm->Adapter, rFPGA0_XA_HSSIParameter2);
+ if (val32 & BIT(9))
+ pDM_Odm->bCckHighPower = true;
+ else
+ pDM_Odm->bCckHighPower = false;
+
pDM_Odm->RFPathRxEnable =
- (u8) ODM_GetBBReg(pDM_Odm, rOFDM0_TRxPathEnable, 0x0F);
+ rtl8723au_read32(pDM_Odm->Adapter, rOFDM0_TRxPathEnable) & 0x0F;
ODM_InitDebugSetting23a(pDM_Odm);
}
u8 EntryCnt = 0;
u8 i;
- if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) {
- if (pHalData->nCur40MhzPrimeSC == 1)
- pDM_Odm->ControlChannel = pHalData->CurrentChannel - 2;
- else if (pHalData->nCur40MhzPrimeSC == 2)
- pDM_Odm->ControlChannel = pHalData->CurrentChannel + 2;
- } else {
- pDM_Odm->ControlChannel = pHalData->CurrentChannel;
- }
-
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
pEntry = pDM_Odm->pODM_StaInfo[i];
if (pEntry)
{
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug23a ==>\n"));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility = 0x%x\n", pDM_Odm->SupportAbility));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface =%d\n", pDM_Odm->SupportInterface));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType = 0x%x\n", pDM_Odm->SupportICType));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion =%d\n", pDM_Odm->CutVersion));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion =%d\n", pDM_Odm->FabVersion));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType =%d\n", pDM_Odm->RFType));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType =%d\n", pDM_Odm->BoardType));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA =%d\n", pDM_Odm->ExtLNA));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA =%d\n", pDM_Odm->ExtPA));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW =%d\n", pDM_Odm->ExtTRSW));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID =%d\n", pDM_Odm->PatchID));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest =%d\n", pDM_Odm->bInHctTest));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest =%d\n", pDM_Odm->bWIFITest));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent =%d\n", pDM_Odm->bDualMacSmartConcurrent));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min =%d\n", pDM_Odm->RSSI_Min));
}
-void ODM_Write_DIG23a(struct dm_odm_t *pDM_Odm,
- u8 CurrentIGI
- )
+void ODM_Write_DIG23a(struct dm_odm_t *pDM_Odm, u8 CurrentIGI)
{
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable;
-
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_REG(IGI_A, pDM_Odm) = 0x%x, ODM_BIT(IGI, pDM_Odm) = 0x%x \n",
- ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)));
+ u32 val32;
if (pDM_DigTable->CurIGValue != CurrentIGI) {
- ODM_SetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI);
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x). \n", CurrentIGI));
+ val32 = rtl8723au_read32(adapter, ODM_REG_IGI_A_11N);
+ val32 &= ~ODM_BIT_IGI_11N;
+ val32 |= CurrentIGI;
+ rtl8723au_write32(adapter, ODM_REG_IGI_A_11N, val32);
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
+ ("CurrentIGI(0x%02x). \n", CurrentIGI));
pDM_DigTable->CurIGValue = CurrentIGI;
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
CurrentIGI = CurrentIGI+RSSI_OFFSET_DIG;
bFwCurrentInPSMode = pAdapter->pwrctrlpriv.bFwCurrentInPSMode;
- /* ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG_LPS, ODM_DBG_LOUD, ("odm_DIG23a() ==>\n")); */
-
/* Using FW PS mode to make IGI */
if (bFwCurrentInPSMode) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("---Neil---odm_DIG23a is in LPS mode\n"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
+ ("---Neil---odm_DIG23a is in LPS mode\n"));
/* Adjust by FA in LPS MODE */
if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_LPS)
CurrentIGI = CurrentIGI+2;
else if (CurrentIGI < RSSI_Lower)
CurrentIGI = RSSI_Lower;
- ODM_Write_DIG23a(pDM_Odm, CurrentIGI);/* ODM_Write_DIG23a(pDM_Odm, pDM_DigTable->CurIGValue); */
-
+ ODM_Write_DIG23a(pDM_Odm, CurrentIGI);
}
void odm_DIG23aInit(struct dm_odm_t *pDM_Odm)
{
struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable;
+ u32 val32;
+
+ val32 = rtl8723au_read32(pDM_Odm->Adapter, ODM_REG_IGI_A_11N);
+ pDM_DigTable->CurIGValue = val32 & ODM_BIT_IGI_11N;
- pDM_DigTable->CurIGValue = (u8) ODM_GetBBReg(pDM_Odm, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm));
pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW;
pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH;
pDM_DigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW;
u8 dm_dig_max, dm_dig_min;
u8 CurrentIGI = pDM_DigTable->CurIGValue;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG23a() ==>\n"));
- /* if (!(pDM_Odm->SupportAbility & (ODM_BB_DIG|ODM_BB_FA_CNT))) */
- if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
- ("odm_DIG23a() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n"));
- return;
- }
-
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
+ ("odm_DIG23a() ==>\n"));
if (adapter->mlmepriv.bScanInProcess) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG23a() Return: In Scan Progress \n"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD,
+ ("odm_DIG23a() Return: In Scan Progress \n"));
return;
}
DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0;
FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0);
- FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0);
+ FirstDisConnect = (!pDM_Odm->bLinked) &&
+ (pDM_DigTable->bMediaConnect_0);
/* 1 Boundary Decision */
if ((pDM_Odm->SupportICType & ODM_RTL8723A) &&
- ((pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) || pDM_Odm->ExtLNA)) {
+ (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR || pDM_Odm->ExtLNA)) {
dm_dig_max = DM_DIG_MAX_NIC_HP;
dm_dig_min = DM_DIG_MIN_NIC_HP;
DIG_MaxOfMin = DM_DIG_MAX_AP_HP;
void odm_FalseAlarmCounterStatistics23a(struct dm_odm_t *pDM_Odm)
{
- u32 ret_value;
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt;
-
- if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT))
- return;
+ u32 ret_value, val32;
/* hold ofdm counter */
- /* hold page C counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 1);
+ /* hold page C counter */
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_HOLDC_11N);
+ val32 |= BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_HOLDC_11N, val32);
/* hold page D counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 1);
- ret_value =
- ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N);
+ val32 |= BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32);
+ ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE1_11N);
FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff);
- FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16);
- ret_value =
- ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord);
+ FalseAlmCnt->Cnt_SB_Search_fail = (ret_value & 0xffff0000)>>16;
+ ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE2_11N);
FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff);
- FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16);
- ret_value =
- ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord);
+ FalseAlmCnt->Cnt_Parity_Fail = (ret_value & 0xffff0000)>>16;
+ ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE3_11N);
FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff);
- FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16);
- ret_value =
- ODM_GetBBReg(pDM_Odm, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord);
+ FalseAlmCnt->Cnt_Crc8_fail = (ret_value & 0xffff0000)>>16;
+ ret_value = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_TYPE4_11N);
FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff);
FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail +
FalseAlmCnt->Cnt_Fast_Fsync +
FalseAlmCnt->Cnt_SB_Search_fail;
/* hold cck counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(12), 1);
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N, BIT(14), 1);
+ val32 = rtl8723au_read32(adapter, ODM_REG_CCK_FA_RST_11N);
+ val32 |= (BIT(12) | BIT(14));
+ rtl8723au_write32(adapter, ODM_REG_CCK_FA_RST_11N, val32);
- ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_LSB_11N, bMaskByte0);
+ ret_value = rtl8723au_read32(adapter, ODM_REG_CCK_FA_LSB_11N) & 0xff;
FalseAlmCnt->Cnt_Cck_fail = ret_value;
- ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_FA_MSB_11N, bMaskByte3);
- FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff) << 8;
+ ret_value = rtl8723au_read32(adapter, ODM_REG_CCK_FA_MSB_11N) >> 16;
+ FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff00);
- ret_value = ODM_GetBBReg(pDM_Odm, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord);
+ ret_value = rtl8723au_read32(adapter, ODM_REG_CCK_CCA_CNT_11N);
FalseAlmCnt->Cnt_CCK_CCA =
((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8);
if (pDM_Odm->SupportICType >= ODM_RTL8723A) {
/* reset false alarm counter registers */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(31), 1);
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTC_11N, BIT(31), 0);
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 1);
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(27), 0);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTC_11N);
+ val32 |= BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTC_11N, val32);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTC_11N);
+ val32 &= ~BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTC_11N, val32);
+
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N);
+ val32 |= BIT(27);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N);
+ val32 &= ~BIT(27);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32);
+
/* update ofdm counter */
/* update page C counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_HOLDC_11N, BIT(31), 0);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_HOLDC_11N);
+ val32 &= ~BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_HOLDC_11N, val32);
+
/* update page D counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_OFDM_FA_RSTD_11N, BIT(31), 0);
+ val32 = rtl8723au_read32(adapter, ODM_REG_OFDM_FA_RSTD_11N);
+ val32 &= ~BIT(31);
+ rtl8723au_write32(adapter, ODM_REG_OFDM_FA_RSTD_11N, val32);
/* reset CCK CCA counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N,
- BIT(13) | BIT(12), 0);
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N,
- BIT(13) | BIT(12), 2);
- /* reset CCK FA counter */
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N,
- BIT(15) | BIT(14), 0);
- ODM_SetBBReg(pDM_Odm, ODM_REG_CCK_FA_RST_11N,
- BIT(15) | BIT(14), 2);
+ val32 = rtl8723au_read32(adapter, ODM_REG_CCK_FA_RST_11N);
+ val32 &= ~(BIT(12) | BIT(13) | BIT(14) | BIT(15));
+ rtl8723au_write32(adapter, ODM_REG_CCK_FA_RST_11N, val32);
+
+ val32 = rtl8723au_read32(adapter, ODM_REG_CCK_FA_RST_11N);
+ val32 |= (BIT(13) | BIT(15));
+ rtl8723au_write32(adapter, ODM_REG_CCK_FA_RST_11N, val32);
}
ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
("Cnt_Crc8_fail =%d, Cnt_Mcs_fail =%d\n",
FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail =%d\n", FalseAlmCnt->Cnt_Cck_fail));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm =%d\n", FalseAlmCnt->Cnt_all));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
+ ("Cnt_Cck_fail =%d\n", FalseAlmCnt->Cnt_Cck_fail));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
+ ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD,
+ ("Total False Alarm =%d\n", FalseAlmCnt->Cnt_all));
}
/* 3 ============================================================ */
struct false_alarm_stats *FalseAlmCnt = &pDM_Odm->FalseAlmCnt;
u8 CurCCK_CCAThres;
- if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT)))
- return;
-
if (pDM_Odm->ExtLNA)
return;
if (pDM_Odm->bLinked) {
if (pDM_Odm->RSSI_Min > 25) {
CurCCK_CCAThres = 0xcd;
- } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) {
+ } else if (pDM_Odm->RSSI_Min <= 25 && pDM_Odm->RSSI_Min > 10) {
CurCCK_CCAThres = 0x83;
} else {
if (FalseAlmCnt->Cnt_Cck_fail > 1000)
struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable;
if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres)
- ODM_Write1Byte(pDM_Odm, ODM_REG(CCK_CCA, pDM_Odm), CurCCK_CCAThres);
+ rtl8723au_write8(pDM_Odm->Adapter, ODM_REG(CCK_CCA, pDM_Odm),
+ CurCCK_CCAThres);
pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres;
pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres;
-
}
/* 3 ============================================================ */
void ODM_RF_Saving23a(struct dm_odm_t *pDM_Odm, u8 bForceInNormal)
{
struct dynamic_pwr_sav *pDM_PSTable = &pDM_Odm->DM_PSTable;
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
+ u32 val32;
u8 Rssi_Up_bound = 30;
u8 Rssi_Low_bound = 25;
- if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */
- Rssi_Up_bound = 50;
- Rssi_Low_bound = 45;
- }
if (pDM_PSTable->initialize == 0) {
- pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14;
+ pDM_PSTable->Reg874 =
+ rtl8723au_read32(adapter, 0x874) & 0x1CC000;
pDM_PSTable->RegC70 =
- (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord) & BIT(3)) >>3;
- pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24;
- pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12;
- /* Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); */
+ rtl8723au_read32(adapter, 0xc70) & BIT(3);
+ pDM_PSTable->Reg85C =
+ rtl8723au_read32(adapter, 0x85c) & 0xFF000000;
+ pDM_PSTable->RegA74 = rtl8723au_read32(adapter, 0xa74) & 0xF000;
pDM_PSTable->initialize = 1;
}
if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) {
if (pDM_PSTable->CurRFState == RF_Save) {
- /* <tynli_note> 8723 RSSI report will be wrong. Set 0x874[5]= 1 when enter BB power saving mode. */
+ /* <tynli_note> 8723 RSSI report will be wrong.
+ * Set 0x874[5]= 1 when enter BB power saving mode. */
/* Suggested by SD3 Yu-Nan. 2011.01.20. */
- if (pDM_Odm->SupportICType == ODM_RTL8723A)
- ODM_SetBBReg(pDM_Odm, 0x874, BIT(5), 0x1); /* Reg874[5]= 1b'1 */
- ODM_SetBBReg(pDM_Odm, 0x874, 0x1C0000, 0x2); /* Reg874[20:18]= 3'b010 */
- ODM_SetBBReg(pDM_Odm, 0xc70, BIT(3), 0); /* RegC70[3]= 1'b0 */
- ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]= 0x63 */
- ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); /* Reg874[15:14]= 2'b10 */
- ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); /* RegA75[7:4]= 0x3 */
- ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x0); /* Reg818[28]= 1'b0 */
- ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x1); /* Reg818[28]= 1'b1 */
+ /* Reg874[5]= 1b'1 */
+ if (pDM_Odm->SupportICType == ODM_RTL8723A) {
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 |= BIT(5);
+ rtl8723au_write32(adapter, 0x874, val32);
+ }
+ /* Reg874[20:18]= 3'b010 */
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 &= ~(BIT(18) | BIT(20));
+ val32 |= BIT(19);
+ rtl8723au_write32(adapter, 0x874, val32);
+ /* RegC70[3]= 1'b0 */
+ val32 = rtl8723au_read32(adapter, 0xc70);
+ val32 &= ~BIT(3);
+ rtl8723au_write32(adapter, 0xc70, val32);
+ /* Reg85C[31:24]= 0x63 */
+ val32 = rtl8723au_read32(adapter, 0x85c);
+ val32 &= 0x00ffffff;
+ val32 |= 0x63000000;
+ rtl8723au_write32(adapter, 0x85c, val32);
+ /* Reg874[15:14]= 2'b10 */
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 &= ~BIT(14);
+ val32 |= BIT(15);
+ rtl8723au_write32(adapter, 0x874, val32);
+ /* RegA75[7:4]= 0x3 */
+ val32 = rtl8723au_read32(adapter, 0xa74);
+ val32 &= ~(BIT(14) | BIT(15));
+ val32 |= (BIT(12) | BIT(13));
+ rtl8723au_write32(adapter, 0xa74, val32);
+ /* Reg818[28]= 1'b0 */
+ val32 = rtl8723au_read32(adapter, 0x818);
+ val32 &= ~BIT(28);
+ rtl8723au_write32(adapter, 0x818, val32);
+ /* Reg818[28]= 1'b1 */
+ val32 = rtl8723au_read32(adapter, 0x818);
+ val32 |= BIT(28);
+ rtl8723au_write32(adapter, 0x818, val32);
} else {
- ODM_SetBBReg(pDM_Odm, 0x874, 0x1CC000, pDM_PSTable->Reg874);
- ODM_SetBBReg(pDM_Odm, 0xc70, BIT(3), pDM_PSTable->RegC70);
- ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
- ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74);
- ODM_SetBBReg(pDM_Odm, 0x818, BIT(28), 0x0);
-
- if (pDM_Odm->SupportICType == ODM_RTL8723A)
- ODM_SetBBReg(pDM_Odm, 0x874, BIT(5), 0x0); /* Reg874[5]= 1b'0 */
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 |= pDM_PSTable->Reg874;
+ rtl8723au_write32(adapter, 0x874, val32);
+
+ val32 = rtl8723au_read32(adapter, 0xc70);
+ val32 |= pDM_PSTable->RegC70;
+ rtl8723au_write32(adapter, 0xc70, val32);
+
+ val32 = rtl8723au_read32(adapter, 0x85c);
+ val32 |= pDM_PSTable->Reg85C;
+ rtl8723au_write32(adapter, 0x85c, val32);
+
+ val32 = rtl8723au_read32(adapter, 0xa74);
+ val32 |= pDM_PSTable->RegA74;
+ rtl8723au_write32(adapter, 0xa74, val32);
+
+ val32 = rtl8723au_read32(adapter, 0x818);
+ val32 &= ~BIT(28);
+ rtl8723au_write32(adapter, 0x818, val32);
+
+ /* Reg874[5]= 1b'0 */
+ if (pDM_Odm->SupportICType == ODM_RTL8723A) {
+ val32 = rtl8723au_read32(adapter, 0x874);
+ val32 &= ~BIT(5);
+ rtl8723au_write32(adapter, 0x874, val32);
+ }
}
pDM_PSTable->PreRFState = pDM_PSTable->CurRFState;
}
struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive;
pOdmRA->Type = DM_Type_ByDriver;
- if (pOdmRA->Type == DM_Type_ByDriver)
- pDM_Odm->bUseRAMask = true;
- else
- pDM_Odm->bUseRAMask = false;
pOdmRA->RATRState = DM_RATR_STA_INIT;
pOdmRA->HighRSSIThresh = 50;
break;
case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G):
- if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) {
+ if (pHalData->rf_type == RF_1T2R ||
+ pHalData->rf_type == RF_1T1R) {
if (rssi_level == DM_RATR_STA_HIGH) {
rate_bitmap = 0x000f0000;
} else if (rssi_level == DM_RATR_STA_MIDDLE) {
default:
/* case WIRELESS_11_24N: */
/* case WIRELESS_11_5N: */
- if (pDM_Odm->RFType == RF_1T2R)
+ if (pHalData->rf_type == RF_1T2R)
rate_bitmap = 0x000fffff;
else
rate_bitmap = 0x0fffffff;
break;
}
- /* printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n", __func__, rssi_level, WirelessMode, rate_bitmap); */
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n", rssi_level, WirelessMode, rate_bitmap));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
+ (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x \n",
+ rssi_level, WirelessMode, rate_bitmap));
return rate_bitmap;
-
}
/*-----------------------------------------------------------------------------
- * Function: odm_RefreshRateAdaptiveMask23a()
+ * Function: odm_RefreshRateAdaptiveMask()
*
* Overview: Update rate table mask according to rssi
*
*05/27/2009 hpfan Create Version 0.
*
*---------------------------------------------------------------------------*/
-void odm_RefreshRateAdaptiveMask23a(struct dm_odm_t *pDM_Odm)
-{
- if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK))
- return;
- /* */
- /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
- /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
- /* HW dynamic mechanism. */
- /* */
- odm_RefreshRateAdaptiveMask23aCE23a(pDM_Odm);
-}
-
-void odm_RefreshRateAdaptiveMask23aCE23a(struct dm_odm_t *pDM_Odm)
+static void odm_RefreshRateAdaptiveMask(struct dm_odm_t *pDM_Odm)
{
+ struct rtw_adapter *pAdapter = pDM_Odm->Adapter;
+ u32 smoothed;
u8 i;
- struct rtw_adapter *pAdapter = pDM_Odm->Adapter;
if (pAdapter->bDriverStopped) {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE,
- ("<---- odm_RefreshRateAdaptiveMask23a(): driver is going to unload\n"));
+ ("<---- %s: driver is going to unload\n",
+ __func__));
return;
}
- if (!pDM_Odm->bUseRAMask) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
- ("<---- odm_RefreshRateAdaptiveMask23a(): driver does not control rate adaptive mask\n"));
- return;
- }
-
- /* printk("==> %s \n", __func__); */
-
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i];
if (pstat) {
- if (ODM_RAStateCheck23a(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD,
+ smoothed = pstat->rssi_stat.UndecoratedSmoothedPWDB;
+ if (ODM_RAStateCheck23a(pDM_Odm, smoothed, false,
+ &pstat->rssi_level)) {
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK,
+ ODM_DBG_LOUD,
("RSSI:%d, RSSI_LEVEL:%d\n",
- pstat->rssi_stat.UndecoratedSmoothedPWDB,
- pstat->rssi_level));
- rtw_hal_update_ra_mask23a(pstat, pstat->rssi_level);
+ smoothed,
+ pstat->rssi_level));
+ rtw_hal_update_ra_mask23a(pstat,
+ pstat->rssi_level);
}
-
}
}
-
}
/* Return Value: bool */
LowRSSIThreshForRA += GoUpGap;
break;
default:
- ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState));
+ ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !",
+ *pRATRState));
break;
}
pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
}
-void odm_RSSIMonitorCheck23a(struct dm_odm_t *pDM_Odm)
-{
- /* For AP/ADSL use struct rtl8723a_priv * */
- /* For CE/NIC use struct rtw_adapter * */
-
- if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR))
- return;
-
- /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
- /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
- /* HW dynamic mechanism. */
- odm_RSSIMonitorCheck23aCE(pDM_Odm);
-} /* odm_RSSIMonitorCheck23a */
-
static void
-FindMinimumRSSI(
- struct rtw_adapter *pAdapter
- )
+FindMinimumRSSI(struct rtw_adapter *pAdapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
/* 1 1.Determine the minimum RSSI */
- if ((!pDM_Odm->bLinked) &&
- (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0))
+ if (!pDM_Odm->bLinked && !pdmpriv->EntryMinUndecoratedSmoothedPWDB)
pdmpriv->MinUndecoratedPWDBForDM = 0;
else
- pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
+ pdmpriv->MinUndecoratedPWDBForDM =
+ pdmpriv->EntryMinUndecoratedSmoothedPWDB;
}
-void odm_RSSIMonitorCheck23aCE(struct dm_odm_t *pDM_Odm)
+static void odm_RSSIMonitorCheck(struct dm_odm_t *pDM_Odm)
{
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
struct dm_priv *pdmpriv = &pHalData->dmpriv;
- int i;
- int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;
+ int i;
+ int MaxDB = 0, MinDB = 0xff;
u8 sta_cnt = 0;
+ u32 tmpdb;
u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */
struct sta_info *psta;
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
psta = pDM_Odm->pODM_StaInfo[i];
if (psta) {
- if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB)
- tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+ if (psta->rssi_stat.UndecoratedSmoothedPWDB < MinDB)
+ MinDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
- if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB)
- tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
+ if (psta->rssi_stat.UndecoratedSmoothedPWDB > MaxDB)
+ MaxDB = psta->rssi_stat.UndecoratedSmoothedPWDB;
- if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1))
- PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16));
+ if (psta->rssi_stat.UndecoratedSmoothedPWDB != -1) {
+ tmpdb = psta->rssi_stat.UndecoratedSmoothedPWDB;
+ PWDB_rssi[sta_cnt++] = psta->mac_id |
+ (tmpdb << 16);
+ }
}
}
for (i = 0; i < sta_cnt; i++) {
- if (PWDB_rssi[i] != (0)) {
- if (pHalData->fw_ractrl) /* Report every sta's RSSI to FW */
- rtl8723a_set_rssi_cmd(Adapter, (u8 *)&PWDB_rssi[i]);
- }
+ if (PWDB_rssi[i] != (0))
+ rtl8723a_set_rssi_cmd(Adapter, (u8 *)&PWDB_rssi[i]);
}
- if (tmpEntryMaxPWDB != 0) /* If associated entry is found */
- pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB;
- else
- pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0;
+ pdmpriv->EntryMaxUndecoratedSmoothedPWDB = MaxDB;
- if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */
- pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB;
+ if (MinDB != 0xff) /* If associated entry is found */
+ pdmpriv->EntryMinUndecoratedSmoothedPWDB = MinDB;
else
pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;
FindMinimumRSSI(Adapter);/* get pdmpriv->MinUndecoratedPWDBForDM */
- ODM_CmnInfoUpdate23a(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM);
+ ODM_CmnInfoUpdate23a(&pHalData->odmpriv, ODM_CMNINFO_RSSI_MIN,
+ pdmpriv->MinUndecoratedPWDBForDM);
}
/* endif */
/* 3 Tx Power Tracking */
/* 3 ============================================================ */
-void odm_TXPowerTrackingInit23a(struct dm_odm_t *pDM_Odm)
-{
- odm_TXPowerTrackingThermalMeterInit23a(pDM_Odm);
-}
-
-void odm_TXPowerTrackingThermalMeterInit23a(struct dm_odm_t *pDM_Odm)
+static void odm_TXPowerTrackingInit(struct dm_odm_t *pDM_Odm)
{
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
pdmpriv->TXPowercount = 0;
pdmpriv->bTXPowerTrackingInit = false;
pdmpriv->TxPowerTrackControl = true;
- MSG_8723A("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl);
+ MSG_8723A("pdmpriv->TxPowerTrackControl = %d\n",
+ pdmpriv->TxPowerTrackControl);
pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true;
}
-void ODM_TXPowerTrackingCheck23a(struct dm_odm_t *pDM_Odm)
-{
- /* For AP/ADSL use struct rtl8723a_priv * */
- /* For CE/NIC use struct rtw_adapter * */
-
- /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
- /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
- /* HW dynamic mechanism. */
- odm_TXPowerTrackingCheckCE23a(pDM_Odm);
-}
-
-void odm_TXPowerTrackingCheckCE23a(struct dm_odm_t *pDM_Odm)
-{
-}
-
/* EDCA Turbo */
static void ODM_EdcaTurboInit23a(struct dm_odm_t *pDM_Odm)
{
-
struct rtw_adapter *Adapter = pDM_Odm->Adapter;
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;
- pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false;
Adapter->recvpriv.bIsAnyNonBEPkts = false;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_VO_PARAM)));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_VI_PARAM)));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_BE_PARAM)));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", ODM_Read4Byte(pDM_Odm, ODM_EDCA_BK_PARAM)));
-
-} /* ODM_InitEdcaTurbo */
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD,
+ ("Orginial VO PARAM: 0x%x\n",
+ rtl8723au_read32(Adapter, ODM_EDCA_VO_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD,
+ ("Orginial VI PARAM: 0x%x\n",
+ rtl8723au_read32(Adapter, ODM_EDCA_VI_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD,
+ ("Orginial BE PARAM: 0x%x\n",
+ rtl8723au_read32(Adapter, ODM_EDCA_BE_PARAM)));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD,
+ ("Orginial BK PARAM: 0x%x\n",
+ rtl8723au_read32(Adapter, ODM_EDCA_BK_PARAM)));
+}
static void odm_EdcaTurboCheck23a(struct dm_odm_t *pDM_Odm)
{
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
u32 trafficIndex;
u32 edca_param;
- u64 cur_tx_bytes = 0;
- u64 cur_rx_bytes = 0;
- u8 bbtchange = false;
+ u64 cur_tx_bytes;
+ u64 cur_rx_bytes;
/* For AP/ADSL use struct rtl8723a_priv * */
/* For CE/NIC use struct rtw_adapter * */
- /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */
- /* at the same time. In the stage2/3, we need to prive universal interface and merge all */
- /* HW dynamic mechanism. */
-
- if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO))
- return;
+ /*
+ * 2011/09/29 MH In HW integration first stage, we provide 4
+ * different handle to operate at the same time. In the stage2/3,
+ * we need to prive universal interface and merge all HW dynamic
+ * mechanism.
+ */
if ((pregpriv->wifi_spec == 1))/* (pmlmeinfo->HT_enable == 0)) */
goto dm_CheckEdcaTurbo_EXIT;
goto dm_CheckEdcaTurbo_EXIT;
/* Check if the status needs to be changed. */
- if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) {
+ if (!precvpriv->bIsAnyNonBEPkts) {
cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes;
cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes;
precvpriv->last_rx_bytes = precvpriv->rx_bytes;
}
-u32 GetPSDData(struct dm_odm_t *pDM_Odm, unsigned int point, u8 initial_gain_psd)
+u32 GetPSDData(struct dm_odm_t *pDM_Odm, unsigned int point,
+ u8 initial_gain_psd)
{
- u32 psd_report;
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
+ u32 psd_report, val32;
/* Set DCO frequency index, offset = (40MHz/SamplePts)*point */
- ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point);
+ val32 = rtl8723au_read32(adapter, 0x808);
+ val32 &= ~0x3ff;
+ val32 |= (point & 0x3ff);
+ rtl8723au_write32(adapter, 0x808, val32);
/* Start PSD calculation, Reg808[22]= 0->1 */
- ODM_SetBBReg(pDM_Odm, 0x808, BIT(22), 1);
+ val32 = rtl8723au_read32(adapter, 0x808);
+ val32 |= BIT(22);
+ rtl8723au_write32(adapter, 0x808, val32);
/* Need to wait for HW PSD report */
udelay(30);
- ODM_SetBBReg(pDM_Odm, 0x808, BIT(22), 0);
+ val32 = rtl8723au_read32(adapter, 0x808);
+ val32 &= ~BIT(22);
+ rtl8723au_write32(adapter, 0x808, val32);
/* Read PSD report, Reg8B4[15:0] */
- psd_report = ODM_GetBBReg(pDM_Odm, 0x8B4, bMaskDWord) & 0x0000FFFF;
+ psd_report = rtl8723au_read32(adapter, 0x8B4) & 0x0000FFFF;
- psd_report = (u32)(ConvertTo_dB23a(psd_report))+(u32)(initial_gain_psd-0x1c);
+ psd_report = (u32)(ConvertTo_dB23a(psd_report)) +
+ (u32)(initial_gain_psd-0x1c);
return psd_report;
}
-u32
-ConvertTo_dB23a(
- u32 Value)
+u32 ConvertTo_dB23a(u32 Value)
{
u8 i;
u8 j;
/* */
/* Description: */
-/*Set Single/Dual Antenna default setting for products that do not do detection in advance. */
+/* Set Single/Dual Antenna default setting for products that do not
+ * do detection in advance. */
/* */
/* Added by Joseph, 2012.03.22 */
/* */
/* 2 8723A ANT DETECT */
-static void odm_PHY_SaveAFERegisters(
- struct dm_odm_t *pDM_Odm,
- u32 *AFEReg,
- u32 *AFEBackup,
- u32 RegisterNum
- )
+static void odm_PHY_SaveAFERegisters(struct dm_odm_t *pDM_Odm, u32 *AFEReg,
+ u32 *AFEBackup, u32 RegisterNum)
{
u32 i;
- /* RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); */
for (i = 0 ; i < RegisterNum ; i++)
- AFEBackup[i] = ODM_GetBBReg(pDM_Odm, AFEReg[i], bMaskDWord);
+ AFEBackup[i] = rtl8723au_read32(pDM_Odm->Adapter, AFEReg[i]);
}
static void odm_PHY_ReloadAFERegisters(struct dm_odm_t *pDM_Odm, u32 *AFEReg,
u32 i;
for (i = 0 ; i < RegiesterNum; i++)
- ODM_SetBBReg(pDM_Odm, AFEReg[i], bMaskDWord, AFEBackup[i]);
+ rtl8723au_write32(pDM_Odm->Adapter, AFEReg[i], AFEBackup[i]);
}
/* 2 8723A ANT DETECT */
bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode)
{
struct sw_ant_sw *pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
+ struct rtw_adapter *adapter = pDM_Odm->Adapter;
u32 CurrentChannel, RfLoopReg;
u8 n;
- u32 Reg88c, Regc08, Reg874, Regc50;
+ u32 Reg88c, Regc08, Reg874, Regc50, val32;
u8 initial_gain = 0x5a;
u32 PSD_report_tmp;
u32 AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0;
return bResult;
/* 1 Backup Current RF/BB Settings */
- CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask);
+ CurrentChannel = ODM_GetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL,
+ bRFRegOffsetMask);
RfLoopReg = ODM_GetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask);
- ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, ODM_DPDT, Antenna_A); /* change to Antenna A */
+ /* change to Antenna A */
+ val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE);
+ val32 &= ~0x300;
+ val32 |= 0x100; /* Enable antenna A */
+ rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32);
+
/* Step 1: USE IQK to transmitter single tone */
udelay(10);
/* Store A Path Register 88c, c08, 874, c50 */
- Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord);
- Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord);
- Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord);
- Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord);
+ Reg88c = rtl8723au_read32(adapter, rFPGA0_AnalogParameter4);
+ Regc08 = rtl8723au_read32(adapter, rOFDM0_TRMuxPar);
+ Reg874 = rtl8723au_read32(adapter, rFPGA0_XCD_RFInterfaceSW);
+ Regc50 = rtl8723au_read32(adapter, rOFDM0_XAAGCCore1);
/* Store AFE Registers */
odm_PHY_SaveAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
/* Set PSD 128 pts */
- ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT(14) | BIT(15), 0x0);
+ val32 = rtl8723au_read32(adapter, rFPGA0_PSDFunction);
+ val32 &= ~(BIT(14) | BIT(15));
+ rtl8723au_write32(adapter, rFPGA0_PSDFunction, val32);
/* To SET CH1 to do */
- ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01); /* Channel 1 */
+ ODM_SetRFReg(pDM_Odm, RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x01);
/* AFE all on step */
- ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_CCK_RFON, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_CCK_BBON, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_OFDM_RFON, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_OFDM_BBON, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_To_Rx, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rTx_To_Tx, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rRx_CCK, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rRx_OFDM, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rRx_Wait_RIFS, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rRx_TO_Rx, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rStandby, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rSleep, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rPMPD_ANAEN, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_SwitchControl, bMaskDWord, 0x6FDB25A4);
- ODM_SetBBReg(pDM_Odm, rBlue_Tooth, bMaskDWord, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_Wait_CCA, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_CCK_RFON, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_CCK_BBON, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_OFDM_RFON, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_OFDM_BBON, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_To_Rx, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rTx_To_Tx, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_CCK, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_OFDM, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_Wait_RIFS, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rRx_TO_Rx, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rStandby, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rSleep, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rPMPD_ANAEN, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rFPGA0_XCD_SwitchControl, 0x6FDB25A4);
+ rtl8723au_write32(adapter, rBlue_Tooth, 0x6FDB25A4);
/* 3 wire Disable */
- ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0);
+ rtl8723au_write32(adapter, rFPGA0_AnalogParameter4, 0xCCF000C0);
/* BB IQK Setting */
- ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4);
- ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000);
+ rtl8723au_write32(adapter, rOFDM0_TRMuxPar, 0x000800E4);
+ rtl8723au_write32(adapter, rFPGA0_XCD_RFInterfaceSW, 0x22208000);
/* IQK setting tone@ 4.34Mhz */
- ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C);
- ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00);
+ rtl8723au_write32(adapter, rTx_IQK_Tone_A, 0x10008C1C);
+ rtl8723au_write32(adapter, rTx_IQK, 0x01007c00);
/* Page B init */
- ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000);
- ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000);
- ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800);
- ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
- ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150008);
- ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150008);
- ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0);
+ rtl8723au_write32(adapter, rConfig_AntA, 0x00080000);
+ rtl8723au_write32(adapter, rConfig_AntA, 0x0f600000);
+ rtl8723au_write32(adapter, rRx_IQK, 0x01004800);
+ rtl8723au_write32(adapter, rRx_IQK_Tone_A, 0x10008c1f);
+ rtl8723au_write32(adapter, rTx_IQK_PI_A, 0x82150008);
+ rtl8723au_write32(adapter, rRx_IQK_PI_A, 0x28150008);
+ rtl8723au_write32(adapter, rIQK_AGC_Rsp, 0x001028d0);
/* RF loop Setting */
ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x0, 0xFFFFF, 0x50008);
/* IQK Single tone start */
- ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x80800000);
- ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
+ rtl8723au_write32(adapter, rFPGA0_IQK, 0x80800000);
+ rtl8723au_write32(adapter, rIQK_AGC_Pts, 0xf8000000);
udelay(1000);
PSD_report_tmp = 0x0;
PSD_report_tmp = 0x0;
- ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_B); /* change to Antenna B */
+ val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE);
+ val32 &= ~0x300;
+ val32 |= 0x200; /* Enable antenna B */
+ rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32);
udelay(10);
for (n = 0; n < 2; n++) {
}
/* change to open case */
- ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, 0); /* change to Ant A and B all open case */
+ /* change to Ant A and B all open case */
+ val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE);
+ val32 &= ~0x300;
+ rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32);
udelay(10);
for (n = 0; n < 2; n++) {
}
/* Close IQK Single Tone function */
- ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, bMaskDWord, 0x00000000);
+ rtl8723au_write32(adapter, rFPGA0_IQK, 0x00000000);
PSD_report_tmp = 0x0;
/* 1 Return to antanna A */
- ODM_SetBBReg(pDM_Odm, rFPGA0_XA_RFInterfaceOE, 0x300, Antenna_A);
- ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c);
- ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08);
- ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874);
- ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40);
- ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50);
- ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, CurrentChannel);
+ val32 = rtl8723au_read32(adapter, rFPGA0_XA_RFInterfaceOE);
+ val32 &= ~0x300;
+ val32 |= 0x100; /* Enable antenna A */
+ rtl8723au_write32(adapter, rFPGA0_XA_RFInterfaceOE, val32);
+ rtl8723au_write32(adapter, rFPGA0_AnalogParameter4, Reg88c);
+ rtl8723au_write32(adapter, rOFDM0_TRMuxPar, Regc08);
+ rtl8723au_write32(adapter, rFPGA0_XCD_RFInterfaceSW, Reg874);
+ val32 = rtl8723au_read32(adapter, rOFDM0_XAAGCCore1);
+ val32 &= ~0x7f;
+ val32 |= 0x40;
+ rtl8723au_write32(adapter, rOFDM0_XAAGCCore1, val32);
+
+ rtl8723au_write32(adapter, rOFDM0_XAAGCCore1, Regc50);
+ ODM_SetRFReg(pDM_Odm, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,
+ CurrentChannel);
ODM_SetRFReg(pDM_Odm, RF_PATH_A, 0x00, bRFRegOffsetMask, RfLoopReg);
/* Reload AFE Registers */
odm_PHY_ReloadAFERegisters(pDM_Odm, AFE_REG_8723A, AFE_Backup, 16);
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d \n", 2416, AntA_report));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d \n", 2416, AntB_report));
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_O[%d]= %d \n", 2416, AntO_report));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+ ("psd_report_A[%d]= %d \n", 2416, AntA_report));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+ ("psd_report_B[%d]= %d \n", 2416, AntB_report));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+ ("psd_report_O[%d]= %d \n", 2416, AntO_report));
/* 2 Test Ant B based on Ant A is ON */
if (mode == ANTTESTB) {
if ((AntO_report >= 100) & (AntO_report < 118)) {
if (AntA_report > (AntO_report+1)) {
pDM_SWAT_Table->ANTA_ON = false;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is OFF"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,
+ ODM_DBG_LOUD, ("Ant A is OFF"));
} else {
pDM_SWAT_Table->ANTA_ON = true;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant A is ON"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,
+ ODM_DBG_LOUD, ("Ant A is ON"));
}
if (AntB_report > (AntO_report+2)) {
pDM_SWAT_Table->ANTB_ON = false;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is OFF"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,
+ ODM_DBG_LOUD, ("Ant B is OFF"));
} else {
pDM_SWAT_Table->ANTB_ON = true;
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Ant B is ON"));
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV,
+ ODM_DBG_LOUD, ("Ant B is ON"));
}
}
} else {
- ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
- pDM_SWAT_Table->ANTA_ON = true; /* Set Antenna A on as default */
- pDM_SWAT_Table->ANTB_ON = false; /* Set Antenna B off as default */
+ ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
+ ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
+ /* Set Antenna A on as default */
+ pDM_SWAT_Table->ANTA_ON = true;
+ /* Set Antenna B off as default */
+ pDM_SWAT_Table->ANTB_ON = false;
bResult = false;
}
- return bResult;
-}
-/* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
-void odm_dtc(struct dm_odm_t *pDM_Odm)
-{
+ return bResult;
}
{
s32 RetSig = 0;
- if ((pDM_Odm->SupportInterface == ODM_ITRF_USB) || (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)) {
- if (CurrSig >= 51 && CurrSig <= 100)
- RetSig = 100;
- else if (CurrSig >= 41 && CurrSig <= 50)
- RetSig = 80 + ((CurrSig - 40)*2);
- else if (CurrSig >= 31 && CurrSig <= 40)
- RetSig = 66 + (CurrSig - 30);
- else if (CurrSig >= 21 && CurrSig <= 30)
- RetSig = 54 + (CurrSig - 20);
- else if (CurrSig >= 10 && CurrSig <= 20)
- RetSig = 42 + (((CurrSig - 10) * 2) / 3);
- else if (CurrSig >= 5 && CurrSig <= 9)
- RetSig = 22 + (((CurrSig - 5) * 3) / 2);
- else if (CurrSig >= 1 && CurrSig <= 4)
- RetSig = 6 + (((CurrSig - 1) * 3) / 2);
- else
- RetSig = CurrSig;
- }
+ if (CurrSig >= 51 && CurrSig <= 100)
+ RetSig = 100;
+ else if (CurrSig >= 41 && CurrSig <= 50)
+ RetSig = 80 + ((CurrSig - 40)*2);
+ else if (CurrSig >= 31 && CurrSig <= 40)
+ RetSig = 66 + (CurrSig - 30);
+ else if (CurrSig >= 21 && CurrSig <= 30)
+ RetSig = 54 + (CurrSig - 20);
+ else if (CurrSig >= 10 && CurrSig <= 20)
+ RetSig = 42 + (((CurrSig - 10) * 2) / 3);
+ else if (CurrSig >= 5 && CurrSig <= 9)
+ RetSig = 22 + (((CurrSig - 5) * 3) / 2);
+ else if (CurrSig >= 1 && CurrSig <= 4)
+ RetSig = 6 + (((CurrSig - 1) * 3) / 2);
+ else
+ RetSig = CurrSig;
+
return RetSig;
}
******************************************************************************/
#include "odm_precomp.h"
+#include "usb_ops_linux.h"
void
odm_ConfigRFReg_8723A(
}
}
-void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm,
- u32 Addr,
- u8 Data
- )
+void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u8 data)
{
- ODM_Write1Byte(pDM_Odm, Addr, Data);
+ rtl8723au_write8(pDM_Odm->Adapter, addr, data);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
- ("===> ODM_ConfigMACWithHeaderFile23a: [MAC_REG] %08X %08X\n",
- Addr, Data));
+ ("===> %s: [MAC_REG] %08X %08X\n", __func__, addr, data));
}
-void
-odm_ConfigBB_AGC_8723A(
- struct dm_odm_t *pDM_Odm,
- u32 Addr,
- u32 Bitmask,
- u32 Data
- )
+void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data)
{
- ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
+ rtl8723au_write32(pDM_Odm->Adapter, addr, data);
/* Add 1us delay between BB/RF register setting. */
udelay(1);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
- ("===> ODM_ConfigBBWithHeaderFile23a: [AGC_TAB] %08X %08X\n",
- Addr, Data));
+ ("===> %s: [AGC_TAB] %08X %08X\n", __func__, addr, data));
}
void
-odm_ConfigBB_PHY_8723A(
- struct dm_odm_t *pDM_Odm,
- u32 Addr,
- u32 Bitmask,
- u32 Data
- )
+odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data)
{
- if (Addr == 0xfe)
+ if (addr == 0xfe)
msleep(50);
- else if (Addr == 0xfd)
+ else if (addr == 0xfd)
mdelay(5);
- else if (Addr == 0xfc)
+ else if (addr == 0xfc)
mdelay(1);
- else if (Addr == 0xfb)
+ else if (addr == 0xfb)
udelay(50);
- else if (Addr == 0xfa)
+ else if (addr == 0xfa)
udelay(5);
- else if (Addr == 0xf9)
+ else if (addr == 0xf9)
udelay(1);
- else if (Addr == 0xa24)
- pDM_Odm->RFCalibrateInfo.RegA24 = Data;
- ODM_SetBBReg(pDM_Odm, Addr, Bitmask, Data);
+ else if (addr == 0xa24)
+ pDM_Odm->RFCalibrateInfo.RegA24 = data;
+ rtl8723au_write32(pDM_Odm->Adapter, addr, data);
/* Add 1us delay between BB/RF register setting. */
udelay(1);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
- ("===> ODM_ConfigBBWithHeaderFile23a: [PHY_REG] %08X %08X\n",
- Addr, Data));
+ ("===> %s: [PHY_REG] %08X %08X\n", __func__, addr, data));
}
/* */
#include <usb_ops_linux.h>
-u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm,
- u32 RegAddr
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return rtl8723au_read8(Adapter, RegAddr);
-}
-
-u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return rtl8723au_read16(Adapter, RegAddr);
-}
-
-u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return rtl8723au_read32(Adapter, RegAddr);
-}
-
-void ODM_Write1Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u8 Data)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- rtl8723au_write8(Adapter, RegAddr, Data);
-}
-
-void ODM_Write2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u16 Data)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- rtl8723au_write16(Adapter, RegAddr, Data);
-}
-
-void ODM_Write4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 Data)
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- rtl8723au_write32(Adapter, RegAddr, Data);
-}
-
-void ODM_SetMACReg(
- struct dm_odm_t *pDM_Odm,
- u32 RegAddr,
- u32 BitMask,
- u32 Data
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
-}
-
-u32 ODM_GetMACReg(
- struct dm_odm_t *pDM_Odm,
- u32 RegAddr,
- u32 BitMask
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
-}
-
-void ODM_SetBBReg(
- struct dm_odm_t *pDM_Odm,
- u32 RegAddr,
- u32 BitMask,
- u32 Data
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- PHY_SetBBReg(Adapter, RegAddr, BitMask, Data);
-}
-
-u32 ODM_GetBBReg(
- struct dm_odm_t *pDM_Odm,
- u32 RegAddr,
- u32 BitMask
- )
-{
- struct rtw_adapter *Adapter = pDM_Odm->Adapter;
-
- return PHY_QueryBBReg(Adapter, RegAddr, BitMask);
-}
-
void ODM_SetRFReg(
struct dm_odm_t *pDM_Odm,
enum RF_RADIO_PATH eRFPath,
pBtDbg->dbgHciInfo.hciCmdCntDisconnectPhyLink++;
PLH = *((u8 *)pHciCmd->Data);
- PhysLinkDisconnectReason = (*((u8 *)pHciCmd->Data+1));
+ PhysLinkDisconnectReason = *((u8 *)pHciCmd->Data+1);
RTPRINT(FIOCTL, IOCTL_BT_HCICMD, ("HCI_DISCONNECT_PHYSICAL_LINK PhyHandle = 0x%x, Reason = 0x%x\n",
PLH, PhysLinkDisconnectReason));
btdm_1AntUpdateHalRAMask(struct rtw_adapter *padapter, u32 mac_id, u32 filter)
{
u8 init_rate = 0;
- u8 raid;
+ u8 raid, arg;
u32 mask;
u8 shortGIrate = false;
int supportRateNum = 0;
mask &= ~filter;
init_rate = get_highest_rate_idx23a(mask)&0x3f;
- if (pHalData->fw_ractrl) {
- u8 arg = 0;
+ arg = mac_id&0x1f;/* MACID */
+ arg |= BIT(7);
+ if (true == shortGIrate)
+ arg |= BIT(5);
- arg = mac_id&0x1f;/* MACID */
- arg |= BIT(7);
- if (true == shortGIrate)
- arg |= BIT(5);
-
- RTPRINT(FBT, BT_TRACE,
- ("[BTCoex], Update FW RAID entry, MASK = 0x%08x, "
- "arg = 0x%02x\n", mask, arg));
-
- rtl8723a_set_raid_cmd(padapter, mask, arg);
- } else {
- if (shortGIrate)
- init_rate |= BIT(6);
+ RTPRINT(FBT, BT_TRACE,
+ ("[BTCoex], Update FW RAID entry, MASK = 0x%08x, "
+ "arg = 0x%02x\n", mask, arg));
- rtl8723au_write8(padapter, REG_INIDATA_RATE_SEL + mac_id,
- init_rate);
- }
+ rtl8723a_set_raid_cmd(padapter, mask, arg);
psta->init_rate = init_rate;
pdmpriv->INIDATA_RATE[mac_id] = init_rate;
/* arg[5] = Short GI */
void rtl8723a_add_rateatid(struct rtw_adapter *pAdapter, u32 bitmap, u8 arg, u8 rssi_level)
{
- struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
- u8 macid = arg&0x1f;
- u8 raid = (bitmap>>28) & 0x0f;
+ struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter);
+ u8 macid = arg & 0x1f;
+ u32 raid = bitmap & 0xf0000000;
bitmap &= 0x0fffffff;
if (rssi_level != DM_RATR_STA_INIT)
bitmap = ODM_Get_Rate_Bitmap23a(pHalData, macid, bitmap,
rssi_level);
- bitmap |= ((raid<<28)&0xf0000000);
+ bitmap |= raid;
- if (pHalData->fw_ractrl == true) {
- rtl8723a_set_raid_cmd(pAdapter, bitmap, arg);
- } else {
- u8 init_rate, shortGIrate = false;
-
- init_rate = get_highest_rate_idx23a(bitmap&0x0fffffff)&0x3f;
-
- shortGIrate = (arg&BIT(5)) ? true:false;
-
- if (shortGIrate == true)
- init_rate |= BIT(6);
-
- rtl8723au_write8(pAdapter, REG_INIDATA_RATE_SEL + macid,
- init_rate);
- }
+ rtl8723a_set_raid_cmd(pAdapter, bitmap, arg);
}
void rtl8723a_set_FwPwrMode_cmd(struct rtw_adapter *padapter, u8 Mode)
prevent conficting setting in Fw power */
/* saving sequence. 2010.06.07. Added by tynli.
Suggested by SD3 yschang. */
- if ((Mode != PS_MODE_ACTIVE) &&
- (!IS_92C_SERIAL(pHalData->VersionID))) {
+ if (Mode != PS_MODE_ACTIVE && pHalData->rf_type != RF_2T2R)
ODM_RF_Saving23a(&pHalData->odmpriv, true);
- }
H2CSetPwrMode.Mode = Mode;
H2CSetPwrMode.SmartPS = pwrpriv->smart_ps;
memset(pDM_Odm, 0, sizeof(*pDM_Odm));
pDM_Odm->Adapter = Adapter;
- ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_PLATFORM, 0x04);
- ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_INTERFACE, RTW_USB);/* RTL871X_HCI_TYPE */
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_IC_TYPE, ODM_RTL8723A);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_EXT_LNA, true);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_EXT_PA, true);
}
- ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID);
ODM_CmnInfoInit23a(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, Adapter->registrypriv.wifi_spec);
-
- if (pHalData->rf_type == RF_1T1R)
- ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
- else if (pHalData->rf_type == RF_2T2R)
- ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
- else if (pHalData->rf_type == RF_1T2R)
- ODM_CmnInfoUpdate23a(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
}
static void Update_ODM_ComInfo_8723a(struct rtw_adapter *Adapter)
struct dm_odm_t *pDM_Odm = &pHalData->odmpriv;
struct dm_priv *pdmpriv = &pHalData->dmpriv;
int i;
- pdmpriv->InitODMFlag = ODM_BB_DIG |
- ODM_BB_RA_MASK |
- ODM_BB_DYNAMIC_TXPWR |
- ODM_BB_FA_CNT |
- ODM_BB_RSSI_MONITOR |
- ODM_BB_CCK_PD |
- ODM_BB_PWR_SAVE |
- ODM_MAC_EDCA_TURBO |
- ODM_RF_TX_PWR_TRACK |
- ODM_RF_CALIBRATION;
+ pdmpriv->InitODMFlag = 0;
/* Pointer reference */
rtl8723a_odm_support_ability_set(Adapter, DYNAMIC_ALL_FUNC_ENABLE);
offset = GET_HDR_OFFSET_2_0(efuseHeader);
ReadEFuseByte23a(padapter, eFuse_Addr++, &efuseExtHdr);
- if (ALL_WORDS_DISABLED(efuseExtHdr)) {
+ if (ALL_WORDS_DISABLED(efuseExtHdr))
continue;
- }
offset |= ((efuseExtHdr & 0xF0) >> 1);
- wden = (efuseExtHdr & 0x0F);
+ wden = efuseExtHdr & 0x0F;
} else {
- offset = ((efuseHeader >> 4) & 0x0f);
- wden = (efuseHeader & 0x0f);
+ offset = (efuseHeader >> 4) & 0x0f;
+ wden = efuseHeader & 0x0f;
}
if (offset < EFUSE_MAX_SECTION_8723A) {
ReadEFuseByte23a(padapter, eFuse_Addr++,
&efuseExtHdr);
- if (ALL_WORDS_DISABLED(efuseExtHdr)) {
+ if (ALL_WORDS_DISABLED(efuseExtHdr))
continue;
- }
offset |= ((efuseExtHdr & 0xF0) >> 1);
- wden = (efuseExtHdr & 0x0F);
+ wden = efuseExtHdr & 0x0F;
} else {
- offset = ((efuseHeader >> 4) & 0x0f);
- wden = (efuseHeader & 0x0f);
+ offset = (efuseHeader >> 4) & 0x0f;
+ wden = efuseHeader & 0x0f;
}
if (offset < EFUSE_BT_MAX_SECTION) {
hoffset = GET_HDR_OFFSET_2_0(efuse_data);
efuse_addr++;
efuse_OneByteRead23a(padapter, efuse_addr, &efuse_data);
- if (ALL_WORDS_DISABLED(efuse_data)) {
+ if (ALL_WORDS_DISABLED(efuse_data))
continue;
- }
hoffset |= ((efuse_data & 0xF0) >> 1);
hworden = efuse_data & 0x0F;
}
/* Check if we need to check next bank efuse */
- if (efuse_addr < retU2) {
+ if (efuse_addr < retU2)
break; /* don't need to check next bank. */
- }
}
retU2 = ((bank - 1) * EFUSE_BT_REAL_BANK_CONTENT_LEN) + efuse_addr;
value32 = rtl8723au_read32(padapter, REG_SYS_CFG);
ChipVersion.ICType = CHIP_8723A;
ChipVersion.ChipType = ((value32 & RTL_ID) ? TEST_CHIP : NORMAL_CHIP);
- ChipVersion.RFType = RF_TYPE_1T1R;
+ pHalData->rf_type = RF_1T1R;
ChipVersion.VendorType =
((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : CHIP_VENDOR_TSMC);
ChipVersion.CUTVersion = (value32 & CHIP_VER_RTL_MASK) >> CHIP_VER_RTL_SHIFT; /* IC version (CUT) */
value32 = rtl8723au_read32(padapter, REG_GPIO_OUTSTS);
/* ROM code version. */
- ChipVersion.ROMVer = ((value32 & RF_RL_ID) >> 20);
+ ChipVersion.ROMVer = (value32 & RF_RL_ID) >> 20;
/* For multi-function consideration. Added by Roger, 2010.10.06. */
pHalData->MultiFunc = RT_MULTI_FUNC_NONE;
pHalData->PolarityCtl =
((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT :
RT_POLARITY_LOW_ACT);
- dump_chip_info23a(ChipVersion);
pHalData->VersionID = ChipVersion;
- if (IS_1T2R(ChipVersion))
- pHalData->rf_type = RF_1T2R;
- else if (IS_2T2R(ChipVersion))
- pHalData->rf_type = RF_2T2R;
- else
- pHalData->rf_type = RF_1T1R;
-
MSG_8723A("RF_Type is %x!!\n", pHalData->rf_type);
}
pdmpriv = &pHalData->dmpriv;
/* init default value */
- pHalData->fw_ractrl = false;
pHalData->bIQKInitialized = false;
if (!padapter->pwrctrlpriv.bkeepfwalive)
pHalData->LastHMEBoxNum = 0;
/* polling */
do {
value = rtl8723au_read32(padapter, LLTReg);
- if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)) {
+ if (_LLT_NO_ACTIVE == _LLT_OP_VALUE(value))
break;
- }
if (count > POLLING_LLT_THRESHOLD) {
RT_TRACE(_module_hal_init_c_, _drv_err_,
for (i = 0; i < (txpktbuf_bndy - 1); i++) {
status = _LLTWrite(padapter, i, i + 1);
- if (status != _SUCCESS) {
+ if (status != _SUCCESS)
return status;
- }
}
/* end of list */
status = _LLTWrite(padapter, (txpktbuf_bndy - 1), 0xFF);
- if (status != _SUCCESS) {
+ if (status != _SUCCESS)
return status;
- }
/* Make the other pages as ring buffer */
/* This ring buffer is used as beacon buffer if we config this
/* Otherwise used as local loopback buffer. */
for (i = txpktbuf_bndy; i < Last_Entry_Of_TxPktBuf; i++) {
status = _LLTWrite(padapter, i, (i + 1));
- if (_SUCCESS != status) {
+ if (_SUCCESS != status)
return status;
- }
}
/* Let last entry point to the start entry of ring buffer */
status = _LLTWrite(padapter, Last_Entry_Of_TxPktBuf, txpktbuf_bndy);
- if (status != _SUCCESS) {
+ if (status != _SUCCESS)
return status;
- }
return status;
}
/* HW Auto state machine */
int CardDisableHWSM(struct rtw_adapter *padapter, u8 resetMCU)
{
- if (padapter->bSurpriseRemoved) {
+ if (padapter->bSurpriseRemoved)
return _SUCCESS;
- }
+
/* RF Off Sequence ==== */
_DisableRFAFEAndResetBB8192C(padapter);
/* without HW Auto state machine */
int CardDisableWithoutHWSM(struct rtw_adapter *padapter)
{
- if (padapter->bSurpriseRemoved) {
+ if (padapter->bSurpriseRemoved)
return _SUCCESS;
- }
/* RF Off Sequence ==== */
_DisableRFAFEAndResetBB8192C(padapter);
/* eeprom spec */
tempval = hwinfo[RF_OPTION4_8723A];
pHalData->EEPROMBluetoothAntNum = (tempval & 0x1);
- pHalData->EEPROMBluetoothAntIsolation = ((tempval & 0x10) >> 4);
- pHalData->EEPROMBluetoothRadioShared = ((tempval & 0x20) >> 5);
+ pHalData->EEPROMBluetoothAntIsolation = (tempval & 0x10) >> 4;
+ pHalData->EEPROMBluetoothRadioShared = (tempval & 0x20) >> 5;
} else {
pHalData->EEPROMBluetoothCoexist = 0;
pHalData->EEPROMBluetoothType = BT_RTL8723A;
/* Clear first */
ptxdesc->txdw7 &= cpu_to_le32(0xffff0000);
- for (index = 0; index < count; index++) {
+ for (index = 0; index < count; index++)
checksum ^= le16_to_cpu(*(usPtr + index));
- }
ptxdesc->txdw7 |= cpu_to_le32(checksum & 0x0000ffff);
}
ptxdesc->txdw3 |= cpu_to_le32((8 << 28));
}
- if (true == IsBTQosNull) {
+ if (true == IsBTQosNull)
ptxdesc->txdw2 |= cpu_to_le32(BIT(23)); /* BT NULL */
- }
/* offset 16 */
ptxdesc->txdw4 |= cpu_to_le32(BIT(8)); /* driver uses rate */
if (BitMask != bMaskDWord) {/* if not "double word" write */
OriginalValue = rtl8723au_read32(Adapter, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
- Data = ((OriginalValue & (~BitMask)) | (Data << BitShift));
+ Data = (OriginalValue & (~BitMask)) | (Data << BitShift);
}
rtl8723au_write32(Adapter, RegAddr, Data);
/* For 92S LSSI Read RFLSSIRead */
/* For RF A/B write 0x824/82c(does not work in the future) */
/* We must use 0x824 for RF A and B to execute read trigger */
- tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord);
+ tmplong = rtl8723au_read32(Adapter, rFPGA0_XA_HSSIParameter2);
if (eRFPath == RF_PATH_A)
tmplong2 = tmplong;
else
- tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2,
- bMaskDWord);
+ tmplong2 = rtl8723au_read32(Adapter, pPhyReg->rfHSSIPara2);
tmplong2 = (tmplong2 & ~bLSSIReadAddress) |
(NewOffset << 23) | bLSSIReadEdge; /* T65 RF */
- PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2,
- bMaskDWord, tmplong & (~bLSSIReadEdge));
+ rtl8723au_write32(Adapter, rFPGA0_XA_HSSIParameter2,
+ tmplong & (~bLSSIReadEdge));
udelay(10);/* PlatformStallExecution(10); */
- PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2);
+ rtl8723au_write32(Adapter, pPhyReg->rfHSSIPara2, tmplong2);
udelay(100);/* PlatformStallExecution(100); */
- PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord,
- tmplong | bLSSIReadEdge);
+ rtl8723au_write32(Adapter, rFPGA0_XA_HSSIParameter2,
+ tmplong | bLSSIReadEdge);
udelay(10);/* PlatformStallExecution(10); */
if (eRFPath == RF_PATH_A)
/* */
/* Write Operation */
/* */
- PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
- /* RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]= 0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); */
-
+ rtl8723au_write32(Adapter, pPhyReg->rf3wireOffset, DataAndAddr);
}
/**
if (BitMask != bRFRegOffsetMask) {
Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr);
BitShift = phy_CalculateBitShift(BitMask);
- Data = ((Original_Value & (~BitMask)) | (Data << BitShift));
+ Data = (Original_Value & (~BitMask)) | (Data << BitShift);
}
phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data);
int PHY_MACConfig8723A(struct rtw_adapter *Adapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
- bool is92C = IS_92C_SERIAL(pHalData->VersionID);
/* */
/* Config MAC */
ODM_ReadAndConfig_MAC_REG_8723A(&pHalData->odmpriv);
/* 2010.07.13 AMPDU aggregation number 9 */
- /* rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); */
rtl8723au_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A);
- if (is92C && (BOARD_USB_DONGLE == pHalData->BoardType))
+ if (pHalData->rf_type == RF_2T2R &&
+ BOARD_USB_DONGLE == pHalData->BoardType)
rtl8723au_write8(Adapter, 0x40, 0x04);
return _SUCCESS;
(CrystalCap | (CrystalCap << 6)));
}
- PHY_SetBBReg(Adapter, REG_LDOA15_CTRL, bMaskDWord, 0x01572505);
+ rtl8723au_write32(Adapter, REG_LDOA15_CTRL, 0x01572505);
return rtStatus;
}
u8 regBwOpMode;
u8 regRRSR_RSC;
- /* There is no 40MHz mode in RF_8225. */
- if (pHalData->rf_chip == RF_8225)
- return;
-
if (Adapter->bDriverStopped)
return;
/* RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWMode23aCallback8190Pci: time
of SetBWMode23a = %I64d us!\n", (EndTime - BeginTime))); */
- /* 3<3>Set RF related register */
- switch (pHalData->rf_chip) {
- case RF_8225:
- /* PHY_SetRF8225Bandwidth(Adapter,
- pHalData->CurrentChannelBW); */
- break;
-
- case RF_8256:
- /* Please implement this function in Hal8190PciPhy8256.c */
- /* PHY_SetRF8256Bandwidth(Adapter,
- pHalData->CurrentChannelBW); */
- break;
-
- case RF_8258:
- /* Please implement this function in Hal8190PciPhy8258.c */
- /* PHY_SetRF8258Bandwidth(); */
- break;
-
- case RF_6052:
- rtl8723a_phy_rf6052set_bw(Adapter, pHalData->CurrentChannelBW);
- break;
-
- default:
- /* RT_ASSERT(false, ("Unknown RFChipID: %d\n",
- pHalData->RFChipID)); */
- break;
- }
-
- /* pHalData->SetBWMode23aInProgress = false; */
+ rtl8723a_phy_rf6052set_bw(Adapter, pHalData->CurrentChannelBW);
/* RT_TRACE(COMP_SCAN, DBG_LOUD,
("<== PHY_SetBWMode23aCallback8192C() \n")); */
break;
case 2: /* Better regulatory */
/* don't increase any power diff */
- writeVal = ((index < 2) ? powerBase0[rf] :
- powerBase1[rf]);
+ writeVal = (index < 2) ? powerBase0[rf] :
+ powerBase1[rf];
break;
case 3: /* Customer defined power diff. */
chnlGroup = 0;
else
RegOffset = RegOffset_B[index];
- PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal);
+ rtl8723au_write32(Adapter, RegOffset, writeVal);
/* 201005115 Joseph: Set Tx Power diff for Tx power
training mechanism. */
bool matchbssid = false;
u8 *bssid;
- matchbssid = (!ieee80211_is_ctl(hdr->frame_control) &&
- !pattrib->icv_err && !pattrib->crc_err);
+ matchbssid = !ieee80211_is_ctl(hdr->frame_control) &&
+ !pattrib->icv_err && !pattrib->crc_err;
if (matchbssid) {
switch (hdr->frame_control &
static void _InitRFType(struct rtw_adapter *Adapter)
{
struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
- bool is92CU = IS_92C_SERIAL(pHalData->VersionID);
- pHalData->rf_chip = RF_6052;
-
- if (!is92CU) {
- pHalData->rf_type = RF_1T1R;
- DBG_8723A("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n");
- return;
- }
-
- /* TODO: Consider that EEPROM set 92CU to 1T1R later. */
- /* Force to overwrite setting according to chip version. Ignore
- EEPROM setting. */
- /* pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; */
- MSG_8723A("Set RF Chip ID to RF_6052 and RF type to %d.\n",
- pHalData->rf_type);
+ pHalData->rf_type = RF_1T1R;
}
/* Set CCK and OFDM Block "ON" */
status = rtl8723a_FirmwareDownload(Adapter);
if (status != _SUCCESS) {
Adapter->bFWReady = false;
- pHalData->fw_ractrl = false;
DBG_8723A("fw download fail!\n");
goto exit;
} else {
Adapter->bFWReady = true;
- pHalData->fw_ractrl = true;
DBG_8723A("fw download ok!\n");
}
}
/* reducing 80M spur */
- PHY_SetBBReg(Adapter, REG_AFE_XTAL_CTRL, bMaskDWord, 0x0381808d);
- PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xf0ffff83);
- PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xf0ffff82);
- PHY_SetBBReg(Adapter, REG_AFE_PLL_CTRL, bMaskDWord, 0xf0ffff83);
+ rtl8723au_write32(Adapter, REG_AFE_XTAL_CTRL, 0x0381808d);
+ rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff83);
+ rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff82);
+ rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff83);
/* RFSW Control */
- PHY_SetBBReg(Adapter, rFPGA0_TxInfo, bMaskDWord, 0x00000003); /* 0x804[14]= 0 */
- PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, bMaskDWord, 0x07000760); /* 0x870[6:5]= b'11 */
- PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, bMaskDWord, 0x66F60210); /* 0x860[6:5]= b'00 */
+ /* 0x804[14]= 0 */
+ rtl8723au_write32(Adapter, rFPGA0_TxInfo, 0x00000003);
+ /* 0x870[6:5]= b'11 */
+ rtl8723au_write32(Adapter, rFPGA0_XAB_RFInterfaceSW, 0x07000760);
+ /* 0x860[6:5]= b'00 */
+ rtl8723au_write32(Adapter, rFPGA0_XA_RFInterfaceOE, 0x66F60210);
- RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("%s: 0x870 = value 0x%x\n", __func__, PHY_QueryBBReg(Adapter, 0x870, bMaskDWord)));
+ RT_TRACE(_module_hci_hal_init_c_, _drv_info_,
+ ("%s: 0x870 = value 0x%x\n", __func__,
+ rtl8723au_read32(Adapter, 0x870)));
/* */
/* Joseph Note: Keep RfRegChnlVal for later use. */
rtl8723a_InitHalDm(Adapter);
- val8 = ((WiFiNavUpperUs + HAL_8723A_NAV_UPPER_UNIT - 1) /
- HAL_8723A_NAV_UPPER_UNIT);
+ val8 = (WiFiNavUpperUs + HAL_8723A_NAV_UPPER_UNIT - 1) /
+ HAL_8723A_NAV_UPPER_UNIT;
rtl8723au_write8(Adapter, REG_NAV_UPPER, val8);
/* 2011/03/09 MH debug only, UMC-B cut pass 2500 S5 test, but we need to fin root cause. */
/* AFE */
if (pHalData->rf_type == RF_2T2R)
- PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord,
- 0x63DB25A0);
+ rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x63DB25A0);
else if (pHalData->rf_type == RF_1T1R)
- PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord,
- 0x631B25A0);
+ rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x631B25A0);
/* 4. issue 3-wire command that RF set to Rx idle
mode. This is used to re-write the RX idle mode. */
/* We can only prvide a usual value instead and then
HW will modify the value by itself. */
- PHY_SetRFReg(Adapter, RF_PATH_A, 0, bRFRegOffsetMask, 0x32D95);
+ PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC,
+ bRFRegOffsetMask, 0x32D95);
if (pHalData->rf_type == RF_2T2R) {
- PHY_SetRFReg(Adapter, RF_PATH_B, 0,
+ PHY_SetRFReg(Adapter, RF_PATH_B, RF_AC,
bRFRegOffsetMask, 0x32D95);
}
break;
for packet detection */
/* (4) Reg800[1] = 1 enable preamble power saving */
Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] =
- PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter,
- bMaskDWord);
+ rtl8723au_read32(Adapter, rFPGA0_XAB_RFParameter);
Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] =
- PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable,
- bMaskDWord);
+ rtl8723au_read32(Adapter, rOFDM0_TRxPathEnable);
Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] =
- PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord);
+ rtl8723au_read32(Adapter, rFPGA0_RFMOD);
if (pHalData->rf_type == RF_2T2R) {
PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter,
0x380038, 0);
/* 2 .AFE control register to power down. bit[30:22] */
Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] =
- PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord);
+ rtl8723au_read32(Adapter, rRx_Wait_CCA);
if (pHalData->rf_type == RF_2T2R)
- PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord,
- 0x00DB25A0);
+ rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x00DB25A0);
else if (pHalData->rf_type == RF_1T1R)
- PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord,
- 0x001B25A0);
+ rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x001B25A0);
/* 3. issue 3-wire command that RF set to power down.*/
- PHY_SetRFReg(Adapter, RF_PATH_A, 0, bRFRegOffsetMask, 0);
+ PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0);
if (pHalData->rf_type == RF_2T2R)
- PHY_SetRFReg(Adapter, RF_PATH_B, 0,
+ PHY_SetRFReg(Adapter, RF_PATH_B, RF_AC,
bRFRegOffsetMask, 0);
/* 4. Force PFM , disable SPS18_LDO_Marco_Block */
readAdapterInfo(Adapter);
}
-static void _ReadRFType(struct rtw_adapter *Adapter)
-{
- struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter);
-
- pHalData->rf_chip = RF_6052;
-}
-
/* */
/* Description: */
/* We should set Efuse cell selection to WiFi cell in default. */
hal_EfuseCellSel(Adapter);
- _ReadRFType(Adapter);/* rf_chip -> _InitRFType() */
_ReadPROMContent(Adapter);
- /* MSG_8723A("%s()(done), rf_chip = 0x%x, rf_type = 0x%x\n",
- __func__, pHalData->rf_chip, pHalData->rf_type); */
-
MSG_8723A("<==== _ReadAdapterInfo8723AU in %d ms\n",
jiffies_to_msecs(jiffies - start));
}
struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
struct wlan_bssid_ex *cur_network = &pmlmeinfo->network;
- u8 init_rate, networkType, raid;
+ u8 init_rate, networkType, raid, arg;
u32 mask, rate_bitmap;
u8 shortGIrate = false;
int supportRateNum;
init_rate = get_highest_rate_idx23a(mask) & 0x3f;
- if (pHalData->fw_ractrl == true) {
- u8 arg = 0;
-
- arg = mac_id & 0x1f;/* MACID */
+ arg = mac_id & 0x1f;/* MACID */
+ arg |= BIT(7);
- arg |= BIT(7);
+ if (shortGIrate == true)
+ arg |= BIT(5);
- if (shortGIrate == true)
- arg |= BIT(5);
+ DBG_8723A("update raid entry, mask = 0x%x, arg = 0x%x\n", mask, arg);
- DBG_8723A("update raid entry, mask = 0x%x, arg = 0x%x\n",
- mask, arg);
-
- rtl8723a_set_raid_cmd(padapter, mask, arg);
- } else {
- if (shortGIrate == true)
- init_rate |= BIT(6);
-
- rtl8723au_write8(padapter, (REG_INIDATA_RATE_SEL + mac_id),
- init_rate);
- }
+ rtl8723a_set_raid_cmd(padapter, mask, arg);
/* set ra_id */
psta->raid = raid;
#ifndef __INC_HAL8723PHYCFG_H__
#define __INC_HAL8723PHYCFG_H__
-/*--------------------------Define Parameters-------------------------------*/
-#define MAX_AGGR_NUM 0x0909
-
/*------------------------------Define structure----------------------------*/
enum RF_RADIO_PATH {
RF_PATH_A = 0, /* Radio Path A */
WIRELESS_MODE_AC = BIT(6)
};
-/* BB/RF related */
-enum rf_type_8190p {
- RF_TYPE_MIN, /* 0 */
- RF_8225 = 1, /* 1 11b/g RF for verification only */
- RF_8256 = 2, /* 2 11b/g/n */
- RF_8258 = 3, /* 3 11a/b/g/n RF */
- RF_6052 = 4, /* 4 11b/g/n RF */
-};
-
struct bb_reg_define {
u32 rfintfs; /* set software control: */
/* 0x870~0x877[8 bytes] */
CHIP_VENDOR_UMC = 1,
};
-enum hal_rf_type {
- RF_TYPE_1T1R = 0,
- RF_TYPE_1T2R = 1,
- RF_TYPE_2T2R = 2,
- RF_TYPE_2T3R = 3,
- RF_TYPE_2T4R = 4,
- RF_TYPE_3T3R = 5,
- RF_TYPE_3T4R = 6,
- RF_TYPE_4T4R = 7,
-};
-
struct hal_version {
enum hal_ic_type ICType;
enum hal_chip_type ChipType;
enum hal_cut_version CUTVersion;
enum hal_vendor VendorType;
- enum hal_rf_type RFType;
u8 ROMVer;
};
/* Get element */
#define GET_CVID_IC_TYPE(version) ((version).ICType)
#define GET_CVID_CHIP_TYPE(version) ((version).ChipType)
-#define GET_CVID_RF_TYPE(version) ((version).RFType)
#define GET_CVID_MANUFACTUER(version) ((version).VendorType)
#define GET_CVID_CUT_VERSION(version) ((version).CUTVersion)
#define GET_CVID_ROM_VERSION(version) (((version).ROMVer) & ROM_VERSION_MASK)
#define IS_CHIP_VENDOR_UMC(version) \
((GET_CVID_MANUFACTUER(version) == CHIP_VENDOR_UMC) ? true : false)
-#define IS_1T1R(version) \
- ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T1R) ? true : false)
-#define IS_1T2R(version) \
- ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R) ? true : false)
-#define IS_2T2R(version) \
- ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R) ? true : false)
-
/* Chip version Macro. -- */
-#define IS_92C_SERIAL(version) \
- ((IS_81XXC(version) && IS_2T2R(version)) ? true : false)
#define IS_81xxC_VENDOR_UMC_A_CUT(version) \
(IS_81XXC(version)?(IS_CHIP_VENDOR_UMC(version) ? \
(IS_A_CUT(version) ? true : false) : false) : false)
#define RATE_36M BIT(9)
#define RATE_48M BIT(10)
#define RATE_54M BIT(11)
-/* MCS 1 Spatial Stream */
-#define RATE_MCS0 BIT(12)
-#define RATE_MCS1 BIT(13)
-#define RATE_MCS2 BIT(14)
-#define RATE_MCS3 BIT(15)
-#define RATE_MCS4 BIT(16)
-#define RATE_MCS5 BIT(17)
-#define RATE_MCS6 BIT(18)
-#define RATE_MCS7 BIT(19)
-/* MCS 2 Spatial Stream */
-#define RATE_MCS8 BIT(20)
-#define RATE_MCS9 BIT(21)
-#define RATE_MCS10 BIT(22)
-#define RATE_MCS11 BIT(23)
-#define RATE_MCS12 BIT(24)
-#define RATE_MCS13 BIT(25)
-#define RATE_MCS14 BIT(26)
-#define RATE_MCS15 BIT(27)
-
-/* ALL CCK Rate */
-#define RATE_ALL_CCK (RATR_1M | RATR_2M | RATR_55M | RATR_11M)
-#define RATE_ALL_OFDM_AG \
- (RATR_6M | RATR_9M | RATR_12M | RATR_18M | RATR_24M| \
- RATR_36M|RATR_48M|RATR_54M)
-#define RATE_ALL_OFDM_1SS \
- (RATR_MCS0 | RATR_MCS1 | RATR_MCS2 | RATR_MCS3 | \
- RATR_MCS4 | RATR_MCS5 | RATR_MCS6 | RATR_MCS7)
-#define RATE_ALL_OFDM_2SS \
- (RATR_MCS8 | RATR_MCS9 | RATR_MCS10 | RATR_MCS11| \
- RATR_MCS12 | RATR_MCS13 | RATR_MCS14 | RATR_MCS15)
/*------------------------------ Tx Desc definition Macro ------------------------*/
/* pragma mark -- Tx Desc related definition. -- */
#define REG_NOA_DESC_COUNT 0x05EC
#include "HalVerDef.h"
-void dump_chip_info23a(struct hal_version ChipVersion);
u8 /* return the final channel plan decision */
#include <osdep_service.h>
#include <drv_types.h>
-enum RTL871X_HCI_TYPE {
- RTW_PCIE = BIT(0),
- RTW_USB = BIT(1),
- RTW_SDIO = BIT(2),
- RTW_GSPI = BIT(3),
-};
-
enum _CHIP_TYPE {
NULL_CHIP_TYPE,
RTL8712_8188S_8191S_8192S,
#define WLAN_REASON_JOIN_WRONG_CHANNEL 65534
#define WLAN_REASON_EXPIRATION_CHK 65535
-
-#define IEEE80211_STATMASK_SIGNAL (1<<0)
-#define IEEE80211_STATMASK_RSSI (1<<1)
-#define IEEE80211_STATMASK_NOISE (1<<2)
-#define IEEE80211_STATMASK_RATE (1<<3)
-#define IEEE80211_STATMASK_WEMASK 0x7
-
-
-#define IEEE80211_CCK_MODULATION (1<<0)
-#define IEEE80211_OFDM_MODULATION (1<<1)
-
-#define IEEE80211_24GHZ_BAND (1<<0)
-#define IEEE80211_52GHZ_BAND (1<<1)
-
#define IEEE80211_CCK_RATE_LEN 4
#define IEEE80211_NUM_OFDM_RATESLEN 8
u32 Cnt_BW_LSC; /* Gary */
};
-struct pri_cca {
- u8 PriCCA_flag;
- u8 intf_flag;
- u8 intf_type;
- u8 DupRTS_flag;
- u8 Monitor_flag;
-};
-
-struct rx_hp {
- u8 RXHP_flag;
- u8 PSD_func_trigger;
- u8 PSD_bitmap_RXHP[80];
- u8 Pre_IGI;
- u8 Cur_IGI;
- u8 Pre_pw_th;
- u8 Cur_pw_th;
- bool First_time_enter;
- bool RXHP_enable;
- u8 TP_Mode;
-};
-
#define ASSOCIATE_ENTRY_NUM 32 /* Max size of AsocEntry[]. */
#define ODM_ASSOCIATE_ENTRY_NUM ASSOCIATE_ENTRY_NUM
struct edca_turbo {
bool bCurrentTurboEDCA;
- bool bIsCurRDLState;
u32 prv_traffic_idx; /* edca turbo */
};
/* Fixed value: */
/* */
- ODM_CMNINFO_PLATFORM = 0,
- ODM_CMNINFO_INTERFACE, /* enum odm_interface_def */
- ODM_CMNINFO_MP_TEST_CHIP,
- ODM_CMNINFO_IC_TYPE, /* enum odm_ic_type_def */
- ODM_CMNINFO_CUT_VER, /* enum odm_cut_version */
- ODM_CMNINFO_FAB_VER, /* enum odm_fab_version */
- ODM_CMNINFO_RF_TYPE, /* enum rf_path_def or enum odm_rf_type? */
- ODM_CMNINFO_BOARD_TYPE, /* enum odm_board_type */
- ODM_CMNINFO_EXT_LNA, /* true */
+ ODM_CMNINFO_MP_TEST_CHIP = 2,
+ ODM_CMNINFO_IC_TYPE, /* enum odm_ic_type_def */
+ ODM_CMNINFO_CUT_VER, /* enum odm_cut_version */
+ ODM_CMNINFO_FAB_VER, /* enum odm_fab_version */
+ ODM_CMNINFO_BOARD_TYPE, /* enum odm_board_type */
+ ODM_CMNINFO_EXT_LNA, /* true */
ODM_CMNINFO_EXT_PA,
ODM_CMNINFO_EXT_TRSW,
- ODM_CMNINFO_PATCH_ID, /* CUSTOMER ID */
ODM_CMNINFO_BINHCT_TEST,
ODM_CMNINFO_BWIFI_TEST,
ODM_CMNINFO_SMART_CONCURRENT,
/* Define ODM support ability. ODM_CMNINFO_ABILITY */
enum {
/* BB ODM section BIT 0-15 */
- ODM_BB_DIG = BIT(0),
- ODM_BB_RA_MASK = BIT(1),
- ODM_BB_DYNAMIC_TXPWR = BIT(2),
- ODM_BB_FA_CNT = BIT(3),
- ODM_BB_RSSI_MONITOR = BIT(4),
- ODM_BB_CCK_PD = BIT(5),
ODM_BB_ANT_DIV = BIT(6),
- ODM_BB_PWR_SAVE = BIT(7),
- ODM_BB_PWR_TRAIN = BIT(8),
- ODM_BB_RATE_ADAPTIVE = BIT(9),
- ODM_BB_PATH_DIV = BIT(10),
- ODM_BB_PSD = BIT(11),
- ODM_BB_RXHP = BIT(12),
-
- /* MAC DM section BIT 16-23 */
- ODM_MAC_EDCA_TURBO = BIT(16),
- ODM_MAC_EARLY_MODE = BIT(17),
-
- /* RF ODM section BIT 24-31 */
- ODM_RF_TX_PWR_TRACK = BIT(24),
- ODM_RF_RX_GAIN_TRACK = BIT(25),
- ODM_RF_CALIBRATION = BIT(26),
-
};
/* ODM_CMNINFO_INTERFACE */
ODM_UMC = 1,
};
-/* ODM_CMNINFO_RF_TYPE */
/* For example 1T2R (A+AB = BIT0|BIT4|BIT5) */
enum rf_path_def {
ODM_RF_TX_A = BIT(0),
ODM_RF_RX_D = BIT(7),
};
-
-enum odm_rf_type {
- ODM_1T1R = 0,
- ODM_1T2R = 1,
- ODM_2T2R = 2,
- ODM_2T3R = 3,
- ODM_2T4R = 4,
- ODM_3T3R = 5,
- ODM_3T4R = 6,
- ODM_4T4R = 7,
-};
-
/* ODM Dynamic common info value definition */
enum odm_mac_phy_mode {
u8 bDPPathBOK;
};
-/* ODM Dynamic common info value definition */
-struct odm_fat_t {
- u8 Bssid[6];
- u8 antsel_rx_keep_0;
- u8 antsel_rx_keep_1;
- u8 antsel_rx_keep_2;
- u32 antSumRSSI[7];
- u32 antRSSIcnt[7];
- u32 antAveRSSI[7];
- u8 FAT_State;
- u32 TrainIdx;
- u8 antsel_a[ODM_ASSOCIATE_ENTRY_NUM];
- u8 antsel_b[ODM_ASSOCIATE_ENTRY_NUM];
- u8 antsel_c[ODM_ASSOCIATE_ENTRY_NUM];
- u32 MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
- u32 AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
- u32 MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
- u32 AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
- u8 RxIdleAnt;
- bool bBecomeLinked;
-};
-
-enum fat_state {
- FAT_NORMAL_STATE = 0,
- FAT_TRAINING_STATE = 1,
-};
-
enum ant_dif_type {
NO_ANTDIV = 0xFF,
CG_TRX_HW_ANTDIV = 0x01,
/* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */
bool bCckHighPower;
u8 RFPathRxEnable; /* ODM_CMNINFO_RFPATH_ENABLE */
- u8 ControlChannel;
/* ODM HANDLE, DRIVER NEEDS NOT TO HOOK------ */
/* 1 COMMON INFORMATION */
/* HOOK BEFORE REG INIT----------- */
/* ODM Support Ability DIG/RATR/TX_PWR_TRACK/ ¡K¡K = 1/2/3/¡K */
u32 SupportAbility;
- /* ODM PCIE/USB/SDIO/GSPI = 0/1/2/3 */
- u8 SupportInterface;
/* ODM composite or independent. Bit oriented/ 92C+92D+ .... or any other type = 1/2/3/... */
u32 SupportICType;
/* Cut Version TestChip/A-cut/B-cut... = 0/1/2/3/... */
u8 CutVersion;
/* Fab Version TSMC/UMC = 0/1 */
u8 FabVersion;
- /* RF Type 4T4R/3T3R/2T2R/1T2R/1T1R/... */
- u8 RFType;
/* Board Type Normal/HighPower/MiniCard/SLIM/Combo/... = 0/1/2/3/4/... */
u8 BoardType;
/* with external LNA NO/Yes = 0/1 */
u8 ExtPA;
/* with external TRSW NO/Yes = 0/1 */
u8 ExtTRSW;
- u8 PatchID; /* Customer ID */
bool bInHctTest;
bool bWIFITest;
/* 2012/01/12 MH For MP, we need to reduce one array pointer for default port.?? */
struct sta_info * pODM_StaInfo[ODM_ASSOCIATE_ENTRY_NUM];
- /* */
- /* 2012/02/14 MH Add to share 88E ra with other SW team. */
- /* We need to colelct all support abilit to a proper area. */
- /* */
- bool RaSupport88E;
-
- /* Define ........... */
-
/* Latest packet phy info (ODM write) */
struct odm_phy_dbg_info PhyDbgInfo;
/* PHY_INFO_88E PhyInfo; */
/* */
/* ODM Structure */
/* */
- struct odm_fat_t DM_FatTable;
struct dig_t DM_DigTable;
struct dynamic_pwr_sav DM_PSTable;
- struct pri_cca DM_PriCCA;
- struct rx_hp DM_RXHP_Table;
struct false_alarm_stats FalseAlmCnt;
struct false_alarm_stats FlaseAlmCntBuddyAdapter;
struct sw_ant_sw DM_SWAT_Table;
/* */
/* PSD */
- bool bUserAssignLevel;
- u8 RSSI_BT; /* come from BT */
- bool bPSDinProcess;
-
- /* for rate adaptive, in fact, 88c/92c fw will handle this */
- u8 bUseRAMask;
-
+ u8 RSSI_BT; /* come from BT */
struct odm_rate_adapt RateAdaptive;
struct odm_rf_cal_t RFCalibrateInfo;
-
- /* */
- /* TX power tracking */
- /* */
- u8 BbSwingIdxOfdm;
- u8 BbSwingIdxOfdmCurrent;
- u8 BbSwingIdxOfdmBase;
- bool BbSwingFlagOfdm;
- u8 BbSwingIdxCck;
- u8 BbSwingIdxCckCurrent;
- u8 BbSwingIdxCckBase;
- bool BbSwingFlagCck;
- /* */
- /* ODM system resource. */
- /* */
}; /* DM_Dynamic_Mechanism_Structure */
enum odm_rf_content {
bool ODM_SingleDualAntennaDetection(struct dm_odm_t *pDM_Odm, u8 mode);
-void odm_dtc(struct dm_odm_t *pDM_Odm);
-
#endif
void odm_ConfigMAC_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u8 Data);
-void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 Addr,
- u32 Bitmask, u32 Data);
+void odm_ConfigBB_AGC_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data);
-void odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 Addr, u32 Bitmask, u32 Data);
+void odm_ConfigBB_PHY_8723A(struct dm_odm_t *pDM_Odm, u32 addr, u32 data);
#endif /* end of SUPPORT */
/* =========== EXtern Function Prototype */
/* */
-
-u8 ODM_Read1Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr);
-u16 ODM_Read2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr);
-u32 ODM_Read4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr);
-void ODM_Write1Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u8 Data);
-void ODM_Write2Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u16 Data);
-void ODM_Write4Byte(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 Data);
-void ODM_SetMACReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data);
-u32 ODM_GetMACReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask);
-void ODM_SetBBReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask, u32 Data);
-u32 ODM_GetBBReg(struct dm_odm_t *pDM_Odm, u32 RegAddr, u32 BitMask);
void ODM_SetRFReg(struct dm_odm_t *pDM_Odm, enum RF_RADIO_PATH eRFPath,
u32 RegAddr, u32 BitMask, u32 Data);
u32 ODM_GetRFReg(struct dm_odm_t *pDM_Odm, enum RF_RADIO_PATH eRFPath,
u16 BasicRateSet;
/* rf_ctrl */
- u8 rf_chip;
u8 rf_type;
u8 NumTotalRFPath;
/* for host message to fw */
u8 LastHMEBoxNum;
- u8 fw_ractrl;
u8 RegTxPause;
/* Beacon function related global variable. */
u8 RegFwHwTxQCtrl;
MODULE_FIRMWARE("rtlwifi/rtl8723aufw_B_NoBT.bin");
/* module param defaults */
-static int rtw_chip_version = 0x00;
+static int rtw_chip_version;
static int rtw_rfintfs = HWPI;
static int rtw_debug = 1;
static void rtw_dev_unload(struct rtw_adapter *padapter)
{
struct submit_ctx *pack_tx_ops = &padapter->xmitpriv.ack_tx_ops;
+
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_dev_unload\n"));
if (padapter->bup) {
RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("-dev_remove()\n"));
DBG_8723A("-r871xu_dev_remove, done\n");
-
- return;
}
static int __init rtw_drv_entry(void)
}
static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
- u8 tpc, u16 sec_cnt, u8 cfg, int mode_2k,
+ u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
int use_sg, void *buf, int buf_len)
{
int retval;
u16 log_blk, u8 start_page, u8 end_page)
{
struct ms_info *ms_card = &(chip->ms_card);
- int retval, rty_cnt, uncorrect_flag = 0;
+ bool uncorrect_flag = false;
+ int retval, rty_cnt;
u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
if (val & INT_REG_ERR) {
retval = ms_read_status_reg(chip);
if (retval != STATUS_SUCCESS) {
- uncorrect_flag = 1;
+ uncorrect_flag = true;
dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
} else {
- uncorrect_flag = 0;
+ uncorrect_flag = false;
}
retval = ms_transfer_tpc(chip,
reg_addr = PPBUF_BASE2;
for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
+ int block_no;
+
retval = rtsx_read_register(chip, reg_addr++, &val1);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, INIT_FAIL);
break;
seg_no = defect_block / 512;
- ms_card->segment[seg_no].defect_list[ms_card->segment[seg_no].disable_count++] = defect_block;
+
+ block_no = ms_card->segment[seg_no].disable_count++;
+ ms_card->segment[seg_no].defect_list[block_no] = defect_block;
}
for (i = 0; i < ms_card->segment_cnt; i++) {
{
struct ms_info *ms_card = &(chip->ms_card);
struct zone_entry *segment;
- int retval, table_size, disable_cnt, defect_flag, i;
- u16 start, end, phy_blk, log_blk, tmp_blk;
+ bool defect_flag;
+ int retval, table_size, disable_cnt, i;
+ u16 start, end, phy_blk, log_blk, tmp_blk, idx;
u8 extra[MS_EXTRA_SIZE], us1, us2;
dev_dbg(rtsx_dev(chip), "ms_build_l2p_tbl: %d\n", seg_no);
for (phy_blk = start; phy_blk < end; phy_blk++) {
if (disable_cnt) {
- defect_flag = 0;
+ defect_flag = false;
for (i = 0; i < segment->disable_count; i++) {
if (phy_blk == segment->defect_list[i]) {
- defect_flag = 1;
+ defect_flag = true;
break;
}
}
continue;
}
- if (segment->l2p_table[log_blk - ms_start_idx[seg_no]] == 0xFFFF) {
- segment->l2p_table[log_blk - ms_start_idx[seg_no]] = phy_blk;
+ idx = log_blk - ms_start_idx[seg_no];
+
+ if (segment->l2p_table[idx] == 0xFFFF) {
+ segment->l2p_table[idx] = phy_blk;
continue;
}
us1 = extra[0] & 0x10;
- tmp_blk = segment->l2p_table[log_blk - ms_start_idx[seg_no]];
+ tmp_blk = segment->l2p_table[idx];
retval = ms_read_extra_data(chip, tmp_blk, 0,
extra, MS_EXTRA_SIZE);
if (retval != STATUS_SUCCESS)
for (log_blk = ms_start_idx[seg_no];
log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
- if (segment->l2p_table[log_blk-ms_start_idx[seg_no]] == 0xFFFF) {
+ idx = log_blk - ms_start_idx[seg_no];
+ if (segment->l2p_table[idx] == 0xFFFF) {
phy_blk = ms_get_unused_block(chip, seg_no);
if (phy_blk == 0xFFFF) {
chip->card_wp |= MS_CARD;
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, BUILD_FAIL);
- segment->l2p_table[log_blk-ms_start_idx[seg_no]] = phy_blk;
+ segment->l2p_table[idx] = phy_blk;
if (seg_no == ms_card->segment_cnt - 1) {
if (segment->unused_blk_cnt < 2) {
chip->card_wp |= MS_CARD;
u16 sector_cnt)
{
struct ms_info *ms_card = &(chip->ms_card);
- int retval, mode_2k = 0;
+ bool mode_2k = false;
+ int retval;
u16 count;
u8 val, trans_mode, rw_tpc, rw_cmd;
rw_tpc = PRO_WRITE_QUAD_DATA;
rw_cmd = PRO_WRITE_2K_DATA;
}
- mode_2k = 1;
+ mode_2k = true;
}
} else {
if (srb->sc_data_direction == DMA_FROM_DEVICE) {
}
int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
- int short_data_len, int quick_format)
+ int short_data_len, bool quick_format)
{
struct ms_info *ms_card = &(chip->ms_card);
int retval, i;
int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
u32 start_sector, u16 sector_cnt);
int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
- int short_data_len, int quick_format);
+ int short_data_len, bool quick_format);
void ms_free_l2p_tbl(struct rtsx_chip *chip);
void ms_cleanup_work(struct rtsx_chip *chip);
int ms_power_off_card3v3(struct rtsx_chip *chip);
/* check for state-transition errors */
if (chip->srb != NULL) {
- dev_err(&dev->pci->dev, "Error in %s: chip->srb = %p\n",
- __func__, chip->srb);
+ dev_err(&dev->pci->dev, "Error: chip->srb = %p\n",
+ chip->srb);
return SCSI_MLQUEUE_HOST_BUSY;
}
MODULE_DEVICE_TABLE(pci, rtsx_ids);
/* pci_driver definition */
-static struct pci_driver driver = {
+static struct pci_driver rtsx_driver = {
.name = CR_DRIVER_NAME,
.id_table = rtsx_ids,
.probe = rtsx_probe,
.shutdown = rtsx_shutdown,
};
-static int __init rtsx_init(void)
-{
- pr_info("Initializing Realtek PCIE storage driver...\n");
-
- return pci_register_driver(&driver);
-}
-
-static void __exit rtsx_exit(void)
-{
- pr_info("rtsx_exit() called\n");
-
- pci_unregister_driver(&driver);
-
- pr_info("%s module exit\n", CR_DRIVER_NAME);
-}
-
-module_init(rtsx_init)
-module_exit(rtsx_exit)
+module_pci_driver(rtsx_driver);
static int rtsx_pre_handle_sdio_new(struct rtsx_chip *chip)
{
u8 tmp;
- int sw_bypass_sd = 0;
+ bool sw_bypass_sd = false;
int retval;
if (chip->driver_first_load) {
if (CHECK_PID(chip, 0x5288)) {
RTSX_READ_REG(chip, 0xFE5A, &tmp);
if (tmp & 0x08)
- sw_bypass_sd = 1;
+ sw_bypass_sd = true;
} else if (CHECK_PID(chip, 0x5208)) {
RTSX_READ_REG(chip, 0xFE70, &tmp);
if (tmp & 0x80)
- sw_bypass_sd = 1;
+ sw_bypass_sd = true;
}
} else {
if (chip->sdio_in_charge)
- sw_bypass_sd = 1;
+ sw_bypass_sd = true;
}
dev_dbg(rtsx_dev(chip), "chip->sdio_in_charge = %d\n",
chip->sdio_in_charge);
static inline int check_sd_speed_prior(u32 sd_speed_prior)
{
- int i, fake_para = 0;
+ bool fake_para = false;
+ int i;
for (i = 0; i < 4; i++) {
u8 tmp = (u8)(sd_speed_prior >> (i*8));
if ((tmp < 0x01) || (tmp > 0x04)) {
- fake_para = 1;
+ fake_para = true;
break;
}
}
static inline int check_sd_current_prior(u32 sd_current_prior)
{
- int i, fake_para = 0;
+ bool fake_para = false;
+ int i;
for (i = 0; i < 4; i++) {
u8 tmp = (u8)(sd_current_prior >> (i*8));
if (tmp > 0x03) {
- fake_para = 1;
+ fake_para = true;
break;
}
}
static void rtsx_monitor_aspm_config(struct rtsx_chip *chip)
{
- int maybe_support_aspm, reg_changed;
+ bool reg_changed, maybe_support_aspm;
u32 tmp = 0;
u8 reg0 = 0, reg1 = 0;
- maybe_support_aspm = 0;
- reg_changed = 0;
+ maybe_support_aspm = false;
+ reg_changed = false;
rtsx_read_config_byte(chip, LCTLR, ®0);
if (chip->aspm_level[0] != reg0) {
- reg_changed = 1;
+ reg_changed = true;
chip->aspm_level[0] = reg0;
}
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) {
rtsx_read_cfg_dw(chip, 1, 0xC0, &tmp);
reg1 = (u8)tmp;
if (chip->aspm_level[1] != reg1) {
- reg_changed = 1;
+ reg_changed = true;
chip->aspm_level[1] = reg1;
}
if ((reg0 & 0x03) && (reg1 & 0x03))
- maybe_support_aspm = 1;
+ maybe_support_aspm = true;
} else {
if (reg0 & 0x03)
- maybe_support_aspm = 1;
+ maybe_support_aspm = true;
}
if (reg_changed) {
#ifdef SUPPORT_SD_LOCK
struct sd_info *sd_card = &chip->sd_card;
#endif
- int ss_allowed;
+ bool ss_allowed;
if (rtsx_chk_stat(chip, RTSX_STAT_SUSPEND))
return;
rtsx_init_cards(chip);
if (chip->ss_en) {
- ss_allowed = 1;
+ ss_allowed = true;
if (CHECK_PID(chip, 0x5288)) {
- ss_allowed = 0;
+ ss_allowed = false;
} else {
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip)) {
u32 val;
rtsx_read_cfg_dw(chip, 1, 0x04, &val);
if (val & 0x07)
- ss_allowed = 0;
+ ss_allowed = false;
}
}
} else {
- ss_allowed = 0;
+ ss_allowed = false;
}
if (ss_allowed && !chip->sd_io) {
int rtsx_write_phy_register(struct rtsx_chip *chip, u8 addr, u16 val)
{
- int i, finished = 0;
+ bool finished = false;
+ int i;
u8 tmp;
RTSX_WRITE_REG(chip, PHYDATA0, 0xFF, (u8)val);
for (i = 0; i < 100000; i++) {
RTSX_READ_REG(chip, PHYRWCTL, &tmp);
if (!(tmp & 0x80)) {
- finished = 1;
+ finished = true;
break;
}
}
int rtsx_read_phy_register(struct rtsx_chip *chip, u8 addr, u16 *val)
{
- int i, finished = 0;
+ bool finished = false;
+ int i;
u16 data = 0;
u8 tmp;
for (i = 0; i < 100000; i++) {
RTSX_READ_REG(chip, PHYRWCTL, &tmp);
if (!(tmp & 0x80)) {
- finished = 1;
+ finished = true;
break;
}
}
int rtsx_pre_handle_interrupt(struct rtsx_chip *chip)
{
u32 status, int_enable;
- int exit_ss = 0;
+ bool exit_ss = false;
#ifdef SUPPORT_OCP
u32 ocp_int = 0;
if (chip->ss_en) {
chip->ss_counter = 0;
if (rtsx_get_stat(chip) == RTSX_STAT_SS) {
- exit_ss = 1;
+ exit_ss = true;
rtsx_exit_L1(chip);
rtsx_set_stat(chip, RTSX_STAT_RUN);
}
{
struct scsi_cmnd *srb = chip->srb;
char *what = NULL;
- int unknown_cmd = 0, len;
+ bool unknown_cmd = false;
+ int len;
switch (srb->cmnd[0]) {
case TEST_UNIT_READY:
what = "Realtek's vendor command";
break;
default:
- what = "(unknown command)"; unknown_cmd = 1;
+ what = "(unknown command)";
+ unknown_cmd = true;
break;
}
unsigned char sendbytes;
unsigned char *buf;
u8 card = get_lun_card(chip, lun);
- int pro_formatter_flag = 0;
+ bool pro_formatter_flag = false;
unsigned char inquiry_buf[] = {
QULIFIRE|DRCT_ACCESS_DEV,
RMB_DISC|0x0D,
#else
if (chip->mspro_formatter_enable)
#endif
- {
if (!card || (card == MS_CARD))
- pro_formatter_flag = 1;
- }
+ pro_formatter_flag = true;
if (pro_formatter_flag) {
if (scsi_bufflen(srb) < 56)
struct ms_info *ms_card = &(chip->ms_card);
int sys_info_offset;
int data_size = buf_len;
- int support_format = 0;
+ bool support_format = false;
int i = 0;
if (cmd == MODE_SENSE) {
/* Medium Type Code */
if (check_card_ready(chip, lun)) {
if (CHK_MSXC(ms_card)) {
- support_format = 1;
+ support_format = true;
buf[i++] = 0x40;
} else if (CHK_MSPRO(ms_card)) {
- support_format = 1;
+ support_format = true;
buf[i++] = 0x20;
} else {
buf[i++] = 0x10;
unsigned int lun = SCSI_LUN(srb);
unsigned int dataSize;
int status;
- int pro_formatter_flag;
+ bool pro_formatter_flag;
unsigned char pageCode, *buf;
u8 card = get_lun_card(chip, lun);
}
#endif
- pro_formatter_flag = 0;
+ pro_formatter_flag = false;
dataSize = 8;
#ifdef SUPPORT_MAGIC_GATE
if ((chip->lun2card[lun] & MS_CARD)) {
if (!card || (card == MS_CARD)) {
dataSize = 108;
if (chip->mspro_formatter_enable)
- pro_formatter_flag = 1;
+ pro_formatter_flag = true;
}
}
#else
if (card == MS_CARD) {
if (chip->mspro_formatter_enable) {
- pro_formatter_flag = 1;
+ pro_formatter_flag = true;
dataSize = 108;
}
}
static int read_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip)
{
int retval;
- u8 func, func_max;
+ bool func_max;
+ u8 func;
u16 addr, len;
u8 *buf;
__func__, func, addr, len);
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip))
- func_max = 1;
+ func_max = true;
else
- func_max = 0;
+ func_max = false;
if (func > func_max) {
set_sense_type(chip, SCSI_LUN(srb),
static int write_cfg_byte(struct scsi_cmnd *srb, struct rtsx_chip *chip)
{
int retval;
- u8 func, func_max;
+ bool func_max;
+ u8 func;
u16 addr, len;
u8 *buf;
__func__, func, addr);
if (CHK_SDIO_EXIST(chip) && !CHK_SDIO_IGNORED(chip))
- func_max = 1;
+ func_max = true;
else
- func_max = 0;
+ func_max = false;
if (func > func_max) {
set_sense_type(chip, SCSI_LUN(srb),
{
struct ms_info *ms_card = &(chip->ms_card);
unsigned int lun = SCSI_LUN(srb);
- int retval, quick_format;
+ bool quick_format;
+ int retval;
if (get_lun_card(chip, lun) != MS_CARD) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_LUN_NOT_SUPPORT);
rtsx_set_stat(chip, RTSX_STAT_RUN);
if (srb->cmnd[8] & 0x01)
- quick_format = 0;
+ quick_format = false;
else
- quick_format = 1;
+ quick_format = true;
if (!(chip->card_ready & MS_CARD)) {
set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
dma_addr_t addr;
u8 dir;
int err = 0;
- u32 val = (1 << 31);
+ u32 val = 1 << 31;
long timeleft;
if ((buf == NULL) || (len <= 0))
u16 SD_VP_CTL, SD_DCMPS_CTL;
u8 val;
int retval;
- int ddr_rx = 0;
+ bool ddr_rx = false;
dev_dbg(rtsx_dev(chip), "sd_change_phase (sample_point = %d, tune_dir = %d)\n",
sample_point, tune_dir);
SD_VP_CTL = SD_VPRX_CTL;
SD_DCMPS_CTL = SD_DCMPS_RX_CTL;
if (CHK_SD_DDR50(sd_card))
- ddr_rx = 1;
+ ddr_rx = true;
} else {
SD_VP_CTL = SD_VPTX_CTL;
SD_DCMPS_CTL = SD_DCMPS_TX_CTL;
{
int retval;
int i;
- int switch_good = 0;
+ bool switch_good = false;
for (i = 0; i < 3; i++) {
if (detect_card_cd(chip, SD_CARD) != STATUS_SUCCESS) {
retval = sd_check_switch_mode(chip, SD_SWITCH_MODE,
func_group, func_to_switch, bus_width);
if (retval == STATUS_SUCCESS) {
- switch_good = 1;
+ switch_good = true;
break;
}
struct sd_info *sd_card = &(chip->sd_card);
struct timing_phase_path path[MAX_PHASE + 1];
int i, j, cont_path_cnt;
- int new_block, max_len, final_path_idx;
+ bool new_block;
+ int max_len, final_path_idx;
u8 final_phase = 0xFF;
if (phase_map == 0xFFFFFFFF) {
}
cont_path_cnt = 0;
- new_block = 1;
+ new_block = true;
j = 0;
for (i = 0; i < MAX_PHASE + 1; i++) {
if (phase_map & (1 << i)) {
if (new_block) {
- new_block = 0;
+ new_block = false;
j = cont_path_cnt++;
path[j].start = i;
path[j].end = i;
path[j].end = i;
}
} else {
- new_block = 1;
+ new_block = true;
if (cont_path_cnt) {
int idx = cont_path_cnt - 1;
static int reset_sd(struct rtsx_chip *chip)
{
struct sd_info *sd_card = &(chip->sd_card);
- int retval, i = 0, j = 0, k = 0, hi_cap_flow = 0;
- int sd_dont_switch = 0;
- int support_1v8 = 0;
- int try_sdio = 1;
+ bool hi_cap_flow = false;
+ int retval, i = 0, j = 0, k = 0;
+ bool sd_dont_switch = false;
+ bool support_1v8 = false;
+ bool try_sdio = true;
u8 rsp[16];
u8 switch_bus_width;
u32 voltage = 0;
- int sd20_mode = 0;
+ bool sd20_mode = false;
SET_SD(sd_card);
i = 0;
j = 0;
k = 0;
- hi_cap_flow = 0;
+ hi_cap_flow = false;
#ifdef SUPPORT_SD_LOCK
if (sd_card->sd_lock_status & SD_UNLOCK_POW_ON)
SD_RSP_TYPE_R7, rsp, 5);
if (retval == STATUS_SUCCESS) {
if ((rsp[4] == 0xAA) && ((rsp[3] & 0x0f) == 0x01)) {
- hi_cap_flow = 1;
+ hi_cap_flow = true;
voltage = SUPPORT_VOLTAGE | 0x40000000;
}
}
else
CLR_SD_HCXC(sd_card);
- support_1v8 = 0;
+ support_1v8 = false;
} else {
CLR_SD_HCXC(sd_card);
- support_1v8 = 0;
+ support_1v8 = false;
}
dev_dbg(rtsx_dev(chip), "support_1v8 = %d\n", support_1v8);
TRACE_RET(chip, STATUS_FAIL);
if (!(sd_card->raw_csd[4] & 0x40))
- sd_dont_switch = 1;
+ sd_dont_switch = true;
if (!sd_dont_switch) {
if (sd20_mode) {
retval = sd_switch_function(chip, switch_bus_width);
if (retval != STATUS_SUCCESS) {
sd_init_power(chip);
- sd_dont_switch = 1;
- try_sdio = 0;
+ sd_dont_switch = true;
+ try_sdio = false;
goto Switch_Fail;
}
} else {
if (support_1v8) {
sd_init_power(chip);
- sd_dont_switch = 1;
- try_sdio = 0;
+ sd_dont_switch = true;
+ try_sdio = false;
goto Switch_Fail;
}
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- try_sdio = 0;
- sd20_mode = 1;
+ try_sdio = false;
+ sd20_mode = true;
goto Switch_Fail;
}
}
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- try_sdio = 0;
- sd20_mode = 1;
+ try_sdio = false;
+ sd20_mode = true;
goto Switch_Fail;
}
}
}
-static int mmc_switch_timing_bus(struct rtsx_chip *chip, int switch_ddr)
+static int mmc_switch_timing_bus(struct rtsx_chip *chip, bool switch_ddr)
{
struct sd_info *sd_card = &(chip->sd_card);
int retval;
{
struct sd_info *sd_card = &(chip->sd_card);
int retval, i = 0, j = 0, k = 0;
- int switch_ddr = 1;
+ bool switch_ddr = true;
u8 rsp[16];
u8 spec_ver = 0;
u32 temp;
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- switch_ddr = 0;
+ switch_ddr = false;
TRACE_GOTO(chip, Switch_Fail);
}
if (retval != STATUS_SUCCESS)
TRACE_RET(chip, STATUS_FAIL);
- switch_ddr = 0;
+ switch_ddr = false;
TRACE_GOTO(chip, Switch_Fail);
}
}
}
int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
- u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, int special_check)
+ u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, bool special_check)
{
int retval;
int timeout = 100;
if ((cmd_idx == SELECT_CARD) || (cmd_idx == APP_CMD) ||
(cmd_idx == SEND_STATUS) || (cmd_idx == STOP_TRANSMISSION)) {
- if ((cmd_idx != STOP_TRANSMISSION) && (special_check == 0)) {
+ if ((cmd_idx != STOP_TRANSMISSION) && !special_check) {
if (ptr[1] & 0x80)
TRACE_RET(chip, STATUS_FAIL);
}
unsigned int lun = SCSI_LUN(srb);
int retval, rsp_len;
u8 cmd_idx, rsp_type;
- u8 standby = 0, acmd = 0;
+ bool standby = false, acmd = false;
u32 arg;
if (!sd_card->sd_pass_thru_en) {
cmd_idx = srb->cmnd[2] & 0x3F;
if (srb->cmnd[1] & 0x02)
- standby = 1;
+ standby = true;
if (srb->cmnd[1] & 0x01)
- acmd = 1;
+ acmd = true;
arg = ((u32)srb->cmnd[3] << 24) | ((u32)srb->cmnd[4] << 16) |
((u32)srb->cmnd[5] << 8) | srb->cmnd[6];
if (acmd) {
retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
sd_card->sd_addr,
- SD_RSP_TYPE_R1, NULL, 0, 0);
+ SD_RSP_TYPE_R1, NULL, 0, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
}
retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
- sd_card->rsp, rsp_len, 0);
+ sd_card->rsp, rsp_len, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Cmd_Failed);
struct sd_info *sd_card = &(chip->sd_card);
unsigned int lun = SCSI_LUN(srb);
int retval, rsp_len, i;
- int cmd13_checkbit = 0, read_err = 0;
+ bool read_err = false, cmd13_checkbit = false;
u8 cmd_idx, rsp_type, bus_width;
- u8 send_cmd12 = 0, standby = 0, acmd = 0;
+ bool standby = false, send_cmd12 = false, acmd = false;
u32 data_len;
if (!sd_card->sd_pass_thru_en) {
cmd_idx = srb->cmnd[2] & 0x3F;
if (srb->cmnd[1] & 0x04)
- send_cmd12 = 1;
+ send_cmd12 = true;
if (srb->cmnd[1] & 0x02)
- standby = 1;
+ standby = true;
if (srb->cmnd[1] & 0x01)
- acmd = 1;
+ acmd = true;
data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
<< 8) | srb->cmnd[9];
if (data_len < 512) {
retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
- SD_RSP_TYPE_R1, NULL, 0, 0);
+ SD_RSP_TYPE_R1, NULL, 0, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
}
if (acmd) {
retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
sd_card->sd_addr,
- SD_RSP_TYPE_R1, NULL, 0, 0);
+ SD_RSP_TYPE_R1, NULL, 0, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
}
retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, byte_cnt,
blk_cnt, bus_width, buf, data_len, 2000);
if (retval != STATUS_SUCCESS) {
- read_err = 1;
+ read_err = true;
kfree(buf);
rtsx_clear_sd_error(chip);
TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
scsi_bufflen(srb), scsi_sg_count(srb),
DMA_FROM_DEVICE, 10000);
if (retval < 0) {
- read_err = 1;
+ read_err = true;
rtsx_clear_sd_error(chip);
TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
}
if (send_cmd12) {
retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
- 0, SD_RSP_TYPE_R1b, NULL, 0, 0);
+ 0, SD_RSP_TYPE_R1b, NULL, 0, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
}
if (data_len < 512) {
retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
- SD_RSP_TYPE_R1, NULL, 0, 0);
+ SD_RSP_TYPE_R1, NULL, 0, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Read_Cmd_Failed);
}
if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
- cmd13_checkbit = 1;
+ cmd13_checkbit = true;
for (i = 0; i < 3; i++) {
retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
struct sd_info *sd_card = &(chip->sd_card);
unsigned int lun = SCSI_LUN(srb);
int retval, rsp_len, i;
- int cmd13_checkbit = 0, write_err = 0;
+ bool write_err = false, cmd13_checkbit = false;
u8 cmd_idx, rsp_type;
- u8 send_cmd12 = 0, standby = 0, acmd = 0;
+ bool standby = false, send_cmd12 = false, acmd = false;
u32 data_len, arg;
#ifdef SUPPORT_SD_LOCK
int lock_cmd_fail = 0;
cmd_idx = srb->cmnd[2] & 0x3F;
if (srb->cmnd[1] & 0x04)
- send_cmd12 = 1;
+ send_cmd12 = true;
if (srb->cmnd[1] & 0x02)
- standby = 1;
+ standby = true;
if (srb->cmnd[1] & 0x01)
- acmd = 1;
+ acmd = true;
data_len = ((u32)srb->cmnd[7] << 16) | ((u32)srb->cmnd[8]
<< 8) | srb->cmnd[9];
if (data_len < 512) {
retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, data_len,
- SD_RSP_TYPE_R1, NULL, 0, 0);
+ SD_RSP_TYPE_R1, NULL, 0, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
}
if (acmd) {
retval = ext_sd_send_cmd_get_rsp(chip, APP_CMD,
sd_card->sd_addr,
- SD_RSP_TYPE_R1, NULL, 0, 0);
+ SD_RSP_TYPE_R1, NULL, 0, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
}
retval = ext_sd_send_cmd_get_rsp(chip, cmd_idx, arg, rsp_type,
- sd_card->rsp, rsp_len, 0);
+ sd_card->rsp, rsp_len, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
}
if (retval < 0) {
- write_err = 1;
+ write_err = true;
rtsx_clear_sd_error(chip);
TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
}
if (send_cmd12) {
retval = ext_sd_send_cmd_get_rsp(chip, STOP_TRANSMISSION,
- 0, SD_RSP_TYPE_R1b, NULL, 0, 0);
+ 0, SD_RSP_TYPE_R1b, NULL, 0, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
}
if (data_len < 512) {
retval = ext_sd_send_cmd_get_rsp(chip, SET_BLOCKLEN, 0x200,
- SD_RSP_TYPE_R1, NULL, 0, 0);
+ SD_RSP_TYPE_R1, NULL, 0, false);
if (retval != STATUS_SUCCESS)
TRACE_GOTO(chip, SD_Execute_Write_Cmd_Failed);
}
if ((srb->cmnd[1] & 0x02) || (srb->cmnd[1] & 0x04))
- cmd13_checkbit = 1;
+ cmd13_checkbit = true;
for (i = 0; i < 3; i++) {
retval = ext_sd_send_cmd_get_rsp(chip, SEND_STATUS,
#ifdef SUPPORT_CPRM
int soft_reset_sd_card(struct rtsx_chip *chip);
int ext_sd_send_cmd_get_rsp(struct rtsx_chip *chip, u8 cmd_idx,
- u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, int special_check);
+ u32 arg, u8 rsp_type, u8 *rsp, int rsp_len, bool special_check);
int ext_sd_get_rsp(struct rtsx_chip *chip, int len, u8 *rsp, u8 rsp_type);
int sd_pass_thru_mode(struct scsi_cmnd *srb, struct rtsx_chip *chip);
#if SKEIN_UNROLL_256 == 0
#define R256(p0, p1, p2, p3, ROT, r_num) /* fully unrolled */ \
-do { \
- ROUND256(p0, p1, p2, p3, ROT, r_num); \
-} while (0)
+ ROUND256(p0, p1, p2, p3, ROT, r_num)
#define I256(R) \
do { \
#if SKEIN_UNROLL_512 == 0
#define R512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num) /* unrolled */ \
-do { \
- ROUND512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num); \
-} while (0)
+ ROUND512(p0, p1, p2, p3, p4, p5, p6, p7, ROT, r_num)
#define I512(R) \
do { \
#include <linux/seq_file.h>
#include <linux/kthread.h>
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/firmware.h>
#include <linux/types.h>
#include "slic.h"
static uint slic_first_init = 1;
-static char *slic_banner = "Alacritech SLIC Technology(tm) Server "
- "and Storage Accelerator (Non-Accelerated)";
+static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)";
static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
/* Get the CRC polynomial for the mac address */
/* we use bits 1-8 (lsb), bitwise reversed,
* msb (= lsb bit 0 before bitrev) is automatically discarded */
- crcpoly = (ether_crc(ETH_ALEN, address)>>23);
+ crcpoly = ether_crc(ETH_ALEN, address)>>23;
/* We only have space on the SLIC for 64 entries. Lop
* off the top two bits. (2^6 = 64)
ihcmd = &hcmd->cmd64;
- ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
+ ihcmd->flags = adapter->port << IHFLG_IFSHFT;
ihcmd->command = IHCMD_XMT_REQ;
ihcmd->u.slic_buffers.totlen = skb->len;
phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
(u64) hcmd) + 31) >> 5);
#else
- hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
- (u32) hcmd) + 31) >> 5);
+ hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] -
+ (u32)hcmd) + 31) >> 5;
#endif
}
}
rc = slic_adapter_allocresources(adapter);
if (rc) {
- dev_err(&dev->dev,
- "%s: slic_adapter_allocresources FAILED %x\n",
- __func__, rc);
+ dev_err(&dev->dev, "slic_adapter_allocresources FAILED %x\n",
+ rc);
slic_adapter_freeresources(adapter);
goto err;
}
adapter->state = ADAPT_UP;
if (!card->loadtimerset) {
- init_timer(&card->loadtimer);
+ setup_timer(&card->loadtimer, &slic_timer_load_check,
+ (ulong)card);
card->loadtimer.expires =
jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
- card->loadtimer.data = (ulong) card;
- card->loadtimer.function = &slic_timer_load_check;
add_timer(&card->loadtimer);
card->loadtimerset = 1;
}
if (!adapter->pingtimerset) {
- init_timer(&adapter->pingtimer);
+ setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev);
adapter->pingtimer.expires =
jiffies + (PING_TIMER_INTERVAL * HZ);
- adapter->pingtimer.data = (ulong) dev;
- adapter->pingtimer.function = &slic_timer_ping;
add_timer(&adapter->pingtimer);
adapter->pingtimerset = 1;
adapter->card->pingstatus = ISR_PINGMASK;
if (copy_from_user(data, rq->ifr_data, 28))
return -EFAULT;
intagg = data[0];
- dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
- __func__, intagg);
+ dev_err(&dev->dev, "set interrupt aggregation to %d\n",
+ intagg);
slic_intagg_set(adapter, intagg);
return 0;
--- /dev/null
+config FB_SM750
+ tristate "Silicon Motion SM750 framebuffer support"
+ depends on FB && PCI
+ help
+ Frame buffer driver for the Silicon Motion SM750 chip
+ with 2D accelearion and dual head support.
+
+ This driver is also available as a module. The module will be
+ called sm750fb. If you want to compile it as a module, say M
+ here and read <file:Documentation/kbuild/modules.txt>.
--- /dev/null
+obj-$(CONFIG_FB_SM750) += sm750fb.o
+
+sm750fb-objs := sm750.o sm750_hw.o sm750_accel.o sm750_cursor.o ddk750_chip.o ddk750_power.o ddk750_mode.o
+sm750fb-objs += ddk750_display.o ddk750_help.o ddk750_swi2c.o ddk750_sii164.o ddk750_dvi.o ddk750_hwi2c.o
--- /dev/null
+TODO:
+- lots of clechpatch cleanup
+- use kernel coding style
+- refine the code and remove unused code
+- check on hardware effects of removal of USE_HW_I2C and USE_DVICHIP (these two
+ are supposed to be sample code which is given here if someone wants to
+ use those functionalities)
+- move it to drivers/video/fbdev
+- modify the code for drm framework
+
+Please send any patches to
+ Greg Kroah-Hartman <greg@kroah.com>
+ Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+ Teddy Wang <teddy.wang@siliconmotion.com>
+ Sudip Mukherjee <sudip@vectorindia.org>
--- /dev/null
+#ifndef DDK750_H__
+#define DDK750_H__
+/*******************************************************************
+*
+* Copyright (c) 2007 by Silicon Motion, Inc. (SMI)
+*
+* All rights are reserved. Reproduction or in part is prohibited
+* without the written consent of the copyright owner.
+*
+* RegSC.h --- SM718 SDK
+* This file contains the definitions for the System Configuration registers.
+*
+*******************************************************************/
+#include "ddk750_reg.h"
+#include "ddk750_mode.h"
+#include "ddk750_chip.h"
+#include "ddk750_display.h"
+#include "ddk750_power.h"
+#include "ddk750_help.h"
+#ifdef USE_HW_I2C
+#include "ddk750_hwi2c.h"
+#endif
+#include "ddk750_swi2c.h"
+#endif
--- /dev/null
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_chip.h"
+#include "ddk750_power.h"
+typedef struct _pllcalparam{
+ unsigned char power;/* d : 0~ 6*/
+ unsigned char pod;
+ unsigned char od;
+ unsigned char value;/* value of 2 power d (2^d) */
+}
+pllcalparam;
+
+
+logical_chip_type_t getChipType(void)
+{
+ unsigned short physicalID;
+ char physicalRev;
+ logical_chip_type_t chip;
+
+ physicalID = devId750;//either 0x718 or 0x750
+ physicalRev = revId750;
+
+ if (physicalID == 0x718)
+ {
+ chip = SM718;
+ }
+ else if (physicalID == 0x750)
+ {
+ chip = SM750;
+ /* SM750 and SM750LE are different in their revision ID only. */
+ if (physicalRev == SM750LE_REVISION_ID){
+ chip = SM750LE;
+ }
+ }
+ else
+ {
+ chip = SM_UNKNOWN;
+ }
+
+ return chip;
+}
+
+
+inline unsigned int twoToPowerOfx(unsigned long x)
+{
+ unsigned long i;
+ unsigned long result = 1;
+
+ for (i=1; i<=x; i++)
+ result *= 2;
+ return result;
+}
+
+inline unsigned int calcPLL(pll_value_t *pPLL)
+{
+ return (pPLL->inputFreq * pPLL->M / pPLL->N / twoToPowerOfx(pPLL->OD) / twoToPowerOfx(pPLL->POD));
+}
+
+unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL)
+{
+ unsigned int ulPllReg = 0;
+
+ pPLL->inputFreq = DEFAULT_INPUT_CLOCK;
+ pPLL->clockType = clockType;
+
+ switch (clockType)
+ {
+ case MXCLK_PLL:
+ ulPllReg = PEEK32(MXCLK_PLL_CTRL);
+ break;
+ case PRIMARY_PLL:
+ ulPllReg = PEEK32(PANEL_PLL_CTRL);
+ break;
+ case SECONDARY_PLL:
+ ulPllReg = PEEK32(CRT_PLL_CTRL);
+ break;
+ case VGA0_PLL:
+ ulPllReg = PEEK32(VGA_PLL0_CTRL);
+ break;
+ case VGA1_PLL:
+ ulPllReg = PEEK32(VGA_PLL1_CTRL);
+ break;
+ }
+
+ pPLL->M = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, M);
+ pPLL->N = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, N);
+ pPLL->OD = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, OD);
+ pPLL->POD = FIELD_GET(ulPllReg, PANEL_PLL_CTRL, POD);
+
+ return calcPLL(pPLL);
+}
+
+
+unsigned int getChipClock(void)
+{
+ pll_value_t pll;
+#if 1
+ if(getChipType() == SM750LE)
+ return MHz(130);
+#endif
+
+ return getPllValue(MXCLK_PLL, &pll);
+}
+
+
+/*
+ * This function set up the main chip clock.
+ *
+ * Input: Frequency to be set.
+ */
+void setChipClock(unsigned int frequency)
+{
+ pll_value_t pll;
+ unsigned int ulActualMxClk;
+#if 1
+ /* Cheok_0509: For SM750LE, the chip clock is fixed. Nothing to set. */
+ if (getChipType() == SM750LE)
+ return;
+#endif
+
+ if (frequency != 0)
+ {
+ /*
+ * Set up PLL, a structure to hold the value to be set in clocks.
+ */
+ pll.inputFreq = DEFAULT_INPUT_CLOCK; /* Defined in CLOCK.H */
+ pll.clockType = MXCLK_PLL;
+
+ /*
+ * Call calcPllValue() to fill up the other fields for PLL structure.
+ * Sometime, the chip cannot set up the exact clock required by User.
+ * Return value from calcPllValue() gives the actual possible clock.
+ */
+ ulActualMxClk = calcPllValue(frequency, &pll);
+
+ /* Master Clock Control: MXCLK_PLL */
+ POKE32(MXCLK_PLL_CTRL, formatPllReg(&pll));
+ }
+}
+
+
+
+void setMemoryClock(unsigned int frequency)
+{
+ unsigned int ulReg, divisor;
+ #if 1
+ /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
+ if (getChipType() == SM750LE)
+ return;
+#endif
+ if (frequency != 0)
+ {
+ /* Set the frequency to the maximum frequency that the DDR Memory can take
+ which is 336MHz. */
+ if (frequency > MHz(336))
+ frequency = MHz(336);
+
+ /* Calculate the divisor */
+ divisor = (unsigned int) roundedDiv(getChipClock(), frequency);
+
+ /* Set the corresponding divisor in the register. */
+ ulReg = PEEK32(CURRENT_GATE);
+ switch(divisor)
+ {
+ default:
+ case 1:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_1);
+ break;
+ case 2:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_2);
+ break;
+ case 3:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_3);
+ break;
+ case 4:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, M2XCLK, DIV_4);
+ break;
+ }
+
+ setCurrentGate(ulReg);
+ }
+}
+
+
+/*
+ * This function set up the master clock (MCLK).
+ *
+ * Input: Frequency to be set.
+ *
+ * NOTE:
+ * The maximum frequency the engine can run is 168MHz.
+ */
+void setMasterClock(unsigned int frequency)
+{
+ unsigned int ulReg, divisor;
+#if 1
+ /* Cheok_0509: For SM750LE, the memory clock is fixed. Nothing to set. */
+ if (getChipType() == SM750LE)
+ return;
+#endif
+ if (frequency != 0)
+ {
+ /* Set the frequency to the maximum frequency that the SM750 engine can
+ run, which is about 190 MHz. */
+ if (frequency > MHz(190))
+ frequency = MHz(190);
+
+ /* Calculate the divisor */
+ divisor = (unsigned int) roundedDiv(getChipClock(), frequency);
+
+ /* Set the corresponding divisor in the register. */
+ ulReg = PEEK32(CURRENT_GATE);
+ switch(divisor)
+ {
+ default:
+ case 3:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_3);
+ break;
+ case 4:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_4);
+ break;
+ case 6:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_6);
+ break;
+ case 8:
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, MCLK, DIV_8);
+ break;
+ }
+
+ setCurrentGate(ulReg);
+ }
+}
+
+
+unsigned int ddk750_getVMSize(void)
+{
+ unsigned int reg;
+ unsigned int data;
+
+ /* sm750le only use 64 mb memory*/
+ if(getChipType() == SM750LE)
+ return MB(64);
+
+ /* for 750,always use power mode0*/
+ reg = PEEK32(MODE0_GATE);
+ reg = FIELD_SET(reg,MODE0_GATE,GPIO,ON);
+ POKE32(MODE0_GATE,reg);
+
+ /* get frame buffer size from GPIO */
+ reg = FIELD_GET(PEEK32(MISC_CTRL),MISC_CTRL,LOCALMEM_SIZE);
+ switch(reg){
+ case MISC_CTRL_LOCALMEM_SIZE_8M: data = MB(8); break; /* 8 Mega byte */
+ case MISC_CTRL_LOCALMEM_SIZE_16M: data = MB(16); break; /* 16 Mega byte */
+ case MISC_CTRL_LOCALMEM_SIZE_32M: data = MB(32); break; /* 32 Mega byte */
+ case MISC_CTRL_LOCALMEM_SIZE_64M: data = MB(64); break; /* 64 Mega byte */
+ default: data = 0;break;
+ }
+ return data;
+
+}
+
+int ddk750_initHw(initchip_param_t * pInitParam)
+{
+
+ unsigned int ulReg;
+#if 0
+ //move the code to map regiter function.
+ if(getChipType() == SM718){
+ /* turn on big endian bit*/
+ ulReg = PEEK32(0x74);
+ /* now consider register definition in a big endian pattern*/
+ POKE32(0x74,ulReg|0x80000000);
+ }
+
+#endif
+
+
+ if (pInitParam->powerMode != 0 )
+ pInitParam->powerMode = 0;
+ setPowerMode(pInitParam->powerMode);
+
+ /* Enable display power gate & LOCALMEM power gate*/
+ ulReg = PEEK32(CURRENT_GATE);
+ ulReg = FIELD_SET(ulReg, CURRENT_GATE, DISPLAY, ON);
+ ulReg = FIELD_SET(ulReg,CURRENT_GATE,LOCALMEM,ON);
+ setCurrentGate(ulReg);
+
+ if(getChipType() != SM750LE){
+ /* set panel pll and graphic mode via mmio_88 */
+ ulReg = PEEK32(VGA_CONFIGURATION);
+ ulReg = FIELD_SET(ulReg,VGA_CONFIGURATION,PLL,PANEL);
+ ulReg = FIELD_SET(ulReg,VGA_CONFIGURATION,MODE,GRAPHIC);
+ POKE32(VGA_CONFIGURATION,ulReg);
+ }else{
+#if defined(__i386__) || defined( __x86_64__)
+ /* set graphic mode via IO method */
+ outb_p(0x88,0x3d4);
+ outb_p(0x06,0x3d5);
+#endif
+ }
+
+ /* Set the Main Chip Clock */
+ setChipClock(MHz((unsigned int)pInitParam->chipClock));
+
+ /* Set up memory clock. */
+ setMemoryClock(MHz(pInitParam->memClock));
+
+ /* Set up master clock */
+ setMasterClock(MHz(pInitParam->masterClock));
+
+
+ /* Reset the memory controller. If the memory controller is not reset in SM750,
+ the system might hang when sw accesses the memory.
+ The memory should be resetted after changing the MXCLK.
+ */
+ if (pInitParam->resetMemory == 1)
+ {
+ ulReg = PEEK32(MISC_CTRL);
+ ulReg = FIELD_SET(ulReg, MISC_CTRL, LOCALMEM_RESET, RESET);
+ POKE32(MISC_CTRL, ulReg);
+
+ ulReg = FIELD_SET(ulReg, MISC_CTRL, LOCALMEM_RESET, NORMAL);
+ POKE32(MISC_CTRL, ulReg);
+ }
+
+ if (pInitParam->setAllEngOff == 1)
+ {
+ enable2DEngine(0);
+
+ /* Disable Overlay, if a former application left it on */
+ ulReg = PEEK32(VIDEO_DISPLAY_CTRL);
+ ulReg = FIELD_SET(ulReg, VIDEO_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(VIDEO_DISPLAY_CTRL, ulReg);
+
+ /* Disable video alpha, if a former application left it on */
+ ulReg = PEEK32(VIDEO_ALPHA_DISPLAY_CTRL);
+ ulReg = FIELD_SET(ulReg, VIDEO_ALPHA_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(VIDEO_ALPHA_DISPLAY_CTRL, ulReg);
+
+ /* Disable alpha plane, if a former application left it on */
+ ulReg = PEEK32(ALPHA_DISPLAY_CTRL);
+ ulReg = FIELD_SET(ulReg, ALPHA_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(ALPHA_DISPLAY_CTRL, ulReg);
+
+#if 0
+ /* Disable LCD hardware cursor, if a former application left it on */
+ ulReg = PEEK32(PANEL_HWC_ADDRESS);
+ ulReg = FIELD_SET(ulReg, PANEL_HWC_ADDRESS, ENABLE, DISABLE);
+ POKE32(PANEL_HWC_ADDRESS, ulReg);
+
+ /* Disable CRT hardware cursor, if a former application left it on */
+ ulReg = PEEK32(CRT_HWC_ADDRESS);
+ ulReg = FIELD_SET(ulReg, CRT_HWC_ADDRESS, ENABLE, DISABLE);
+ POKE32(CRT_HWC_ADDRESS, ulReg);
+
+ /* Disable ZV Port 0, if a former application left it on */
+ ulReg = PEEK32(ZV0_CAPTURE_CTRL);
+ ulReg = FIELD_SET(ulReg, ZV0_CAPTURE_CTRL, CAP, DISABLE);
+ POKE32(ZV0_CAPTURE_CTRL, ulReg);
+
+ /* Disable ZV Port 1, if a former application left it on */
+ ulReg = PEEK32(ZV1_CAPTURE_CTRL);
+ ulReg = FIELD_SET(ulReg, ZV1_CAPTURE_CTRL, CAP, DISABLE);
+ POKE32(ZV1_CAPTURE_CTRL, ulReg);
+
+ /* Disable ZV Port Power, if a former application left it on */
+ enableZVPort(0);
+ /* Disable DMA Channel, if a former application left it on */
+ ulReg = PEEK32(DMA_ABORT_INTERRUPT);
+ ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT);
+ POKE32(DMA_ABORT_INTERRUPT, ulReg);
+
+ /* Disable i2c */
+ enableI2C(0);
+#endif
+ /* Disable DMA Channel, if a former application left it on */
+ ulReg = PEEK32(DMA_ABORT_INTERRUPT);
+ ulReg = FIELD_SET(ulReg, DMA_ABORT_INTERRUPT, ABORT_1, ABORT);
+ POKE32(DMA_ABORT_INTERRUPT, ulReg);
+
+ /* Disable DMA Power, if a former application left it on */
+ enableDMA(0);
+ }
+
+ /* We can add more initialization as needed. */
+
+ return 0;
+}
+
+#if 0
+
+unsigned int absDiff(unsigned int a, unsigned int b)
+{
+ if ( a > b )
+ return(a - b);
+ else
+ return(b - a);
+}
+
+#endif
+/*
+ monk liu @ 4/6/2011:
+ re-write the calculatePLL function of ddk750.
+ the original version function does not use some mathematics tricks and shortcut
+ when it doing the calculation of the best N,M,D combination
+ I think this version gives a little upgrade in speed
+
+ 750 pll clock formular:
+ Request Clock = (Input Clock * M )/(N * X)
+
+ Input Clock = 14318181 hz
+ X = 2 power D
+ D ={0,1,2,3,4,5,6}
+ M = {1,...,255}
+ N = {2,...,15}
+*/
+unsigned int calcPllValue(unsigned int request_orig,pll_value_t *pll)
+{
+ /* used for primary and secondary channel pixel clock pll */
+ static pllcalparam xparm_PIXEL[] = {
+ /* 2^0 = 1*/ {0,0,0,1},
+ /* 2^ 1 =2*/ {1,0,1,2},
+ /* 2^ 2 = 4*/ {2,0,2,4},
+ {3,0,3,8},
+ {4,1,3,16},
+ {5,2,3,32},
+ /* 2^6 = 64 */ {6,3,3,64},
+ };
+
+ /* used for MXCLK (chip clock) */
+ static pllcalparam xparm_MXCLK[] = {
+ /* 2^0 = 1*/ {0,0,0,1},
+ /* 2^ 1 =2*/ {1,0,1,2},
+ /* 2^ 2 = 4*/ {2,0,2,4},
+ {3,0,3,8},
+ };
+
+ /* as sm750 register definition, N located in 2,15 and M located in 1,255 */
+ int N,M,X,d;
+ int xcnt;
+ int miniDiff;
+ unsigned int RN,quo,rem,fl_quo;
+ unsigned int input,request;
+ unsigned int tmpClock,ret;
+ pllcalparam * xparm;
+
+#if 1
+ if (getChipType() == SM750LE)
+ {
+ /* SM750LE don't have prgrammable PLL and M/N values to work on.
+ Just return the requested clock. */
+ return request_orig;
+ }
+#endif
+
+ ret = 0;
+ miniDiff = ~0;
+ request = request_orig / 1000;
+ input = pll->inputFreq / 1000;
+
+ /* for MXCLK register , no POD provided, so need be treated differently */
+
+ if(pll->clockType != MXCLK_PLL){
+ xparm = &xparm_PIXEL[0];
+ xcnt = sizeof(xparm_PIXEL)/sizeof(xparm_PIXEL[0]);
+ }else{
+ xparm = &xparm_MXCLK[0];
+ xcnt = sizeof(xparm_MXCLK)/sizeof(xparm_MXCLK[0]);
+ }
+
+
+ for(N = 15;N>1;N--)
+ {
+ /* RN will not exceed maximum long if @request <= 285 MHZ (for 32bit cpu) */
+ RN = N * request;
+ quo = RN / input;
+ rem = RN % input;/* rem always small than 14318181 */
+ fl_quo = (rem * 10000 /input);
+
+ for(d = xcnt - 1;d >= 0;d--){
+ X = xparm[d].value;
+ M = quo*X;
+ M += fl_quo * X / 10000;
+ /* round step */
+ M += (fl_quo*X % 10000)>5000?1:0;
+ if(M < 256 && M > 0)
+ {
+ unsigned int diff;
+ tmpClock = pll->inputFreq *M / N / X;
+ diff = absDiff(tmpClock,request_orig);
+ if(diff < miniDiff)
+ {
+ pll->M = M;
+ pll->N = N;
+ pll->OD = xparm[d].od;
+ pll->POD = xparm[d].pod;
+ miniDiff = diff;
+ ret = tmpClock;
+ }
+ }
+ }
+ }
+
+ //printk("Finally: pll->n[%lu],m[%lu],od[%lu],pod[%lu]\n",pll->N,pll->M,pll->OD,pll->POD);
+ return ret;
+}
+
+unsigned int calcPllValue2(
+unsigned int ulRequestClk, /* Required pixel clock in Hz unit */
+pll_value_t *pPLL /* Structure to hold the value to be set in PLL */
+)
+{
+ unsigned int M, N, OD, POD = 0, diff, pllClk, odPower, podPower;
+ unsigned int bestDiff = 0xffffffff; /* biggest 32 bit unsigned number */
+ unsigned int ret;
+ /* Init PLL structure to know states */
+ pPLL->M = 0;
+ pPLL->N = 0;
+ pPLL->OD = 0;
+ pPLL->POD = 0;
+
+ /* Sanity check: None at the moment */
+
+ /* Convert everything in Khz range in order to avoid calculation overflow */
+ pPLL->inputFreq /= 1000;
+ ulRequestClk /= 1000;
+
+#ifndef VALIDATION_CHIP
+ /* The maximum of post divider is 8. */
+ for (POD=0; POD<=3; POD++)
+#endif
+ {
+
+#ifndef VALIDATION_CHIP
+ /* MXCLK_PLL does not have post divider. */
+ if ((POD > 0) && (pPLL->clockType == MXCLK_PLL))
+ break;
+#endif
+
+ /* Work out 2 to the power of POD */
+ podPower = twoToPowerOfx(POD);
+
+ /* OD has only 2 bits [15:14] and its value must between 0 to 3 */
+ for (OD=0; OD<=3; OD++)
+ {
+ /* Work out 2 to the power of OD */
+ odPower = twoToPowerOfx(OD);
+
+#ifdef VALIDATION_CHIP
+ if (odPower > 4)
+ podPower = 4;
+ else
+ podPower = odPower;
+#endif
+
+ /* N has 4 bits [11:8] and its value must between 2 and 15.
+ The N == 1 will behave differently --> Result is not correct. */
+ for (N=2; N<=15; N++)
+ {
+ /* The formula for PLL is ulRequestClk = inputFreq * M / N / (2^OD)
+ In the following steps, we try to work out a best M value given the others are known.
+ To avoid decimal calculation, we use 1000 as multiplier for up to 3 decimal places of accuracy.
+ */
+ M = ulRequestClk * N * odPower * 1000 / pPLL->inputFreq;
+ M = roundedDiv(M, 1000);
+
+ /* M field has only 8 bits, reject value bigger than 8 bits */
+ if (M < 256)
+ {
+ /* Calculate the actual clock for a given M & N */
+ pllClk = pPLL->inputFreq * M / N / odPower / podPower;
+
+ /* How much are we different from the requirement */
+ diff = absDiff(pllClk, ulRequestClk);
+
+ if (diff < bestDiff)
+ {
+ bestDiff = diff;
+
+ /* Store M and N values */
+ pPLL->M = M;
+ pPLL->N = N;
+ pPLL->OD = OD;
+
+#ifdef VALIDATION_CHIP
+ if (OD > 2)
+ POD = 2;
+ else
+ POD = OD;
+#endif
+
+ pPLL->POD = POD;
+ }
+ }
+ }
+ }
+ }
+
+ /* Restore input frequency from Khz to hz unit */
+// pPLL->inputFreq *= 1000;
+ ulRequestClk *= 1000;
+ pPLL->inputFreq = DEFAULT_INPUT_CLOCK; /* Default reference clock */
+
+ /* Output debug information */
+ //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Requested Frequency = %d\n", ulRequestClk));
+ //DDKDEBUGPRINT((DISPLAY_LEVEL, "calcPllValue: Input CLK = %dHz, M=%d, N=%d, OD=%d, POD=%d\n", pPLL->inputFreq, pPLL->M, pPLL->N, pPLL->OD, pPLL->POD));
+
+ /* Return actual frequency that the PLL can set */
+ ret = calcPLL(pPLL);
+ return ret;
+}
+
+
+
+
+
+unsigned int formatPllReg(pll_value_t *pPLL)
+{
+ unsigned int ulPllReg = 0;
+
+ /* Note that all PLL's have the same format. Here, we just use Panel PLL parameter
+ to work out the bit fields in the register.
+ On returning a 32 bit number, the value can be applied to any PLL in the calling function.
+ */
+ ulPllReg =
+ FIELD_SET( 0, PANEL_PLL_CTRL, BYPASS, OFF)
+ | FIELD_SET( 0, PANEL_PLL_CTRL, POWER, ON)
+ | FIELD_SET( 0, PANEL_PLL_CTRL, INPUT, OSC)
+#ifndef VALIDATION_CHIP
+ | FIELD_VALUE(0, PANEL_PLL_CTRL, POD, pPLL->POD)
+#endif
+ | FIELD_VALUE(0, PANEL_PLL_CTRL, OD, pPLL->OD)
+ | FIELD_VALUE(0, PANEL_PLL_CTRL, N, pPLL->N)
+ | FIELD_VALUE(0, PANEL_PLL_CTRL, M, pPLL->M);
+
+ return ulPllReg;
+}
+
+
--- /dev/null
+#ifndef DDK750_CHIP_H__
+#define DDK750_CHIP_H__
+#define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */
+#ifndef SM750LE_REVISION_ID
+#define SM750LE_REVISION_ID ((unsigned char)0xfe)
+#endif
+
+#include <linux/io.h>
+
+/* This is all the chips recognized by this library */
+typedef enum _logical_chip_type_t
+{
+ SM_UNKNOWN,
+ SM718,
+ SM750,
+ SM750LE,
+}
+logical_chip_type_t;
+
+
+typedef enum _clock_type_t
+{
+ MXCLK_PLL,
+ PRIMARY_PLL,
+ SECONDARY_PLL,
+ VGA0_PLL,
+ VGA1_PLL,
+}
+clock_type_t;
+
+typedef struct _pll_value_t
+{
+ clock_type_t clockType;
+ unsigned long inputFreq; /* Input clock frequency to the PLL */
+
+ /* Use this when clockType = PANEL_PLL */
+ unsigned long M;
+ unsigned long N;
+ unsigned long OD;
+ unsigned long POD;
+}
+pll_value_t;
+
+/* input struct to initChipParam() function */
+typedef struct _initchip_param_t
+{
+ unsigned short powerMode; /* Use power mode 0 or 1 */
+ unsigned short chipClock; /* Speed of main chip clock in MHz unit
+ 0 = keep the current clock setting
+ Others = the new main chip clock
+ */
+ unsigned short memClock; /* Speed of memory clock in MHz unit
+ 0 = keep the current clock setting
+ Others = the new memory clock
+ */
+ unsigned short masterClock; /* Speed of master clock in MHz unit
+ 0 = keep the current clock setting
+ Others = the new master clock
+ */
+ unsigned short setAllEngOff; /* 0 = leave all engine state untouched.
+ 1 = make sure they are off: 2D, Overlay,
+ video alpha, alpha, hardware cursors
+ */
+ unsigned char resetMemory; /* 0 = Do not reset the memory controller
+ 1 = Reset the memory controller
+ */
+
+ /* More initialization parameter can be added if needed */
+}
+initchip_param_t;
+
+
+logical_chip_type_t getChipType(void);
+unsigned int calcPllValue(unsigned int request,pll_value_t *pll);
+unsigned int calcPllValue2(unsigned int,pll_value_t *);
+unsigned int formatPllReg(pll_value_t *pPLL);
+void ddk750_set_mmio(void __iomem *,unsigned short,char);
+unsigned int ddk750_getVMSize(void);
+int ddk750_initHw(initchip_param_t *);
+unsigned int getPllValue(clock_type_t clockType, pll_value_t *pPLL);
+unsigned int getChipClock(void);
+void setChipClock(unsigned int);
+void setMemoryClock(unsigned int frequency);
+void setMasterClock(unsigned int frequency);
+
+
+#endif
--- /dev/null
+#include "ddk750_reg.h"
+#include "ddk750_help.h"
+#include "ddk750_display.h"
+#include "ddk750_power.h"
+#include "ddk750_dvi.h"
+
+#define primaryWaitVerticalSync(delay) waitNextVerticalSync(0,delay)
+
+static void setDisplayControl(int ctrl,int dispState)
+{
+ /* state != 0 means turn on both timing & plane en_bit */
+ unsigned long ulDisplayCtrlReg, ulReservedBits;
+ int cnt;
+
+ cnt = 0;
+
+ /* Set the primary display control */
+ if (!ctrl)
+ {
+ ulDisplayCtrlReg = PEEK32(PANEL_DISPLAY_CTRL);
+ /* Turn on/off the Panel display control */
+ if (dispState)
+ {
+ /* Timing should be enabled first before enabling the plane
+ * because changing at the same time does not guarantee that
+ * the plane will also enabled or disabled.
+ */
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ PANEL_DISPLAY_CTRL, TIMING, ENABLE);
+ POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
+
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ PANEL_DISPLAY_CTRL, PLANE, ENABLE);
+
+ /* Added some masks to mask out the reserved bits.
+ * Sometimes, the reserved bits are set/reset randomly when
+ * writing to the PRIMARY_DISPLAY_CTRL, therefore, the register
+ * reserved bits are needed to be masked out.
+ */
+ ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) |
+ FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) |
+ FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE);
+
+ /* Somehow the register value on the plane is not set
+ * until a few delay. Need to write
+ * and read it a couple times
+ */
+ do
+ {
+ cnt++;
+ POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
+ } while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) !=
+ (ulDisplayCtrlReg & ~ulReservedBits));
+ printk("Set Panel Plane enbit:after tried %d times\n",cnt);
+ }
+ else
+ {
+ /* When turning off, there is no rule on the programming
+ * sequence since whenever the clock is off, then it does not
+ * matter whether the plane is enabled or disabled.
+ * Note: Modifying the plane bit will take effect on the
+ * next vertical sync. Need to find out if it is necessary to
+ * wait for 1 vsync before modifying the timing enable bit.
+ * */
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ PANEL_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
+
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ PANEL_DISPLAY_CTRL, TIMING, DISABLE);
+ POKE32(PANEL_DISPLAY_CTRL, ulDisplayCtrlReg);
+ }
+
+ }
+ /* Set the secondary display control */
+ else
+ {
+ ulDisplayCtrlReg = PEEK32(CRT_DISPLAY_CTRL);
+
+ if (dispState)
+ {
+ /* Timing should be enabled first before enabling the plane because changing at the
+ same time does not guarantee that the plane will also enabled or disabled.
+ */
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ CRT_DISPLAY_CTRL, TIMING, ENABLE);
+ POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
+
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ CRT_DISPLAY_CTRL, PLANE, ENABLE);
+
+ /* Added some masks to mask out the reserved bits.
+ * Sometimes, the reserved bits are set/reset randomly when
+ * writing to the PRIMARY_DISPLAY_CTRL, therefore, the register
+ * reserved bits are needed to be masked out.
+ */
+
+ ulReservedBits = FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) |
+ FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) |
+ FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE) |
+ FIELD_SET(0, CRT_DISPLAY_CTRL, RESERVED_4_MASK, ENABLE);
+
+ do
+ {
+ cnt++;
+ POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
+ } while((PEEK32(CRT_DISPLAY_CTRL) & ~ulReservedBits) !=
+ (ulDisplayCtrlReg & ~ulReservedBits));
+ printk("Set Crt Plane enbit:after tried %d times\n",cnt);
+ }
+ else
+ {
+ /* When turning off, there is no rule on the programming
+ * sequence since whenever the clock is off, then it does not
+ * matter whether the plane is enabled or disabled.
+ * Note: Modifying the plane bit will take effect on the next
+ * vertical sync. Need to find out if it is necessary to
+ * wait for 1 vsync before modifying the timing enable bit.
+ */
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ CRT_DISPLAY_CTRL, PLANE, DISABLE);
+ POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
+
+ ulDisplayCtrlReg = FIELD_SET(ulDisplayCtrlReg,
+ CRT_DISPLAY_CTRL, TIMING, DISABLE);
+ POKE32(CRT_DISPLAY_CTRL, ulDisplayCtrlReg);
+ }
+ }
+}
+
+
+static void waitNextVerticalSync(int ctrl,int delay)
+{
+ unsigned int status;
+ if(!ctrl){
+ /* primary controller */
+
+ /* Do not wait when the Primary PLL is off or display control is already off.
+ This will prevent the software to wait forever. */
+ if ((FIELD_GET(PEEK32(PANEL_PLL_CTRL), PANEL_PLL_CTRL, POWER) ==
+ PANEL_PLL_CTRL_POWER_OFF) ||
+ (FIELD_GET(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, TIMING) ==
+ PANEL_DISPLAY_CTRL_TIMING_DISABLE))
+ {
+ return;
+ }
+
+ while (delay-- > 0)
+ {
+ /* Wait for end of vsync. */
+ do
+ {
+ status = FIELD_GET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ PANEL_VSYNC);
+ }
+ while (status == SYSTEM_CTRL_PANEL_VSYNC_ACTIVE);
+
+ /* Wait for start of vsync. */
+ do
+ {
+ status = FIELD_GET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ PANEL_VSYNC);
+ }
+ while (status == SYSTEM_CTRL_PANEL_VSYNC_INACTIVE);
+ }
+
+ }else{
+
+ /* Do not wait when the Primary PLL is off or display control is already off.
+ This will prevent the software to wait forever. */
+ if ((FIELD_GET(PEEK32(CRT_PLL_CTRL), CRT_PLL_CTRL, POWER) ==
+ CRT_PLL_CTRL_POWER_OFF) ||
+ (FIELD_GET(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, TIMING) ==
+ CRT_DISPLAY_CTRL_TIMING_DISABLE))
+ {
+ return;
+ }
+
+ while (delay-- > 0)
+ {
+ /* Wait for end of vsync. */
+ do
+ {
+ status = FIELD_GET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ CRT_VSYNC);
+ }
+ while (status == SYSTEM_CTRL_CRT_VSYNC_ACTIVE);
+
+ /* Wait for start of vsync. */
+ do
+ {
+ status = FIELD_GET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ CRT_VSYNC);
+ }
+ while (status == SYSTEM_CTRL_CRT_VSYNC_INACTIVE);
+ }
+ }
+}
+
+static void swPanelPowerSequence(int disp,int delay)
+{
+ unsigned int reg;
+
+ /* disp should be 1 to open sequence */
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ primaryWaitVerticalSync(delay);
+
+
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,DATA,disp);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ primaryWaitVerticalSync(delay);
+
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,VBIASEN,disp);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ primaryWaitVerticalSync(delay);
+
+
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,FPEN,disp);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ primaryWaitVerticalSync(delay);
+
+}
+
+void ddk750_setLogicalDispOut(disp_output_t output)
+{
+ unsigned int reg;
+ if(output & PNL_2_USAGE){
+ /* set panel path controller select */
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,PANEL_DISPLAY_CTRL,SELECT,(output & PNL_2_MASK)>>PNL_2_OFFSET);
+ POKE32(PANEL_DISPLAY_CTRL,reg);
+ }
+
+ if(output & CRT_2_USAGE){
+ /* set crt path controller select */
+ reg = PEEK32(CRT_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg,CRT_DISPLAY_CTRL,SELECT,(output & CRT_2_MASK)>>CRT_2_OFFSET);
+ /*se blank off */
+ reg = FIELD_SET(reg,CRT_DISPLAY_CTRL,BLANK,OFF);
+ POKE32(CRT_DISPLAY_CTRL,reg);
+
+ }
+
+ if(output & PRI_TP_USAGE){
+ /* set primary timing and plane en_bit */
+ setDisplayControl(0,(output&PRI_TP_MASK)>>PRI_TP_OFFSET);
+ }
+
+ if(output & SEC_TP_USAGE){
+ /* set secondary timing and plane en_bit*/
+ setDisplayControl(1,(output&SEC_TP_MASK)>>SEC_TP_OFFSET);
+ }
+
+ if(output & PNL_SEQ_USAGE){
+ /* set panel sequence */
+ swPanelPowerSequence((output&PNL_SEQ_MASK)>>PNL_SEQ_OFFSET,4);
+ }
+
+ if(output & DAC_USAGE)
+ setDAC((output & DAC_MASK)>>DAC_OFFSET);
+
+ if(output & DPMS_USAGE)
+ ddk750_setDPMS((output & DPMS_MASK) >> DPMS_OFFSET);
+}
+
+
+int ddk750_initDVIDisp(void)
+{
+ /* Initialize DVI. If the dviInit fail and the VendorID or the DeviceID are
+ not zeroed, then set the failure flag. If it is zeroe, it might mean
+ that the system is in Dual CRT Monitor configuration. */
+
+ /* De-skew enabled with default 111b value.
+ This will fix some artifacts problem in some mode on board 2.2.
+ Somehow this fix does not affect board 2.1.
+ */
+ if ((dviInit(1, /* Select Rising Edge */
+ 1, /* Select 24-bit bus */
+ 0, /* Select Single Edge clock */
+ 1, /* Enable HSync as is */
+ 1, /* Enable VSync as is */
+ 1, /* Enable De-skew */
+ 7, /* Set the de-skew setting to maximum setup */
+ 1, /* Enable continuous Sync */
+ 1, /* Enable PLL Filter */
+ 4 /* Use the recommended value for PLL Filter value */
+ ) != 0) && (dviGetVendorID() != 0x0000) && (dviGetDeviceID() != 0x0000))
+ {
+ return (-1);
+ }
+
+ /* TODO: Initialize other display component */
+
+ /* Success */
+ return 0;
+
+}
+
--- /dev/null
+#ifndef DDK750_DISPLAY_H__
+#define DDK750_DISPLAY_H__
+
+/* panel path select
+ 80000[29:28]
+*/
+
+#define PNL_2_OFFSET 0
+#define PNL_2_MASK (3 << PNL_2_OFFSET)
+#define PNL_2_USAGE (PNL_2_MASK << 16)
+#define PNL_2_PRI ((0 << PNL_2_OFFSET)|PNL_2_USAGE)
+#define PNL_2_SEC ((2 << PNL_2_OFFSET)|PNL_2_USAGE)
+
+
+/* primary timing & plane enable bit
+ 1: 80000[8] & 80000[2] on
+ 0: both off
+*/
+#define PRI_TP_OFFSET 4
+#define PRI_TP_MASK (1 << PRI_TP_OFFSET)
+#define PRI_TP_USAGE (PRI_TP_MASK << 16)
+#define PRI_TP_ON ((0x1 << PRI_TP_OFFSET)|PRI_TP_USAGE)
+#define PRI_TP_OFF ((0x0 << PRI_TP_OFFSET)|PRI_TP_USAGE)
+
+
+/* panel sequency status
+ 80000[27:24]
+*/
+#define PNL_SEQ_OFFSET 6
+#define PNL_SEQ_MASK (1 << PNL_SEQ_OFFSET)
+#define PNL_SEQ_USAGE (PNL_SEQ_MASK << 16)
+#define PNL_SEQ_ON ((1 << PNL_SEQ_OFFSET)|PNL_SEQ_USAGE)
+#define PNL_SEQ_OFF ((0 << PNL_SEQ_OFFSET)|PNL_SEQ_USAGE)
+
+/* dual digital output
+ 80000[19]
+*/
+#define DUAL_TFT_OFFSET 8
+#define DUAL_TFT_MASK (1 << DUAL_TFT_OFFSET)
+#define DUAL_TFT_USAGE (DUAL_TFT_MASK << 16)
+#define DUAL_TFT_ON ((1 << DUAL_TFT_OFFSET)|DUAL_TFT_USAGE)
+#define DUAL_TFT_OFF ((0 << DUAL_TFT_OFFSET)|DUAL_TFT_USAGE)
+
+/* secondary timing & plane enable bit
+ 1:80200[8] & 80200[2] on
+ 0: both off
+*/
+#define SEC_TP_OFFSET 5
+#define SEC_TP_MASK (1<< SEC_TP_OFFSET)
+#define SEC_TP_USAGE (SEC_TP_MASK << 16)
+#define SEC_TP_ON ((0x1 << SEC_TP_OFFSET)|SEC_TP_USAGE)
+#define SEC_TP_OFF ((0x0 << SEC_TP_OFFSET)|SEC_TP_USAGE)
+
+/* crt path select
+ 80200[19:18]
+*/
+#define CRT_2_OFFSET 2
+#define CRT_2_MASK (3 << CRT_2_OFFSET)
+#define CRT_2_USAGE (CRT_2_MASK << 16)
+#define CRT_2_PRI ((0x0 << CRT_2_OFFSET)|CRT_2_USAGE)
+#define CRT_2_SEC ((0x2 << CRT_2_OFFSET)|CRT_2_USAGE)
+
+
+/* DAC affect both DVI and DSUB
+ 4[20]
+*/
+#define DAC_OFFSET 7
+#define DAC_MASK (1 << DAC_OFFSET)
+#define DAC_USAGE (DAC_MASK << 16)
+#define DAC_ON ((0x0<< DAC_OFFSET)|DAC_USAGE)
+#define DAC_OFF ((0x1 << DAC_OFFSET)|DAC_USAGE)
+
+/* DPMS only affect D-SUB head
+ 0[31:30]
+*/
+#define DPMS_OFFSET 9
+#define DPMS_MASK (3 << DPMS_OFFSET)
+#define DPMS_USAGE (DPMS_MASK << 16)
+#define DPMS_OFF ((3 << DPMS_OFFSET)|DPMS_USAGE)
+#define DPMS_ON ((0 << DPMS_OFFSET)|DPMS_USAGE)
+
+
+
+/*
+ LCD1 means panel path TFT1 & panel path DVI (so enable DAC)
+ CRT means crt path DSUB
+*/
+#if 0
+typedef enum _disp_output_t
+{
+ NO_DISPLAY = DPMS_OFF,
+
+ LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON,
+ LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DPMS_OFF|DAC_ON,
+
+ LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON|DPMS_OFF,
+ LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON|DPMS_OFF,
+
+ DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DAC_ON,
+ DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DAC_ON,
+
+ LCD1_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
+ CRT_2_PRI|SEC_TP_OFF|DAC_ON,
+
+ LCD1_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
+ CRT_2_SEC|PRI_TP_OFF|DAC_ON,
+
+ /* LCD1 show primary and DSUB show secondary */
+ LCD1_DSUB_DUAL = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
+ CRT_2_SEC|SEC_TP_ON|DAC_ON,
+
+ /* LCD1 show secondary and DSUB show primary */
+ LCD1_DSUB_DUAL_SWAP = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
+ CRT_2_PRI|PRI_TP_ON|DAC_ON,
+
+ LCD1_LCD2_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|
+ CRT_2_PRI|SEC_TP_OFF|DPMS_OFF|DUAL_TFT_ON,
+
+ LCD1_LCD2_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|
+ CRT_2_SEC|PRI_TP_OFF|DPMS_OFF|DUAL_TFT_ON,
+
+ LCD1_LCD2_DSUB_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON|
+ CRT_2_PRI|SEC_TP_OFF|DPMS_ON|DUAL_TFT_ON,
+
+ LCD1_LCD2_DSUB_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON|
+ CRT_2_SEC|PRI_TP_OFF|DPMS_ON|DUAL_TFT_ON,
+
+
+}
+disp_output_t;
+#else
+typedef enum _disp_output_t{
+ do_LCD1_PRI = PNL_2_PRI|PRI_TP_ON|PNL_SEQ_ON|DAC_ON,
+ do_LCD1_SEC = PNL_2_SEC|SEC_TP_ON|PNL_SEQ_ON|DAC_ON,
+#if 0
+ do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON,
+ do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON,
+#else
+ do_LCD2_PRI = CRT_2_PRI|PRI_TP_ON|DUAL_TFT_ON,
+ do_LCD2_SEC = CRT_2_SEC|SEC_TP_ON|DUAL_TFT_ON,
+#endif
+ /*
+ do_DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON,
+ do_DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON,
+ */
+#if 0
+ do_CRT_PRI = CRT_2_PRI|PRI_TP_ON,
+ do_CRT_SEC = CRT_2_SEC|SEC_TP_ON,
+#else
+ do_CRT_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON,
+ do_CRT_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON,
+#endif
+}
+disp_output_t;
+#endif
+
+void ddk750_setLogicalDispOut(disp_output_t);
+int ddk750_initDVIDisp(void);
+
+#endif
--- /dev/null
+#define USE_DVICHIP
+#ifdef USE_DVICHIP
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_dvi.h"
+#include "ddk750_sii164.h"
+
+
+/* This global variable contains all the supported driver and its corresponding
+ function API. Please set the function pointer to NULL whenever the function
+ is not supported. */
+static dvi_ctrl_device_t g_dcftSupportedDviController[] =
+{
+#ifdef DVI_CTRL_SII164
+ {
+ .pfnInit = sii164InitChip,
+ .pfnGetVendorId = sii164GetVendorID,
+ .pfnGetDeviceId = sii164GetDeviceID,
+#ifdef SII164_FULL_FUNCTIONS
+ .pfnResetChip = sii164ResetChip,
+ .pfnGetChipString = sii164GetChipString,
+ .pfnSetPower = sii164SetPower,
+ .pfnEnableHotPlugDetection = sii164EnableHotPlugDetection,
+ .pfnIsConnected = sii164IsConnected,
+ .pfnCheckInterrupt = sii164CheckInterrupt,
+ .pfnClearInterrupt = sii164ClearInterrupt,
+#endif
+ },
+#endif
+};
+
+
+int dviInit(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue
+ )
+{
+ dvi_ctrl_device_t *pCurrentDviCtrl;
+ pCurrentDviCtrl = g_dcftSupportedDviController;
+ if(pCurrentDviCtrl->pfnInit != NULL)
+ {
+ return pCurrentDviCtrl->pfnInit(edgeSelect, busSelect, dualEdgeClkSelect, hsyncEnable,
+ vsyncEnable, deskewEnable, deskewSetting, continuousSyncEnable,
+ pllFilterEnable, pllFilterValue);
+ }
+ return -1;//error
+}
+
+
+/*
+ * dviGetVendorID
+ * This function gets the vendor ID of the DVI controller chip.
+ *
+ * Output:
+ * Vendor ID
+ */
+unsigned short dviGetVendorID(void)
+{
+ dvi_ctrl_device_t *pCurrentDviCtrl;
+
+ //pCurrentDviCtrl = getDviCtrl();
+ pCurrentDviCtrl = g_dcftSupportedDviController;
+ if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0)
+ return pCurrentDviCtrl->pfnGetVendorId();
+
+ return 0x0000;
+}
+
+
+/*
+ * dviGetDeviceID
+ * This function gets the device ID of the DVI controller chip.
+ *
+ * Output:
+ * Device ID
+ */
+unsigned short dviGetDeviceID(void)
+{
+ dvi_ctrl_device_t *pCurrentDviCtrl;
+
+// pCurrentDviCtrl = getDviCtrl();
+ pCurrentDviCtrl = g_dcftSupportedDviController;
+ if (pCurrentDviCtrl != (dvi_ctrl_device_t *)0)
+ return pCurrentDviCtrl->pfnGetDeviceId();
+
+ return 0x0000;
+}
+
+#endif
+
+
--- /dev/null
+#ifndef DDK750_DVI_H__
+#define DDK750_DVI_H__
+
+/* dvi chip stuffs structros */
+
+typedef long (*PFN_DVICTRL_INIT)(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue);
+typedef void (*PFN_DVICTRL_RESETCHIP)(void);
+typedef char* (*PFN_DVICTRL_GETCHIPSTRING)(void);
+typedef unsigned short (*PFN_DVICTRL_GETVENDORID)(void);
+typedef unsigned short (*PFN_DVICTRL_GETDEVICEID)(void);
+typedef void (*PFN_DVICTRL_SETPOWER)(unsigned char powerUp);
+typedef void (*PFN_DVICTRL_HOTPLUGDETECTION)(unsigned char enableHotPlug);
+typedef unsigned char (*PFN_DVICTRL_ISCONNECTED)(void);
+typedef unsigned char (*PFN_DVICTRL_CHECKINTERRUPT)(void);
+typedef void (*PFN_DVICTRL_CLEARINTERRUPT)(void);
+
+
+
+/* Structure to hold all the function pointer to the DVI Controller. */
+typedef struct _dvi_ctrl_device_t
+{
+ PFN_DVICTRL_INIT pfnInit;
+ PFN_DVICTRL_RESETCHIP pfnResetChip;
+ PFN_DVICTRL_GETCHIPSTRING pfnGetChipString;
+ PFN_DVICTRL_GETVENDORID pfnGetVendorId;
+ PFN_DVICTRL_GETDEVICEID pfnGetDeviceId;
+ PFN_DVICTRL_SETPOWER pfnSetPower;
+ PFN_DVICTRL_HOTPLUGDETECTION pfnEnableHotPlugDetection;
+ PFN_DVICTRL_ISCONNECTED pfnIsConnected;
+ PFN_DVICTRL_CHECKINTERRUPT pfnCheckInterrupt;
+ PFN_DVICTRL_CLEARINTERRUPT pfnClearInterrupt;
+} dvi_ctrl_device_t;
+#define DVI_CTRL_SII164
+
+
+
+/* dvi functions prototype */
+int dviInit(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue
+);
+
+unsigned short dviGetVendorID(void);
+unsigned short dviGetDeviceID(void);
+
+
+
+#endif
+
--- /dev/null
+//#include "ddk750_reg.h"
+//#include "ddk750_chip.h"
+#include "ddk750_help.h"
+
+void __iomem * mmio750 = NULL;
+char revId750 = 0;
+unsigned short devId750 = 0;
+
+/* after driver mapped io registers, use this function first */
+void ddk750_set_mmio(void __iomem * addr,unsigned short devId,char revId)
+{
+ mmio750 = addr;
+ devId750 = devId;
+ revId750 = revId;
+ if(revId == 0xfe)
+ printk("found sm750le\n");
+}
+
+
--- /dev/null
+#ifndef DDK750_HELP_H__
+#define DDK750_HELP_H__
+#include "ddk750_chip.h"
+#ifndef USE_INTERNAL_REGISTER_ACCESS
+
+#include <linux/ioport.h>
+#include <asm/io.h>
+#include <asm/uaccess.h>
+#include "sm750_help.h"
+
+
+#if 0
+/* if 718 big endian turned on,be aware that don't use this driver for general use,only for ppc big-endian */
+#warning "big endian on target cpu and enable nature big endian support of 718 capability !"
+#define PEEK32(addr) __raw_readl(mmio750 + addr)
+#define POKE32(addr,data) __raw_writel(data, mmio750 + addr)
+#else /* software control endianess */
+#define PEEK32(addr) readl(addr + mmio750)
+#define POKE32(addr,data) writel(data, addr + mmio750)
+#endif
+
+extern void __iomem * mmio750;
+extern char revId750;
+extern unsigned short devId750;
+#else
+/* implement if you want use it*/
+#endif
+
+#endif
--- /dev/null
+#define USE_HW_I2C
+#ifdef USE_HW_I2C
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_hwi2c.h"
+#include "ddk750_power.h"
+
+#define MAX_HWI2C_FIFO 16
+#define HWI2C_WAIT_TIMEOUT 0xF0000
+
+
+int hwI2CInit(
+ unsigned char busSpeedMode
+)
+{
+ unsigned int value;
+
+ /* Enable GPIO 30 & 31 as IIC clock & data */
+ value = PEEK32(GPIO_MUX);
+
+ value = FIELD_SET(value, GPIO_MUX, 30, I2C) |
+ FIELD_SET(0, GPIO_MUX, 31, I2C);
+ POKE32(GPIO_MUX, value);
+
+ /* Enable Hardware I2C power.
+ TODO: Check if we need to enable GPIO power?
+ */
+ enableI2C(1);
+
+ /* Enable the I2C Controller and set the bus speed mode */
+ value = PEEK32(I2C_CTRL);
+ if (busSpeedMode == 0)
+ value = FIELD_SET(value, I2C_CTRL, MODE, STANDARD);
+ else
+ value = FIELD_SET(value, I2C_CTRL, MODE, FAST);
+ value = FIELD_SET(value, I2C_CTRL, EN, ENABLE);
+ POKE32(I2C_CTRL, value);
+
+ return 0;
+}
+
+
+void hwI2CClose(void)
+{
+ unsigned int value;
+
+ /* Disable I2C controller */
+ value = PEEK32(I2C_CTRL);
+ value = FIELD_SET(value, I2C_CTRL, EN, DISABLE);
+ POKE32(I2C_CTRL, value);
+
+ /* Disable I2C Power */
+ enableI2C(0);
+
+ /* Set GPIO 30 & 31 back as GPIO pins */
+ value = PEEK32(GPIO_MUX);
+ value = FIELD_SET(value, GPIO_MUX, 30, GPIO);
+ value = FIELD_SET(value, GPIO_MUX, 31, GPIO);
+ POKE32(GPIO_MUX, value);
+}
+
+
+long hwI2CWaitTXDone(void)
+{
+ unsigned int timeout;
+
+ /* Wait until the transfer is completed. */
+ timeout = HWI2C_WAIT_TIMEOUT;
+ while ((FIELD_GET(PEEK32(I2C_STATUS), I2C_STATUS, TX) != I2C_STATUS_TX_COMPLETED) &&
+ (timeout != 0))
+ timeout--;
+
+ if (timeout == 0)
+ return (-1);
+
+ return 0;
+}
+
+
+
+/*
+ * This function writes data to the i2c slave device registers.
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address
+ * length - Total number of bytes to be written to the device
+ * pBuffer - The buffer that contains the data to be written to the
+ * i2c device.
+ *
+ * Return Value:
+ * Total number of bytes those are actually written.
+ */
+unsigned int hwI2CWriteData(
+ unsigned char deviceAddress,
+ unsigned int length,
+ unsigned char *pBuffer
+)
+{
+ unsigned char count, i;
+ unsigned int totalBytes = 0;
+
+ /* Set the Device Address */
+ POKE32(I2C_SLAVE_ADDRESS, deviceAddress & ~0x01);
+
+ /* Write data.
+ * Note:
+ * Only 16 byte can be accessed per i2c start instruction.
+ */
+ do
+ {
+ /* Reset I2C by writing 0 to I2C_RESET register to clear the previous status. */
+ POKE32(I2C_RESET, 0);
+
+ /* Set the number of bytes to be written */
+ if (length < MAX_HWI2C_FIFO)
+ count = length - 1;
+ else
+ count = MAX_HWI2C_FIFO - 1;
+ POKE32(I2C_BYTE_COUNT, count);
+
+ /* Move the data to the I2C data register */
+ for (i = 0; i <= count; i++)
+ POKE32(I2C_DATA0 + i, *pBuffer++);
+
+ /* Start the I2C */
+ POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
+
+ /* Wait until the transfer is completed. */
+ if (hwI2CWaitTXDone() != 0)
+ break;
+
+ /* Substract length */
+ length -= (count + 1);
+
+ /* Total byte written */
+ totalBytes += (count + 1);
+
+ } while (length > 0);
+
+ return totalBytes;
+}
+
+
+
+
+/*
+ * This function reads data from the slave device and stores them
+ * in the given buffer
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address
+ * length - Total number of bytes to be read
+ * pBuffer - Pointer to a buffer to be filled with the data read
+ * from the slave device. It has to be the same size as the
+ * length to make sure that it can keep all the data read.
+ *
+ * Return Value:
+ * Total number of actual bytes read from the slave device
+ */
+unsigned int hwI2CReadData(
+ unsigned char deviceAddress,
+ unsigned int length,
+ unsigned char *pBuffer
+)
+{
+ unsigned char count, i;
+ unsigned int totalBytes = 0;
+
+ /* Set the Device Address */
+ POKE32(I2C_SLAVE_ADDRESS, deviceAddress | 0x01);
+
+ /* Read data and save them to the buffer.
+ * Note:
+ * Only 16 byte can be accessed per i2c start instruction.
+ */
+ do
+ {
+ /* Reset I2C by writing 0 to I2C_RESET register to clear all the status. */
+ POKE32(I2C_RESET, 0);
+
+ /* Set the number of bytes to be read */
+ if (length <= MAX_HWI2C_FIFO)
+ count = length - 1;
+ else
+ count = MAX_HWI2C_FIFO - 1;
+ POKE32(I2C_BYTE_COUNT, count);
+
+ /* Start the I2C */
+ POKE32(I2C_CTRL, FIELD_SET(PEEK32(I2C_CTRL), I2C_CTRL, CTRL, START));
+
+ /* Wait until transaction done. */
+ if (hwI2CWaitTXDone() != 0)
+ break;
+
+ /* Save the data to the given buffer */
+ for (i = 0; i <= count; i++)
+ *pBuffer++ = PEEK32(I2C_DATA0 + i);
+
+ /* Substract length by 16 */
+ length -= (count + 1);
+
+ /* Number of bytes read. */
+ totalBytes += (count + 1);
+
+ } while (length > 0);
+
+ return totalBytes;
+}
+
+
+
+
+/*
+ * This function reads the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be read from
+ * registerIndex - Slave device's register to be read
+ *
+ * Return Value:
+ * Register value
+ */
+unsigned char hwI2CReadReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex
+)
+{
+ unsigned char value = (0xFF);
+
+ if (hwI2CWriteData(deviceAddress, 1, ®isterIndex) == 1)
+ hwI2CReadData(deviceAddress, 1, &value);
+
+ return value;
+}
+
+
+
+
+
+/*
+ * This function writes a value to the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be written
+ * registerIndex - Slave device's register to be written
+ * data - Data to be written to the register
+ *
+ * Result:
+ * 0 - Success
+ * -1 - Fail
+ */
+int hwI2CWriteReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex,
+ unsigned char data
+)
+{
+ unsigned char value[2];
+
+ value[0] = registerIndex;
+ value[1] = data;
+ if (hwI2CWriteData(deviceAddress, 2, value) == 2)
+ return 0;
+
+ return (-1);
+}
+
+
+#endif
--- /dev/null
+#ifndef DDK750_HWI2C_H__
+#define DDK750_HWI2C_H__
+
+/* hwi2c functions */
+int hwI2CInit(unsigned char busSpeedMode);
+void hwI2CClose(void);
+
+unsigned char hwI2CReadReg(unsigned char deviceAddress,unsigned char registerIndex);
+int hwI2CWriteReg(unsigned char deviceAddress,unsigned char registerIndex,unsigned char data);
+#endif
--- /dev/null
+
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_mode.h"
+#include "ddk750_chip.h"
+
+/*
+ SM750LE only:
+ This function takes care extra registers and bit fields required to set
+ up a mode in SM750LE
+
+ Explanation about Display Control register:
+ HW only supports 7 predefined pixel clocks, and clock select is
+ in bit 29:27 of Display Control register.
+*/
+static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, unsigned long dispControl)
+{
+ unsigned long x, y;
+
+ x = pModeParam->horizontal_display_end;
+ y = pModeParam->vertical_display_end;
+
+ /* SM750LE has to set up the top-left and bottom-right
+ registers as well.
+ Note that normal SM750/SM718 only use those two register for
+ auto-centering mode.
+ */
+ POKE32(CRT_AUTO_CENTERING_TL,
+ FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, TOP, 0)
+ | FIELD_VALUE(0, CRT_AUTO_CENTERING_TL, LEFT, 0));
+
+ POKE32(CRT_AUTO_CENTERING_BR,
+ FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, BOTTOM, y-1)
+ | FIELD_VALUE(0, CRT_AUTO_CENTERING_BR, RIGHT, x-1));
+
+ /* Assume common fields in dispControl have been properly set before
+ calling this function.
+ This function only sets the extra fields in dispControl.
+ */
+
+ /* Clear bit 29:27 of display control register */
+ dispControl &= FIELD_CLEAR(CRT_DISPLAY_CTRL, CLK);
+
+ /* Set bit 29:27 of display control register for the right clock */
+ /* Note that SM750LE only need to supported 7 resoluitons. */
+ if ( x == 800 && y == 600 )
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL41);
+ else if (x == 1024 && y == 768)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL65);
+ else if (x == 1152 && y == 864)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80);
+ else if (x == 1280 && y == 768)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL80);
+ else if (x == 1280 && y == 720)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL74);
+ else if (x == 1280 && y == 960)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108);
+ else if (x == 1280 && y == 1024)
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL108);
+ else /* default to VGA clock */
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL25);
+
+ /* Set bit 25:24 of display controller */
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CRTSELECT, CRT);
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, RGBBIT, 24BIT);
+
+ /* Set bit 14 of display controller */
+ dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLOCK_PHASE, ACTIVE_LOW);
+
+ POKE32(CRT_DISPLAY_CTRL, dispControl);
+
+ return dispControl;
+}
+
+
+
+/* only timing related registers will be programed */
+static int programModeRegisters(mode_parameter_t * pModeParam,pll_value_t * pll)
+{
+ int ret = 0;
+ int cnt = 0;
+ unsigned int ulTmpValue,ulReg;
+ if(pll->clockType == SECONDARY_PLL)
+ {
+ /* programe secondary pixel clock */
+ POKE32(CRT_PLL_CTRL,formatPllReg(pll));
+ POKE32(CRT_HORIZONTAL_TOTAL,
+ FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1)
+ | FIELD_VALUE(0, CRT_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1));
+
+ POKE32(CRT_HORIZONTAL_SYNC,
+ FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width)
+ | FIELD_VALUE(0, CRT_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1));
+
+ POKE32(CRT_VERTICAL_TOTAL,
+ FIELD_VALUE(0, CRT_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1)
+ | FIELD_VALUE(0, CRT_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1));
+
+ POKE32(CRT_VERTICAL_SYNC,
+ FIELD_VALUE(0, CRT_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height)
+ | FIELD_VALUE(0, CRT_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1));
+
+
+ ulTmpValue = FIELD_VALUE(0,CRT_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)|
+ FIELD_VALUE(0,CRT_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)|
+ FIELD_SET(0,CRT_DISPLAY_CTRL,TIMING,ENABLE)|
+ FIELD_SET(0,CRT_DISPLAY_CTRL,PLANE,ENABLE);
+
+
+ if(getChipType() == SM750LE){
+ displayControlAdjust_SM750LE(pModeParam,ulTmpValue);
+ }else{
+ ulReg = PEEK32(CRT_DISPLAY_CTRL)
+ & FIELD_CLEAR(CRT_DISPLAY_CTRL,VSYNC_PHASE)
+ & FIELD_CLEAR(CRT_DISPLAY_CTRL,HSYNC_PHASE)
+ & FIELD_CLEAR(CRT_DISPLAY_CTRL,TIMING)
+ & FIELD_CLEAR(CRT_DISPLAY_CTRL,PLANE);
+
+ POKE32(CRT_DISPLAY_CTRL,ulTmpValue|ulReg);
+ }
+
+ }
+ else if(pll->clockType == PRIMARY_PLL)
+ {
+ unsigned int ulReservedBits;
+ POKE32(PANEL_PLL_CTRL,formatPllReg(pll));
+
+ POKE32(PANEL_HORIZONTAL_TOTAL,
+ FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, TOTAL, pModeParam->horizontal_total - 1)
+ | FIELD_VALUE(0, PANEL_HORIZONTAL_TOTAL, DISPLAY_END, pModeParam->horizontal_display_end - 1));
+
+ POKE32(PANEL_HORIZONTAL_SYNC,
+ FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, WIDTH, pModeParam->horizontal_sync_width)
+ | FIELD_VALUE(0, PANEL_HORIZONTAL_SYNC, START, pModeParam->horizontal_sync_start - 1));
+
+ POKE32(PANEL_VERTICAL_TOTAL,
+ FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, TOTAL, pModeParam->vertical_total - 1)
+ | FIELD_VALUE(0, PANEL_VERTICAL_TOTAL, DISPLAY_END, pModeParam->vertical_display_end - 1));
+
+ POKE32(PANEL_VERTICAL_SYNC,
+ FIELD_VALUE(0, PANEL_VERTICAL_SYNC, HEIGHT, pModeParam->vertical_sync_height)
+ | FIELD_VALUE(0, PANEL_VERTICAL_SYNC, START, pModeParam->vertical_sync_start - 1));
+
+ ulTmpValue = FIELD_VALUE(0,PANEL_DISPLAY_CTRL,VSYNC_PHASE,pModeParam->vertical_sync_polarity)|
+ FIELD_VALUE(0,PANEL_DISPLAY_CTRL,HSYNC_PHASE,pModeParam->horizontal_sync_polarity)|
+ FIELD_VALUE(0,PANEL_DISPLAY_CTRL,CLOCK_PHASE,pModeParam->clock_phase_polarity)|
+ FIELD_SET(0,PANEL_DISPLAY_CTRL,TIMING,ENABLE)|
+ FIELD_SET(0,PANEL_DISPLAY_CTRL,PLANE,ENABLE);
+
+ ulReservedBits = FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_1_MASK, ENABLE) |
+ FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_2_MASK, ENABLE) |
+ FIELD_SET(0, PANEL_DISPLAY_CTRL, RESERVED_3_MASK, ENABLE)|
+ FIELD_SET(0,PANEL_DISPLAY_CTRL,VSYNC,ACTIVE_LOW);
+
+ ulReg = (PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, CLOCK_PHASE)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, VSYNC_PHASE)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, HSYNC_PHASE)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, TIMING)
+ & FIELD_CLEAR(PANEL_DISPLAY_CTRL, PLANE);
+
+
+ /* May a hardware bug or just my test chip (not confirmed).
+ * PANEL_DISPLAY_CTRL register seems requiring few writes
+ * before a value can be succesfully written in.
+ * Added some masks to mask out the reserved bits.
+ * Note: This problem happens by design. The hardware will wait for the
+ * next vertical sync to turn on/off the plane.
+ */
+
+ POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg);
+#if 1
+ while((PEEK32(PANEL_DISPLAY_CTRL) & ~ulReservedBits) != (ulTmpValue|ulReg))
+ {
+ cnt++;
+ if(cnt > 1000)
+ break;
+ POKE32(PANEL_DISPLAY_CTRL,ulTmpValue|ulReg);
+ }
+#endif
+ }
+ else{
+ ret = -1;
+ }
+ return ret;
+}
+
+int ddk750_setModeTiming(mode_parameter_t * parm,clock_type_t clock)
+{
+ pll_value_t pll;
+ unsigned int uiActualPixelClk;
+ pll.inputFreq = DEFAULT_INPUT_CLOCK;
+ pll.clockType = clock;
+
+ uiActualPixelClk = calcPllValue(parm->pixel_clock,&pll);
+ if(getChipType() == SM750LE){
+ /* set graphic mode via IO method */
+ outb_p(0x88,0x3d4);
+ outb_p(0x06,0x3d5);
+ }
+ programModeRegisters(parm,&pll);
+ return 0;
+}
+
+
--- /dev/null
+#ifndef DDK750_MODE_H__
+#define DDK750_MODE_H__
+
+#include "ddk750_chip.h"
+
+typedef enum _spolarity_t
+{
+ POS = 0, /* positive */
+ NEG, /* negative */
+}
+spolarity_t;
+
+
+typedef struct _mode_parameter_t
+{
+ /* Horizontal timing. */
+ unsigned long horizontal_total;
+ unsigned long horizontal_display_end;
+ unsigned long horizontal_sync_start;
+ unsigned long horizontal_sync_width;
+ spolarity_t horizontal_sync_polarity;
+
+ /* Vertical timing. */
+ unsigned long vertical_total;
+ unsigned long vertical_display_end;
+ unsigned long vertical_sync_start;
+ unsigned long vertical_sync_height;
+ spolarity_t vertical_sync_polarity;
+
+ /* Refresh timing. */
+ unsigned long pixel_clock;
+ unsigned long horizontal_frequency;
+ unsigned long vertical_frequency;
+
+ /* Clock Phase. This clock phase only applies to Panel. */
+ spolarity_t clock_phase_polarity;
+}
+mode_parameter_t;
+
+int ddk750_setModeTiming(mode_parameter_t *,clock_type_t);
+
+
+#endif
--- /dev/null
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_power.h"
+
+void ddk750_setDPMS(DPMS_t state)
+{
+ unsigned int value;
+ if(getChipType() == SM750LE){
+ value = PEEK32(CRT_DISPLAY_CTRL);
+ POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(value,CRT_DISPLAY_CTRL,DPMS,state));
+ }else{
+ value = PEEK32(SYSTEM_CTRL);
+ value= FIELD_VALUE(value,SYSTEM_CTRL,DPMS,state);
+ POKE32(SYSTEM_CTRL, value);
+ }
+}
+
+unsigned int getPowerMode(void)
+{
+ if(getChipType() == SM750LE)
+ return 0;
+ return (FIELD_GET(PEEK32(POWER_MODE_CTRL), POWER_MODE_CTRL, MODE));
+}
+
+
+/*
+ * SM50x can operate in one of three modes: 0, 1 or Sleep.
+ * On hardware reset, power mode 0 is default.
+ */
+void setPowerMode(unsigned int powerMode)
+{
+ unsigned int control_value = 0;
+
+ control_value = PEEK32(POWER_MODE_CTRL);
+
+ if(getChipType() == SM750LE)
+ return;
+
+ switch (powerMode)
+ {
+ case POWER_MODE_CTRL_MODE_MODE0:
+ control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, MODE0);
+ break;
+
+ case POWER_MODE_CTRL_MODE_MODE1:
+ control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, MODE1);
+ break;
+
+ case POWER_MODE_CTRL_MODE_SLEEP:
+ control_value = FIELD_SET(control_value, POWER_MODE_CTRL, MODE, SLEEP);
+ break;
+
+ default:
+ break;
+ }
+
+ /* Set up other fields in Power Control Register */
+ if (powerMode == POWER_MODE_CTRL_MODE_SLEEP)
+ {
+ control_value =
+#ifdef VALIDATION_CHIP
+ FIELD_SET( control_value, POWER_MODE_CTRL, 336CLK, OFF) |
+#endif
+ FIELD_SET( control_value, POWER_MODE_CTRL, OSC_INPUT, OFF);
+ }
+ else
+ {
+ control_value =
+#ifdef VALIDATION_CHIP
+ FIELD_SET( control_value, POWER_MODE_CTRL, 336CLK, ON) |
+#endif
+ FIELD_SET( control_value, POWER_MODE_CTRL, OSC_INPUT, ON);
+ }
+
+ /* Program new power mode. */
+ POKE32(POWER_MODE_CTRL, control_value);
+}
+
+void setCurrentGate(unsigned int gate)
+{
+ unsigned int gate_reg;
+ unsigned int mode;
+
+ /* Get current power mode. */
+ mode = getPowerMode();
+
+ switch (mode)
+ {
+ case POWER_MODE_CTRL_MODE_MODE0:
+ gate_reg = MODE0_GATE;
+ break;
+
+ case POWER_MODE_CTRL_MODE_MODE1:
+ gate_reg = MODE1_GATE;
+ break;
+
+ default:
+ gate_reg = MODE0_GATE;
+ break;
+ }
+ POKE32(gate_reg, gate);
+}
+
+
+
+/*
+ * This function enable/disable the 2D engine.
+ */
+void enable2DEngine(unsigned int enable)
+{
+ uint32_t gate;
+
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ {
+ gate = FIELD_SET(gate, CURRENT_GATE, DE, ON);
+ gate = FIELD_SET(gate, CURRENT_GATE, CSC, ON);
+ }
+ else
+ {
+ gate = FIELD_SET(gate, CURRENT_GATE, DE, OFF);
+ gate = FIELD_SET(gate, CURRENT_GATE, CSC, OFF);
+ }
+
+ setCurrentGate(gate);
+}
+
+
+/*
+ * This function enable/disable the ZV Port.
+ */
+void enableZVPort(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable ZV Port Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ {
+ gate = FIELD_SET(gate, CURRENT_GATE, ZVPORT, ON);
+#if 1
+ /* Using Software I2C */
+ gate = FIELD_SET(gate, CURRENT_GATE, GPIO, ON);
+#else
+ /* Using Hardware I2C */
+ gate = FIELD_SET(gate, CURRENT_GATE, I2C, ON);
+#endif
+ }
+ else
+ {
+ /* Disable ZV Port Gate. There is no way to know whether the GPIO pins are being used
+ or not. Therefore, do not disable the GPIO gate. */
+ gate = FIELD_SET(gate, CURRENT_GATE, ZVPORT, OFF);
+ }
+
+ setCurrentGate(gate);
+}
+
+
+void enableSSP(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable SSP Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, SSP, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, SSP, OFF);
+
+ setCurrentGate(gate);
+}
+
+void enableDMA(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable DMA Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, DMA, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, DMA, OFF);
+
+ setCurrentGate(gate);
+}
+
+/*
+ * This function enable/disable the GPIO Engine
+ */
+void enableGPIO(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable GPIO Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, GPIO, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, GPIO, OFF);
+
+ setCurrentGate(gate);
+}
+
+/*
+ * This function enable/disable the PWM Engine
+ */
+void enablePWM(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable PWM Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, PWM, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, PWM, OFF);
+
+ setCurrentGate(gate);
+}
+
+/*
+ * This function enable/disable the I2C Engine
+ */
+void enableI2C(unsigned int enable)
+{
+ uint32_t gate;
+
+ /* Enable I2C Gate */
+ gate = PEEK32(CURRENT_GATE);
+ if (enable)
+ gate = FIELD_SET(gate, CURRENT_GATE, I2C, ON);
+ else
+ gate = FIELD_SET(gate, CURRENT_GATE, I2C, OFF);
+
+ setCurrentGate(gate);
+}
+
+
--- /dev/null
+#ifndef DDK750_POWER_H__
+#define DDK750_POWER_H__
+
+typedef enum _DPMS_t
+{
+ crtDPMS_ON = 0x0,
+ crtDPMS_STANDBY = 0x1,
+ crtDPMS_SUSPEND = 0x2,
+ crtDPMS_OFF = 0x3,
+}
+DPMS_t;
+
+#define setDAC(off) \
+ { \
+ POKE32(MISC_CTRL,FIELD_VALUE(PEEK32(MISC_CTRL), \
+ MISC_CTRL, \
+ DAC_POWER, \
+ off)); \
+ }
+
+void ddk750_setDPMS(DPMS_t);
+
+unsigned int getPowerMode(void);
+
+/*
+ * This function sets the current power mode
+ */
+void setPowerMode(unsigned int powerMode);
+
+/*
+ * This function sets current gate
+ */
+void setCurrentGate(unsigned int gate);
+
+/*
+ * This function enable/disable the 2D engine.
+ */
+void enable2DEngine(unsigned int enable);
+
+/*
+ * This function enable/disable the ZV Port
+ */
+void enableZVPort(unsigned int enable);
+
+/*
+ * This function enable/disable the DMA Engine
+ */
+void enableDMA(unsigned int enable);
+
+/*
+ * This function enable/disable the GPIO Engine
+ */
+void enableGPIO(unsigned int enable);
+
+/*
+ * This function enable/disable the PWM Engine
+ */
+void enablePWM(unsigned int enable);
+
+/*
+ * This function enable/disable the I2C Engine
+ */
+void enableI2C(unsigned int enable);
+
+/*
+ * This function enable/disable the SSP.
+ */
+void enableSSP(unsigned int enable);
+
+
+#endif
--- /dev/null
+#ifndef DDK750_REG_H__
+#define DDK750_REG_H__
+
+/* New register for SM750LE */
+#define DE_STATE1 0x100054
+#define DE_STATE1_DE_ABORT 0:0
+#define DE_STATE1_DE_ABORT_OFF 0
+#define DE_STATE1_DE_ABORT_ON 1
+
+#define DE_STATE2 0x100058
+#define DE_STATE2_DE_FIFO 3:3
+#define DE_STATE2_DE_FIFO_NOTEMPTY 0
+#define DE_STATE2_DE_FIFO_EMPTY 1
+#define DE_STATE2_DE_STATUS 2:2
+#define DE_STATE2_DE_STATUS_IDLE 0
+#define DE_STATE2_DE_STATUS_BUSY 1
+#define DE_STATE2_DE_MEM_FIFO 1:1
+#define DE_STATE2_DE_MEM_FIFO_NOTEMPTY 0
+#define DE_STATE2_DE_MEM_FIFO_EMPTY 1
+#define DE_STATE2_DE_RESERVED 0:0
+
+
+
+#define SYSTEM_CTRL 0x000000
+#define SYSTEM_CTRL_DPMS 31:30
+#define SYSTEM_CTRL_DPMS_VPHP 0
+#define SYSTEM_CTRL_DPMS_VPHN 1
+#define SYSTEM_CTRL_DPMS_VNHP 2
+#define SYSTEM_CTRL_DPMS_VNHN 3
+#define SYSTEM_CTRL_PCI_BURST 29:29
+#define SYSTEM_CTRL_PCI_BURST_OFF 0
+#define SYSTEM_CTRL_PCI_BURST_ON 1
+#define SYSTEM_CTRL_PCI_MASTER 25:25
+#define SYSTEM_CTRL_PCI_MASTER_OFF 0
+#define SYSTEM_CTRL_PCI_MASTER_ON 1
+#define SYSTEM_CTRL_LATENCY_TIMER 24:24
+#define SYSTEM_CTRL_LATENCY_TIMER_ON 0
+#define SYSTEM_CTRL_LATENCY_TIMER_OFF 1
+#define SYSTEM_CTRL_DE_FIFO 23:23
+#define SYSTEM_CTRL_DE_FIFO_NOTEMPTY 0
+#define SYSTEM_CTRL_DE_FIFO_EMPTY 1
+#define SYSTEM_CTRL_DE_STATUS 22:22
+#define SYSTEM_CTRL_DE_STATUS_IDLE 0
+#define SYSTEM_CTRL_DE_STATUS_BUSY 1
+#define SYSTEM_CTRL_DE_MEM_FIFO 21:21
+#define SYSTEM_CTRL_DE_MEM_FIFO_NOTEMPTY 0
+#define SYSTEM_CTRL_DE_MEM_FIFO_EMPTY 1
+#define SYSTEM_CTRL_CSC_STATUS 20:20
+#define SYSTEM_CTRL_CSC_STATUS_IDLE 0
+#define SYSTEM_CTRL_CSC_STATUS_BUSY 1
+#define SYSTEM_CTRL_CRT_VSYNC 19:19
+#define SYSTEM_CTRL_CRT_VSYNC_INACTIVE 0
+#define SYSTEM_CTRL_CRT_VSYNC_ACTIVE 1
+#define SYSTEM_CTRL_PANEL_VSYNC 18:18
+#define SYSTEM_CTRL_PANEL_VSYNC_INACTIVE 0
+#define SYSTEM_CTRL_PANEL_VSYNC_ACTIVE 1
+#define SYSTEM_CTRL_CURRENT_BUFFER 17:17
+#define SYSTEM_CTRL_CURRENT_BUFFER_NORMAL 0
+#define SYSTEM_CTRL_CURRENT_BUFFER_FLIP_PENDING 1
+#define SYSTEM_CTRL_DMA_STATUS 16:16
+#define SYSTEM_CTRL_DMA_STATUS_IDLE 0
+#define SYSTEM_CTRL_DMA_STATUS_BUSY 1
+#define SYSTEM_CTRL_PCI_BURST_READ 15:15
+#define SYSTEM_CTRL_PCI_BURST_READ_OFF 0
+#define SYSTEM_CTRL_PCI_BURST_READ_ON 1
+#define SYSTEM_CTRL_DE_ABORT 13:13
+#define SYSTEM_CTRL_DE_ABORT_OFF 0
+#define SYSTEM_CTRL_DE_ABORT_ON 1
+#define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK 11:11
+#define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK_OFF 0
+#define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK_ON 1
+#define SYSTEM_CTRL_PCI_RETRY 7:7
+#define SYSTEM_CTRL_PCI_RETRY_ON 0
+#define SYSTEM_CTRL_PCI_RETRY_OFF 1
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE 5:4
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_1 0
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_2 1
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_4 2
+#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_8 3
+#define SYSTEM_CTRL_CRT_TRISTATE 3:3
+#define SYSTEM_CTRL_CRT_TRISTATE_OFF 0
+#define SYSTEM_CTRL_CRT_TRISTATE_ON 1
+#define SYSTEM_CTRL_PCIMEM_TRISTATE 2:2
+#define SYSTEM_CTRL_PCIMEM_TRISTATE_OFF 0
+#define SYSTEM_CTRL_PCIMEM_TRISTATE_ON 1
+#define SYSTEM_CTRL_LOCALMEM_TRISTATE 1:1
+#define SYSTEM_CTRL_LOCALMEM_TRISTATE_OFF 0
+#define SYSTEM_CTRL_LOCALMEM_TRISTATE_ON 1
+#define SYSTEM_CTRL_PANEL_TRISTATE 0:0
+#define SYSTEM_CTRL_PANEL_TRISTATE_OFF 0
+#define SYSTEM_CTRL_PANEL_TRISTATE_ON 1
+
+#define MISC_CTRL 0x000004
+#define MISC_CTRL_DRAM_RERESH_COUNT 27:27
+#define MISC_CTRL_DRAM_RERESH_COUNT_1ROW 0
+#define MISC_CTRL_DRAM_RERESH_COUNT_3ROW 1
+#define MISC_CTRL_DRAM_REFRESH_TIME 26:25
+#define MISC_CTRL_DRAM_REFRESH_TIME_8 0
+#define MISC_CTRL_DRAM_REFRESH_TIME_16 1
+#define MISC_CTRL_DRAM_REFRESH_TIME_32 2
+#define MISC_CTRL_DRAM_REFRESH_TIME_64 3
+#define MISC_CTRL_INT_OUTPUT 24:24
+#define MISC_CTRL_INT_OUTPUT_NORMAL 0
+#define MISC_CTRL_INT_OUTPUT_INVERT 1
+#define MISC_CTRL_PLL_CLK_COUNT 23:23
+#define MISC_CTRL_PLL_CLK_COUNT_OFF 0
+#define MISC_CTRL_PLL_CLK_COUNT_ON 1
+#define MISC_CTRL_DAC_POWER 20:20
+#define MISC_CTRL_DAC_POWER_ON 0
+#define MISC_CTRL_DAC_POWER_OFF 1
+#define MISC_CTRL_CLK_SELECT 16:16
+#define MISC_CTRL_CLK_SELECT_OSC 0
+#define MISC_CTRL_CLK_SELECT_TESTCLK 1
+#define MISC_CTRL_DRAM_COLUMN_SIZE 15:14
+#define MISC_CTRL_DRAM_COLUMN_SIZE_256 0
+#define MISC_CTRL_DRAM_COLUMN_SIZE_512 1
+#define MISC_CTRL_DRAM_COLUMN_SIZE_1024 2
+#define MISC_CTRL_LOCALMEM_SIZE 13:12
+#define MISC_CTRL_LOCALMEM_SIZE_8M 3
+#define MISC_CTRL_LOCALMEM_SIZE_16M 0
+#define MISC_CTRL_LOCALMEM_SIZE_32M 1
+#define MISC_CTRL_LOCALMEM_SIZE_64M 2
+#define MISC_CTRL_DRAM_TWTR 11:11
+#define MISC_CTRL_DRAM_TWTR_2CLK 0
+#define MISC_CTRL_DRAM_TWTR_1CLK 1
+#define MISC_CTRL_DRAM_TWR 10:10
+#define MISC_CTRL_DRAM_TWR_3CLK 0
+#define MISC_CTRL_DRAM_TWR_2CLK 1
+#define MISC_CTRL_DRAM_TRP 9:9
+#define MISC_CTRL_DRAM_TRP_3CLK 0
+#define MISC_CTRL_DRAM_TRP_4CLK 1
+#define MISC_CTRL_DRAM_TRFC 8:8
+#define MISC_CTRL_DRAM_TRFC_12CLK 0
+#define MISC_CTRL_DRAM_TRFC_14CLK 1
+#define MISC_CTRL_DRAM_TRAS 7:7
+#define MISC_CTRL_DRAM_TRAS_7CLK 0
+#define MISC_CTRL_DRAM_TRAS_8CLK 1
+#define MISC_CTRL_LOCALMEM_RESET 6:6
+#define MISC_CTRL_LOCALMEM_RESET_RESET 0
+#define MISC_CTRL_LOCALMEM_RESET_NORMAL 1
+#define MISC_CTRL_LOCALMEM_STATE 5:5
+#define MISC_CTRL_LOCALMEM_STATE_ACTIVE 0
+#define MISC_CTRL_LOCALMEM_STATE_INACTIVE 1
+#define MISC_CTRL_CPU_CAS_LATENCY 4:4
+#define MISC_CTRL_CPU_CAS_LATENCY_2CLK 0
+#define MISC_CTRL_CPU_CAS_LATENCY_3CLK 1
+#define MISC_CTRL_DLL 3:3
+#define MISC_CTRL_DLL_ON 0
+#define MISC_CTRL_DLL_OFF 1
+#define MISC_CTRL_DRAM_OUTPUT 2:2
+#define MISC_CTRL_DRAM_OUTPUT_LOW 0
+#define MISC_CTRL_DRAM_OUTPUT_HIGH 1
+#define MISC_CTRL_LOCALMEM_BUS_SIZE 1:1
+#define MISC_CTRL_LOCALMEM_BUS_SIZE_32 0
+#define MISC_CTRL_LOCALMEM_BUS_SIZE_64 1
+#define MISC_CTRL_EMBEDDED_LOCALMEM 0:0
+#define MISC_CTRL_EMBEDDED_LOCALMEM_ON 0
+#define MISC_CTRL_EMBEDDED_LOCALMEM_OFF 1
+
+#define GPIO_MUX 0x000008
+#define GPIO_MUX_31 31:31
+#define GPIO_MUX_31_GPIO 0
+#define GPIO_MUX_31_I2C 1
+#define GPIO_MUX_30 30:30
+#define GPIO_MUX_30_GPIO 0
+#define GPIO_MUX_30_I2C 1
+#define GPIO_MUX_29 29:29
+#define GPIO_MUX_29_GPIO 0
+#define GPIO_MUX_29_SSP1 1
+#define GPIO_MUX_28 28:28
+#define GPIO_MUX_28_GPIO 0
+#define GPIO_MUX_28_SSP1 1
+#define GPIO_MUX_27 27:27
+#define GPIO_MUX_27_GPIO 0
+#define GPIO_MUX_27_SSP1 1
+#define GPIO_MUX_26 26:26
+#define GPIO_MUX_26_GPIO 0
+#define GPIO_MUX_26_SSP1 1
+#define GPIO_MUX_25 25:25
+#define GPIO_MUX_25_GPIO 0
+#define GPIO_MUX_25_SSP1 1
+#define GPIO_MUX_24 24:24
+#define GPIO_MUX_24_GPIO 0
+#define GPIO_MUX_24_SSP0 1
+#define GPIO_MUX_23 23:23
+#define GPIO_MUX_23_GPIO 0
+#define GPIO_MUX_23_SSP0 1
+#define GPIO_MUX_22 22:22
+#define GPIO_MUX_22_GPIO 0
+#define GPIO_MUX_22_SSP0 1
+#define GPIO_MUX_21 21:21
+#define GPIO_MUX_21_GPIO 0
+#define GPIO_MUX_21_SSP0 1
+#define GPIO_MUX_20 20:20
+#define GPIO_MUX_20_GPIO 0
+#define GPIO_MUX_20_SSP0 1
+#define GPIO_MUX_19 19:19
+#define GPIO_MUX_19_GPIO 0
+#define GPIO_MUX_19_PWM 1
+#define GPIO_MUX_18 18:18
+#define GPIO_MUX_18_GPIO 0
+#define GPIO_MUX_18_PWM 1
+#define GPIO_MUX_17 17:17
+#define GPIO_MUX_17_GPIO 0
+#define GPIO_MUX_17_PWM 1
+#define GPIO_MUX_16 16:16
+#define GPIO_MUX_16_GPIO_ZVPORT 0
+#define GPIO_MUX_16_TEST_DATA 1
+#define GPIO_MUX_15 15:15
+#define GPIO_MUX_15_GPIO_ZVPORT 0
+#define GPIO_MUX_15_TEST_DATA 1
+#define GPIO_MUX_14 14:14
+#define GPIO_MUX_14_GPIO_ZVPORT 0
+#define GPIO_MUX_14_TEST_DATA 1
+#define GPIO_MUX_13 13:13
+#define GPIO_MUX_13_GPIO_ZVPORT 0
+#define GPIO_MUX_13_TEST_DATA 1
+#define GPIO_MUX_12 12:12
+#define GPIO_MUX_12_GPIO_ZVPORT 0
+#define GPIO_MUX_12_TEST_DATA 1
+#define GPIO_MUX_11 11:11
+#define GPIO_MUX_11_GPIO_ZVPORT 0
+#define GPIO_MUX_11_TEST_DATA 1
+#define GPIO_MUX_10 10:10
+#define GPIO_MUX_10_GPIO_ZVPORT 0
+#define GPIO_MUX_10_TEST_DATA 1
+#define GPIO_MUX_9 9:9
+#define GPIO_MUX_9_GPIO_ZVPORT 0
+#define GPIO_MUX_9_TEST_DATA 1
+#define GPIO_MUX_8 8:8
+#define GPIO_MUX_8_GPIO_ZVPORT 0
+#define GPIO_MUX_8_TEST_DATA 1
+#define GPIO_MUX_7 7:7
+#define GPIO_MUX_7_GPIO_ZVPORT 0
+#define GPIO_MUX_7_TEST_DATA 1
+#define GPIO_MUX_6 6:6
+#define GPIO_MUX_6_GPIO_ZVPORT 0
+#define GPIO_MUX_6_TEST_DATA 1
+#define GPIO_MUX_5 5:5
+#define GPIO_MUX_5_GPIO_ZVPORT 0
+#define GPIO_MUX_5_TEST_DATA 1
+#define GPIO_MUX_4 4:4
+#define GPIO_MUX_4_GPIO_ZVPORT 0
+#define GPIO_MUX_4_TEST_DATA 1
+#define GPIO_MUX_3 3:3
+#define GPIO_MUX_3_GPIO_ZVPORT 0
+#define GPIO_MUX_3_TEST_DATA 1
+#define GPIO_MUX_2 2:2
+#define GPIO_MUX_2_GPIO_ZVPORT 0
+#define GPIO_MUX_2_TEST_DATA 1
+#define GPIO_MUX_1 1:1
+#define GPIO_MUX_1_GPIO_ZVPORT 0
+#define GPIO_MUX_1_TEST_DATA 1
+#define GPIO_MUX_0 0:0
+#define GPIO_MUX_0_GPIO_ZVPORT 0
+#define GPIO_MUX_0_TEST_DATA 1
+
+#define LOCALMEM_ARBITRATION 0x00000C
+#define LOCALMEM_ARBITRATION_ROTATE 28:28
+#define LOCALMEM_ARBITRATION_ROTATE_OFF 0
+#define LOCALMEM_ARBITRATION_ROTATE_ON 1
+#define LOCALMEM_ARBITRATION_VGA 26:24
+#define LOCALMEM_ARBITRATION_VGA_OFF 0
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_VGA_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_DMA 22:20
+#define LOCALMEM_ARBITRATION_DMA_OFF 0
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_DMA_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_ZVPORT1 18:16
+#define LOCALMEM_ARBITRATION_ZVPORT1_OFF 0
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_ZVPORT0 14:12
+#define LOCALMEM_ARBITRATION_ZVPORT0_OFF 0
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_VIDEO 10:8
+#define LOCALMEM_ARBITRATION_VIDEO_OFF 0
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_PANEL 6:4
+#define LOCALMEM_ARBITRATION_PANEL_OFF 0
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_7 7
+#define LOCALMEM_ARBITRATION_CRT 2:0
+#define LOCALMEM_ARBITRATION_CRT_OFF 0
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_1 1
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_2 2
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_3 3
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_4 4
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_5 5
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_6 6
+#define LOCALMEM_ARBITRATION_CRT_PRIORITY_7 7
+
+#define PCIMEM_ARBITRATION 0x000010
+#define PCIMEM_ARBITRATION_ROTATE 28:28
+#define PCIMEM_ARBITRATION_ROTATE_OFF 0
+#define PCIMEM_ARBITRATION_ROTATE_ON 1
+#define PCIMEM_ARBITRATION_VGA 26:24
+#define PCIMEM_ARBITRATION_VGA_OFF 0
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_VGA_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_DMA 22:20
+#define PCIMEM_ARBITRATION_DMA_OFF 0
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_DMA_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_ZVPORT1 18:16
+#define PCIMEM_ARBITRATION_ZVPORT1_OFF 0
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_ZVPORT0 14:12
+#define PCIMEM_ARBITRATION_ZVPORT0_OFF 0
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_VIDEO 10:8
+#define PCIMEM_ARBITRATION_VIDEO_OFF 0
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_PANEL 6:4
+#define PCIMEM_ARBITRATION_PANEL_OFF 0
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_PANEL_PRIORITY_7 7
+#define PCIMEM_ARBITRATION_CRT 2:0
+#define PCIMEM_ARBITRATION_CRT_OFF 0
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_1 1
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_2 2
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_3 3
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_4 4
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_5 5
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_6 6
+#define PCIMEM_ARBITRATION_CRT_PRIORITY_7 7
+
+#define RAW_INT 0x000020
+#define RAW_INT_ZVPORT1_VSYNC 4:4
+#define RAW_INT_ZVPORT1_VSYNC_INACTIVE 0
+#define RAW_INT_ZVPORT1_VSYNC_ACTIVE 1
+#define RAW_INT_ZVPORT1_VSYNC_CLEAR 1
+#define RAW_INT_ZVPORT0_VSYNC 3:3
+#define RAW_INT_ZVPORT0_VSYNC_INACTIVE 0
+#define RAW_INT_ZVPORT0_VSYNC_ACTIVE 1
+#define RAW_INT_ZVPORT0_VSYNC_CLEAR 1
+#define RAW_INT_CRT_VSYNC 2:2
+#define RAW_INT_CRT_VSYNC_INACTIVE 0
+#define RAW_INT_CRT_VSYNC_ACTIVE 1
+#define RAW_INT_CRT_VSYNC_CLEAR 1
+#define RAW_INT_PANEL_VSYNC 1:1
+#define RAW_INT_PANEL_VSYNC_INACTIVE 0
+#define RAW_INT_PANEL_VSYNC_ACTIVE 1
+#define RAW_INT_PANEL_VSYNC_CLEAR 1
+#define RAW_INT_VGA_VSYNC 0:0
+#define RAW_INT_VGA_VSYNC_INACTIVE 0
+#define RAW_INT_VGA_VSYNC_ACTIVE 1
+#define RAW_INT_VGA_VSYNC_CLEAR 1
+
+#define INT_STATUS 0x000024
+#define INT_STATUS_GPIO31 31:31
+#define INT_STATUS_GPIO31_INACTIVE 0
+#define INT_STATUS_GPIO31_ACTIVE 1
+#define INT_STATUS_GPIO30 30:30
+#define INT_STATUS_GPIO30_INACTIVE 0
+#define INT_STATUS_GPIO30_ACTIVE 1
+#define INT_STATUS_GPIO29 29:29
+#define INT_STATUS_GPIO29_INACTIVE 0
+#define INT_STATUS_GPIO29_ACTIVE 1
+#define INT_STATUS_GPIO28 28:28
+#define INT_STATUS_GPIO28_INACTIVE 0
+#define INT_STATUS_GPIO28_ACTIVE 1
+#define INT_STATUS_GPIO27 27:27
+#define INT_STATUS_GPIO27_INACTIVE 0
+#define INT_STATUS_GPIO27_ACTIVE 1
+#define INT_STATUS_GPIO26 26:26
+#define INT_STATUS_GPIO26_INACTIVE 0
+#define INT_STATUS_GPIO26_ACTIVE 1
+#define INT_STATUS_GPIO25 25:25
+#define INT_STATUS_GPIO25_INACTIVE 0
+#define INT_STATUS_GPIO25_ACTIVE 1
+#define INT_STATUS_I2C 12:12
+#define INT_STATUS_I2C_INACTIVE 0
+#define INT_STATUS_I2C_ACTIVE 1
+#define INT_STATUS_PWM 11:11
+#define INT_STATUS_PWM_INACTIVE 0
+#define INT_STATUS_PWM_ACTIVE 1
+#define INT_STATUS_DMA1 10:10
+#define INT_STATUS_DMA1_INACTIVE 0
+#define INT_STATUS_DMA1_ACTIVE 1
+#define INT_STATUS_DMA0 9:9
+#define INT_STATUS_DMA0_INACTIVE 0
+#define INT_STATUS_DMA0_ACTIVE 1
+#define INT_STATUS_PCI 8:8
+#define INT_STATUS_PCI_INACTIVE 0
+#define INT_STATUS_PCI_ACTIVE 1
+#define INT_STATUS_SSP1 7:7
+#define INT_STATUS_SSP1_INACTIVE 0
+#define INT_STATUS_SSP1_ACTIVE 1
+#define INT_STATUS_SSP0 6:6
+#define INT_STATUS_SSP0_INACTIVE 0
+#define INT_STATUS_SSP0_ACTIVE 1
+#define INT_STATUS_DE 5:5
+#define INT_STATUS_DE_INACTIVE 0
+#define INT_STATUS_DE_ACTIVE 1
+#define INT_STATUS_ZVPORT1_VSYNC 4:4
+#define INT_STATUS_ZVPORT1_VSYNC_INACTIVE 0
+#define INT_STATUS_ZVPORT1_VSYNC_ACTIVE 1
+#define INT_STATUS_ZVPORT0_VSYNC 3:3
+#define INT_STATUS_ZVPORT0_VSYNC_INACTIVE 0
+#define INT_STATUS_ZVPORT0_VSYNC_ACTIVE 1
+#define INT_STATUS_CRT_VSYNC 2:2
+#define INT_STATUS_CRT_VSYNC_INACTIVE 0
+#define INT_STATUS_CRT_VSYNC_ACTIVE 1
+#define INT_STATUS_PANEL_VSYNC 1:1
+#define INT_STATUS_PANEL_VSYNC_INACTIVE 0
+#define INT_STATUS_PANEL_VSYNC_ACTIVE 1
+#define INT_STATUS_VGA_VSYNC 0:0
+#define INT_STATUS_VGA_VSYNC_INACTIVE 0
+#define INT_STATUS_VGA_VSYNC_ACTIVE 1
+
+#define INT_MASK 0x000028
+#define INT_MASK_GPIO31 31:31
+#define INT_MASK_GPIO31_DISABLE 0
+#define INT_MASK_GPIO31_ENABLE 1
+#define INT_MASK_GPIO30 30:30
+#define INT_MASK_GPIO30_DISABLE 0
+#define INT_MASK_GPIO30_ENABLE 1
+#define INT_MASK_GPIO29 29:29
+#define INT_MASK_GPIO29_DISABLE 0
+#define INT_MASK_GPIO29_ENABLE 1
+#define INT_MASK_GPIO28 28:28
+#define INT_MASK_GPIO28_DISABLE 0
+#define INT_MASK_GPIO28_ENABLE 1
+#define INT_MASK_GPIO27 27:27
+#define INT_MASK_GPIO27_DISABLE 0
+#define INT_MASK_GPIO27_ENABLE 1
+#define INT_MASK_GPIO26 26:26
+#define INT_MASK_GPIO26_DISABLE 0
+#define INT_MASK_GPIO26_ENABLE 1
+#define INT_MASK_GPIO25 25:25
+#define INT_MASK_GPIO25_DISABLE 0
+#define INT_MASK_GPIO25_ENABLE 1
+#define INT_MASK_I2C 12:12
+#define INT_MASK_I2C_DISABLE 0
+#define INT_MASK_I2C_ENABLE 1
+#define INT_MASK_PWM 11:11
+#define INT_MASK_PWM_DISABLE 0
+#define INT_MASK_PWM_ENABLE 1
+#define INT_MASK_DMA1 10:10
+#define INT_MASK_DMA1_DISABLE 0
+#define INT_MASK_DMA1_ENABLE 1
+#define INT_MASK_DMA 9:9
+#define INT_MASK_DMA_DISABLE 0
+#define INT_MASK_DMA_ENABLE 1
+#define INT_MASK_PCI 8:8
+#define INT_MASK_PCI_DISABLE 0
+#define INT_MASK_PCI_ENABLE 1
+#define INT_MASK_SSP1 7:7
+#define INT_MASK_SSP1_DISABLE 0
+#define INT_MASK_SSP1_ENABLE 1
+#define INT_MASK_SSP0 6:6
+#define INT_MASK_SSP0_DISABLE 0
+#define INT_MASK_SSP0_ENABLE 1
+#define INT_MASK_DE 5:5
+#define INT_MASK_DE_DISABLE 0
+#define INT_MASK_DE_ENABLE 1
+#define INT_MASK_ZVPORT1_VSYNC 4:4
+#define INT_MASK_ZVPORT1_VSYNC_DISABLE 0
+#define INT_MASK_ZVPORT1_VSYNC_ENABLE 1
+#define INT_MASK_ZVPORT0_VSYNC 3:3
+#define INT_MASK_ZVPORT0_VSYNC_DISABLE 0
+#define INT_MASK_ZVPORT0_VSYNC_ENABLE 1
+#define INT_MASK_CRT_VSYNC 2:2
+#define INT_MASK_CRT_VSYNC_DISABLE 0
+#define INT_MASK_CRT_VSYNC_ENABLE 1
+#define INT_MASK_PANEL_VSYNC 1:1
+#define INT_MASK_PANEL_VSYNC_DISABLE 0
+#define INT_MASK_PANEL_VSYNC_ENABLE 1
+#define INT_MASK_VGA_VSYNC 0:0
+#define INT_MASK_VGA_VSYNC_DISABLE 0
+#define INT_MASK_VGA_VSYNC_ENABLE 1
+
+#define CURRENT_GATE 0x000040
+#define CURRENT_GATE_MCLK 15:14
+#ifdef VALIDATION_CHIP
+ #define CURRENT_GATE_MCLK_112MHZ 0
+ #define CURRENT_GATE_MCLK_84MHZ 1
+ #define CURRENT_GATE_MCLK_56MHZ 2
+ #define CURRENT_GATE_MCLK_42MHZ 3
+#else
+ #define CURRENT_GATE_MCLK_DIV_3 0
+ #define CURRENT_GATE_MCLK_DIV_4 1
+ #define CURRENT_GATE_MCLK_DIV_6 2
+ #define CURRENT_GATE_MCLK_DIV_8 3
+#endif
+#define CURRENT_GATE_M2XCLK 13:12
+#ifdef VALIDATION_CHIP
+ #define CURRENT_GATE_M2XCLK_336MHZ 0
+ #define CURRENT_GATE_M2XCLK_168MHZ 1
+ #define CURRENT_GATE_M2XCLK_112MHZ 2
+ #define CURRENT_GATE_M2XCLK_84MHZ 3
+#else
+ #define CURRENT_GATE_M2XCLK_DIV_1 0
+ #define CURRENT_GATE_M2XCLK_DIV_2 1
+ #define CURRENT_GATE_M2XCLK_DIV_3 2
+ #define CURRENT_GATE_M2XCLK_DIV_4 3
+#endif
+#define CURRENT_GATE_VGA 10:10
+#define CURRENT_GATE_VGA_OFF 0
+#define CURRENT_GATE_VGA_ON 1
+#define CURRENT_GATE_PWM 9:9
+#define CURRENT_GATE_PWM_OFF 0
+#define CURRENT_GATE_PWM_ON 1
+#define CURRENT_GATE_I2C 8:8
+#define CURRENT_GATE_I2C_OFF 0
+#define CURRENT_GATE_I2C_ON 1
+#define CURRENT_GATE_SSP 7:7
+#define CURRENT_GATE_SSP_OFF 0
+#define CURRENT_GATE_SSP_ON 1
+#define CURRENT_GATE_GPIO 6:6
+#define CURRENT_GATE_GPIO_OFF 0
+#define CURRENT_GATE_GPIO_ON 1
+#define CURRENT_GATE_ZVPORT 5:5
+#define CURRENT_GATE_ZVPORT_OFF 0
+#define CURRENT_GATE_ZVPORT_ON 1
+#define CURRENT_GATE_CSC 4:4
+#define CURRENT_GATE_CSC_OFF 0
+#define CURRENT_GATE_CSC_ON 1
+#define CURRENT_GATE_DE 3:3
+#define CURRENT_GATE_DE_OFF 0
+#define CURRENT_GATE_DE_ON 1
+#define CURRENT_GATE_DISPLAY 2:2
+#define CURRENT_GATE_DISPLAY_OFF 0
+#define CURRENT_GATE_DISPLAY_ON 1
+#define CURRENT_GATE_LOCALMEM 1:1
+#define CURRENT_GATE_LOCALMEM_OFF 0
+#define CURRENT_GATE_LOCALMEM_ON 1
+#define CURRENT_GATE_DMA 0:0
+#define CURRENT_GATE_DMA_OFF 0
+#define CURRENT_GATE_DMA_ON 1
+
+#define MODE0_GATE 0x000044
+#define MODE0_GATE_MCLK 15:14
+#define MODE0_GATE_MCLK_112MHZ 0
+#define MODE0_GATE_MCLK_84MHZ 1
+#define MODE0_GATE_MCLK_56MHZ 2
+#define MODE0_GATE_MCLK_42MHZ 3
+#define MODE0_GATE_M2XCLK 13:12
+#define MODE0_GATE_M2XCLK_336MHZ 0
+#define MODE0_GATE_M2XCLK_168MHZ 1
+#define MODE0_GATE_M2XCLK_112MHZ 2
+#define MODE0_GATE_M2XCLK_84MHZ 3
+#define MODE0_GATE_VGA 10:10
+#define MODE0_GATE_VGA_OFF 0
+#define MODE0_GATE_VGA_ON 1
+#define MODE0_GATE_PWM 9:9
+#define MODE0_GATE_PWM_OFF 0
+#define MODE0_GATE_PWM_ON 1
+#define MODE0_GATE_I2C 8:8
+#define MODE0_GATE_I2C_OFF 0
+#define MODE0_GATE_I2C_ON 1
+#define MODE0_GATE_SSP 7:7
+#define MODE0_GATE_SSP_OFF 0
+#define MODE0_GATE_SSP_ON 1
+#define MODE0_GATE_GPIO 6:6
+#define MODE0_GATE_GPIO_OFF 0
+#define MODE0_GATE_GPIO_ON 1
+#define MODE0_GATE_ZVPORT 5:5
+#define MODE0_GATE_ZVPORT_OFF 0
+#define MODE0_GATE_ZVPORT_ON 1
+#define MODE0_GATE_CSC 4:4
+#define MODE0_GATE_CSC_OFF 0
+#define MODE0_GATE_CSC_ON 1
+#define MODE0_GATE_DE 3:3
+#define MODE0_GATE_DE_OFF 0
+#define MODE0_GATE_DE_ON 1
+#define MODE0_GATE_DISPLAY 2:2
+#define MODE0_GATE_DISPLAY_OFF 0
+#define MODE0_GATE_DISPLAY_ON 1
+#define MODE0_GATE_LOCALMEM 1:1
+#define MODE0_GATE_LOCALMEM_OFF 0
+#define MODE0_GATE_LOCALMEM_ON 1
+#define MODE0_GATE_DMA 0:0
+#define MODE0_GATE_DMA_OFF 0
+#define MODE0_GATE_DMA_ON 1
+
+#define MODE1_GATE 0x000048
+#define MODE1_GATE_MCLK 15:14
+#define MODE1_GATE_MCLK_112MHZ 0
+#define MODE1_GATE_MCLK_84MHZ 1
+#define MODE1_GATE_MCLK_56MHZ 2
+#define MODE1_GATE_MCLK_42MHZ 3
+#define MODE1_GATE_M2XCLK 13:12
+#define MODE1_GATE_M2XCLK_336MHZ 0
+#define MODE1_GATE_M2XCLK_168MHZ 1
+#define MODE1_GATE_M2XCLK_112MHZ 2
+#define MODE1_GATE_M2XCLK_84MHZ 3
+#define MODE1_GATE_VGA 10:10
+#define MODE1_GATE_VGA_OFF 0
+#define MODE1_GATE_VGA_ON 1
+#define MODE1_GATE_PWM 9:9
+#define MODE1_GATE_PWM_OFF 0
+#define MODE1_GATE_PWM_ON 1
+#define MODE1_GATE_I2C 8:8
+#define MODE1_GATE_I2C_OFF 0
+#define MODE1_GATE_I2C_ON 1
+#define MODE1_GATE_SSP 7:7
+#define MODE1_GATE_SSP_OFF 0
+#define MODE1_GATE_SSP_ON 1
+#define MODE1_GATE_GPIO 6:6
+#define MODE1_GATE_GPIO_OFF 0
+#define MODE1_GATE_GPIO_ON 1
+#define MODE1_GATE_ZVPORT 5:5
+#define MODE1_GATE_ZVPORT_OFF 0
+#define MODE1_GATE_ZVPORT_ON 1
+#define MODE1_GATE_CSC 4:4
+#define MODE1_GATE_CSC_OFF 0
+#define MODE1_GATE_CSC_ON 1
+#define MODE1_GATE_DE 3:3
+#define MODE1_GATE_DE_OFF 0
+#define MODE1_GATE_DE_ON 1
+#define MODE1_GATE_DISPLAY 2:2
+#define MODE1_GATE_DISPLAY_OFF 0
+#define MODE1_GATE_DISPLAY_ON 1
+#define MODE1_GATE_LOCALMEM 1:1
+#define MODE1_GATE_LOCALMEM_OFF 0
+#define MODE1_GATE_LOCALMEM_ON 1
+#define MODE1_GATE_DMA 0:0
+#define MODE1_GATE_DMA_OFF 0
+#define MODE1_GATE_DMA_ON 1
+
+#define POWER_MODE_CTRL 0x00004C
+#ifdef VALIDATION_CHIP
+ #define POWER_MODE_CTRL_336CLK 4:4
+ #define POWER_MODE_CTRL_336CLK_OFF 0
+ #define POWER_MODE_CTRL_336CLK_ON 1
+#endif
+#define POWER_MODE_CTRL_OSC_INPUT 3:3
+#define POWER_MODE_CTRL_OSC_INPUT_OFF 0
+#define POWER_MODE_CTRL_OSC_INPUT_ON 1
+#define POWER_MODE_CTRL_ACPI 2:2
+#define POWER_MODE_CTRL_ACPI_OFF 0
+#define POWER_MODE_CTRL_ACPI_ON 1
+#define POWER_MODE_CTRL_MODE 1:0
+#define POWER_MODE_CTRL_MODE_MODE0 0
+#define POWER_MODE_CTRL_MODE_MODE1 1
+#define POWER_MODE_CTRL_MODE_SLEEP 2
+
+#define PCI_MASTER_BASE 0x000050
+#define PCI_MASTER_BASE_ADDRESS 7:0
+
+#define DEVICE_ID 0x000054
+#define DEVICE_ID_DEVICE_ID 31:16
+#define DEVICE_ID_REVISION_ID 7:0
+
+#define PLL_CLK_COUNT 0x000058
+#define PLL_CLK_COUNT_COUNTER 15:0
+
+#define PANEL_PLL_CTRL 0x00005C
+#define PANEL_PLL_CTRL_BYPASS 18:18
+#define PANEL_PLL_CTRL_BYPASS_OFF 0
+#define PANEL_PLL_CTRL_BYPASS_ON 1
+#define PANEL_PLL_CTRL_POWER 17:17
+#define PANEL_PLL_CTRL_POWER_OFF 0
+#define PANEL_PLL_CTRL_POWER_ON 1
+#define PANEL_PLL_CTRL_INPUT 16:16
+#define PANEL_PLL_CTRL_INPUT_OSC 0
+#define PANEL_PLL_CTRL_INPUT_TESTCLK 1
+#ifdef VALIDATION_CHIP
+ #define PANEL_PLL_CTRL_OD 15:14
+#else
+ #define PANEL_PLL_CTRL_POD 15:14
+ #define PANEL_PLL_CTRL_OD 13:12
+#endif
+#define PANEL_PLL_CTRL_N 11:8
+#define PANEL_PLL_CTRL_M 7:0
+
+#define CRT_PLL_CTRL 0x000060
+#define CRT_PLL_CTRL_BYPASS 18:18
+#define CRT_PLL_CTRL_BYPASS_OFF 0
+#define CRT_PLL_CTRL_BYPASS_ON 1
+#define CRT_PLL_CTRL_POWER 17:17
+#define CRT_PLL_CTRL_POWER_OFF 0
+#define CRT_PLL_CTRL_POWER_ON 1
+#define CRT_PLL_CTRL_INPUT 16:16
+#define CRT_PLL_CTRL_INPUT_OSC 0
+#define CRT_PLL_CTRL_INPUT_TESTCLK 1
+#ifdef VALIDATION_CHIP
+ #define CRT_PLL_CTRL_OD 15:14
+#else
+ #define CRT_PLL_CTRL_POD 15:14
+ #define CRT_PLL_CTRL_OD 13:12
+#endif
+#define CRT_PLL_CTRL_N 11:8
+#define CRT_PLL_CTRL_M 7:0
+
+#define VGA_PLL0_CTRL 0x000064
+#define VGA_PLL0_CTRL_BYPASS 18:18
+#define VGA_PLL0_CTRL_BYPASS_OFF 0
+#define VGA_PLL0_CTRL_BYPASS_ON 1
+#define VGA_PLL0_CTRL_POWER 17:17
+#define VGA_PLL0_CTRL_POWER_OFF 0
+#define VGA_PLL0_CTRL_POWER_ON 1
+#define VGA_PLL0_CTRL_INPUT 16:16
+#define VGA_PLL0_CTRL_INPUT_OSC 0
+#define VGA_PLL0_CTRL_INPUT_TESTCLK 1
+#ifdef VALIDATION_CHIP
+ #define VGA_PLL0_CTRL_OD 15:14
+#else
+ #define VGA_PLL0_CTRL_POD 15:14
+ #define VGA_PLL0_CTRL_OD 13:12
+#endif
+#define VGA_PLL0_CTRL_N 11:8
+#define VGA_PLL0_CTRL_M 7:0
+
+#define VGA_PLL1_CTRL 0x000068
+#define VGA_PLL1_CTRL_BYPASS 18:18
+#define VGA_PLL1_CTRL_BYPASS_OFF 0
+#define VGA_PLL1_CTRL_BYPASS_ON 1
+#define VGA_PLL1_CTRL_POWER 17:17
+#define VGA_PLL1_CTRL_POWER_OFF 0
+#define VGA_PLL1_CTRL_POWER_ON 1
+#define VGA_PLL1_CTRL_INPUT 16:16
+#define VGA_PLL1_CTRL_INPUT_OSC 0
+#define VGA_PLL1_CTRL_INPUT_TESTCLK 1
+#ifdef VALIDATION_CHIP
+ #define VGA_PLL1_CTRL_OD 15:14
+#else
+ #define VGA_PLL1_CTRL_POD 15:14
+ #define VGA_PLL1_CTRL_OD 13:12
+#endif
+#define VGA_PLL1_CTRL_N 11:8
+#define VGA_PLL1_CTRL_M 7:0
+
+#define SCRATCH_DATA 0x00006c
+
+#ifndef VALIDATION_CHIP
+
+#define MXCLK_PLL_CTRL 0x000070
+#define MXCLK_PLL_CTRL_BYPASS 18:18
+#define MXCLK_PLL_CTRL_BYPASS_OFF 0
+#define MXCLK_PLL_CTRL_BYPASS_ON 1
+#define MXCLK_PLL_CTRL_POWER 17:17
+#define MXCLK_PLL_CTRL_POWER_OFF 0
+#define MXCLK_PLL_CTRL_POWER_ON 1
+#define MXCLK_PLL_CTRL_INPUT 16:16
+#define MXCLK_PLL_CTRL_INPUT_OSC 0
+#define MXCLK_PLL_CTRL_INPUT_TESTCLK 1
+#define MXCLK_PLL_CTRL_POD 15:14
+#define MXCLK_PLL_CTRL_OD 13:12
+#define MXCLK_PLL_CTRL_N 11:8
+#define MXCLK_PLL_CTRL_M 7:0
+
+#define VGA_CONFIGURATION 0x000088
+#define VGA_CONFIGURATION_USER_DEFINE 5:4
+#define VGA_CONFIGURATION_PLL 2:2
+#define VGA_CONFIGURATION_PLL_VGA 0
+#define VGA_CONFIGURATION_PLL_PANEL 1
+#define VGA_CONFIGURATION_MODE 1:1
+#define VGA_CONFIGURATION_MODE_TEXT 0
+#define VGA_CONFIGURATION_MODE_GRAPHIC 1
+
+#endif
+
+#define GPIO_DATA 0x010000
+#define GPIO_DATA_31 31:31
+#define GPIO_DATA_30 30:30
+#define GPIO_DATA_29 29:29
+#define GPIO_DATA_28 28:28
+#define GPIO_DATA_27 27:27
+#define GPIO_DATA_26 26:26
+#define GPIO_DATA_25 25:25
+#define GPIO_DATA_24 24:24
+#define GPIO_DATA_23 23:23
+#define GPIO_DATA_22 22:22
+#define GPIO_DATA_21 21:21
+#define GPIO_DATA_20 20:20
+#define GPIO_DATA_19 19:19
+#define GPIO_DATA_18 18:18
+#define GPIO_DATA_17 17:17
+#define GPIO_DATA_16 16:16
+#define GPIO_DATA_15 15:15
+#define GPIO_DATA_14 14:14
+#define GPIO_DATA_13 13:13
+#define GPIO_DATA_12 12:12
+#define GPIO_DATA_11 11:11
+#define GPIO_DATA_10 10:10
+#define GPIO_DATA_9 9:9
+#define GPIO_DATA_8 8:8
+#define GPIO_DATA_7 7:7
+#define GPIO_DATA_6 6:6
+#define GPIO_DATA_5 5:5
+#define GPIO_DATA_4 4:4
+#define GPIO_DATA_3 3:3
+#define GPIO_DATA_2 2:2
+#define GPIO_DATA_1 1:1
+#define GPIO_DATA_0 0:0
+
+#define GPIO_DATA_DIRECTION 0x010004
+#define GPIO_DATA_DIRECTION_31 31:31
+#define GPIO_DATA_DIRECTION_31_INPUT 0
+#define GPIO_DATA_DIRECTION_31_OUTPUT 1
+#define GPIO_DATA_DIRECTION_30 30:30
+#define GPIO_DATA_DIRECTION_30_INPUT 0
+#define GPIO_DATA_DIRECTION_30_OUTPUT 1
+#define GPIO_DATA_DIRECTION_29 29:29
+#define GPIO_DATA_DIRECTION_29_INPUT 0
+#define GPIO_DATA_DIRECTION_29_OUTPUT 1
+#define GPIO_DATA_DIRECTION_28 28:28
+#define GPIO_DATA_DIRECTION_28_INPUT 0
+#define GPIO_DATA_DIRECTION_28_OUTPUT 1
+#define GPIO_DATA_DIRECTION_27 27:27
+#define GPIO_DATA_DIRECTION_27_INPUT 0
+#define GPIO_DATA_DIRECTION_27_OUTPUT 1
+#define GPIO_DATA_DIRECTION_26 26:26
+#define GPIO_DATA_DIRECTION_26_INPUT 0
+#define GPIO_DATA_DIRECTION_26_OUTPUT 1
+#define GPIO_DATA_DIRECTION_25 25:25
+#define GPIO_DATA_DIRECTION_25_INPUT 0
+#define GPIO_DATA_DIRECTION_25_OUTPUT 1
+#define GPIO_DATA_DIRECTION_24 24:24
+#define GPIO_DATA_DIRECTION_24_INPUT 0
+#define GPIO_DATA_DIRECTION_24_OUTPUT 1
+#define GPIO_DATA_DIRECTION_23 23:23
+#define GPIO_DATA_DIRECTION_23_INPUT 0
+#define GPIO_DATA_DIRECTION_23_OUTPUT 1
+#define GPIO_DATA_DIRECTION_22 22:22
+#define GPIO_DATA_DIRECTION_22_INPUT 0
+#define GPIO_DATA_DIRECTION_22_OUTPUT 1
+#define GPIO_DATA_DIRECTION_21 21:21
+#define GPIO_DATA_DIRECTION_21_INPUT 0
+#define GPIO_DATA_DIRECTION_21_OUTPUT 1
+#define GPIO_DATA_DIRECTION_20 20:20
+#define GPIO_DATA_DIRECTION_20_INPUT 0
+#define GPIO_DATA_DIRECTION_20_OUTPUT 1
+#define GPIO_DATA_DIRECTION_19 19:19
+#define GPIO_DATA_DIRECTION_19_INPUT 0
+#define GPIO_DATA_DIRECTION_19_OUTPUT 1
+#define GPIO_DATA_DIRECTION_18 18:18
+#define GPIO_DATA_DIRECTION_18_INPUT 0
+#define GPIO_DATA_DIRECTION_18_OUTPUT 1
+#define GPIO_DATA_DIRECTION_17 17:17
+#define GPIO_DATA_DIRECTION_17_INPUT 0
+#define GPIO_DATA_DIRECTION_17_OUTPUT 1
+#define GPIO_DATA_DIRECTION_16 16:16
+#define GPIO_DATA_DIRECTION_16_INPUT 0
+#define GPIO_DATA_DIRECTION_16_OUTPUT 1
+#define GPIO_DATA_DIRECTION_15 15:15
+#define GPIO_DATA_DIRECTION_15_INPUT 0
+#define GPIO_DATA_DIRECTION_15_OUTPUT 1
+#define GPIO_DATA_DIRECTION_14 14:14
+#define GPIO_DATA_DIRECTION_14_INPUT 0
+#define GPIO_DATA_DIRECTION_14_OUTPUT 1
+#define GPIO_DATA_DIRECTION_13 13:13
+#define GPIO_DATA_DIRECTION_13_INPUT 0
+#define GPIO_DATA_DIRECTION_13_OUTPUT 1
+#define GPIO_DATA_DIRECTION_12 12:12
+#define GPIO_DATA_DIRECTION_12_INPUT 0
+#define GPIO_DATA_DIRECTION_12_OUTPUT 1
+#define GPIO_DATA_DIRECTION_11 11:11
+#define GPIO_DATA_DIRECTION_11_INPUT 0
+#define GPIO_DATA_DIRECTION_11_OUTPUT 1
+#define GPIO_DATA_DIRECTION_10 10:10
+#define GPIO_DATA_DIRECTION_10_INPUT 0
+#define GPIO_DATA_DIRECTION_10_OUTPUT 1
+#define GPIO_DATA_DIRECTION_9 9:9
+#define GPIO_DATA_DIRECTION_9_INPUT 0
+#define GPIO_DATA_DIRECTION_9_OUTPUT 1
+#define GPIO_DATA_DIRECTION_8 8:8
+#define GPIO_DATA_DIRECTION_8_INPUT 0
+#define GPIO_DATA_DIRECTION_8_OUTPUT 1
+#define GPIO_DATA_DIRECTION_7 7:7
+#define GPIO_DATA_DIRECTION_7_INPUT 0
+#define GPIO_DATA_DIRECTION_7_OUTPUT 1
+#define GPIO_DATA_DIRECTION_6 6:6
+#define GPIO_DATA_DIRECTION_6_INPUT 0
+#define GPIO_DATA_DIRECTION_6_OUTPUT 1
+#define GPIO_DATA_DIRECTION_5 5:5
+#define GPIO_DATA_DIRECTION_5_INPUT 0
+#define GPIO_DATA_DIRECTION_5_OUTPUT 1
+#define GPIO_DATA_DIRECTION_4 4:4
+#define GPIO_DATA_DIRECTION_4_INPUT 0
+#define GPIO_DATA_DIRECTION_4_OUTPUT 1
+#define GPIO_DATA_DIRECTION_3 3:3
+#define GPIO_DATA_DIRECTION_3_INPUT 0
+#define GPIO_DATA_DIRECTION_3_OUTPUT 1
+#define GPIO_DATA_DIRECTION_2 2:2
+#define GPIO_DATA_DIRECTION_2_INPUT 0
+#define GPIO_DATA_DIRECTION_2_OUTPUT 1
+#define GPIO_DATA_DIRECTION_1 131
+#define GPIO_DATA_DIRECTION_1_INPUT 0
+#define GPIO_DATA_DIRECTION_1_OUTPUT 1
+#define GPIO_DATA_DIRECTION_0 0:0
+#define GPIO_DATA_DIRECTION_0_INPUT 0
+#define GPIO_DATA_DIRECTION_0_OUTPUT 1
+
+#define GPIO_INTERRUPT_SETUP 0x010008
+#define GPIO_INTERRUPT_SETUP_TRIGGER_31 22:22
+#define GPIO_INTERRUPT_SETUP_TRIGGER_31_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_31_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_30 21:21
+#define GPIO_INTERRUPT_SETUP_TRIGGER_30_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_30_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_29 20:20
+#define GPIO_INTERRUPT_SETUP_TRIGGER_29_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_29_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_28 19:19
+#define GPIO_INTERRUPT_SETUP_TRIGGER_28_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_28_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_27 18:18
+#define GPIO_INTERRUPT_SETUP_TRIGGER_27_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_27_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_26 17:17
+#define GPIO_INTERRUPT_SETUP_TRIGGER_26_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_26_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_TRIGGER_25 16:16
+#define GPIO_INTERRUPT_SETUP_TRIGGER_25_EDGE 0
+#define GPIO_INTERRUPT_SETUP_TRIGGER_25_LEVEL 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_31 14:14
+#define GPIO_INTERRUPT_SETUP_ACTIVE_31_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_31_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_30 13:13
+#define GPIO_INTERRUPT_SETUP_ACTIVE_30_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_30_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_29 12:12
+#define GPIO_INTERRUPT_SETUP_ACTIVE_29_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_29_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_28 11:11
+#define GPIO_INTERRUPT_SETUP_ACTIVE_28_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_28_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_27 10:10
+#define GPIO_INTERRUPT_SETUP_ACTIVE_27_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_27_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_26 9:9
+#define GPIO_INTERRUPT_SETUP_ACTIVE_26_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_26_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ACTIVE_25 8:8
+#define GPIO_INTERRUPT_SETUP_ACTIVE_25_LOW 0
+#define GPIO_INTERRUPT_SETUP_ACTIVE_25_HIGH 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_31 6:6
+#define GPIO_INTERRUPT_SETUP_ENABLE_31_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_31_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_30 5:5
+#define GPIO_INTERRUPT_SETUP_ENABLE_30_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_30_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_29 4:4
+#define GPIO_INTERRUPT_SETUP_ENABLE_29_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_29_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_28 3:3
+#define GPIO_INTERRUPT_SETUP_ENABLE_28_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_28_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_27 2:2
+#define GPIO_INTERRUPT_SETUP_ENABLE_27_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_27_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_26 1:1
+#define GPIO_INTERRUPT_SETUP_ENABLE_26_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_26_INTERRUPT 1
+#define GPIO_INTERRUPT_SETUP_ENABLE_25 0:0
+#define GPIO_INTERRUPT_SETUP_ENABLE_25_GPIO 0
+#define GPIO_INTERRUPT_SETUP_ENABLE_25_INTERRUPT 1
+
+#define GPIO_INTERRUPT_STATUS 0x01000C
+#define GPIO_INTERRUPT_STATUS_31 22:22
+#define GPIO_INTERRUPT_STATUS_31_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_31_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_31_RESET 1
+#define GPIO_INTERRUPT_STATUS_30 21:21
+#define GPIO_INTERRUPT_STATUS_30_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_30_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_30_RESET 1
+#define GPIO_INTERRUPT_STATUS_29 20:20
+#define GPIO_INTERRUPT_STATUS_29_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_29_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_29_RESET 1
+#define GPIO_INTERRUPT_STATUS_28 19:19
+#define GPIO_INTERRUPT_STATUS_28_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_28_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_28_RESET 1
+#define GPIO_INTERRUPT_STATUS_27 18:18
+#define GPIO_INTERRUPT_STATUS_27_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_27_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_27_RESET 1
+#define GPIO_INTERRUPT_STATUS_26 17:17
+#define GPIO_INTERRUPT_STATUS_26_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_26_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_26_RESET 1
+#define GPIO_INTERRUPT_STATUS_25 16:16
+#define GPIO_INTERRUPT_STATUS_25_INACTIVE 0
+#define GPIO_INTERRUPT_STATUS_25_ACTIVE 1
+#define GPIO_INTERRUPT_STATUS_25_RESET 1
+
+
+#define PANEL_DISPLAY_CTRL 0x080000
+#define PANEL_DISPLAY_CTRL_RESERVED_1_MASK 31:30
+#define PANEL_DISPLAY_CTRL_RESERVED_1_MASK_DISABLE 0
+#define PANEL_DISPLAY_CTRL_RESERVED_1_MASK_ENABLE 3
+#define PANEL_DISPLAY_CTRL_SELECT 29:28
+#define PANEL_DISPLAY_CTRL_SELECT_PANEL 0
+#define PANEL_DISPLAY_CTRL_SELECT_VGA 1
+#define PANEL_DISPLAY_CTRL_SELECT_CRT 2
+#define PANEL_DISPLAY_CTRL_FPEN 27:27
+#define PANEL_DISPLAY_CTRL_FPEN_LOW 0
+#define PANEL_DISPLAY_CTRL_FPEN_HIGH 1
+#define PANEL_DISPLAY_CTRL_VBIASEN 26:26
+#define PANEL_DISPLAY_CTRL_VBIASEN_LOW 0
+#define PANEL_DISPLAY_CTRL_VBIASEN_HIGH 1
+#define PANEL_DISPLAY_CTRL_DATA 25:25
+#define PANEL_DISPLAY_CTRL_DATA_DISABLE 0
+#define PANEL_DISPLAY_CTRL_DATA_ENABLE 1
+#define PANEL_DISPLAY_CTRL_FPVDDEN 24:24
+#define PANEL_DISPLAY_CTRL_FPVDDEN_LOW 0
+#define PANEL_DISPLAY_CTRL_FPVDDEN_HIGH 1
+#define PANEL_DISPLAY_CTRL_RESERVED_2_MASK 23:20
+#define PANEL_DISPLAY_CTRL_RESERVED_2_MASK_DISABLE 0
+#define PANEL_DISPLAY_CTRL_RESERVED_2_MASK_ENABLE 15
+
+#define PANEL_DISPLAY_CTRL_TFT_DISP 19:18
+#define PANEL_DISPLAY_CTRL_TFT_DISP_24 0
+#define PANEL_DISPLAY_CTRL_TFT_DISP_36 1
+#define PANEL_DISPLAY_CTRL_TFT_DISP_18 2
+
+
+#define PANEL_DISPLAY_CTRL_DUAL_DISPLAY 19:19
+#define PANEL_DISPLAY_CTRL_DUAL_DISPLAY_DISABLE 0
+#define PANEL_DISPLAY_CTRL_DUAL_DISPLAY_ENABLE 1
+#define PANEL_DISPLAY_CTRL_DOUBLE_PIXEL 18:18
+#define PANEL_DISPLAY_CTRL_DOUBLE_PIXEL_DISABLE 0
+#define PANEL_DISPLAY_CTRL_DOUBLE_PIXEL_ENABLE 1
+#define PANEL_DISPLAY_CTRL_FIFO 17:16
+#define PANEL_DISPLAY_CTRL_FIFO_1 0
+#define PANEL_DISPLAY_CTRL_FIFO_3 1
+#define PANEL_DISPLAY_CTRL_FIFO_7 2
+#define PANEL_DISPLAY_CTRL_FIFO_11 3
+#define PANEL_DISPLAY_CTRL_RESERVED_3_MASK 15:15
+#define PANEL_DISPLAY_CTRL_RESERVED_3_MASK_DISABLE 0
+#define PANEL_DISPLAY_CTRL_RESERVED_3_MASK_ENABLE 1
+#define PANEL_DISPLAY_CTRL_CLOCK_PHASE 14:14
+#define PANEL_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_HIGH 0
+#define PANEL_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_LOW 1
+#define PANEL_DISPLAY_CTRL_VSYNC_PHASE 13:13
+#define PANEL_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_HIGH 0
+#define PANEL_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_LOW 1
+#define PANEL_DISPLAY_CTRL_HSYNC_PHASE 12:12
+#define PANEL_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_HIGH 0
+#define PANEL_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_LOW 1
+#define PANEL_DISPLAY_CTRL_VSYNC 11:11
+#define PANEL_DISPLAY_CTRL_VSYNC_ACTIVE_HIGH 0
+#define PANEL_DISPLAY_CTRL_VSYNC_ACTIVE_LOW 1
+#define PANEL_DISPLAY_CTRL_CAPTURE_TIMING 10:10
+#define PANEL_DISPLAY_CTRL_CAPTURE_TIMING_DISABLE 0
+#define PANEL_DISPLAY_CTRL_CAPTURE_TIMING_ENABLE 1
+#define PANEL_DISPLAY_CTRL_COLOR_KEY 9:9
+#define PANEL_DISPLAY_CTRL_COLOR_KEY_DISABLE 0
+#define PANEL_DISPLAY_CTRL_COLOR_KEY_ENABLE 1
+#define PANEL_DISPLAY_CTRL_TIMING 8:8
+#define PANEL_DISPLAY_CTRL_TIMING_DISABLE 0
+#define PANEL_DISPLAY_CTRL_TIMING_ENABLE 1
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR 7:7
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR_DOWN 0
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR_UP 1
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN 6:6
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DISABLE 0
+#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_ENABLE 1
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR 5:5
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR_RIGHT 0
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR_LEFT 1
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN 4:4
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DISABLE 0
+#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_ENABLE 1
+#define PANEL_DISPLAY_CTRL_GAMMA 3:3
+#define PANEL_DISPLAY_CTRL_GAMMA_DISABLE 0
+#define PANEL_DISPLAY_CTRL_GAMMA_ENABLE 1
+#define PANEL_DISPLAY_CTRL_PLANE 2:2
+#define PANEL_DISPLAY_CTRL_PLANE_DISABLE 0
+#define PANEL_DISPLAY_CTRL_PLANE_ENABLE 1
+#define PANEL_DISPLAY_CTRL_FORMAT 1:0
+#define PANEL_DISPLAY_CTRL_FORMAT_8 0
+#define PANEL_DISPLAY_CTRL_FORMAT_16 1
+#define PANEL_DISPLAY_CTRL_FORMAT_32 2
+
+#define PANEL_PAN_CTRL 0x080004
+#define PANEL_PAN_CTRL_VERTICAL_PAN 31:24
+#define PANEL_PAN_CTRL_VERTICAL_VSYNC 21:16
+#define PANEL_PAN_CTRL_HORIZONTAL_PAN 15:8
+#define PANEL_PAN_CTRL_HORIZONTAL_VSYNC 5:0
+
+#define PANEL_COLOR_KEY 0x080008
+#define PANEL_COLOR_KEY_MASK 31:16
+#define PANEL_COLOR_KEY_VALUE 15:0
+
+#define PANEL_FB_ADDRESS 0x08000C
+#define PANEL_FB_ADDRESS_STATUS 31:31
+#define PANEL_FB_ADDRESS_STATUS_CURRENT 0
+#define PANEL_FB_ADDRESS_STATUS_PENDING 1
+#define PANEL_FB_ADDRESS_EXT 27:27
+#define PANEL_FB_ADDRESS_EXT_LOCAL 0
+#define PANEL_FB_ADDRESS_EXT_EXTERNAL 1
+#define PANEL_FB_ADDRESS_ADDRESS 25:0
+
+#define PANEL_FB_WIDTH 0x080010
+#define PANEL_FB_WIDTH_WIDTH 29:16
+#define PANEL_FB_WIDTH_OFFSET 13:0
+
+#define PANEL_WINDOW_WIDTH 0x080014
+#define PANEL_WINDOW_WIDTH_WIDTH 27:16
+#define PANEL_WINDOW_WIDTH_X 11:0
+
+#define PANEL_WINDOW_HEIGHT 0x080018
+#define PANEL_WINDOW_HEIGHT_HEIGHT 27:16
+#define PANEL_WINDOW_HEIGHT_Y 11:0
+
+#define PANEL_PLANE_TL 0x08001C
+#define PANEL_PLANE_TL_TOP 26:16
+#define PANEL_PLANE_TL_LEFT 10:0
+
+#define PANEL_PLANE_BR 0x080020
+#define PANEL_PLANE_BR_BOTTOM 26:16
+#define PANEL_PLANE_BR_RIGHT 10:0
+
+#define PANEL_HORIZONTAL_TOTAL 0x080024
+#define PANEL_HORIZONTAL_TOTAL_TOTAL 27:16
+#define PANEL_HORIZONTAL_TOTAL_DISPLAY_END 11:0
+
+#define PANEL_HORIZONTAL_SYNC 0x080028
+#define PANEL_HORIZONTAL_SYNC_WIDTH 23:16
+#define PANEL_HORIZONTAL_SYNC_START 11:0
+
+#define PANEL_VERTICAL_TOTAL 0x08002C
+#define PANEL_VERTICAL_TOTAL_TOTAL 26:16
+#define PANEL_VERTICAL_TOTAL_DISPLAY_END 10:0
+
+#define PANEL_VERTICAL_SYNC 0x080030
+#define PANEL_VERTICAL_SYNC_HEIGHT 21:16
+#define PANEL_VERTICAL_SYNC_START 10:0
+
+#define PANEL_CURRENT_LINE 0x080034
+#define PANEL_CURRENT_LINE_LINE 10:0
+
+/* Video Control */
+
+#define VIDEO_DISPLAY_CTRL 0x080040
+#define VIDEO_DISPLAY_CTRL_LINE_BUFFER 18:18
+#define VIDEO_DISPLAY_CTRL_LINE_BUFFER_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_LINE_BUFFER_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_FIFO 17:16
+#define VIDEO_DISPLAY_CTRL_FIFO_1 0
+#define VIDEO_DISPLAY_CTRL_FIFO_3 1
+#define VIDEO_DISPLAY_CTRL_FIFO_7 2
+#define VIDEO_DISPLAY_CTRL_FIFO_11 3
+#define VIDEO_DISPLAY_CTRL_BUFFER 15:15
+#define VIDEO_DISPLAY_CTRL_BUFFER_0 0
+#define VIDEO_DISPLAY_CTRL_BUFFER_1 1
+#define VIDEO_DISPLAY_CTRL_CAPTURE 14:14
+#define VIDEO_DISPLAY_CTRL_CAPTURE_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_CAPTURE_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER 13:13
+#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_BYTE_SWAP 12:12
+#define VIDEO_DISPLAY_CTRL_BYTE_SWAP_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_BYTE_SWAP_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE 11:11
+#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE_NORMAL 0
+#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE_HALF 1
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE 10:10
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE_NORMAL 0
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE_HALF 1
+#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE 9:9
+#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE_REPLICATE 0
+#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE_INTERPOLATE 1
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE 8:8
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE_REPLICATE 0
+#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE_INTERPOLATE 1
+#define VIDEO_DISPLAY_CTRL_PIXEL 7:4
+#define VIDEO_DISPLAY_CTRL_GAMMA 3:3
+#define VIDEO_DISPLAY_CTRL_GAMMA_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_GAMMA_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_PLANE 2:2
+#define VIDEO_DISPLAY_CTRL_PLANE_DISABLE 0
+#define VIDEO_DISPLAY_CTRL_PLANE_ENABLE 1
+#define VIDEO_DISPLAY_CTRL_FORMAT 1:0
+#define VIDEO_DISPLAY_CTRL_FORMAT_8 0
+#define VIDEO_DISPLAY_CTRL_FORMAT_16 1
+#define VIDEO_DISPLAY_CTRL_FORMAT_32 2
+#define VIDEO_DISPLAY_CTRL_FORMAT_YUV 3
+
+#define VIDEO_FB_0_ADDRESS 0x080044
+#define VIDEO_FB_0_ADDRESS_STATUS 31:31
+#define VIDEO_FB_0_ADDRESS_STATUS_CURRENT 0
+#define VIDEO_FB_0_ADDRESS_STATUS_PENDING 1
+#define VIDEO_FB_0_ADDRESS_EXT 27:27
+#define VIDEO_FB_0_ADDRESS_EXT_LOCAL 0
+#define VIDEO_FB_0_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_FB_0_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_FB_WIDTH 0x080048
+#define VIDEO_FB_WIDTH_WIDTH 29:16
+#define VIDEO_FB_WIDTH_OFFSET 13:0
+
+#define VIDEO_FB_0_LAST_ADDRESS 0x08004C
+#define VIDEO_FB_0_LAST_ADDRESS_EXT 27:27
+#define VIDEO_FB_0_LAST_ADDRESS_EXT_LOCAL 0
+#define VIDEO_FB_0_LAST_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_FB_0_LAST_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_PLANE_TL 0x080050
+#define VIDEO_PLANE_TL_TOP 26:16
+#define VIDEO_PLANE_TL_LEFT 10:0
+
+#define VIDEO_PLANE_BR 0x080054
+#define VIDEO_PLANE_BR_BOTTOM 26:16
+#define VIDEO_PLANE_BR_RIGHT 10:0
+
+#define VIDEO_SCALE 0x080058
+#define VIDEO_SCALE_VERTICAL_MODE 31:31
+#define VIDEO_SCALE_VERTICAL_MODE_EXPAND 0
+#define VIDEO_SCALE_VERTICAL_MODE_SHRINK 1
+#define VIDEO_SCALE_VERTICAL_SCALE 27:16
+#define VIDEO_SCALE_HORIZONTAL_MODE 15:15
+#define VIDEO_SCALE_HORIZONTAL_MODE_EXPAND 0
+#define VIDEO_SCALE_HORIZONTAL_MODE_SHRINK 1
+#define VIDEO_SCALE_HORIZONTAL_SCALE 11:0
+
+#define VIDEO_INITIAL_SCALE 0x08005C
+#define VIDEO_INITIAL_SCALE_FB_1 27:16
+#define VIDEO_INITIAL_SCALE_FB_0 11:0
+
+#define VIDEO_YUV_CONSTANTS 0x080060
+#define VIDEO_YUV_CONSTANTS_Y 31:24
+#define VIDEO_YUV_CONSTANTS_R 23:16
+#define VIDEO_YUV_CONSTANTS_G 15:8
+#define VIDEO_YUV_CONSTANTS_B 7:0
+
+#define VIDEO_FB_1_ADDRESS 0x080064
+#define VIDEO_FB_1_ADDRESS_STATUS 31:31
+#define VIDEO_FB_1_ADDRESS_STATUS_CURRENT 0
+#define VIDEO_FB_1_ADDRESS_STATUS_PENDING 1
+#define VIDEO_FB_1_ADDRESS_EXT 27:27
+#define VIDEO_FB_1_ADDRESS_EXT_LOCAL 0
+#define VIDEO_FB_1_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_FB_1_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_FB_1_LAST_ADDRESS 0x080068
+#define VIDEO_FB_1_LAST_ADDRESS_EXT 27:27
+#define VIDEO_FB_1_LAST_ADDRESS_EXT_LOCAL 0
+#define VIDEO_FB_1_LAST_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_FB_1_LAST_ADDRESS_ADDRESS 25:0
+
+/* Video Alpha Control */
+
+#define VIDEO_ALPHA_DISPLAY_CTRL 0x080080
+#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT 28:28
+#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT_PER_PIXEL 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT_ALPHA 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_ALPHA 27:24
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO 17:16
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_1 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_3 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_7 2
+#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_11 3
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE 11:11
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE_NORMAL 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE_HALF 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE 10:10
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE_NORMAL 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE_HALF 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE 9:9
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE_REPLICATE 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE_INTERPOLATE 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE 8:8
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE_REPLICATE 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE_INTERPOLATE 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_PIXEL 7:4
+#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY 3:3
+#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY_DISABLE 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY_ENABLE 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_PLANE 2:2
+#define VIDEO_ALPHA_DISPLAY_CTRL_PLANE_DISABLE 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_PLANE_ENABLE 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT 1:0
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_8 0
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_16 1
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4 2
+#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4 3
+
+#define VIDEO_ALPHA_FB_ADDRESS 0x080084
+#define VIDEO_ALPHA_FB_ADDRESS_STATUS 31:31
+#define VIDEO_ALPHA_FB_ADDRESS_STATUS_CURRENT 0
+#define VIDEO_ALPHA_FB_ADDRESS_STATUS_PENDING 1
+#define VIDEO_ALPHA_FB_ADDRESS_EXT 27:27
+#define VIDEO_ALPHA_FB_ADDRESS_EXT_LOCAL 0
+#define VIDEO_ALPHA_FB_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_ALPHA_FB_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_ALPHA_FB_WIDTH 0x080088
+#define VIDEO_ALPHA_FB_WIDTH_WIDTH 29:16
+#define VIDEO_ALPHA_FB_WIDTH_OFFSET 13:0
+
+#define VIDEO_ALPHA_FB_LAST_ADDRESS 0x08008C
+#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT 27:27
+#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT_LOCAL 0
+#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT_EXTERNAL 1
+#define VIDEO_ALPHA_FB_LAST_ADDRESS_ADDRESS 25:0
+
+#define VIDEO_ALPHA_PLANE_TL 0x080090
+#define VIDEO_ALPHA_PLANE_TL_TOP 26:16
+#define VIDEO_ALPHA_PLANE_TL_LEFT 10:0
+
+#define VIDEO_ALPHA_PLANE_BR 0x080094
+#define VIDEO_ALPHA_PLANE_BR_BOTTOM 26:16
+#define VIDEO_ALPHA_PLANE_BR_RIGHT 10:0
+
+#define VIDEO_ALPHA_SCALE 0x080098
+#define VIDEO_ALPHA_SCALE_VERTICAL_MODE 31:31
+#define VIDEO_ALPHA_SCALE_VERTICAL_MODE_EXPAND 0
+#define VIDEO_ALPHA_SCALE_VERTICAL_MODE_SHRINK 1
+#define VIDEO_ALPHA_SCALE_VERTICAL_SCALE 27:16
+#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE 15:15
+#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE_EXPAND 0
+#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE_SHRINK 1
+#define VIDEO_ALPHA_SCALE_HORIZONTAL_SCALE 11:0
+
+#define VIDEO_ALPHA_INITIAL_SCALE 0x08009C
+#define VIDEO_ALPHA_INITIAL_SCALE_VERTICAL 27:16
+#define VIDEO_ALPHA_INITIAL_SCALE_HORIZONTAL 11:0
+
+#define VIDEO_ALPHA_CHROMA_KEY 0x0800A0
+#define VIDEO_ALPHA_CHROMA_KEY_MASK 31:16
+#define VIDEO_ALPHA_CHROMA_KEY_VALUE 15:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_01 0x0800A4
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_1 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_0 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_23 0x0800A8
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_3 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_2 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_45 0x0800AC
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_5 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_4 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_67 0x0800B0
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_7 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_6 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_89 0x0800B4
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_9 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_8 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB 0x0800B8
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD 0x0800BC
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_BLUE 4:0
+
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF 0x0800C0
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F 31:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_RED 31:27
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_GREEN 26:21
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_BLUE 20:16
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E 15:0
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_RED 15:11
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_GREEN 10:5
+#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_BLUE 4:0
+
+/* Panel Cursor Control */
+
+#define PANEL_HWC_ADDRESS 0x0800F0
+#define PANEL_HWC_ADDRESS_ENABLE 31:31
+#define PANEL_HWC_ADDRESS_ENABLE_DISABLE 0
+#define PANEL_HWC_ADDRESS_ENABLE_ENABLE 1
+#define PANEL_HWC_ADDRESS_EXT 27:27
+#define PANEL_HWC_ADDRESS_EXT_LOCAL 0
+#define PANEL_HWC_ADDRESS_EXT_EXTERNAL 1
+#define PANEL_HWC_ADDRESS_ADDRESS 25:0
+
+#define PANEL_HWC_LOCATION 0x0800F4
+#define PANEL_HWC_LOCATION_TOP 27:27
+#define PANEL_HWC_LOCATION_TOP_INSIDE 0
+#define PANEL_HWC_LOCATION_TOP_OUTSIDE 1
+#define PANEL_HWC_LOCATION_Y 26:16
+#define PANEL_HWC_LOCATION_LEFT 11:11
+#define PANEL_HWC_LOCATION_LEFT_INSIDE 0
+#define PANEL_HWC_LOCATION_LEFT_OUTSIDE 1
+#define PANEL_HWC_LOCATION_X 10:0
+
+#define PANEL_HWC_COLOR_12 0x0800F8
+#define PANEL_HWC_COLOR_12_2_RGB565 31:16
+#define PANEL_HWC_COLOR_12_1_RGB565 15:0
+
+#define PANEL_HWC_COLOR_3 0x0800FC
+#define PANEL_HWC_COLOR_3_RGB565 15:0
+
+/* Old Definitions +++ */
+#define PANEL_HWC_COLOR_01 0x0800F8
+#define PANEL_HWC_COLOR_01_1_RED 31:27
+#define PANEL_HWC_COLOR_01_1_GREEN 26:21
+#define PANEL_HWC_COLOR_01_1_BLUE 20:16
+#define PANEL_HWC_COLOR_01_0_RED 15:11
+#define PANEL_HWC_COLOR_01_0_GREEN 10:5
+#define PANEL_HWC_COLOR_01_0_BLUE 4:0
+
+#define PANEL_HWC_COLOR_2 0x0800FC
+#define PANEL_HWC_COLOR_2_RED 15:11
+#define PANEL_HWC_COLOR_2_GREEN 10:5
+#define PANEL_HWC_COLOR_2_BLUE 4:0
+/* Old Definitions --- */
+
+/* Alpha Control */
+
+#define ALPHA_DISPLAY_CTRL 0x080100
+#define ALPHA_DISPLAY_CTRL_SELECT 28:28
+#define ALPHA_DISPLAY_CTRL_SELECT_PER_PIXEL 0
+#define ALPHA_DISPLAY_CTRL_SELECT_ALPHA 1
+#define ALPHA_DISPLAY_CTRL_ALPHA 27:24
+#define ALPHA_DISPLAY_CTRL_FIFO 17:16
+#define ALPHA_DISPLAY_CTRL_FIFO_1 0
+#define ALPHA_DISPLAY_CTRL_FIFO_3 1
+#define ALPHA_DISPLAY_CTRL_FIFO_7 2
+#define ALPHA_DISPLAY_CTRL_FIFO_11 3
+#define ALPHA_DISPLAY_CTRL_PIXEL 7:4
+#define ALPHA_DISPLAY_CTRL_CHROMA_KEY 3:3
+#define ALPHA_DISPLAY_CTRL_CHROMA_KEY_DISABLE 0
+#define ALPHA_DISPLAY_CTRL_CHROMA_KEY_ENABLE 1
+#define ALPHA_DISPLAY_CTRL_PLANE 2:2
+#define ALPHA_DISPLAY_CTRL_PLANE_DISABLE 0
+#define ALPHA_DISPLAY_CTRL_PLANE_ENABLE 1
+#define ALPHA_DISPLAY_CTRL_FORMAT 1:0
+#define ALPHA_DISPLAY_CTRL_FORMAT_16 1
+#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4 2
+#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4 3
+
+#define ALPHA_FB_ADDRESS 0x080104
+#define ALPHA_FB_ADDRESS_STATUS 31:31
+#define ALPHA_FB_ADDRESS_STATUS_CURRENT 0
+#define ALPHA_FB_ADDRESS_STATUS_PENDING 1
+#define ALPHA_FB_ADDRESS_EXT 27:27
+#define ALPHA_FB_ADDRESS_EXT_LOCAL 0
+#define ALPHA_FB_ADDRESS_EXT_EXTERNAL 1
+#define ALPHA_FB_ADDRESS_ADDRESS 25:0
+
+#define ALPHA_FB_WIDTH 0x080108
+#define ALPHA_FB_WIDTH_WIDTH 29:16
+#define ALPHA_FB_WIDTH_OFFSET 13:0
+
+#define ALPHA_PLANE_TL 0x08010C
+#define ALPHA_PLANE_TL_TOP 26:16
+#define ALPHA_PLANE_TL_LEFT 10:0
+
+#define ALPHA_PLANE_BR 0x080110
+#define ALPHA_PLANE_BR_BOTTOM 26:16
+#define ALPHA_PLANE_BR_RIGHT 10:0
+
+#define ALPHA_CHROMA_KEY 0x080114
+#define ALPHA_CHROMA_KEY_MASK 31:16
+#define ALPHA_CHROMA_KEY_VALUE 15:0
+
+#define ALPHA_COLOR_LOOKUP_01 0x080118
+#define ALPHA_COLOR_LOOKUP_01_1 31:16
+#define ALPHA_COLOR_LOOKUP_01_1_RED 31:27
+#define ALPHA_COLOR_LOOKUP_01_1_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_01_1_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_01_0 15:0
+#define ALPHA_COLOR_LOOKUP_01_0_RED 15:11
+#define ALPHA_COLOR_LOOKUP_01_0_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_01_0_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_23 0x08011C
+#define ALPHA_COLOR_LOOKUP_23_3 31:16
+#define ALPHA_COLOR_LOOKUP_23_3_RED 31:27
+#define ALPHA_COLOR_LOOKUP_23_3_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_23_3_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_23_2 15:0
+#define ALPHA_COLOR_LOOKUP_23_2_RED 15:11
+#define ALPHA_COLOR_LOOKUP_23_2_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_23_2_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_45 0x080120
+#define ALPHA_COLOR_LOOKUP_45_5 31:16
+#define ALPHA_COLOR_LOOKUP_45_5_RED 31:27
+#define ALPHA_COLOR_LOOKUP_45_5_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_45_5_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_45_4 15:0
+#define ALPHA_COLOR_LOOKUP_45_4_RED 15:11
+#define ALPHA_COLOR_LOOKUP_45_4_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_45_4_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_67 0x080124
+#define ALPHA_COLOR_LOOKUP_67_7 31:16
+#define ALPHA_COLOR_LOOKUP_67_7_RED 31:27
+#define ALPHA_COLOR_LOOKUP_67_7_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_67_7_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_67_6 15:0
+#define ALPHA_COLOR_LOOKUP_67_6_RED 15:11
+#define ALPHA_COLOR_LOOKUP_67_6_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_67_6_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_89 0x080128
+#define ALPHA_COLOR_LOOKUP_89_9 31:16
+#define ALPHA_COLOR_LOOKUP_89_9_RED 31:27
+#define ALPHA_COLOR_LOOKUP_89_9_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_89_9_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_89_8 15:0
+#define ALPHA_COLOR_LOOKUP_89_8_RED 15:11
+#define ALPHA_COLOR_LOOKUP_89_8_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_89_8_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_AB 0x08012C
+#define ALPHA_COLOR_LOOKUP_AB_B 31:16
+#define ALPHA_COLOR_LOOKUP_AB_B_RED 31:27
+#define ALPHA_COLOR_LOOKUP_AB_B_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_AB_B_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_AB_A 15:0
+#define ALPHA_COLOR_LOOKUP_AB_A_RED 15:11
+#define ALPHA_COLOR_LOOKUP_AB_A_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_AB_A_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_CD 0x080130
+#define ALPHA_COLOR_LOOKUP_CD_D 31:16
+#define ALPHA_COLOR_LOOKUP_CD_D_RED 31:27
+#define ALPHA_COLOR_LOOKUP_CD_D_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_CD_D_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_CD_C 15:0
+#define ALPHA_COLOR_LOOKUP_CD_C_RED 15:11
+#define ALPHA_COLOR_LOOKUP_CD_C_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_CD_C_BLUE 4:0
+
+#define ALPHA_COLOR_LOOKUP_EF 0x080134
+#define ALPHA_COLOR_LOOKUP_EF_F 31:16
+#define ALPHA_COLOR_LOOKUP_EF_F_RED 31:27
+#define ALPHA_COLOR_LOOKUP_EF_F_GREEN 26:21
+#define ALPHA_COLOR_LOOKUP_EF_F_BLUE 20:16
+#define ALPHA_COLOR_LOOKUP_EF_E 15:0
+#define ALPHA_COLOR_LOOKUP_EF_E_RED 15:11
+#define ALPHA_COLOR_LOOKUP_EF_E_GREEN 10:5
+#define ALPHA_COLOR_LOOKUP_EF_E_BLUE 4:0
+
+/* CRT Graphics Control */
+
+#define CRT_DISPLAY_CTRL 0x080200
+#define CRT_DISPLAY_CTRL_RESERVED_1_MASK 31:27
+#define CRT_DISPLAY_CTRL_RESERVED_1_MASK_DISABLE 0
+#define CRT_DISPLAY_CTRL_RESERVED_1_MASK_ENABLE 0x1F
+
+/* SM750LE definition */
+#define CRT_DISPLAY_CTRL_DPMS 31:30
+#define CRT_DISPLAY_CTRL_DPMS_0 0
+#define CRT_DISPLAY_CTRL_DPMS_1 1
+#define CRT_DISPLAY_CTRL_DPMS_2 2
+#define CRT_DISPLAY_CTRL_DPMS_3 3
+#define CRT_DISPLAY_CTRL_CLK 29:27
+#define CRT_DISPLAY_CTRL_CLK_PLL25 0
+#define CRT_DISPLAY_CTRL_CLK_PLL41 1
+#define CRT_DISPLAY_CTRL_CLK_PLL62 2
+#define CRT_DISPLAY_CTRL_CLK_PLL65 3
+#define CRT_DISPLAY_CTRL_CLK_PLL74 4
+#define CRT_DISPLAY_CTRL_CLK_PLL80 5
+#define CRT_DISPLAY_CTRL_CLK_PLL108 6
+#define CRT_DISPLAY_CTRL_CLK_RESERVED 7
+#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC 26:26
+#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_DISABLE 1
+#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_ENABLE 0
+
+
+#define CRT_DISPLAY_CTRL_RESERVED_2_MASK 25:24
+#define CRT_DISPLAY_CTRL_RESERVED_2_MASK_ENABLE 3
+#define CRT_DISPLAY_CTRL_RESERVED_2_MASK_DISABLE 0
+
+/* SM750LE definition */
+#define CRT_DISPLAY_CTRL_CRTSELECT 25:25
+#define CRT_DISPLAY_CTRL_CRTSELECT_VGA 0
+#define CRT_DISPLAY_CTRL_CRTSELECT_CRT 1
+#define CRT_DISPLAY_CTRL_RGBBIT 24:24
+#define CRT_DISPLAY_CTRL_RGBBIT_24BIT 0
+#define CRT_DISPLAY_CTRL_RGBBIT_12BIT 1
+
+
+#define CRT_DISPLAY_CTRL_RESERVED_3_MASK 15:15
+#define CRT_DISPLAY_CTRL_RESERVED_3_MASK_DISABLE 0
+#define CRT_DISPLAY_CTRL_RESERVED_3_MASK_ENABLE 1
+
+#define CRT_DISPLAY_CTRL_RESERVED_4_MASK 9:9
+#define CRT_DISPLAY_CTRL_RESERVED_4_MASK_DISABLE 0
+#define CRT_DISPLAY_CTRL_RESERVED_4_MASK_ENABLE 1
+
+#ifndef VALIDATION_CHIP
+ #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC 26:26
+ #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_DISABLE 1
+ #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_ENABLE 0
+ #define CRT_DISPLAY_CTRL_CENTERING 24:24
+ #define CRT_DISPLAY_CTRL_CENTERING_DISABLE 0
+ #define CRT_DISPLAY_CTRL_CENTERING_ENABLE 1
+#endif
+#define CRT_DISPLAY_CTRL_LOCK_TIMING 23:23
+#define CRT_DISPLAY_CTRL_LOCK_TIMING_DISABLE 0
+#define CRT_DISPLAY_CTRL_LOCK_TIMING_ENABLE 1
+#define CRT_DISPLAY_CTRL_EXPANSION 22:22
+#define CRT_DISPLAY_CTRL_EXPANSION_DISABLE 0
+#define CRT_DISPLAY_CTRL_EXPANSION_ENABLE 1
+#define CRT_DISPLAY_CTRL_VERTICAL_MODE 21:21
+#define CRT_DISPLAY_CTRL_VERTICAL_MODE_REPLICATE 0
+#define CRT_DISPLAY_CTRL_VERTICAL_MODE_INTERPOLATE 1
+#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE 20:20
+#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE_REPLICATE 0
+#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE_INTERPOLATE 1
+#define CRT_DISPLAY_CTRL_SELECT 19:18
+#define CRT_DISPLAY_CTRL_SELECT_PANEL 0
+#define CRT_DISPLAY_CTRL_SELECT_VGA 1
+#define CRT_DISPLAY_CTRL_SELECT_CRT 2
+#define CRT_DISPLAY_CTRL_FIFO 17:16
+#define CRT_DISPLAY_CTRL_FIFO_1 0
+#define CRT_DISPLAY_CTRL_FIFO_3 1
+#define CRT_DISPLAY_CTRL_FIFO_7 2
+#define CRT_DISPLAY_CTRL_FIFO_11 3
+#define CRT_DISPLAY_CTRL_CLOCK_PHASE 14:14
+#define CRT_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_HIGH 0
+#define CRT_DISPLAY_CTRL_CLOCK_PHASE_ACTIVE_LOW 1
+#define CRT_DISPLAY_CTRL_VSYNC_PHASE 13:13
+#define CRT_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_HIGH 0
+#define CRT_DISPLAY_CTRL_VSYNC_PHASE_ACTIVE_LOW 1
+#define CRT_DISPLAY_CTRL_HSYNC_PHASE 12:12
+#define CRT_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_HIGH 0
+#define CRT_DISPLAY_CTRL_HSYNC_PHASE_ACTIVE_LOW 1
+#define CRT_DISPLAY_CTRL_BLANK 10:10
+#define CRT_DISPLAY_CTRL_BLANK_OFF 0
+#define CRT_DISPLAY_CTRL_BLANK_ON 1
+#define CRT_DISPLAY_CTRL_TIMING 8:8
+#define CRT_DISPLAY_CTRL_TIMING_DISABLE 0
+#define CRT_DISPLAY_CTRL_TIMING_ENABLE 1
+#define CRT_DISPLAY_CTRL_PIXEL 7:4
+#define CRT_DISPLAY_CTRL_GAMMA 3:3
+#define CRT_DISPLAY_CTRL_GAMMA_DISABLE 0
+#define CRT_DISPLAY_CTRL_GAMMA_ENABLE 1
+#define CRT_DISPLAY_CTRL_PLANE 2:2
+#define CRT_DISPLAY_CTRL_PLANE_DISABLE 0
+#define CRT_DISPLAY_CTRL_PLANE_ENABLE 1
+#define CRT_DISPLAY_CTRL_FORMAT 1:0
+#define CRT_DISPLAY_CTRL_FORMAT_8 0
+#define CRT_DISPLAY_CTRL_FORMAT_16 1
+#define CRT_DISPLAY_CTRL_FORMAT_32 2
+#define CRT_DISPLAY_CTRL_RESERVED_BITS_MASK 0xFF000200
+
+#define CRT_FB_ADDRESS 0x080204
+#define CRT_FB_ADDRESS_STATUS 31:31
+#define CRT_FB_ADDRESS_STATUS_CURRENT 0
+#define CRT_FB_ADDRESS_STATUS_PENDING 1
+#define CRT_FB_ADDRESS_EXT 27:27
+#define CRT_FB_ADDRESS_EXT_LOCAL 0
+#define CRT_FB_ADDRESS_EXT_EXTERNAL 1
+#define CRT_FB_ADDRESS_ADDRESS 25:0
+
+#define CRT_FB_WIDTH 0x080208
+#define CRT_FB_WIDTH_WIDTH 29:16
+#define CRT_FB_WIDTH_OFFSET 13:0
+
+#define CRT_HORIZONTAL_TOTAL 0x08020C
+#define CRT_HORIZONTAL_TOTAL_TOTAL 27:16
+#define CRT_HORIZONTAL_TOTAL_DISPLAY_END 11:0
+
+#define CRT_HORIZONTAL_SYNC 0x080210
+#define CRT_HORIZONTAL_SYNC_WIDTH 23:16
+#define CRT_HORIZONTAL_SYNC_START 11:0
+
+#define CRT_VERTICAL_TOTAL 0x080214
+#define CRT_VERTICAL_TOTAL_TOTAL 26:16
+#define CRT_VERTICAL_TOTAL_DISPLAY_END 10:0
+
+#define CRT_VERTICAL_SYNC 0x080218
+#define CRT_VERTICAL_SYNC_HEIGHT 21:16
+#define CRT_VERTICAL_SYNC_START 10:0
+
+#define CRT_SIGNATURE_ANALYZER 0x08021C
+#define CRT_SIGNATURE_ANALYZER_STATUS 31:16
+#define CRT_SIGNATURE_ANALYZER_ENABLE 3:3
+#define CRT_SIGNATURE_ANALYZER_ENABLE_DISABLE 0
+#define CRT_SIGNATURE_ANALYZER_ENABLE_ENABLE 1
+#define CRT_SIGNATURE_ANALYZER_RESET 2:2
+#define CRT_SIGNATURE_ANALYZER_RESET_NORMAL 0
+#define CRT_SIGNATURE_ANALYZER_RESET_RESET 1
+#define CRT_SIGNATURE_ANALYZER_SOURCE 1:0
+#define CRT_SIGNATURE_ANALYZER_SOURCE_RED 0
+#define CRT_SIGNATURE_ANALYZER_SOURCE_GREEN 1
+#define CRT_SIGNATURE_ANALYZER_SOURCE_BLUE 2
+
+#define CRT_CURRENT_LINE 0x080220
+#define CRT_CURRENT_LINE_LINE 10:0
+
+#define CRT_MONITOR_DETECT 0x080224
+#define CRT_MONITOR_DETECT_VALUE 25:25
+#define CRT_MONITOR_DETECT_VALUE_DISABLE 0
+#define CRT_MONITOR_DETECT_VALUE_ENABLE 1
+#define CRT_MONITOR_DETECT_ENABLE 24:24
+#define CRT_MONITOR_DETECT_ENABLE_DISABLE 0
+#define CRT_MONITOR_DETECT_ENABLE_ENABLE 1
+#define CRT_MONITOR_DETECT_RED 23:16
+#define CRT_MONITOR_DETECT_GREEN 15:8
+#define CRT_MONITOR_DETECT_BLUE 7:0
+
+#define CRT_SCALE 0x080228
+#define CRT_SCALE_VERTICAL_MODE 31:31
+#define CRT_SCALE_VERTICAL_MODE_EXPAND 0
+#define CRT_SCALE_VERTICAL_MODE_SHRINK 1
+#define CRT_SCALE_VERTICAL_SCALE 27:16
+#define CRT_SCALE_HORIZONTAL_MODE 15:15
+#define CRT_SCALE_HORIZONTAL_MODE_EXPAND 0
+#define CRT_SCALE_HORIZONTAL_MODE_SHRINK 1
+#define CRT_SCALE_HORIZONTAL_SCALE 11:0
+
+/* CRT Cursor Control */
+
+#define CRT_HWC_ADDRESS 0x080230
+#define CRT_HWC_ADDRESS_ENABLE 31:31
+#define CRT_HWC_ADDRESS_ENABLE_DISABLE 0
+#define CRT_HWC_ADDRESS_ENABLE_ENABLE 1
+#define CRT_HWC_ADDRESS_EXT 27:27
+#define CRT_HWC_ADDRESS_EXT_LOCAL 0
+#define CRT_HWC_ADDRESS_EXT_EXTERNAL 1
+#define CRT_HWC_ADDRESS_ADDRESS 25:0
+
+#define CRT_HWC_LOCATION 0x080234
+#define CRT_HWC_LOCATION_TOP 27:27
+#define CRT_HWC_LOCATION_TOP_INSIDE 0
+#define CRT_HWC_LOCATION_TOP_OUTSIDE 1
+#define CRT_HWC_LOCATION_Y 26:16
+#define CRT_HWC_LOCATION_LEFT 11:11
+#define CRT_HWC_LOCATION_LEFT_INSIDE 0
+#define CRT_HWC_LOCATION_LEFT_OUTSIDE 1
+#define CRT_HWC_LOCATION_X 10:0
+
+#define CRT_HWC_COLOR_12 0x080238
+#define CRT_HWC_COLOR_12_2_RGB565 31:16
+#define CRT_HWC_COLOR_12_1_RGB565 15:0
+
+#define CRT_HWC_COLOR_3 0x08023C
+#define CRT_HWC_COLOR_3_RGB565 15:0
+
+/* Old Definitions +++. Need to be removed if no application use it. */
+#if 0
+ #define CRT_HWC_COLOR_01 0x080238
+ #define CRT_HWC_COLOR_01_1_RED 31:27
+ #define CRT_HWC_COLOR_01_1_GREEN 26:21
+ #define CRT_HWC_COLOR_01_1_BLUE 20:16
+ #define CRT_HWC_COLOR_01_0_RED 15:11
+ #define CRT_HWC_COLOR_01_0_GREEN 10:5
+ #define CRT_HWC_COLOR_01_0_BLUE 4:0
+
+ #define CRT_HWC_COLOR_2 0x08023C
+ #define CRT_HWC_COLOR_2_RED 15:11
+ #define CRT_HWC_COLOR_2_GREEN 10:5
+ #define CRT_HWC_COLOR_2_BLUE 4:0
+#endif
+/* Old Definitions --- */
+
+/* This vertical expansion below start at 0x080240 ~ 0x080264 */
+#define CRT_VERTICAL_EXPANSION 0x080240
+#ifndef VALIDATION_CHIP
+ #define CRT_VERTICAL_CENTERING_VALUE 31:24
+#endif
+#define CRT_VERTICAL_EXPANSION_COMPARE_VALUE 23:16
+#define CRT_VERTICAL_EXPANSION_LINE_BUFFER 15:12
+#define CRT_VERTICAL_EXPANSION_SCALE_FACTOR 11:0
+
+/* This horizontal expansion below start at 0x080268 ~ 0x08027C */
+#define CRT_HORIZONTAL_EXPANSION 0x080268
+#ifndef VALIDATION_CHIP
+ #define CRT_HORIZONTAL_CENTERING_VALUE 31:24
+#endif
+#define CRT_HORIZONTAL_EXPANSION_COMPARE_VALUE 23:16
+#define CRT_HORIZONTAL_EXPANSION_SCALE_FACTOR 11:0
+
+#ifndef VALIDATION_CHIP
+ /* Auto Centering */
+ #define CRT_AUTO_CENTERING_TL 0x080280
+ #define CRT_AUTO_CENTERING_TL_TOP 26:16
+ #define CRT_AUTO_CENTERING_TL_LEFT 10:0
+
+ #define CRT_AUTO_CENTERING_BR 0x080284
+ #define CRT_AUTO_CENTERING_BR_BOTTOM 26:16
+ #define CRT_AUTO_CENTERING_BR_RIGHT 10:0
+#endif
+
+/* sm750le new register to control panel output */
+#define DISPLAY_CONTROL_750LE 0x80288
+/* Palette RAM */
+
+/* Panel Pallete register starts at 0x080400 ~ 0x0807FC */
+#define PANEL_PALETTE_RAM 0x080400
+
+/* Panel Pallete register starts at 0x080C00 ~ 0x080FFC */
+#define CRT_PALETTE_RAM 0x080C00
+
+/* 2D registers
+ * move their defination into general lynx_accel.h file
+ * because all smi graphic chip share the same drawing engine
+ * register format */
+#if 0
+#define DE_SOURCE 0x100000
+#define DE_SOURCE_WRAP 31:31
+#define DE_SOURCE_WRAP_DISABLE 0
+#define DE_SOURCE_WRAP_ENABLE 1
+
+/*
+ * The following definitions are used in different setting
+ */
+
+/* Use these definitions in XY addressing mode or linear addressing mode. */
+#define DE_SOURCE_X_K1 27:16
+#define DE_SOURCE_Y_K2 11:0
+
+/* Use this definition in host write mode for mono. The Y_K2 is not used
+ in host write mode. */
+#define DE_SOURCE_X_K1_MONO 20:16
+
+/* Use these definitions in Bresenham line drawing mode. */
+#define DE_SOURCE_X_K1_LINE 29:16
+#define DE_SOURCE_Y_K2_LINE 13:0
+
+#define DE_DESTINATION 0x100004
+#define DE_DESTINATION_WRAP 31:31
+#define DE_DESTINATION_WRAP_DISABLE 0
+#define DE_DESTINATION_WRAP_ENABLE 1
+#if 1
+ #define DE_DESTINATION_X 27:16
+ #define DE_DESTINATION_Y 11:0
+#else
+ #define DE_DESTINATION_X 28:16
+ #define DE_DESTINATION_Y 15:0
+#endif
+
+#define DE_DIMENSION 0x100008
+#define DE_DIMENSION_X 28:16
+#define DE_DIMENSION_Y_ET 15:0
+
+#define DE_CONTROL 0x10000C
+#define DE_CONTROL_STATUS 31:31
+#define DE_CONTROL_STATUS_STOP 0
+#define DE_CONTROL_STATUS_START 1
+#define DE_CONTROL_PATTERN 30:30
+#define DE_CONTROL_PATTERN_MONO 0
+#define DE_CONTROL_PATTERN_COLOR 1
+#define DE_CONTROL_UPDATE_DESTINATION_X 29:29
+#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0
+#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1
+#define DE_CONTROL_QUICK_START 28:28
+#define DE_CONTROL_QUICK_START_DISABLE 0
+#define DE_CONTROL_QUICK_START_ENABLE 1
+#define DE_CONTROL_DIRECTION 27:27
+#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0
+#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1
+#define DE_CONTROL_MAJOR 26:26
+#define DE_CONTROL_MAJOR_X 0
+#define DE_CONTROL_MAJOR_Y 1
+#define DE_CONTROL_STEP_X 25:25
+#define DE_CONTROL_STEP_X_POSITIVE 0
+#define DE_CONTROL_STEP_X_NEGATIVE 1
+#define DE_CONTROL_STEP_Y 24:24
+#define DE_CONTROL_STEP_Y_POSITIVE 0
+#define DE_CONTROL_STEP_Y_NEGATIVE 1
+#define DE_CONTROL_STRETCH 23:23
+#define DE_CONTROL_STRETCH_DISABLE 0
+#define DE_CONTROL_STRETCH_ENABLE 1
+#define DE_CONTROL_HOST 22:22
+#define DE_CONTROL_HOST_COLOR 0
+#define DE_CONTROL_HOST_MONO 1
+#define DE_CONTROL_LAST_PIXEL 21:21
+#define DE_CONTROL_LAST_PIXEL_OFF 0
+#define DE_CONTROL_LAST_PIXEL_ON 1
+#define DE_CONTROL_COMMAND 20:16
+#define DE_CONTROL_COMMAND_BITBLT 0
+#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1
+#define DE_CONTROL_COMMAND_DE_TILE 2
+#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3
+#define DE_CONTROL_COMMAND_ALPHA_BLEND 4
+#define DE_CONTROL_COMMAND_RLE_STRIP 5
+#define DE_CONTROL_COMMAND_SHORT_STROKE 6
+#define DE_CONTROL_COMMAND_LINE_DRAW 7
+#define DE_CONTROL_COMMAND_HOST_WRITE 8
+#define DE_CONTROL_COMMAND_HOST_READ 9
+#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10
+#define DE_CONTROL_COMMAND_ROTATE 11
+#define DE_CONTROL_COMMAND_FONT 12
+#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15
+#define DE_CONTROL_ROP_SELECT 15:15
+#define DE_CONTROL_ROP_SELECT_ROP3 0
+#define DE_CONTROL_ROP_SELECT_ROP2 1
+#define DE_CONTROL_ROP2_SOURCE 14:14
+#define DE_CONTROL_ROP2_SOURCE_BITMAP 0
+#define DE_CONTROL_ROP2_SOURCE_PATTERN 1
+#define DE_CONTROL_MONO_DATA 13:12
+#define DE_CONTROL_MONO_DATA_NOT_PACKED 0
+#define DE_CONTROL_MONO_DATA_8_PACKED 1
+#define DE_CONTROL_MONO_DATA_16_PACKED 2
+#define DE_CONTROL_MONO_DATA_32_PACKED 3
+#define DE_CONTROL_REPEAT_ROTATE 11:11
+#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0
+#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1
+#define DE_CONTROL_TRANSPARENCY_MATCH 10:10
+#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0
+#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1
+#define DE_CONTROL_TRANSPARENCY_SELECT 9:9
+#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0
+#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1
+#define DE_CONTROL_TRANSPARENCY 8:8
+#define DE_CONTROL_TRANSPARENCY_DISABLE 0
+#define DE_CONTROL_TRANSPARENCY_ENABLE 1
+#define DE_CONTROL_ROP 7:0
+
+/* Pseudo fields. */
+
+#define DE_CONTROL_SHORT_STROKE_DIR 27:24
+#define DE_CONTROL_SHORT_STROKE_DIR_225 0
+#define DE_CONTROL_SHORT_STROKE_DIR_135 1
+#define DE_CONTROL_SHORT_STROKE_DIR_315 2
+#define DE_CONTROL_SHORT_STROKE_DIR_45 3
+#define DE_CONTROL_SHORT_STROKE_DIR_270 4
+#define DE_CONTROL_SHORT_STROKE_DIR_90 5
+#define DE_CONTROL_SHORT_STROKE_DIR_180 8
+#define DE_CONTROL_SHORT_STROKE_DIR_0 10
+#define DE_CONTROL_ROTATION 25:24
+#define DE_CONTROL_ROTATION_0 0
+#define DE_CONTROL_ROTATION_270 1
+#define DE_CONTROL_ROTATION_90 2
+#define DE_CONTROL_ROTATION_180 3
+
+#define DE_PITCH 0x100010
+#define DE_PITCH_DESTINATION 28:16
+#define DE_PITCH_SOURCE 12:0
+
+#define DE_FOREGROUND 0x100014
+#define DE_FOREGROUND_COLOR 31:0
+
+#define DE_BACKGROUND 0x100018
+#define DE_BACKGROUND_COLOR 31:0
+
+#define DE_STRETCH_FORMAT 0x10001C
+#define DE_STRETCH_FORMAT_PATTERN_XY 30:30
+#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0
+#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1
+#define DE_STRETCH_FORMAT_PATTERN_Y 29:27
+#define DE_STRETCH_FORMAT_PATTERN_X 25:23
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21:20
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2
+#define DE_STRETCH_FORMAT_ADDRESSING 19:16
+#define DE_STRETCH_FORMAT_ADDRESSING_XY 0
+#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15
+#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11:0
+
+#define DE_COLOR_COMPARE 0x100020
+#define DE_COLOR_COMPARE_COLOR 23:0
+
+#define DE_COLOR_COMPARE_MASK 0x100024
+#define DE_COLOR_COMPARE_MASK_MASKS 23:0
+
+#define DE_MASKS 0x100028
+#define DE_MASKS_BYTE_MASK 31:16
+#define DE_MASKS_BIT_MASK 15:0
+
+#define DE_CLIP_TL 0x10002C
+#define DE_CLIP_TL_TOP 31:16
+#define DE_CLIP_TL_STATUS 13:13
+#define DE_CLIP_TL_STATUS_DISABLE 0
+#define DE_CLIP_TL_STATUS_ENABLE 1
+#define DE_CLIP_TL_INHIBIT 12:12
+#define DE_CLIP_TL_INHIBIT_OUTSIDE 0
+#define DE_CLIP_TL_INHIBIT_INSIDE 1
+#define DE_CLIP_TL_LEFT 11:0
+
+#define DE_CLIP_BR 0x100030
+#define DE_CLIP_BR_BOTTOM 31:16
+#define DE_CLIP_BR_RIGHT 12:0
+
+#define DE_MONO_PATTERN_LOW 0x100034
+#define DE_MONO_PATTERN_LOW_PATTERN 31:0
+
+#define DE_MONO_PATTERN_HIGH 0x100038
+#define DE_MONO_PATTERN_HIGH_PATTERN 31:0
+
+#define DE_WINDOW_WIDTH 0x10003C
+#define DE_WINDOW_WIDTH_DESTINATION 28:16
+#define DE_WINDOW_WIDTH_SOURCE 12:0
+
+#define DE_WINDOW_SOURCE_BASE 0x100040
+#define DE_WINDOW_SOURCE_BASE_EXT 27:27
+#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0
+#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1
+#define DE_WINDOW_SOURCE_BASE_CS 26:26
+#define DE_WINDOW_SOURCE_BASE_CS_0 0
+#define DE_WINDOW_SOURCE_BASE_CS_1 1
+#define DE_WINDOW_SOURCE_BASE_ADDRESS 25:0
+
+#define DE_WINDOW_DESTINATION_BASE 0x100044
+#define DE_WINDOW_DESTINATION_BASE_EXT 27:27
+#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0
+#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1
+#define DE_WINDOW_DESTINATION_BASE_CS 26:26
+#define DE_WINDOW_DESTINATION_BASE_CS_0 0
+#define DE_WINDOW_DESTINATION_BASE_CS_1 1
+#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25:0
+
+#define DE_ALPHA 0x100048
+#define DE_ALPHA_VALUE 7:0
+
+#define DE_WRAP 0x10004C
+#define DE_WRAP_X 31:16
+#define DE_WRAP_Y 15:0
+
+#define DE_STATUS 0x100050
+#define DE_STATUS_CSC 1:1
+#define DE_STATUS_CSC_CLEAR 0
+#define DE_STATUS_CSC_NOT_ACTIVE 0
+#define DE_STATUS_CSC_ACTIVE 1
+#define DE_STATUS_2D 0:0
+#define DE_STATUS_2D_CLEAR 0
+#define DE_STATUS_2D_NOT_ACTIVE 0
+#define DE_STATUS_2D_ACTIVE 1
+#endif
+/* Color Space Conversion registers. */
+
+#define CSC_Y_SOURCE_BASE 0x1000C8
+#define CSC_Y_SOURCE_BASE_EXT 27:27
+#define CSC_Y_SOURCE_BASE_EXT_LOCAL 0
+#define CSC_Y_SOURCE_BASE_EXT_EXTERNAL 1
+#define CSC_Y_SOURCE_BASE_CS 26:26
+#define CSC_Y_SOURCE_BASE_CS_0 0
+#define CSC_Y_SOURCE_BASE_CS_1 1
+#define CSC_Y_SOURCE_BASE_ADDRESS 25:0
+
+#define CSC_CONSTANTS 0x1000CC
+#define CSC_CONSTANTS_Y 31:24
+#define CSC_CONSTANTS_R 23:16
+#define CSC_CONSTANTS_G 15:8
+#define CSC_CONSTANTS_B 7:0
+
+#define CSC_Y_SOURCE_X 0x1000D0
+#define CSC_Y_SOURCE_X_INTEGER 26:16
+#define CSC_Y_SOURCE_X_FRACTION 15:3
+
+#define CSC_Y_SOURCE_Y 0x1000D4
+#define CSC_Y_SOURCE_Y_INTEGER 27:16
+#define CSC_Y_SOURCE_Y_FRACTION 15:3
+
+#define CSC_U_SOURCE_BASE 0x1000D8
+#define CSC_U_SOURCE_BASE_EXT 27:27
+#define CSC_U_SOURCE_BASE_EXT_LOCAL 0
+#define CSC_U_SOURCE_BASE_EXT_EXTERNAL 1
+#define CSC_U_SOURCE_BASE_CS 26:26
+#define CSC_U_SOURCE_BASE_CS_0 0
+#define CSC_U_SOURCE_BASE_CS_1 1
+#define CSC_U_SOURCE_BASE_ADDRESS 25:0
+
+#define CSC_V_SOURCE_BASE 0x1000DC
+#define CSC_V_SOURCE_BASE_EXT 27:27
+#define CSC_V_SOURCE_BASE_EXT_LOCAL 0
+#define CSC_V_SOURCE_BASE_EXT_EXTERNAL 1
+#define CSC_V_SOURCE_BASE_CS 26:26
+#define CSC_V_SOURCE_BASE_CS_0 0
+#define CSC_V_SOURCE_BASE_CS_1 1
+#define CSC_V_SOURCE_BASE_ADDRESS 25:0
+
+#define CSC_SOURCE_DIMENSION 0x1000E0
+#define CSC_SOURCE_DIMENSION_X 31:16
+#define CSC_SOURCE_DIMENSION_Y 15:0
+
+#define CSC_SOURCE_PITCH 0x1000E4
+#define CSC_SOURCE_PITCH_Y 31:16
+#define CSC_SOURCE_PITCH_UV 15:0
+
+#define CSC_DESTINATION 0x1000E8
+#define CSC_DESTINATION_WRAP 31:31
+#define CSC_DESTINATION_WRAP_DISABLE 0
+#define CSC_DESTINATION_WRAP_ENABLE 1
+#define CSC_DESTINATION_X 27:16
+#define CSC_DESTINATION_Y 11:0
+
+#define CSC_DESTINATION_DIMENSION 0x1000EC
+#define CSC_DESTINATION_DIMENSION_X 31:16
+#define CSC_DESTINATION_DIMENSION_Y 15:0
+
+#define CSC_DESTINATION_PITCH 0x1000F0
+#define CSC_DESTINATION_PITCH_X 31:16
+#define CSC_DESTINATION_PITCH_Y 15:0
+
+#define CSC_SCALE_FACTOR 0x1000F4
+#define CSC_SCALE_FACTOR_HORIZONTAL 31:16
+#define CSC_SCALE_FACTOR_VERTICAL 15:0
+
+#define CSC_DESTINATION_BASE 0x1000F8
+#define CSC_DESTINATION_BASE_EXT 27:27
+#define CSC_DESTINATION_BASE_EXT_LOCAL 0
+#define CSC_DESTINATION_BASE_EXT_EXTERNAL 1
+#define CSC_DESTINATION_BASE_CS 26:26
+#define CSC_DESTINATION_BASE_CS_0 0
+#define CSC_DESTINATION_BASE_CS_1 1
+#define CSC_DESTINATION_BASE_ADDRESS 25:0
+
+#define CSC_CONTROL 0x1000FC
+#define CSC_CONTROL_STATUS 31:31
+#define CSC_CONTROL_STATUS_STOP 0
+#define CSC_CONTROL_STATUS_START 1
+#define CSC_CONTROL_SOURCE_FORMAT 30:28
+#define CSC_CONTROL_SOURCE_FORMAT_YUV422 0
+#define CSC_CONTROL_SOURCE_FORMAT_YUV420I 1
+#define CSC_CONTROL_SOURCE_FORMAT_YUV420 2
+#define CSC_CONTROL_SOURCE_FORMAT_YVU9 3
+#define CSC_CONTROL_SOURCE_FORMAT_IYU1 4
+#define CSC_CONTROL_SOURCE_FORMAT_IYU2 5
+#define CSC_CONTROL_SOURCE_FORMAT_RGB565 6
+#define CSC_CONTROL_SOURCE_FORMAT_RGB8888 7
+#define CSC_CONTROL_DESTINATION_FORMAT 27:26
+#define CSC_CONTROL_DESTINATION_FORMAT_RGB565 0
+#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888 1
+#define CSC_CONTROL_HORIZONTAL_FILTER 25:25
+#define CSC_CONTROL_HORIZONTAL_FILTER_DISABLE 0
+#define CSC_CONTROL_HORIZONTAL_FILTER_ENABLE 1
+#define CSC_CONTROL_VERTICAL_FILTER 24:24
+#define CSC_CONTROL_VERTICAL_FILTER_DISABLE 0
+#define CSC_CONTROL_VERTICAL_FILTER_ENABLE 1
+#define CSC_CONTROL_BYTE_ORDER 23:23
+#define CSC_CONTROL_BYTE_ORDER_YUYV 0
+#define CSC_CONTROL_BYTE_ORDER_UYVY 1
+
+#define DE_DATA_PORT 0x110000
+
+#define I2C_BYTE_COUNT 0x010040
+#define I2C_BYTE_COUNT_COUNT 3:0
+
+#define I2C_CTRL 0x010041
+#define I2C_CTRL_INT 4:4
+#define I2C_CTRL_INT_DISABLE 0
+#define I2C_CTRL_INT_ENABLE 1
+#define I2C_CTRL_DIR 3:3
+#define I2C_CTRL_DIR_WR 0
+#define I2C_CTRL_DIR_RD 1
+#define I2C_CTRL_CTRL 2:2
+#define I2C_CTRL_CTRL_STOP 0
+#define I2C_CTRL_CTRL_START 1
+#define I2C_CTRL_MODE 1:1
+#define I2C_CTRL_MODE_STANDARD 0
+#define I2C_CTRL_MODE_FAST 1
+#define I2C_CTRL_EN 0:0
+#define I2C_CTRL_EN_DISABLE 0
+#define I2C_CTRL_EN_ENABLE 1
+
+#define I2C_STATUS 0x010042
+#define I2C_STATUS_TX 3:3
+#define I2C_STATUS_TX_PROGRESS 0
+#define I2C_STATUS_TX_COMPLETED 1
+#define I2C_TX_DONE 0x08
+#define I2C_STATUS_ERR 2:2
+#define I2C_STATUS_ERR_NORMAL 0
+#define I2C_STATUS_ERR_ERROR 1
+#define I2C_STATUS_ERR_CLEAR 0
+#define I2C_STATUS_ACK 1:1
+#define I2C_STATUS_ACK_RECEIVED 0
+#define I2C_STATUS_ACK_NOT 1
+#define I2C_STATUS_BSY 0:0
+#define I2C_STATUS_BSY_IDLE 0
+#define I2C_STATUS_BSY_BUSY 1
+
+#define I2C_RESET 0x010042
+#define I2C_RESET_BUS_ERROR 2:2
+#define I2C_RESET_BUS_ERROR_CLEAR 0
+
+#define I2C_SLAVE_ADDRESS 0x010043
+#define I2C_SLAVE_ADDRESS_ADDRESS 7:1
+#define I2C_SLAVE_ADDRESS_RW 0:0
+#define I2C_SLAVE_ADDRESS_RW_W 0
+#define I2C_SLAVE_ADDRESS_RW_R 1
+
+#define I2C_DATA0 0x010044
+#define I2C_DATA1 0x010045
+#define I2C_DATA2 0x010046
+#define I2C_DATA3 0x010047
+#define I2C_DATA4 0x010048
+#define I2C_DATA5 0x010049
+#define I2C_DATA6 0x01004A
+#define I2C_DATA7 0x01004B
+#define I2C_DATA8 0x01004C
+#define I2C_DATA9 0x01004D
+#define I2C_DATA10 0x01004E
+#define I2C_DATA11 0x01004F
+#define I2C_DATA12 0x010050
+#define I2C_DATA13 0x010051
+#define I2C_DATA14 0x010052
+#define I2C_DATA15 0x010053
+
+
+#define ZV0_CAPTURE_CTRL 0x090000
+#define ZV0_CAPTURE_CTRL_FIELD_INPUT 27:27
+#define ZV0_CAPTURE_CTRL_FIELD_INPUT_EVEN_FIELD 0
+#define ZV0_CAPTURE_CTRL_FIELD_INPUT_ODD_FIELD 1
+#define ZV0_CAPTURE_CTRL_SCAN 26:26
+#define ZV0_CAPTURE_CTRL_SCAN_PROGRESSIVE 0
+#define ZV0_CAPTURE_CTRL_SCAN_INTERLACE 1
+#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER 25:25
+#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER_0 0
+#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER_1 1
+#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC 24:24
+#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC_INACTIVE 0
+#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC_ACTIVE 1
+#define ZV0_CAPTURE_CTRL_ADJ 19:19
+#define ZV0_CAPTURE_CTRL_ADJ_NORMAL 0
+#define ZV0_CAPTURE_CTRL_ADJ_DELAY 1
+#define ZV0_CAPTURE_CTRL_HA 18:18
+#define ZV0_CAPTURE_CTRL_HA_DISABLE 0
+#define ZV0_CAPTURE_CTRL_HA_ENABLE 1
+#define ZV0_CAPTURE_CTRL_VSK 17:17
+#define ZV0_CAPTURE_CTRL_VSK_DISABLE 0
+#define ZV0_CAPTURE_CTRL_VSK_ENABLE 1
+#define ZV0_CAPTURE_CTRL_HSK 16:16
+#define ZV0_CAPTURE_CTRL_HSK_DISABLE 0
+#define ZV0_CAPTURE_CTRL_HSK_ENABLE 1
+#define ZV0_CAPTURE_CTRL_FD 15:15
+#define ZV0_CAPTURE_CTRL_FD_RISING 0
+#define ZV0_CAPTURE_CTRL_FD_FALLING 1
+#define ZV0_CAPTURE_CTRL_VP 14:14
+#define ZV0_CAPTURE_CTRL_VP_HIGH 0
+#define ZV0_CAPTURE_CTRL_VP_LOW 1
+#define ZV0_CAPTURE_CTRL_HP 13:13
+#define ZV0_CAPTURE_CTRL_HP_HIGH 0
+#define ZV0_CAPTURE_CTRL_HP_LOW 1
+#define ZV0_CAPTURE_CTRL_CP 12:12
+#define ZV0_CAPTURE_CTRL_CP_HIGH 0
+#define ZV0_CAPTURE_CTRL_CP_LOW 1
+#define ZV0_CAPTURE_CTRL_UVS 11:11
+#define ZV0_CAPTURE_CTRL_UVS_DISABLE 0
+#define ZV0_CAPTURE_CTRL_UVS_ENABLE 1
+#define ZV0_CAPTURE_CTRL_BS 10:10
+#define ZV0_CAPTURE_CTRL_BS_DISABLE 0
+#define ZV0_CAPTURE_CTRL_BS_ENABLE 1
+#define ZV0_CAPTURE_CTRL_CS 9:9
+#define ZV0_CAPTURE_CTRL_CS_16 0
+#define ZV0_CAPTURE_CTRL_CS_8 1
+#define ZV0_CAPTURE_CTRL_CF 8:8
+#define ZV0_CAPTURE_CTRL_CF_YUV 0
+#define ZV0_CAPTURE_CTRL_CF_RGB 1
+#define ZV0_CAPTURE_CTRL_FS 7:7
+#define ZV0_CAPTURE_CTRL_FS_DISABLE 0
+#define ZV0_CAPTURE_CTRL_FS_ENABLE 1
+#define ZV0_CAPTURE_CTRL_WEAVE 6:6
+#define ZV0_CAPTURE_CTRL_WEAVE_DISABLE 0
+#define ZV0_CAPTURE_CTRL_WEAVE_ENABLE 1
+#define ZV0_CAPTURE_CTRL_BOB 5:5
+#define ZV0_CAPTURE_CTRL_BOB_DISABLE 0
+#define ZV0_CAPTURE_CTRL_BOB_ENABLE 1
+#define ZV0_CAPTURE_CTRL_DB 4:4
+#define ZV0_CAPTURE_CTRL_DB_DISABLE 0
+#define ZV0_CAPTURE_CTRL_DB_ENABLE 1
+#define ZV0_CAPTURE_CTRL_CC 3:3
+#define ZV0_CAPTURE_CTRL_CC_CONTINUE 0
+#define ZV0_CAPTURE_CTRL_CC_CONDITION 1
+#define ZV0_CAPTURE_CTRL_RGB 2:2
+#define ZV0_CAPTURE_CTRL_RGB_DISABLE 0
+#define ZV0_CAPTURE_CTRL_RGB_ENABLE 1
+#define ZV0_CAPTURE_CTRL_656 1:1
+#define ZV0_CAPTURE_CTRL_656_DISABLE 0
+#define ZV0_CAPTURE_CTRL_656_ENABLE 1
+#define ZV0_CAPTURE_CTRL_CAP 0:0
+#define ZV0_CAPTURE_CTRL_CAP_DISABLE 0
+#define ZV0_CAPTURE_CTRL_CAP_ENABLE 1
+
+#define ZV0_CAPTURE_CLIP 0x090004
+#define ZV0_CAPTURE_CLIP_YCLIP_EVEN_FIELD 25:16
+#define ZV0_CAPTURE_CLIP_YCLIP 25:16
+#define ZV0_CAPTURE_CLIP_XCLIP 9:0
+
+#define ZV0_CAPTURE_SIZE 0x090008
+#define ZV0_CAPTURE_SIZE_HEIGHT 26:16
+#define ZV0_CAPTURE_SIZE_WIDTH 10:0
+
+#define ZV0_CAPTURE_BUF0_ADDRESS 0x09000C
+#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS 31:31
+#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS_CURRENT 0
+#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS_PENDING 1
+#define ZV0_CAPTURE_BUF0_ADDRESS_EXT 27:27
+#define ZV0_CAPTURE_BUF0_ADDRESS_EXT_LOCAL 0
+#define ZV0_CAPTURE_BUF0_ADDRESS_EXT_EXTERNAL 1
+#define ZV0_CAPTURE_BUF0_ADDRESS_CS 26:26
+#define ZV0_CAPTURE_BUF0_ADDRESS_CS_0 0
+#define ZV0_CAPTURE_BUF0_ADDRESS_CS_1 1
+#define ZV0_CAPTURE_BUF0_ADDRESS_ADDRESS 25:0
+
+#define ZV0_CAPTURE_BUF1_ADDRESS 0x090010
+#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS 31:31
+#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS_CURRENT 0
+#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS_PENDING 1
+#define ZV0_CAPTURE_BUF1_ADDRESS_EXT 27:27
+#define ZV0_CAPTURE_BUF1_ADDRESS_EXT_LOCAL 0
+#define ZV0_CAPTURE_BUF1_ADDRESS_EXT_EXTERNAL 1
+#define ZV0_CAPTURE_BUF1_ADDRESS_CS 26:26
+#define ZV0_CAPTURE_BUF1_ADDRESS_CS_0 0
+#define ZV0_CAPTURE_BUF1_ADDRESS_CS_1 1
+#define ZV0_CAPTURE_BUF1_ADDRESS_ADDRESS 25:0
+
+#define ZV0_CAPTURE_BUF_OFFSET 0x090014
+#ifndef VALIDATION_CHIP
+ #define ZV0_CAPTURE_BUF_OFFSET_YCLIP_ODD_FIELD 25:16
+#endif
+#define ZV0_CAPTURE_BUF_OFFSET_OFFSET 15:0
+
+#define ZV0_CAPTURE_FIFO_CTRL 0x090018
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO 2:0
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_0 0
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_1 1
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_2 2
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_3 3
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_4 4
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_5 5
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_6 6
+#define ZV0_CAPTURE_FIFO_CTRL_FIFO_7 7
+
+#define ZV0_CAPTURE_YRGB_CONST 0x09001C
+#define ZV0_CAPTURE_YRGB_CONST_Y 31:24
+#define ZV0_CAPTURE_YRGB_CONST_R 23:16
+#define ZV0_CAPTURE_YRGB_CONST_G 15:8
+#define ZV0_CAPTURE_YRGB_CONST_B 7:0
+
+#define ZV0_CAPTURE_LINE_COMP 0x090020
+#define ZV0_CAPTURE_LINE_COMP_LC 10:0
+
+/* ZV1 */
+
+#define ZV1_CAPTURE_CTRL 0x098000
+#define ZV1_CAPTURE_CTRL_FIELD_INPUT 27:27
+#define ZV1_CAPTURE_CTRL_FIELD_INPUT_EVEN_FIELD 0
+#define ZV1_CAPTURE_CTRL_FIELD_INPUT_ODD_FIELD 0
+#define ZV1_CAPTURE_CTRL_SCAN 26:26
+#define ZV1_CAPTURE_CTRL_SCAN_PROGRESSIVE 0
+#define ZV1_CAPTURE_CTRL_SCAN_INTERLACE 1
+#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER 25:25
+#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER_0 0
+#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER_1 1
+#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC 24:24
+#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC_INACTIVE 0
+#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC_ACTIVE 1
+#define ZV1_CAPTURE_CTRL_PANEL 20:20
+#define ZV1_CAPTURE_CTRL_PANEL_DISABLE 0
+#define ZV1_CAPTURE_CTRL_PANEL_ENABLE 1
+#define ZV1_CAPTURE_CTRL_ADJ 19:19
+#define ZV1_CAPTURE_CTRL_ADJ_NORMAL 0
+#define ZV1_CAPTURE_CTRL_ADJ_DELAY 1
+#define ZV1_CAPTURE_CTRL_HA 18:18
+#define ZV1_CAPTURE_CTRL_HA_DISABLE 0
+#define ZV1_CAPTURE_CTRL_HA_ENABLE 1
+#define ZV1_CAPTURE_CTRL_VSK 17:17
+#define ZV1_CAPTURE_CTRL_VSK_DISABLE 0
+#define ZV1_CAPTURE_CTRL_VSK_ENABLE 1
+#define ZV1_CAPTURE_CTRL_HSK 16:16
+#define ZV1_CAPTURE_CTRL_HSK_DISABLE 0
+#define ZV1_CAPTURE_CTRL_HSK_ENABLE 1
+#define ZV1_CAPTURE_CTRL_FD 15:15
+#define ZV1_CAPTURE_CTRL_FD_RISING 0
+#define ZV1_CAPTURE_CTRL_FD_FALLING 1
+#define ZV1_CAPTURE_CTRL_VP 14:14
+#define ZV1_CAPTURE_CTRL_VP_HIGH 0
+#define ZV1_CAPTURE_CTRL_VP_LOW 1
+#define ZV1_CAPTURE_CTRL_HP 13:13
+#define ZV1_CAPTURE_CTRL_HP_HIGH 0
+#define ZV1_CAPTURE_CTRL_HP_LOW 1
+#define ZV1_CAPTURE_CTRL_CP 12:12
+#define ZV1_CAPTURE_CTRL_CP_HIGH 0
+#define ZV1_CAPTURE_CTRL_CP_LOW 1
+#define ZV1_CAPTURE_CTRL_UVS 11:11
+#define ZV1_CAPTURE_CTRL_UVS_DISABLE 0
+#define ZV1_CAPTURE_CTRL_UVS_ENABLE 1
+#define ZV1_CAPTURE_CTRL_BS 10:10
+#define ZV1_CAPTURE_CTRL_BS_DISABLE 0
+#define ZV1_CAPTURE_CTRL_BS_ENABLE 1
+#define ZV1_CAPTURE_CTRL_CS 9:9
+#define ZV1_CAPTURE_CTRL_CS_16 0
+#define ZV1_CAPTURE_CTRL_CS_8 1
+#define ZV1_CAPTURE_CTRL_CF 8:8
+#define ZV1_CAPTURE_CTRL_CF_YUV 0
+#define ZV1_CAPTURE_CTRL_CF_RGB 1
+#define ZV1_CAPTURE_CTRL_FS 7:7
+#define ZV1_CAPTURE_CTRL_FS_DISABLE 0
+#define ZV1_CAPTURE_CTRL_FS_ENABLE 1
+#define ZV1_CAPTURE_CTRL_WEAVE 6:6
+#define ZV1_CAPTURE_CTRL_WEAVE_DISABLE 0
+#define ZV1_CAPTURE_CTRL_WEAVE_ENABLE 1
+#define ZV1_CAPTURE_CTRL_BOB 5:5
+#define ZV1_CAPTURE_CTRL_BOB_DISABLE 0
+#define ZV1_CAPTURE_CTRL_BOB_ENABLE 1
+#define ZV1_CAPTURE_CTRL_DB 4:4
+#define ZV1_CAPTURE_CTRL_DB_DISABLE 0
+#define ZV1_CAPTURE_CTRL_DB_ENABLE 1
+#define ZV1_CAPTURE_CTRL_CC 3:3
+#define ZV1_CAPTURE_CTRL_CC_CONTINUE 0
+#define ZV1_CAPTURE_CTRL_CC_CONDITION 1
+#define ZV1_CAPTURE_CTRL_RGB 2:2
+#define ZV1_CAPTURE_CTRL_RGB_DISABLE 0
+#define ZV1_CAPTURE_CTRL_RGB_ENABLE 1
+#define ZV1_CAPTURE_CTRL_656 1:1
+#define ZV1_CAPTURE_CTRL_656_DISABLE 0
+#define ZV1_CAPTURE_CTRL_656_ENABLE 1
+#define ZV1_CAPTURE_CTRL_CAP 0:0
+#define ZV1_CAPTURE_CTRL_CAP_DISABLE 0
+#define ZV1_CAPTURE_CTRL_CAP_ENABLE 1
+
+#define ZV1_CAPTURE_CLIP 0x098004
+#define ZV1_CAPTURE_CLIP_YCLIP 25:16
+#define ZV1_CAPTURE_CLIP_XCLIP 9:0
+
+#define ZV1_CAPTURE_SIZE 0x098008
+#define ZV1_CAPTURE_SIZE_HEIGHT 26:16
+#define ZV1_CAPTURE_SIZE_WIDTH 10:0
+
+#define ZV1_CAPTURE_BUF0_ADDRESS 0x09800C
+#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS 31:31
+#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS_CURRENT 0
+#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS_PENDING 1
+#define ZV1_CAPTURE_BUF0_ADDRESS_EXT 27:27
+#define ZV1_CAPTURE_BUF0_ADDRESS_EXT_LOCAL 0
+#define ZV1_CAPTURE_BUF0_ADDRESS_EXT_EXTERNAL 1
+#define ZV1_CAPTURE_BUF0_ADDRESS_CS 26:26
+#define ZV1_CAPTURE_BUF0_ADDRESS_CS_0 0
+#define ZV1_CAPTURE_BUF0_ADDRESS_CS_1 1
+#define ZV1_CAPTURE_BUF0_ADDRESS_ADDRESS 25:0
+
+#define ZV1_CAPTURE_BUF1_ADDRESS 0x098010
+#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS 31:31
+#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS_CURRENT 0
+#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS_PENDING 1
+#define ZV1_CAPTURE_BUF1_ADDRESS_EXT 27:27
+#define ZV1_CAPTURE_BUF1_ADDRESS_EXT_LOCAL 0
+#define ZV1_CAPTURE_BUF1_ADDRESS_EXT_EXTERNAL 1
+#define ZV1_CAPTURE_BUF1_ADDRESS_CS 26:26
+#define ZV1_CAPTURE_BUF1_ADDRESS_CS_0 0
+#define ZV1_CAPTURE_BUF1_ADDRESS_CS_1 1
+#define ZV1_CAPTURE_BUF1_ADDRESS_ADDRESS 25:0
+
+#define ZV1_CAPTURE_BUF_OFFSET 0x098014
+#define ZV1_CAPTURE_BUF_OFFSET_OFFSET 15:0
+
+#define ZV1_CAPTURE_FIFO_CTRL 0x098018
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO 2:0
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_0 0
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_1 1
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_2 2
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_3 3
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_4 4
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_5 5
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_6 6
+#define ZV1_CAPTURE_FIFO_CTRL_FIFO_7 7
+
+#define ZV1_CAPTURE_YRGB_CONST 0x09801C
+#define ZV1_CAPTURE_YRGB_CONST_Y 31:24
+#define ZV1_CAPTURE_YRGB_CONST_R 23:16
+#define ZV1_CAPTURE_YRGB_CONST_G 15:8
+#define ZV1_CAPTURE_YRGB_CONST_B 7:0
+
+#define DMA_1_SOURCE 0x0D0010
+#define DMA_1_SOURCE_ADDRESS_EXT 27:27
+#define DMA_1_SOURCE_ADDRESS_EXT_LOCAL 0
+#define DMA_1_SOURCE_ADDRESS_EXT_EXTERNAL 1
+#define DMA_1_SOURCE_ADDRESS_CS 26:26
+#define DMA_1_SOURCE_ADDRESS_CS_0 0
+#define DMA_1_SOURCE_ADDRESS_CS_1 1
+#define DMA_1_SOURCE_ADDRESS 25:0
+
+#define DMA_1_DESTINATION 0x0D0014
+#define DMA_1_DESTINATION_ADDRESS_EXT 27:27
+#define DMA_1_DESTINATION_ADDRESS_EXT_LOCAL 0
+#define DMA_1_DESTINATION_ADDRESS_EXT_EXTERNAL 1
+#define DMA_1_DESTINATION_ADDRESS_CS 26:26
+#define DMA_1_DESTINATION_ADDRESS_CS_0 0
+#define DMA_1_DESTINATION_ADDRESS_CS_1 1
+#define DMA_1_DESTINATION_ADDRESS 25:0
+
+#define DMA_1_SIZE_CONTROL 0x0D0018
+#define DMA_1_SIZE_CONTROL_STATUS 31:31
+#define DMA_1_SIZE_CONTROL_STATUS_IDLE 0
+#define DMA_1_SIZE_CONTROL_STATUS_ACTIVE 1
+#define DMA_1_SIZE_CONTROL_SIZE 23:0
+
+#define DMA_ABORT_INTERRUPT 0x0D0020
+#define DMA_ABORT_INTERRUPT_ABORT_1 5:5
+#define DMA_ABORT_INTERRUPT_ABORT_1_ENABLE 0
+#define DMA_ABORT_INTERRUPT_ABORT_1_ABORT 1
+#define DMA_ABORT_INTERRUPT_ABORT_0 4:4
+#define DMA_ABORT_INTERRUPT_ABORT_0_ENABLE 0
+#define DMA_ABORT_INTERRUPT_ABORT_0_ABORT 1
+#define DMA_ABORT_INTERRUPT_INT_1 1:1
+#define DMA_ABORT_INTERRUPT_INT_1_CLEAR 0
+#define DMA_ABORT_INTERRUPT_INT_1_FINISHED 1
+#define DMA_ABORT_INTERRUPT_INT_0 0:0
+#define DMA_ABORT_INTERRUPT_INT_0_CLEAR 0
+#define DMA_ABORT_INTERRUPT_INT_0_FINISHED 1
+
+
+
+
+
+/* Default i2c CLK and Data GPIO. These are the default i2c pins */
+#define DEFAULT_I2C_SCL 30
+#define DEFAULT_I2C_SDA 31
+
+
+#define GPIO_DATA_SM750LE 0x020018
+#define GPIO_DATA_SM750LE_1 1:1
+#define GPIO_DATA_SM750LE_0 0:0
+
+#define GPIO_DATA_DIRECTION_SM750LE 0x02001C
+#define GPIO_DATA_DIRECTION_SM750LE_1 1:1
+#define GPIO_DATA_DIRECTION_SM750LE_1_INPUT 0
+#define GPIO_DATA_DIRECTION_SM750LE_1_OUTPUT 1
+#define GPIO_DATA_DIRECTION_SM750LE_0 0:0
+#define GPIO_DATA_DIRECTION_SM750LE_0_INPUT 0
+#define GPIO_DATA_DIRECTION_SM750LE_0_OUTPUT 1
+
+
+#endif
--- /dev/null
+#define USE_DVICHIP
+#ifdef USE_DVICHIP
+
+#include "ddk750_sii164.h"
+#include "ddk750_hwi2c.h"
+
+/* I2C Address of each SII164 chip */
+#define SII164_I2C_ADDRESS 0x70
+
+/* Define this definition to use hardware i2c. */
+#define USE_HW_I2C
+
+#ifdef USE_HW_I2C
+ #define i2cWriteReg hwI2CWriteReg
+ #define i2cReadReg hwI2CReadReg
+#else
+ #define i2cWriteReg swI2CWriteReg
+ #define i2cReadReg swI2CReadReg
+#endif
+
+/* SII164 Vendor and Device ID */
+#define SII164_VENDOR_ID 0x0001
+#define SII164_DEVICE_ID 0x0006
+
+#ifdef SII164_FULL_FUNCTIONS
+/* Name of the DVI Controller chip */
+static char *gDviCtrlChipName = "Silicon Image SiI 164";
+#endif
+
+/*
+ * sii164GetVendorID
+ * This function gets the vendor ID of the DVI controller chip.
+ *
+ * Output:
+ * Vendor ID
+ */
+unsigned short sii164GetVendorID(void)
+{
+ unsigned short vendorID;
+
+ vendorID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_HIGH) << 8) |
+ (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_VENDOR_ID_LOW);
+
+ return vendorID;
+}
+
+/*
+ * sii164GetDeviceID
+ * This function gets the device ID of the DVI controller chip.
+ *
+ * Output:
+ * Device ID
+ */
+unsigned short sii164GetDeviceID(void)
+{
+ unsigned short deviceID;
+
+ deviceID = ((unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_HIGH) << 8) |
+ (unsigned short) i2cReadReg(SII164_I2C_ADDRESS, SII164_DEVICE_ID_LOW);
+
+ return deviceID;
+}
+
+
+
+/* DVI.C will handle all SiI164 chip stuffs and try it best to make code minimal and useful */
+
+/*
+ * sii164InitChip
+ * This function initialize and detect the DVI controller chip.
+ *
+ * Input:
+ * edgeSelect - Edge Select:
+ * 0 = Input data is falling edge latched (falling edge
+ * latched first in dual edge mode)
+ * 1 = Input data is rising edge latched (rising edge
+ * latched first in dual edge mode)
+ * busSelect - Input Bus Select:
+ * 0 = Input data bus is 12-bits wide
+ * 1 = Input data bus is 24-bits wide
+ * dualEdgeClkSelect - Dual Edge Clock Select
+ * 0 = Input data is single edge latched
+ * 1 = Input data is dual edge latched
+ * hsyncEnable - Horizontal Sync Enable:
+ * 0 = HSYNC input is transmitted as fixed LOW
+ * 1 = HSYNC input is transmitted as is
+ * vsyncEnable - Vertical Sync Enable:
+ * 0 = VSYNC input is transmitted as fixed LOW
+ * 1 = VSYNC input is transmitted as is
+ * deskewEnable - De-skewing Enable:
+ * 0 = De-skew disabled
+ * 1 = De-skew enabled
+ * deskewSetting - De-skewing Setting (increment of 260psec)
+ * 0 = 1 step --> minimum setup / maximum hold
+ * 1 = 2 step
+ * 2 = 3 step
+ * 3 = 4 step
+ * 4 = 5 step
+ * 5 = 6 step
+ * 6 = 7 step
+ * 7 = 8 step --> maximum setup / minimum hold
+ * continuousSyncEnable- SYNC Continuous:
+ * 0 = Disable
+ * 1 = Enable
+ * pllFilterEnable - PLL Filter Enable
+ * 0 = Disable PLL Filter
+ * 1 = Enable PLL Filter
+ * pllFilterValue - PLL Filter characteristics:
+ * 0~7 (recommended value is 4)
+ *
+ * Output:
+ * 0 - Success
+ * -1 - Fail.
+ */
+long sii164InitChip(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue
+)
+{
+ //unsigned char ucRegIndex, ucRegValue;
+ //unsigned char ucDeviceAddress,
+ unsigned char config;
+ //unsigned long delayCount;
+
+ /* Initialize the i2c bus */
+#ifdef USE_HW_I2C
+ /* Use fast mode. */
+ hwI2CInit(1);
+#else
+ swI2CInit(DEFAULT_I2C_SCL, DEFAULT_I2C_SDA);
+#endif
+
+ /* Check if SII164 Chip exists */
+ if ((sii164GetVendorID() == SII164_VENDOR_ID) && (sii164GetDeviceID() == SII164_DEVICE_ID))
+ {
+
+#ifdef DDKDEBUG
+ //sii164PrintRegisterValues();
+#endif
+ /*
+ * Initialize SII164 controller chip.
+ */
+
+ /* Select the edge */
+ if (edgeSelect == 0)
+ config = SII164_CONFIGURATION_LATCH_FALLING;
+ else
+ config = SII164_CONFIGURATION_LATCH_RISING;
+
+ /* Select bus wide */
+ if (busSelect == 0)
+ config |= SII164_CONFIGURATION_BUS_12BITS;
+ else
+ config |= SII164_CONFIGURATION_BUS_24BITS;
+
+ /* Select Dual/Single Edge Clock */
+ if (dualEdgeClkSelect == 0)
+ config |= SII164_CONFIGURATION_CLOCK_SINGLE;
+ else
+ config |= SII164_CONFIGURATION_CLOCK_DUAL;
+
+ /* Select HSync Enable */
+ if (hsyncEnable == 0)
+ config |= SII164_CONFIGURATION_HSYNC_FORCE_LOW;
+ else
+ config |= SII164_CONFIGURATION_HSYNC_AS_IS;
+
+ /* Select VSync Enable */
+ if (vsyncEnable == 0)
+ config |= SII164_CONFIGURATION_VSYNC_FORCE_LOW;
+ else
+ config |= SII164_CONFIGURATION_VSYNC_AS_IS;
+
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);
+
+ /* De-skew enabled with default 111b value.
+ This will fix some artifacts problem in some mode on board 2.2.
+ Somehow this fix does not affect board 2.1.
+ */
+ if (deskewEnable == 0)
+ config = SII164_DESKEW_DISABLE;
+ else
+ config = SII164_DESKEW_ENABLE;
+
+ switch (deskewSetting)
+ {
+ case 0:
+ config |= SII164_DESKEW_1_STEP;
+ break;
+ case 1:
+ config |= SII164_DESKEW_2_STEP;
+ break;
+ case 2:
+ config |= SII164_DESKEW_3_STEP;
+ break;
+ case 3:
+ config |= SII164_DESKEW_4_STEP;
+ break;
+ case 4:
+ config |= SII164_DESKEW_5_STEP;
+ break;
+ case 5:
+ config |= SII164_DESKEW_6_STEP;
+ break;
+ case 6:
+ config |= SII164_DESKEW_7_STEP;
+ break;
+ case 7:
+ config |= SII164_DESKEW_8_STEP;
+ break;
+ }
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_DESKEW, config);
+
+ /* Enable/Disable Continuous Sync. */
+ if (continuousSyncEnable == 0)
+ config = SII164_PLL_FILTER_SYNC_CONTINUOUS_DISABLE;
+ else
+ config = SII164_PLL_FILTER_SYNC_CONTINUOUS_ENABLE;
+
+ /* Enable/Disable PLL Filter */
+ if (pllFilterEnable == 0)
+ config |= SII164_PLL_FILTER_DISABLE;
+ else
+ config |= SII164_PLL_FILTER_ENABLE;
+
+ /* Set the PLL Filter value */
+ config |= ((pllFilterValue & 0x07) << 1);
+
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_PLL, config);
+
+ /* Recover from Power Down and enable output. */
+ config = i2cReadReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION);
+ config |= SII164_CONFIGURATION_POWER_NORMAL;
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);
+
+#ifdef DDKDEBUG
+ //sii164PrintRegisterValues();
+#endif
+
+ return 0;
+ }
+
+ /* Return -1 if initialization fails. */
+ return (-1);
+}
+
+
+
+
+
+/* below sii164 function is not neccessary */
+
+#ifdef SII164_FULL_FUNCTIONS
+
+/*
+ * sii164ResetChip
+ * This function resets the DVI Controller Chip.
+ */
+void sii164ResetChip(void)
+{
+ /* Power down */
+ sii164SetPower(0);
+ sii164SetPower(1);
+}
+
+
+/*
+ * sii164GetChipString
+ * This function returns a char string name of the current DVI Controller chip.
+ * It's convenient for application need to display the chip name.
+ */
+char *sii164GetChipString(void)
+{
+ return gDviCtrlChipName;
+}
+
+
+/*
+ * sii164SetPower
+ * This function sets the power configuration of the DVI Controller Chip.
+ *
+ * Input:
+ * powerUp - Flag to set the power down or up
+ */
+void sii164SetPower(
+ unsigned char powerUp
+)
+{
+ unsigned char config;
+
+ config = i2cReadReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION);
+ if (powerUp == 1)
+ {
+ /* Power up the chip */
+ config &= ~SII164_CONFIGURATION_POWER_MASK;
+ config |= SII164_CONFIGURATION_POWER_NORMAL;
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);
+ }
+ else
+ {
+ /* Power down the chip */
+ config &= ~SII164_CONFIGURATION_POWER_MASK;
+ config |= SII164_CONFIGURATION_POWER_DOWN;
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_CONFIGURATION, config);
+ }
+}
+
+
+/*
+ * sii164SelectHotPlugDetectionMode
+ * This function selects the mode of the hot plug detection.
+ */
+static void sii164SelectHotPlugDetectionMode(
+ sii164_hot_plug_mode_t hotPlugMode
+)
+{
+ unsigned char detectReg;
+
+ detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & ~SII164_DETECT_MONITOR_SENSE_OUTPUT_FLAG;
+ switch (hotPlugMode)
+ {
+ case SII164_HOTPLUG_DISABLE:
+ detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_HIGH;
+ break;
+ case SII164_HOTPLUG_USE_MDI:
+ detectReg &= ~SII164_DETECT_INTERRUPT_MASK;
+ detectReg |= SII164_DETECT_INTERRUPT_BY_HTPLG_PIN;
+ detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_MDI;
+ break;
+ case SII164_HOTPLUG_USE_RSEN:
+ detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_RSEN;
+ break;
+ case SII164_HOTPLUG_USE_HTPLG:
+ detectReg |= SII164_DETECT_MONITOR_SENSE_OUTPUT_HTPLG;
+ break;
+ }
+
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_DETECT, detectReg);
+}
+
+/*
+ * sii164EnableHotPlugDetection
+ * This function enables the Hot Plug detection.
+ *
+ * enableHotPlug - Enable (=1) / disable (=0) Hot Plug detection
+ */
+void sii164EnableHotPlugDetection(
+ unsigned char enableHotPlug
+)
+{
+ unsigned char detectReg;
+ detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT);
+
+ /* Depending on each DVI controller, need to enable the hot plug based on each
+ individual chip design. */
+ if (enableHotPlug != 0)
+ sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_USE_MDI);
+ else
+ sii164SelectHotPlugDetectionMode(SII164_HOTPLUG_DISABLE);
+}
+
+/*
+ * sii164IsConnected
+ * Check if the DVI Monitor is connected.
+ *
+ * Output:
+ * 0 - Not Connected
+ * 1 - Connected
+ */
+unsigned char sii164IsConnected(void)
+{
+ unsigned char hotPlugValue;
+
+ hotPlugValue = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & SII164_DETECT_HOT_PLUG_STATUS_MASK;
+ if (hotPlugValue == SII164_DETECT_HOT_PLUG_STATUS_ON)
+ return 1;
+ else
+ return 0;
+}
+
+/*
+ * sii164CheckInterrupt
+ * Checks if interrupt has occured.
+ *
+ * Output:
+ * 0 - No interrupt
+ * 1 - Interrupt occurs
+ */
+unsigned char sii164CheckInterrupt(void)
+{
+ unsigned char detectReg;
+
+ detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT) & SII164_DETECT_MONITOR_STATE_MASK;
+ if (detectReg == SII164_DETECT_MONITOR_STATE_CHANGE)
+ return 1;
+ else
+ return 0;
+}
+
+/*
+ * sii164ClearInterrupt
+ * Clear the hot plug interrupt.
+ */
+void sii164ClearInterrupt(void)
+{
+ unsigned char detectReg;
+
+ /* Clear the MDI interrupt */
+ detectReg = i2cReadReg(SII164_I2C_ADDRESS, SII164_DETECT);
+ i2cWriteReg(SII164_I2C_ADDRESS, SII164_DETECT, detectReg | SII164_DETECT_MONITOR_STATE_CLEAR);
+}
+
+#endif
+
+#endif
+
+
--- /dev/null
+#ifndef DDK750_SII164_H__
+#define DDK750_SII164_H__
+
+#define USE_DVICHIP
+
+/* Hot Plug detection mode structure */
+typedef enum _sii164_hot_plug_mode_t
+{
+ SII164_HOTPLUG_DISABLE = 0, /* Disable Hot Plug output bit (always high). */
+ SII164_HOTPLUG_USE_MDI, /* Use Monitor Detect Interrupt bit. */
+ SII164_HOTPLUG_USE_RSEN, /* Use Receiver Sense detect bit. */
+ SII164_HOTPLUG_USE_HTPLG /* Use Hot Plug detect bit. */
+} sii164_hot_plug_mode_t;
+
+
+/* Silicon Image SiI164 chip prototype */
+long sii164InitChip(
+ unsigned char edgeSelect,
+ unsigned char busSelect,
+ unsigned char dualEdgeClkSelect,
+ unsigned char hsyncEnable,
+ unsigned char vsyncEnable,
+ unsigned char deskewEnable,
+ unsigned char deskewSetting,
+ unsigned char continuousSyncEnable,
+ unsigned char pllFilterEnable,
+ unsigned char pllFilterValue
+);
+
+unsigned short sii164GetVendorID(void);
+unsigned short sii164GetDeviceID(void);
+
+
+#ifdef SII164_FULL_FUNCTIONS
+void sii164ResetChip(void);
+char *sii164GetChipString(void);
+void sii164SetPower(unsigned char powerUp);
+void sii164EnableHotPlugDetection(unsigned char enableHotPlug);
+unsigned char sii164IsConnected(void);
+unsigned char sii164CheckInterrupt(void);
+void sii164ClearInterrupt(void);
+#endif
+/* below register definination is used for Silicon Image SiI164 DVI controller chip */
+/*
+ * Vendor ID registers
+ */
+#define SII164_VENDOR_ID_LOW 0x00
+#define SII164_VENDOR_ID_HIGH 0x01
+
+/*
+ * Device ID registers
+ */
+#define SII164_DEVICE_ID_LOW 0x02
+#define SII164_DEVICE_ID_HIGH 0x03
+
+/*
+ * Device Revision
+ */
+#define SII164_DEVICE_REVISION 0x04
+
+/*
+ * Frequency Limitation registers
+ */
+#define SII164_FREQUENCY_LIMIT_LOW 0x06
+#define SII164_FREQUENCY_LIMIT_HIGH 0x07
+
+/*
+ * Power Down and Input Signal Configuration registers
+ */
+#define SII164_CONFIGURATION 0x08
+
+/* Power down (PD) */
+#define SII164_CONFIGURATION_POWER_DOWN 0x00
+#define SII164_CONFIGURATION_POWER_NORMAL 0x01
+#define SII164_CONFIGURATION_POWER_MASK 0x01
+
+/* Input Edge Latch Select (EDGE) */
+#define SII164_CONFIGURATION_LATCH_FALLING 0x00
+#define SII164_CONFIGURATION_LATCH_RISING 0x02
+
+/* Bus Select (BSEL) */
+#define SII164_CONFIGURATION_BUS_12BITS 0x00
+#define SII164_CONFIGURATION_BUS_24BITS 0x04
+
+/* Dual Edge Clock Select (DSEL) */
+#define SII164_CONFIGURATION_CLOCK_SINGLE 0x00
+#define SII164_CONFIGURATION_CLOCK_DUAL 0x08
+
+/* Horizontal Sync Enable (HEN) */
+#define SII164_CONFIGURATION_HSYNC_FORCE_LOW 0x00
+#define SII164_CONFIGURATION_HSYNC_AS_IS 0x10
+
+/* Vertical Sync Enable (VEN) */
+#define SII164_CONFIGURATION_VSYNC_FORCE_LOW 0x00
+#define SII164_CONFIGURATION_VSYNC_AS_IS 0x20
+
+/*
+ * Detection registers
+ */
+#define SII164_DETECT 0x09
+
+/* Monitor Detect Interrupt (MDI) */
+#define SII164_DETECT_MONITOR_STATE_CHANGE 0x00
+#define SII164_DETECT_MONITOR_STATE_NO_CHANGE 0x01
+#define SII164_DETECT_MONITOR_STATE_CLEAR 0x01
+#define SII164_DETECT_MONITOR_STATE_MASK 0x01
+
+/* Hot Plug detect Input (HTPLG) */
+#define SII164_DETECT_HOT_PLUG_STATUS_OFF 0x00
+#define SII164_DETECT_HOT_PLUG_STATUS_ON 0x02
+#define SII164_DETECT_HOT_PLUG_STATUS_MASK 0x02
+
+/* Receiver Sense (RSEN) */
+#define SII164_DETECT_RECEIVER_SENSE_NOT_DETECTED 0x00
+#define SII164_DETECT_RECEIVER_SENSE_DETECTED 0x04
+
+/* Interrupt Generation Method (TSEL) */
+#define SII164_DETECT_INTERRUPT_BY_RSEN_PIN 0x00
+#define SII164_DETECT_INTERRUPT_BY_HTPLG_PIN 0x08
+#define SII164_DETECT_INTERRUPT_MASK 0x08
+
+/* Monitor Sense Output (MSEN) */
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_HIGH 0x00
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_MDI 0x10
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_RSEN 0x20
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_HTPLG 0x30
+#define SII164_DETECT_MONITOR_SENSE_OUTPUT_FLAG 0x30
+
+/*
+ * Skewing registers
+ */
+#define SII164_DESKEW 0x0A
+
+/* General Purpose Input (CTL[3:1]) */
+#define SII164_DESKEW_GENERAL_PURPOSE_INPUT_MASK 0x0E
+
+/* De-skewing Enable bit (DKEN) */
+#define SII164_DESKEW_DISABLE 0x00
+#define SII164_DESKEW_ENABLE 0x10
+
+/* De-skewing Setting (DK[3:1])*/
+#define SII164_DESKEW_1_STEP 0x00
+#define SII164_DESKEW_2_STEP 0x20
+#define SII164_DESKEW_3_STEP 0x40
+#define SII164_DESKEW_4_STEP 0x60
+#define SII164_DESKEW_5_STEP 0x80
+#define SII164_DESKEW_6_STEP 0xA0
+#define SII164_DESKEW_7_STEP 0xC0
+#define SII164_DESKEW_8_STEP 0xE0
+
+/*
+ * User Configuration Data registers (CFG 7:0)
+ */
+#define SII164_USER_CONFIGURATION 0x0B
+
+/*
+ * PLL registers
+ */
+#define SII164_PLL 0x0C
+
+/* PLL Filter Value (PLLF) */
+#define SII164_PLL_FILTER_VALUE_MASK 0x0E
+
+/* PLL Filter Enable (PFEN) */
+#define SII164_PLL_FILTER_DISABLE 0x00
+#define SII164_PLL_FILTER_ENABLE 0x01
+
+/* Sync Continuous (SCNT) */
+#define SII164_PLL_FILTER_SYNC_CONTINUOUS_DISABLE 0x00
+#define SII164_PLL_FILTER_SYNC_CONTINUOUS_ENABLE 0x80
+
+#endif
--- /dev/null
+/*******************************************************************
+*
+* Copyright (c) 2007 by Silicon Motion, Inc. (SMI)
+*
+* All rights are reserved. Reproduction or in part is prohibited
+* without the written consent of the copyright owner.
+*
+* swi2c.c --- SM750/SM718 DDK
+* This file contains the source code for I2C using software
+* implementation.
+*
+*******************************************************************/
+#include "ddk750_help.h"
+#include "ddk750_reg.h"
+#include "ddk750_swi2c.h"
+#include "ddk750_power.h"
+
+
+/*******************************************************************
+ * I2C Software Master Driver:
+ * ===========================
+ * Each i2c cycle is split into 4 sections. Each of these section marks
+ * a point in time where the SCL or SDA may be changed.
+ *
+ * 1 Cycle == | Section I. | Section 2. | Section 3. | Section 4. |
+ * +-------------+-------------+-------------+-------------+
+ * | SCL set LOW |SCL no change| SCL set HIGH|SCL no change|
+ *
+ * ____________ _____________
+ * SCL == XXXX _____________ ____________ /
+ *
+ * I.e. the SCL may only be changed in section 1. and section 3. while
+ * the SDA may only be changed in section 2. and section 4. The table
+ * below gives the changes for these 2 lines in the varios sections.
+ *
+ * Section changes Table:
+ * ======================
+ * blank = no change, L = set bit LOW, H = set bit HIGH
+ *
+ * | 1.| 2.| 3.| 4.|
+ * ---------------+---+---+---+---+
+ * Tx Start SDA | | H | | L |
+ * SCL | L | | H | |
+ * ---------------+---+---+---+---+
+ * Tx Stop SDA | | L | | H |
+ * SCL | L | | H | |
+ * ---------------+---+---+---+---+
+ * Tx bit H SDA | | H | | |
+ * SCL | L | | H | |
+ * ---------------+---+---+---+---+
+ * Tx bit L SDA | | L | | |
+ * SCL | L | | H | |
+ * ---------------+---+---+---+---+
+ *
+ ******************************************************************/
+
+/* GPIO pins used for this I2C. It ranges from 0 to 63. */
+static unsigned char g_i2cClockGPIO = DEFAULT_I2C_SCL;
+static unsigned char g_i2cDataGPIO = DEFAULT_I2C_SDA;
+
+/*
+ * Below is the variable declaration for the GPIO pin register usage
+ * for the i2c Clock and i2c Data.
+ *
+ * Note:
+ * Notice that the GPIO usage for the i2c clock and i2c Data are
+ * separated. This is to make this code flexible enough when
+ * two separate GPIO pins for the clock and data are located
+ * in two different GPIO register set (worst case).
+ */
+
+/* i2c Clock GPIO Register usage */
+static unsigned long g_i2cClkGPIOMuxReg = GPIO_MUX;
+static unsigned long g_i2cClkGPIODataReg = GPIO_DATA;
+static unsigned long g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION;
+
+/* i2c Data GPIO Register usage */
+static unsigned long g_i2cDataGPIOMuxReg = GPIO_MUX;
+static unsigned long g_i2cDataGPIODataReg = GPIO_DATA;
+static unsigned long g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION;
+
+/*
+ * This function puts a delay between command
+ */
+static void swI2CWait(void)
+{
+ /* find a bug:
+ * peekIO method works well before suspend/resume
+ * but after suspend, peekIO(0x3ce,0x61) & 0x10
+ * always be non-zero,which makes the while loop
+ * never finish.
+ * use non-ultimate for loop below is safe
+ * */
+#if 0
+ /* Change wait algorithm to use PCI bus clock,
+ it's more reliable than counter loop ..
+ write 0x61 to 0x3ce and read from 0x3cf
+ */
+ while(peekIO(0x3ce,0x61) & 0x10);
+#else
+ int i, Temp;
+
+ for(i=0; i<600; i++)
+ {
+ Temp = i;
+ Temp += i;
+ }
+#endif
+}
+
+/*
+ * This function set/reset the SCL GPIO pin
+ *
+ * Parameters:
+ * value - Bit value to set to the SCL or SDA (0 = low, 1 = high)
+ *
+ * Notes:
+ * When setting SCL to high, just set the GPIO as input where the pull up
+ * resistor will pull the signal up. Do not use software to pull up the
+ * signal because the i2c will fail when other device try to drive the
+ * signal due to SM50x will drive the signal to always high.
+ */
+void swI2CSCL(unsigned char value)
+{
+ unsigned long ulGPIOData;
+ unsigned long ulGPIODirection;
+
+ ulGPIODirection = PEEK32(g_i2cClkGPIODataDirReg);
+ if (value) /* High */
+ {
+ /* Set direction as input. This will automatically pull the signal up. */
+ ulGPIODirection &= ~(1 << g_i2cClockGPIO);
+ POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection);
+ }
+ else /* Low */
+ {
+ /* Set the signal down */
+ ulGPIOData = PEEK32(g_i2cClkGPIODataReg);
+ ulGPIOData &= ~(1 << g_i2cClockGPIO);
+ POKE32(g_i2cClkGPIODataReg, ulGPIOData);
+
+ /* Set direction as output */
+ ulGPIODirection |= (1 << g_i2cClockGPIO);
+ POKE32(g_i2cClkGPIODataDirReg, ulGPIODirection);
+ }
+}
+
+/*
+ * This function set/reset the SDA GPIO pin
+ *
+ * Parameters:
+ * value - Bit value to set to the SCL or SDA (0 = low, 1 = high)
+ *
+ * Notes:
+ * When setting SCL to high, just set the GPIO as input where the pull up
+ * resistor will pull the signal up. Do not use software to pull up the
+ * signal because the i2c will fail when other device try to drive the
+ * signal due to SM50x will drive the signal to always high.
+ */
+void swI2CSDA(unsigned char value)
+{
+ unsigned long ulGPIOData;
+ unsigned long ulGPIODirection;
+
+ ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg);
+ if (value) /* High */
+ {
+ /* Set direction as input. This will automatically pull the signal up. */
+ ulGPIODirection &= ~(1 << g_i2cDataGPIO);
+ POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection);
+ }
+ else /* Low */
+ {
+ /* Set the signal down */
+ ulGPIOData = PEEK32(g_i2cDataGPIODataReg);
+ ulGPIOData &= ~(1 << g_i2cDataGPIO);
+ POKE32(g_i2cDataGPIODataReg, ulGPIOData);
+
+ /* Set direction as output */
+ ulGPIODirection |= (1 << g_i2cDataGPIO);
+ POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection);
+ }
+}
+
+/*
+ * This function read the data from the SDA GPIO pin
+ *
+ * Return Value:
+ * The SDA data bit sent by the Slave
+ */
+static unsigned char swI2CReadSDA(void)
+{
+ unsigned long ulGPIODirection;
+ unsigned long ulGPIOData;
+
+ /* Make sure that the direction is input (High) */
+ ulGPIODirection = PEEK32(g_i2cDataGPIODataDirReg);
+ if ((ulGPIODirection & (1 << g_i2cDataGPIO)) != (~(1 << g_i2cDataGPIO)))
+ {
+ ulGPIODirection &= ~(1 << g_i2cDataGPIO);
+ POKE32(g_i2cDataGPIODataDirReg, ulGPIODirection);
+ }
+
+ /* Now read the SDA line */
+ ulGPIOData = PEEK32(g_i2cDataGPIODataReg);
+ if (ulGPIOData & (1 << g_i2cDataGPIO))
+ return 1;
+ else
+ return 0;
+}
+
+/*
+ * This function sends ACK signal
+ */
+static void swI2CAck(void)
+{
+ return; /* Single byte read is ok without it. */
+}
+
+/*
+ * This function sends the start command to the slave device
+ */
+static void swI2CStart(void)
+{
+ /* Start I2C */
+ swI2CSDA(1);
+ swI2CSCL(1);
+ swI2CSDA(0);
+}
+
+/*
+ * This function sends the stop command to the slave device
+ */
+static void swI2CStop(void)
+{
+ /* Stop the I2C */
+ swI2CSCL(1);
+ swI2CSDA(0);
+ swI2CSDA(1);
+}
+
+/*
+ * This function writes one byte to the slave device
+ *
+ * Parameters:
+ * data - Data to be write to the slave device
+ *
+ * Return Value:
+ * 0 - Success
+ * -1 - Fail to write byte
+ */
+static long swI2CWriteByte(unsigned char data)
+{
+ unsigned char value = data;
+ int i;
+
+ /* Sending the data bit by bit */
+ for (i=0; i<8; i++)
+ {
+ /* Set SCL to low */
+ swI2CSCL(0);
+
+ /* Send data bit */
+ if ((value & 0x80) != 0)
+ swI2CSDA(1);
+ else
+ swI2CSDA(0);
+
+ swI2CWait();
+
+ /* Toggle clk line to one */
+ swI2CSCL(1);
+ swI2CWait();
+
+ /* Shift byte to be sent */
+ value = value << 1;
+ }
+
+ /* Set the SCL Low and SDA High (prepare to get input) */
+ swI2CSCL(0);
+ swI2CSDA(1);
+
+ /* Set the SCL High for ack */
+ swI2CWait();
+ swI2CSCL(1);
+ swI2CWait();
+
+ /* Read SDA, until SDA==0 */
+ for(i=0; i<0xff; i++)
+ {
+ if (!swI2CReadSDA())
+ break;
+
+ swI2CSCL(0);
+ swI2CWait();
+ swI2CSCL(1);
+ swI2CWait();
+ }
+
+ /* Set the SCL Low and SDA High */
+ swI2CSCL(0);
+ swI2CSDA(1);
+
+ if (i<0xff)
+ return 0;
+ else
+ return -1;
+}
+
+/*
+ * This function reads one byte from the slave device
+ *
+ * Parameters:
+ * ack - Flag to indicate either to send the acknowledge
+ * message to the slave device or not
+ *
+ * Return Value:
+ * One byte data read from the Slave device
+ */
+static unsigned char swI2CReadByte(unsigned char ack)
+{
+ int i;
+ unsigned char data = 0;
+
+ for(i=7; i>=0; i--)
+ {
+ /* Set the SCL to Low and SDA to High (Input) */
+ swI2CSCL(0);
+ swI2CSDA(1);
+ swI2CWait();
+
+ /* Set the SCL High */
+ swI2CSCL(1);
+ swI2CWait();
+
+ /* Read data bits from SDA */
+ data |= (swI2CReadSDA() << i);
+ }
+
+ if (ack)
+ swI2CAck();
+
+ /* Set the SCL Low and SDA High */
+ swI2CSCL(0);
+ swI2CSDA(1);
+
+ return data;
+}
+
+/*
+ * This function initializes GPIO port for SW I2C communication.
+ *
+ * Parameters:
+ * i2cClkGPIO - The GPIO pin to be used as i2c SCL
+ * i2cDataGPIO - The GPIO pin to be used as i2c SDA
+ *
+ * Return Value:
+ * -1 - Fail to initialize the i2c
+ * 0 - Success
+ */
+static long swI2CInit_SM750LE(unsigned char i2cClkGPIO,
+ unsigned char i2cDataGPIO)
+{
+ int i;
+
+ /* Initialize the GPIO pin for the i2c Clock Register */
+ g_i2cClkGPIODataReg = GPIO_DATA_SM750LE;
+ g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE;
+
+ /* Initialize the Clock GPIO Offset */
+ g_i2cClockGPIO = i2cClkGPIO;
+
+ /* Initialize the GPIO pin for the i2c Data Register */
+ g_i2cDataGPIODataReg = GPIO_DATA_SM750LE;
+ g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION_SM750LE;
+
+ /* Initialize the Data GPIO Offset */
+ g_i2cDataGPIO = i2cDataGPIO;
+
+ /* Note that SM750LE don't have GPIO MUX and power is always on */
+
+ /* Clear the i2c lines. */
+ for(i=0; i<9; i++)
+ swI2CStop();
+
+ return 0;
+}
+
+/*
+ * This function initializes the i2c attributes and bus
+ *
+ * Parameters:
+ * i2cClkGPIO - The GPIO pin to be used as i2c SCL
+ * i2cDataGPIO - The GPIO pin to be used as i2c SDA
+ *
+ * Return Value:
+ * -1 - Fail to initialize the i2c
+ * 0 - Success
+ */
+long swI2CInit(
+ unsigned char i2cClkGPIO,
+ unsigned char i2cDataGPIO
+)
+{
+ int i;
+
+ /* Return 0 if the GPIO pins to be used is out of range. The range is only from [0..63] */
+ if ((i2cClkGPIO > 31) || (i2cDataGPIO > 31))
+ return -1;
+
+ if (getChipType() == SM750LE)
+ return swI2CInit_SM750LE(i2cClkGPIO, i2cDataGPIO);
+
+ /* Initialize the GPIO pin for the i2c Clock Register */
+ g_i2cClkGPIOMuxReg = GPIO_MUX;
+ g_i2cClkGPIODataReg = GPIO_DATA;
+ g_i2cClkGPIODataDirReg = GPIO_DATA_DIRECTION;
+
+ /* Initialize the Clock GPIO Offset */
+ g_i2cClockGPIO = i2cClkGPIO;
+
+ /* Initialize the GPIO pin for the i2c Data Register */
+ g_i2cDataGPIOMuxReg = GPIO_MUX;
+ g_i2cDataGPIODataReg = GPIO_DATA;
+ g_i2cDataGPIODataDirReg = GPIO_DATA_DIRECTION;
+
+ /* Initialize the Data GPIO Offset */
+ g_i2cDataGPIO = i2cDataGPIO;
+
+ /* Enable the GPIO pins for the i2c Clock and Data (GPIO MUX) */
+ POKE32(g_i2cClkGPIOMuxReg,
+ PEEK32(g_i2cClkGPIOMuxReg) & ~(1 << g_i2cClockGPIO));
+ POKE32(g_i2cDataGPIOMuxReg,
+ PEEK32(g_i2cDataGPIOMuxReg) & ~(1 << g_i2cDataGPIO));
+
+ /* Enable GPIO power */
+ enableGPIO(1);
+
+ /* Clear the i2c lines. */
+ for(i=0; i<9; i++)
+ swI2CStop();
+
+ return 0;
+}
+
+/*
+ * This function reads the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be read from
+ * registerIndex - Slave device's register to be read
+ *
+ * Return Value:
+ * Register value
+ */
+unsigned char swI2CReadReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex
+)
+{
+ unsigned char data;
+
+ /* Send the Start signal */
+ swI2CStart();
+
+ /* Send the device address */
+ swI2CWriteByte(deviceAddress);
+
+ /* Send the register index */
+ swI2CWriteByte(registerIndex);
+
+ /* Get the bus again and get the data from the device read address */
+ swI2CStart();
+ swI2CWriteByte(deviceAddress + 1);
+ data = swI2CReadByte(1);
+
+ /* Stop swI2C and release the bus */
+ swI2CStop();
+
+ return data;
+}
+
+/*
+ * This function writes a value to the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be written
+ * registerIndex - Slave device's register to be written
+ * data - Data to be written to the register
+ *
+ * Result:
+ * 0 - Success
+ * -1 - Fail
+ */
+long swI2CWriteReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex,
+ unsigned char data
+)
+{
+ long returnValue = 0;
+
+ /* Send the Start signal */
+ swI2CStart();
+
+ /* Send the device address and read the data. All should return success
+ in order for the writing processed to be successful
+ */
+ if ((swI2CWriteByte(deviceAddress) != 0) ||
+ (swI2CWriteByte(registerIndex) != 0) ||
+ (swI2CWriteByte(data) != 0))
+ {
+ returnValue = -1;
+ }
+
+ /* Stop i2c and release the bus */
+ swI2CStop();
+
+ return returnValue;
+}
--- /dev/null
+/*******************************************************************
+*
+* Copyright (c) 2007 by Silicon Motion, Inc. (SMI)
+*
+* All rights are reserved. Reproduction or in part is prohibited
+* without the written consent of the copyright owner.
+*
+* swi2c.h --- SM750/SM718 DDK
+* This file contains the definitions for i2c using software
+* implementation.
+*
+*******************************************************************/
+#ifndef _SWI2C_H_
+#define _SWI2C_H_
+
+/* Default i2c CLK and Data GPIO. These are the default i2c pins */
+#define DEFAULT_I2C_SCL 30
+#define DEFAULT_I2C_SDA 31
+
+/*
+ * This function initializes the i2c attributes and bus
+ *
+ * Parameters:
+ * i2cClkGPIO - The GPIO pin to be used as i2c SCL
+ * i2cDataGPIO - The GPIO pin to be used as i2c SDA
+ *
+ * Return Value:
+ * -1 - Fail to initialize the i2c
+ * 0 - Success
+ */
+long swI2CInit(
+ unsigned char i2cClkGPIO,
+ unsigned char i2cDataGPIO
+);
+
+/*
+ * This function reads the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be read from
+ * registerIndex - Slave device's register to be read
+ *
+ * Return Value:
+ * Register value
+ */
+unsigned char swI2CReadReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex
+);
+
+/*
+ * This function writes a value to the slave device's register
+ *
+ * Parameters:
+ * deviceAddress - i2c Slave device address which register
+ * to be written
+ * registerIndex - Slave device's register to be written
+ * data - Data to be written to the register
+ *
+ * Result:
+ * 0 - Success
+ * -1 - Fail
+ */
+long swI2CWriteReg(
+ unsigned char deviceAddress,
+ unsigned char registerIndex,
+ unsigned char data
+);
+
+/*
+ * These two functions are used to toggle the data on the SCL and SDA I2C lines.
+ * The used of these two functions are not recommended unless it is necessary.
+ */
+
+/*
+ * This function set/reset the SCL GPIO pin
+ *
+ * Parameters:
+ * value - Bit value to set to the SCL or SDA (0 = low, 1 = high)
+ */
+void swI2CSCL(unsigned char value);
+
+/*
+ * This function set/reset the SDA GPIO pin
+ *
+ * Parameters:
+ * value - Bit value to set to the SCL or SDA (0 = low, 1 = high)
+ */
+void swI2CSDA(unsigned char value);
+
+#endif /* _SWI2C_H_ */
--- /dev/null
+
+static const struct fb_videomode modedb2[] = {
+ {
+ /* 640x400 @ 70 Hz, 31.5 kHz hsync */
+ NULL, 70, 640, 400, 39721, 40, 24, 39, 9, 96, 2,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 60 Hz, 31.5 kHz hsync */
+ NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 800x600 @ 56 Hz, 35.15 kHz hsync */
+ NULL, 56, 800, 600, 27777, 128, 24, 22, 1, 72, 2,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */
+ NULL, 87, 1024, 768, 22271, 56, 24, 33, 8, 160, 8,
+ 0, FB_VMODE_INTERLACED
+ }, {
+ /* 640x400 @ 85 Hz, 37.86 kHz hsync */
+ NULL, 85, 640, 400, 31746, 96, 32, 41, 1, 64, 3,
+ FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 72 Hz, 36.5 kHz hsync */
+ NULL, 72, 640, 480, 31746, 144, 40, 30, 8, 40, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 75 Hz, 37.50 kHz hsync */
+ NULL, 75, 640, 480, 31746, 120, 16, 16, 1, 64, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 800x600 @ 60 Hz, 37.8 kHz hsync */
+ NULL, 60, 800, 600, 25000, 88, 40, 23, 1, 128, 4,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 85 Hz, 43.27 kHz hsync */
+ NULL, 85, 640, 480, 27777, 80, 56, 25, 1, 56, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */
+ NULL, 69, 1152, 864, 15384, 96, 16, 110, 1, 216, 10,
+ 0, FB_VMODE_INTERLACED
+ }, {
+ /* 800x600 @ 72 Hz, 48.0 kHz hsync */
+ NULL, 72, 800, 600, 20000, 64, 56, 23, 37, 120, 6,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 60 Hz, 48.4 kHz hsync */
+ NULL, 60, 1024, 768, 15384, 168, 8, 29, 3, 144, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 640x480 @ 100 Hz, 53.01 kHz hsync */
+ NULL, 100, 640, 480, 21834, 96, 32, 36, 8, 96, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 60 Hz, 53.5 kHz hsync */
+ NULL, 60, 1152, 864, 11123, 208, 64, 16, 4, 256, 8,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 800x600 @ 85 Hz, 55.84 kHz hsync */
+ NULL, 85, 800, 600, 16460, 160, 64, 36, 16, 64, 5,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 70 Hz, 56.5 kHz hsync */
+ NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x960-60 VESA */
+ NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA
+ }, {
+ /* 1280x1024-60 VESA */
+ NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA
+ }, {
+ /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */
+ NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12,
+ 0, FB_VMODE_INTERLACED
+ }, {
+ /* 800x600 @ 100 Hz, 64.02 kHz hsync */
+ NULL, 100, 800, 600, 14357, 160, 64, 30, 4, 64, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 76 Hz, 62.5 kHz hsync */
+ NULL, 76, 1024, 768, 11764, 208, 8, 36, 16, 120, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 70 Hz, 62.4 kHz hsync */
+ NULL, 70, 1152, 864, 10869, 106, 56, 20, 1, 160, 10,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 61 Hz, 64.2 kHz hsync */
+ NULL, 61, 1280, 1024, 9090, 200, 48, 26, 1, 184, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1400x1050 @ 60Hz, 63.9 kHz hsync */
+ NULL, 68, 1400, 1050, 9259, 136, 40, 13, 1, 112, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/
+ NULL, 75, 1400, 1050, 9271, 120, 56, 13, 0, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/
+ NULL, 60, 1400, 1050, 9259, 128, 40, 12, 0, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 85 Hz, 70.24 kHz hsync */
+ NULL, 85, 1024, 768, 10111, 192, 32, 34, 14, 160, 6,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 78 Hz, 70.8 kHz hsync */
+ NULL, 78, 1152, 864, 9090, 228, 88, 32, 0, 84, 12,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 70 Hz, 74.59 kHz hsync */
+ NULL, 70, 1280, 1024, 7905, 224, 32, 28, 8, 160, 8,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1600x1200 @ 60Hz, 75.00 kHz hsync */
+ NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 84 Hz, 76.0 kHz hsync */
+ NULL, 84, 1152, 864, 7407, 184, 312, 32, 0, 128, 12,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 74 Hz, 78.85 kHz hsync */
+ NULL, 74, 1280, 1024, 7407, 256, 32, 34, 3, 144, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1024x768 @ 100Hz, 80.21 kHz hsync */
+ NULL, 100, 1024, 768, 8658, 192, 32, 21, 3, 192, 10,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 76 Hz, 81.13 kHz hsync */
+ NULL, 76, 1280, 1024, 7407, 248, 32, 34, 3, 104, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1600x1200 @ 70 Hz, 87.50 kHz hsync */
+ NULL, 70, 1600, 1200, 5291, 304, 64, 46, 1, 192, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1152x864 @ 100 Hz, 89.62 kHz hsync */
+ NULL, 100, 1152, 864, 7264, 224, 32, 17, 2, 128, 19,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 85 Hz, 91.15 kHz hsync */
+ NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1600x1200 @ 75 Hz, 93.75 kHz hsync */
+ NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1600x1200 @ 85 Hz, 105.77 kHz hsync */
+ NULL, 85, 1600, 1200, 4545, 272, 16, 37, 4, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1280x1024 @ 100 Hz, 107.16 kHz hsync */
+ NULL, 100, 1280, 1024, 5502, 256, 32, 26, 7, 128, 15,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1800x1440 @ 64Hz, 96.15 kHz hsync */
+ NULL, 64, 1800, 1440, 4347, 304, 96, 46, 1, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 1800x1440 @ 70Hz, 104.52 kHz hsync */
+ NULL, 70, 1800, 1440, 4000, 304, 96, 46, 1, 192, 3,
+ FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED
+ }, {
+ /* 512x384 @ 78 Hz, 31.50 kHz hsync */
+ NULL, 78, 512, 384, 49603, 48, 16, 16, 1, 64, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 512x384 @ 85 Hz, 34.38 kHz hsync */
+ NULL, 85, 512, 384, 45454, 48, 16, 16, 1, 64, 3,
+ 0, FB_VMODE_NONINTERLACED
+ }, {
+ /* 320x200 @ 70 Hz, 31.5 kHz hsync, 8:5 aspect ratio */
+ NULL, 70, 320, 200, 79440, 16, 16, 20, 4, 48, 1,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio */
+ NULL, 60, 320, 240, 79440, 16, 16, 16, 5, 48, 1,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 320x240 @ 72 Hz, 36.5 kHz hsync */
+ NULL, 72, 320, 240, 63492, 16, 16, 16, 4, 48, 2,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 400x300 @ 56 Hz, 35.2 kHz hsync, 4:3 aspect ratio */
+ NULL, 56, 400, 300, 55555, 64, 16, 10, 1, 32, 1,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 400x300 @ 60 Hz, 37.8 kHz hsync */
+ NULL, 60, 400, 300, 50000, 48, 16, 11, 1, 64, 2,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 400x300 @ 72 Hz, 48.0 kHz hsync */
+ NULL, 72, 400, 300, 40000, 32, 24, 11, 19, 64, 3,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */
+ NULL, 56, 480, 300, 46176, 80, 16, 10, 1, 40, 1,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 480x300 @ 60 Hz, 37.8 kHz hsync */
+ NULL, 60, 480, 300, 41858, 56, 16, 11, 1, 80, 2,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 480x300 @ 63 Hz, 39.6 kHz hsync */
+ NULL, 63, 480, 300, 40000, 56, 16, 11, 1, 80, 2,
+ 0, FB_VMODE_DOUBLE
+ }, {
+ /* 480x300 @ 72 Hz, 48.0 kHz hsync */
+ NULL, 72, 480, 300, 33386, 40, 24, 11, 19, 80, 3,
+ 0, FB_VMODE_DOUBLE
+ },
+};
+static const int nmodedb2 = sizeof(modedb2);
--- /dev/null
+Introduction:
+ SM750 of Silicon MOtion is pci express display controller device.
+ The SM750 embedded graphics features include:
+ - dual display
+ - 2D acceleration
+ - 16MB integrated video memory
+
+About the kernel module paramter of driver:
+
+ Use 1280,8bpp index color and 60 hz mode:
+ insmod ./sm750fb.ko g_option="1280x1024-8@60"
+
+ Disable MTRR,Disable 2d acceleration,Disable hardware cursor,
+ and use a 800x600 mode :
+ insmod ./sm750fb.ko g_option="noaccel:nomtrr:nohwc:800x600"
+
+ dual frame buffer for driver with "dual" parameter
+ insmod ./sm750fb.ko g_option="dual,800x600:1024x768"
+ it will create fb0 and fb1 (or fb1,fb2 if fb0 already exist) under /dev
+ and user can use con2fb to link fbX and ttyX
+
+ Notes:
+ 1) if you build the driver with built-in method, the paramter
+ you edited in the grub config file will be also the
+ same format as above modular method,but additionaly add
+ "video=sm750fb:"
+ ahead of parameters,so,it looks like:
+ video=sm750fb:noaccel,1280x1024@60,otherparam,etc...
+ it equal to modular method with below command:
+ insmod ./sm750fb.ko g_option="noaccel:1280x1024@60:otherparm:etc..."
+
+ 2) if you put 800x600 into the paramter without bpp and
+ refresh rate, kernel driver will defaulty use 16bpp and 60hz
+
+Important:
+ if you have vesafb enabled in your config then /dev/fb0 will be created by vesafb
+ and this driver will use fb1, fb2. In that case, you need to configure your X-server
+ to use fb1. Another simple althernative is to disable vesafb from your config.
--- /dev/null
+#include<linux/kernel.h>
+#include<linux/module.h>
+#include<linux/errno.h>
+#include<linux/string.h>
+#include<linux/mm.h>
+#include<linux/slab.h>
+#include<linux/delay.h>
+#include<linux/fb.h>
+#include<linux/ioport.h>
+#include<linux/init.h>
+#include<linux/pci.h>
+#include<linux/mm_types.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include<linux/screen_info.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include <linux/console.h>
+#ifdef CONFIG_MTRR
+#include <asm/mtrr.h>
+#endif
+#include <asm/fb.h>
+#include "sm750.h"
+#include "sm750_hw.h"
+#include "sm750_accel.h"
+#include "sm750_cursor.h"
+
+#include "modedb.h"
+
+int smi_indent = 0;
+
+
+/*
+#ifdef __BIG_ENDIAN
+ssize_t lynxfb_ops_write(struct fb_info *info, const char __user *buf,
+ size_t count, loff_t *ppos);
+ssize_t lynxfb_ops_read(struct fb_info *info, char __user *buf,
+ size_t count, loff_t *ppos);
+#endif
+ */
+
+typedef void (*PROC_SPEC_SETUP)(struct lynx_share*,char *);
+typedef int (*PROC_SPEC_MAP)(struct lynx_share*,struct pci_dev*);
+typedef int (*PROC_SPEC_INITHW)(struct lynx_share*,struct pci_dev*);
+
+
+/* common var for all device */
+static int g_hwcursor = 1;
+static int g_noaccel;
+#ifdef CONFIG_MTRR
+static int g_nomtrr;
+#endif
+static const char * g_fbmode[] = {NULL,NULL};
+static const char * g_def_fbmode = "800x600-16@60";
+static char * g_settings = NULL;
+static int g_dualview;
+static char * g_option = NULL;
+
+/* if not use spin_lock,system will die if user load driver
+ * and immediatly unload driver frequently (dual)*/
+static inline void myspin_lock(spinlock_t * sl){
+ struct lynx_share * share;
+ share = container_of(sl,struct lynx_share,slock);
+ if(share->dual){
+ spin_lock(sl);
+ }
+}
+
+static inline void myspin_unlock(spinlock_t * sl){
+ struct lynx_share * share;
+ share = container_of(sl,struct lynx_share,slock);
+ if(share->dual){
+ spin_unlock(sl);
+ }
+}
+static const struct fb_videomode lynx750_ext[] = {
+ /* 1024x600-60 VESA [1.71:1] */
+ {NULL, 60, 1024, 600, 20423, 144, 40, 18, 1, 104, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED},
+
+ /* 1024x600-70 VESA */
+ {NULL, 70, 1024, 600, 17211, 152, 48, 21, 1, 104, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED},
+
+ /* 1024x600-75 VESA */
+ {NULL, 75, 1024, 600, 15822, 160, 56, 23, 1, 104, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED},
+
+ /* 1024x600-85 VESA */
+ {NULL, 85, 1024, 600, 13730, 168, 56, 26, 1, 112, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED},
+
+ /* 720x480 */
+ {NULL, 60, 720, 480, 37427, 88, 16, 13, 1, 72, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED},
+
+ /* 1280x720 [1.78:1] */
+ {NULL, 60, 1280, 720, 13426, 162, 86, 22, 1, 136, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED},
+
+ /* 1280x768@60 */
+ {NULL,60,1280,768,12579,192,64,20,3,128,7,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED},
+
+ {NULL,60,1360,768,11804,208,64,23,1,144,3,
+ FB_SYNC_HOR_HIGH_ACT|FB_VMODE_NONINTERLACED},
+
+ /* 1360 x 768 [1.77083:1] */
+ {NULL, 60, 1360, 768, 11804, 208, 64, 23, 1, 144, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED},
+
+ /* 1368 x 768 [1.78:1] */
+ {NULL, 60, 1368, 768, 11647, 216, 72, 23, 1, 144, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED},
+
+ /* 1440 x 900 [16:10] */
+ {NULL, 60, 1440, 900, 9392, 232, 80, 28, 1, 152, 3,
+ FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED},
+
+ /* 1440x960 [15:10] */
+ {NULL, 60, 1440, 960, 8733, 240, 88, 30, 1, 152, 3,
+ FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED},
+
+ /* 1920x1080 [16:9] */
+ {NULL, 60, 1920, 1080, 6734, 148, 88, 41, 1, 44, 3,
+ FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED},
+};
+
+
+
+
+/* no hardware cursor supported under version 2.6.10, kernel bug */
+static int lynxfb_ops_cursor(struct fb_info* info,struct fb_cursor* fbcursor)
+{
+ struct lynxfb_par * par;
+ struct lynxfb_crtc * crtc;
+ struct lynx_cursor * cursor;
+
+ par = info->par;
+ crtc = &par->crtc;
+ cursor = &crtc->cursor;
+
+ if(fbcursor->image.width > cursor->maxW ||
+ fbcursor->image.height > cursor->maxH ||
+ fbcursor->image.depth > 1){
+ return -ENXIO;
+ }
+
+ cursor->disable(cursor);
+ if(fbcursor->set & FB_CUR_SETSIZE){
+ cursor->setSize(cursor,fbcursor->image.width,fbcursor->image.height);
+ }
+
+ if(fbcursor->set & FB_CUR_SETPOS){
+ cursor->setPos(cursor,fbcursor->image.dx - info->var.xoffset,
+ fbcursor->image.dy - info->var.yoffset);
+ }
+
+ if(fbcursor->set & FB_CUR_SETCMAP){
+ /* get the 16bit color of kernel means */
+ u16 fg,bg;
+ fg = ((info->cmap.red[fbcursor->image.fg_color] & 0xf800))|
+ ((info->cmap.green[fbcursor->image.fg_color] & 0xfc00) >> 5)|
+ ((info->cmap.blue[fbcursor->image.fg_color] & 0xf800) >> 11);
+
+ bg = ((info->cmap.red[fbcursor->image.bg_color] & 0xf800))|
+ ((info->cmap.green[fbcursor->image.bg_color] & 0xfc00) >> 5)|
+ ((info->cmap.blue[fbcursor->image.bg_color] & 0xf800) >> 11);
+
+ cursor->setColor(cursor,fg,bg);
+ }
+
+
+ if(fbcursor->set & (FB_CUR_SETSHAPE | FB_CUR_SETIMAGE))
+ {
+ cursor->setData(cursor,
+ fbcursor->rop,
+ fbcursor->image.data,
+ fbcursor->mask);
+ }
+
+ if(fbcursor->enable){
+ cursor->enable(cursor);
+ }
+
+ return 0;
+}
+
+static void lynxfb_ops_fillrect(struct fb_info* info,const struct fb_fillrect* region)
+{
+ struct lynxfb_par * par;
+ struct lynx_share * share;
+ unsigned int base,pitch,Bpp,rop;
+ u32 color;
+
+ if(info->state != FBINFO_STATE_RUNNING){
+ return;
+ }
+
+ par = info->par;
+ share = par->share;
+
+ /* each time 2d function begin to work,below three variable always need
+ * be set, seems we can put them together in some place */
+ base = par->crtc.oScreen;
+ pitch = info->fix.line_length;
+ Bpp = info->var.bits_per_pixel >> 3;
+
+ color = (Bpp == 1)?region->color:((u32*)info->pseudo_palette)[region->color];
+ rop = ( region->rop != ROP_COPY ) ? HW_ROP2_XOR:HW_ROP2_COPY;
+
+ myspin_lock(&share->slock);
+ share->accel.de_fillrect(&share->accel,
+ base,pitch,Bpp,
+ region->dx,region->dy,
+ region->width,region->height,
+ color,rop);
+ myspin_unlock(&share->slock);
+}
+
+static void lynxfb_ops_copyarea(struct fb_info * info,const struct fb_copyarea * region)
+{
+ struct lynxfb_par * par;
+ struct lynx_share * share;
+ unsigned int base,pitch,Bpp;
+
+ par = info->par;
+ share = par->share;
+
+ /* each time 2d function begin to work,below three variable always need
+ * be set, seems we can put them together in some place */
+ base = par->crtc.oScreen;
+ pitch = info->fix.line_length;
+ Bpp = info->var.bits_per_pixel >> 3;
+
+ myspin_lock(&share->slock);
+ share->accel.de_copyarea(&share->accel,
+ base,pitch,region->sx,region->sy,
+ base,pitch,Bpp,region->dx,region->dy,
+ region->width,region->height,HW_ROP2_COPY);
+ myspin_unlock(&share->slock);
+}
+
+static void lynxfb_ops_imageblit(struct fb_info*info,const struct fb_image* image)
+{
+ unsigned int base,pitch,Bpp;
+ unsigned int fgcol,bgcol;
+ struct lynxfb_par * par;
+ struct lynx_share * share;
+
+ par = info->par;
+ share = par->share;
+ /* each time 2d function begin to work,below three variable always need
+ * be set, seems we can put them together in some place */
+ base = par->crtc.oScreen;
+ pitch = info->fix.line_length;
+ Bpp = info->var.bits_per_pixel >> 3;
+
+ if(image->depth == 1){
+ if(info->fix.visual == FB_VISUAL_TRUECOLOR ||
+ info->fix.visual == FB_VISUAL_DIRECTCOLOR)
+ {
+ fgcol = ((u32*)info->pseudo_palette)[image->fg_color];
+ bgcol = ((u32*)info->pseudo_palette)[image->bg_color];
+ }
+ else
+ {
+ fgcol = image->fg_color;
+ bgcol = image->bg_color;
+ }
+ goto _do_work;
+ }
+ return;
+_do_work:
+ myspin_lock(&share->slock);
+ share->accel.de_imageblit(&share->accel,
+ image->data,image->width>>3,0,
+ base,pitch,Bpp,
+ image->dx,image->dy,
+ image->width,image->height,
+ fgcol,bgcol,HW_ROP2_COPY);
+ myspin_unlock(&share->slock);
+}
+
+static int lynxfb_ops_pan_display(struct fb_var_screeninfo *var,
+ struct fb_info *info)
+{
+ struct lynxfb_par * par;
+ struct lynxfb_crtc * crtc;
+ int ret;
+
+
+ if(!info)
+ return -EINVAL;
+
+ ret = 0;
+ par = info->par;
+ crtc = &par->crtc;
+ ret = crtc->proc_panDisplay(crtc, var, info);
+
+ return ret;
+}
+
+static int lynxfb_ops_set_par(struct fb_info * info)
+{
+ struct lynxfb_par * par;
+ struct lynx_share * share;
+ struct lynxfb_crtc * crtc;
+ struct lynxfb_output * output;
+ struct fb_var_screeninfo * var;
+ struct fb_fix_screeninfo * fix;
+ int ret;
+ unsigned int line_length;
+
+ if(!info)
+ return -EINVAL;
+
+ ret = 0;
+ par = info->par;
+ share = par->share;
+ crtc = &par->crtc;
+ output = &par->output;
+ var = &info->var;
+ fix = &info->fix;
+
+ /* fix structur is not so FIX ... */
+ line_length = var->xres_virtual * var->bits_per_pixel / 8;
+ line_length = PADDING(crtc->line_pad,line_length);
+ fix->line_length = line_length;
+ pr_err("fix->line_length = %d\n",fix->line_length);
+
+ /* var->red,green,blue,transp are need to be set by driver
+ * and these data should be set before setcolreg routine
+ * */
+
+ switch(var->bits_per_pixel){
+ case 8:
+ fix->visual = FB_VISUAL_PSEUDOCOLOR;
+ var->red.offset = 0;
+ var->red.length = 8;
+ var->green.offset = 0;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ var->transp.length = 0;
+ var->transp.offset = 0;
+ break;
+ case 16:
+ var->red.offset = 11;
+ var->red.length = 5;
+ var->green.offset = 5;
+ var->green.length = 6;
+ var->blue.offset = 0;
+ var->blue.length = 5;
+ var->transp.length = 0;
+ var->transp.offset = 0;
+ fix->visual = FB_VISUAL_TRUECOLOR;
+ break;
+ case 24:
+ case 32:
+ var->red.offset = 16;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 0 ;
+ var->blue.length = 8;
+ fix->visual = FB_VISUAL_TRUECOLOR;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ var->height = var->width = -1;
+ var->accel_flags = 0;/*FB_ACCELF_TEXT;*/
+
+ if(ret){
+ pr_err("pixel bpp format not satisfied\n.");
+ return ret;
+ }
+ ret = crtc->proc_setMode(crtc,var,fix);
+ if(!ret)
+ ret = output->proc_setMode(output,var,fix);
+ return ret;
+}
+
+static inline unsigned int chan_to_field(unsigned int chan,struct fb_bitfield * bf)
+{
+ chan &= 0xffff;
+ chan >>= 16 - bf->length;
+ return chan << bf->offset;
+}
+
+#ifdef CONFIG_PM
+static int lynxfb_suspend(struct pci_dev *pdev, pm_message_t mesg)
+{
+ struct fb_info *info;
+ struct lynx_share *share;
+ int ret;
+
+ if (mesg.event == pdev->dev.power.power_state.event)
+ return 0;
+
+ ret = 0;
+ share = pci_get_drvdata(pdev);
+ switch (mesg.event) {
+ case PM_EVENT_FREEZE:
+ case PM_EVENT_PRETHAW:
+ pdev->dev.power.power_state = mesg;
+ return 0;
+ }
+
+ console_lock();
+ if (mesg.event & PM_EVENT_SLEEP) {
+ info = share->fbinfo[0];
+ if (info)
+ /* 1 means do suspend*/
+ fb_set_suspend(info, 1);
+ info = share->fbinfo[1];
+ if (info)
+ /* 1 means do suspend*/
+ fb_set_suspend(info, 1);
+
+ ret = pci_save_state(pdev);
+ if (ret) {
+ pr_err("error:%d occurred in pci_save_state\n", ret);
+ return ret;
+ }
+
+ /* set chip to sleep mode*/
+ if (share->suspend)
+ (*share->suspend)(share);
+
+ pci_disable_device(pdev);
+ ret = pci_set_power_state(pdev, pci_choose_state(pdev, mesg));
+ if (ret) {
+ pr_err("error:%d occurred in pci_set_power_state\n", ret);
+ return ret;
+ }
+ }
+
+ pdev->dev.power.power_state = mesg;
+ console_unlock();
+ return ret;
+}
+
+static int lynxfb_resume(struct pci_dev* pdev)
+{
+ struct fb_info * info;
+ struct lynx_share * share;
+
+ struct lynxfb_par * par;
+ struct lynxfb_crtc * crtc;
+ struct lynx_cursor * cursor;
+
+ int ret;
+
+
+ ret = 0;
+ share = pci_get_drvdata(pdev);
+
+ console_lock();
+
+ if((ret = pci_set_power_state(pdev, PCI_D0)) != 0){
+ pr_err("error:%d occured in pci_set_power_state\n",ret);
+ return ret;
+ }
+
+
+ if(pdev->dev.power.power_state.event != PM_EVENT_FREEZE){
+ pci_restore_state(pdev);
+ if ((ret = pci_enable_device(pdev)) != 0){
+ pr_err("error:%d occured in pci_enable_device\n",ret);
+ return ret;
+ }
+ pci_set_master(pdev);
+ }
+ if(share->resume)
+ (*share->resume)(share);
+
+ hw_sm750_inithw(share,pdev);
+
+
+ info = share->fbinfo[0];
+
+ if(info){
+ par = info->par;
+ crtc = &par->crtc;
+ cursor = &crtc->cursor;
+ memset(cursor->vstart, 0x0, cursor->size);
+ memset(crtc->vScreen,0x0,crtc->vidmem_size);
+ lynxfb_ops_set_par(info);
+ fb_set_suspend(info, 0);
+ }
+
+ info = share->fbinfo[1];
+
+ if(info){
+ par = info->par;
+ crtc = &par->crtc;
+ cursor = &crtc->cursor;
+ memset(cursor->vstart, 0x0, cursor->size);
+ memset(crtc->vScreen,0x0,crtc->vidmem_size);
+ lynxfb_ops_set_par(info);
+ fb_set_suspend(info, 0);
+ }
+
+
+ console_unlock();
+ return ret;
+}
+#endif
+
+static int lynxfb_ops_check_var(struct fb_var_screeninfo* var,struct fb_info* info)
+{
+ struct lynxfb_par * par;
+ struct lynxfb_crtc * crtc;
+ struct lynxfb_output * output;
+ struct lynx_share * share;
+ int ret;
+ resource_size_t request;
+
+
+ par = info->par;
+ crtc = &par->crtc;
+ output = &par->output;
+ share = par->share;
+ ret = 0;
+
+ pr_debug("check var:%dx%d-%d\n",
+ var->xres,
+ var->yres,
+ var->bits_per_pixel);
+
+
+ switch(var->bits_per_pixel){
+ case 8:
+ case 16:
+ case 24: /* support 24 bpp for only lynx712/722/720 */
+ case 32:
+ break;
+ default:
+ pr_err("bpp %d not supported\n",var->bits_per_pixel);
+ ret = -EINVAL;
+ goto exit;
+ }
+
+ switch(var->bits_per_pixel){
+ case 8:
+ info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
+ var->red.offset = 0;
+ var->red.length = 8;
+ var->green.offset = 0;
+ var->green.length = 8;
+ var->blue.offset = 0;
+ var->blue.length = 8;
+ var->transp.length = 0;
+ var->transp.offset = 0;
+ break;
+ case 16:
+ var->red.offset = 11;
+ var->red.length = 5;
+ var->green.offset = 5;
+ var->green.length = 6;
+ var->blue.offset = 0;
+ var->blue.length = 5;
+ var->transp.length = 0;
+ var->transp.offset = 0;
+ info->fix.visual = FB_VISUAL_TRUECOLOR;
+ break;
+ case 24:
+ case 32:
+ var->red.offset = 16;
+ var->red.length = 8;
+ var->green.offset = 8;
+ var->green.length = 8;
+ var->blue.offset = 0 ;
+ var->blue.length = 8;
+ info->fix.visual = FB_VISUAL_TRUECOLOR;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+ var->height = var->width = -1;
+ var->accel_flags = 0;/*FB_ACCELF_TEXT;*/
+
+ /* check if current fb's video memory big enought to hold the onscreen */
+ request = var->xres_virtual * (var->bits_per_pixel >> 3);
+ /* defaulty crtc->channel go with par->index */
+
+ request = PADDING(crtc->line_pad,request);
+ request = request * var->yres_virtual;
+ if(crtc->vidmem_size < request){
+ pr_err("not enough video memory for mode\n");
+ return -ENOMEM;
+ }
+
+ ret = output->proc_checkMode(output,var);
+ if(!ret)
+ ret = crtc->proc_checkMode(crtc,var);
+exit:
+ return ret;
+}
+
+
+static int lynxfb_ops_setcolreg(unsigned regno,unsigned red,
+ unsigned green,unsigned blue,
+ unsigned transp,struct fb_info * info)
+{
+ struct lynxfb_par * par;
+ struct lynxfb_crtc * crtc;
+ struct fb_var_screeninfo * var;
+ int ret;
+
+ par = info->par;
+ crtc = &par->crtc;
+ var = &info->var;
+ ret = 0;
+
+ //pr_debug("regno=%d,red=%d,green=%d,blue=%d\n",regno,red,green,blue);
+ if(regno > 256){
+ pr_err("regno = %d\n",regno);
+ return -EINVAL;
+ }
+
+ if(info->var.grayscale)
+ red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
+
+ if(var->bits_per_pixel == 8 && info->fix.visual == FB_VISUAL_PSEUDOCOLOR)
+ {
+ red >>= 8;
+ green >>= 8;
+ blue >>= 8;
+ ret = crtc->proc_setColReg(crtc,regno,red,green,blue);
+ goto exit;
+ }
+
+
+ if(info->fix.visual == FB_VISUAL_TRUECOLOR && regno < 256 )
+ {
+ u32 val;
+ if(var->bits_per_pixel == 16 ||
+ var->bits_per_pixel == 32 ||
+ var->bits_per_pixel == 24)
+ {
+ val = chan_to_field(red,&var->red);
+ val |= chan_to_field(green,&var->green);
+ val |= chan_to_field(blue,&var->blue);
+ par->pseudo_palette[regno] = val;
+ goto exit;
+ }
+ }
+
+ ret = -EINVAL;
+
+exit:
+ return ret;
+}
+
+static int lynxfb_ops_blank(int blank,struct fb_info* info)
+{
+ struct lynxfb_par * par;
+ struct lynxfb_output * output;
+
+ pr_debug("blank = %d.\n",blank);
+ par = info->par;
+ output = &par->output;
+ return output->proc_setBLANK(output,blank);
+}
+
+static int sm750fb_set_drv(struct lynxfb_par * par)
+{
+ int ret;
+ struct lynx_share * share;
+ struct sm750_share * spec_share;
+ struct lynxfb_output * output;
+ struct lynxfb_crtc * crtc;
+
+ ret = 0;
+
+ share = par->share;
+ spec_share = container_of(share,struct sm750_share,share);
+ output = &par->output;
+ crtc = &par->crtc;
+
+ crtc->vidmem_size = (share->dual)?share->vidmem_size>>1:share->vidmem_size;
+ /* setup crtc and output member */
+ spec_share->hwCursor = g_hwcursor;
+
+ crtc->proc_setMode = hw_sm750_crtc_setMode;
+ crtc->proc_checkMode = hw_sm750_crtc_checkMode;
+ crtc->proc_setColReg = hw_sm750_setColReg;
+ crtc->proc_panDisplay = hw_sm750_pan_display;
+ crtc->clear = hw_sm750_crtc_clear;
+ crtc->line_pad = 16;
+ //crtc->xpanstep = crtc->ypanstep = crtc->ywrapstep = 0;
+ crtc->xpanstep = 8;
+ crtc->ypanstep = 1;
+ crtc->ywrapstep = 0;
+
+ output->proc_setMode = hw_sm750_output_setMode;
+ output->proc_checkMode = hw_sm750_output_checkMode;
+
+ output->proc_setBLANK = (share->revid == SM750LE_REVISION_ID)?hw_sm750le_setBLANK:hw_sm750_setBLANK;
+ output->clear = hw_sm750_output_clear;
+ /* chip specific phase */
+ share->accel.de_wait = (share->revid == SM750LE_REVISION_ID)?hw_sm750le_deWait: hw_sm750_deWait;
+ switch (spec_share->state.dataflow)
+ {
+ case sm750_simul_pri:
+ output->paths = sm750_pnc;
+ crtc->channel = sm750_primary;
+ crtc->oScreen = 0;
+ crtc->vScreen = share->pvMem;
+ pr_info("use simul primary mode\n");
+ break;
+ case sm750_simul_sec:
+ output->paths = sm750_pnc;
+ crtc->channel = sm750_secondary;
+ crtc->oScreen = 0;
+ crtc->vScreen = share->pvMem;
+ break;
+ case sm750_dual_normal:
+ if(par->index == 0){
+ output->paths = sm750_panel;
+ crtc->channel = sm750_primary;
+ crtc->oScreen = 0;
+ crtc->vScreen = share->pvMem;
+ }else{
+ output->paths = sm750_crt;
+ crtc->channel = sm750_secondary;
+ /* not consider of padding stuffs for oScreen,need fix*/
+ crtc->oScreen = (share->vidmem_size >> 1);
+ crtc->vScreen = share->pvMem + crtc->oScreen;
+ }
+ break;
+ case sm750_dual_swap:
+ if(par->index == 0){
+ output->paths = sm750_panel;
+ crtc->channel = sm750_secondary;
+ crtc->oScreen = 0;
+ crtc->vScreen = share->pvMem;
+ }else{
+ output->paths = sm750_crt;
+ crtc->channel = sm750_primary;
+ /* not consider of padding stuffs for oScreen,need fix*/
+ crtc->oScreen = (share->vidmem_size >> 1);
+ crtc->vScreen = share->pvMem + crtc->oScreen;
+ }
+ break;
+ default:
+ ret = -EINVAL;
+ }
+
+ return ret;
+}
+
+static struct fb_ops lynxfb_ops={
+ .owner = THIS_MODULE,
+ .fb_check_var = lynxfb_ops_check_var,
+ .fb_set_par = lynxfb_ops_set_par,
+ .fb_setcolreg = lynxfb_ops_setcolreg,
+ .fb_blank = lynxfb_ops_blank,
+ .fb_fillrect = cfb_fillrect,
+ .fb_imageblit = cfb_imageblit,
+ .fb_copyarea = cfb_copyarea,
+ /* cursor */
+ .fb_cursor = lynxfb_ops_cursor,
+};
+
+
+static int lynxfb_set_fbinfo(struct fb_info* info,int index)
+{
+ int i;
+ struct lynxfb_par * par;
+ struct lynx_share * share;
+ struct lynxfb_crtc * crtc;
+ struct lynxfb_output * output;
+ struct fb_var_screeninfo * var;
+ struct fb_fix_screeninfo * fix;
+
+ const struct fb_videomode * pdb[] = {
+ lynx750_ext, NULL,vesa_modes,
+ };
+ int cdb[] = {ARRAY_SIZE(lynx750_ext),0,VESA_MODEDB_SIZE};
+ static const char * mdb_desc[] ={
+ "driver prepared modes",
+ "kernel prepared default modedb",
+ "kernel HELPERS prepared vesa_modes",
+ };
+
+
+ static const char * fixId[2]=
+ {
+ "sm750_fb1","sm750_fb2",
+ };
+
+ int ret,line_length;
+
+ ret = 0;
+ par = (struct lynxfb_par *)info->par;
+ share = par->share;
+ crtc = &par->crtc;
+ output = &par->output;
+ var = &info->var;
+ fix = &info->fix;
+
+ /* set index */
+ par->index = index;
+ output->channel = &crtc->channel;
+ sm750fb_set_drv(par);
+ lynxfb_ops.fb_pan_display = lynxfb_ops_pan_display;
+
+
+ /* set current cursor variable and proc pointer,
+ * must be set after crtc member initialized */
+ crtc->cursor.offset = crtc->oScreen + crtc->vidmem_size - 1024;
+ crtc->cursor.mmio = share->pvReg + 0x800f0 + (int)crtc->channel * 0x140;
+
+ pr_info("crtc->cursor.mmio = %p\n",crtc->cursor.mmio);
+ crtc->cursor.maxH = crtc->cursor.maxW = 64;
+ crtc->cursor.size = crtc->cursor.maxH*crtc->cursor.maxW*2/8;
+ crtc->cursor.disable = hw_cursor_disable;
+ crtc->cursor.enable = hw_cursor_enable;
+ crtc->cursor.setColor = hw_cursor_setColor;
+ crtc->cursor.setPos = hw_cursor_setPos;
+ crtc->cursor.setSize = hw_cursor_setSize;
+ crtc->cursor.setData = hw_cursor_setData;
+ crtc->cursor.vstart = share->pvMem + crtc->cursor.offset;
+
+
+ crtc->cursor.share = share;
+ memset(crtc->cursor.vstart, 0, crtc->cursor.size);
+ if(!g_hwcursor){
+ lynxfb_ops.fb_cursor = NULL;
+ crtc->cursor.disable(&crtc->cursor);
+ }
+
+
+ /* set info->fbops, must be set before fb_find_mode */
+ if(!share->accel_off){
+ /* use 2d acceleration */
+ lynxfb_ops.fb_fillrect = lynxfb_ops_fillrect;
+ lynxfb_ops.fb_copyarea = lynxfb_ops_copyarea;
+ lynxfb_ops.fb_imageblit = lynxfb_ops_imageblit;
+ }
+ info->fbops = &lynxfb_ops;
+
+ if(!g_fbmode[index]){
+ g_fbmode[index] = g_def_fbmode;
+ if(index)
+ g_fbmode[index] = g_fbmode[0];
+ }
+
+
+ for(i=0;i<3;i++){
+
+ ret = fb_find_mode(var,info,g_fbmode[index],
+ pdb[i],cdb[i],NULL,8);
+
+ if(ret == 1){
+ pr_info("success! use specified mode:%s in %s\n",
+ g_fbmode[index],
+ mdb_desc[i]);
+ break;
+ }else if(ret == 2){
+ pr_warn("use specified mode:%s in %s,with an ignored refresh rate\n",
+ g_fbmode[index],
+ mdb_desc[i]);
+ break;
+ }else if(ret == 3){
+ pr_warn("wanna use default mode\n");
+// break;
+ }else if(ret == 4){
+ pr_warn("fall back to any valid mode\n");
+ }else{
+ pr_warn("ret = %d,fb_find_mode failed,with %s\n",ret,mdb_desc[i]);
+ }
+ }
+
+ /* some member of info->var had been set by fb_find_mode */
+
+ pr_info("Member of info->var is :\n\
+ xres=%d\n\
+ yres=%d\n\
+ xres_virtual=%d\n\
+ yres_virtual=%d\n\
+ xoffset=%d\n\
+ yoffset=%d\n\
+ bits_per_pixel=%d\n \
+ ...\n",var->xres,var->yres,var->xres_virtual,var->yres_virtual,
+ var->xoffset,var->yoffset,var->bits_per_pixel);
+
+ /* set par */
+ par->info = info;
+
+ /* set info */
+ line_length = PADDING(crtc->line_pad,
+ (var->xres_virtual * var->bits_per_pixel/8));
+
+ info->pseudo_palette = &par->pseudo_palette[0];
+ info->screen_base = crtc->vScreen;
+ pr_debug("screen_base vaddr = %p\n",info->screen_base);
+ info->screen_size = line_length * var->yres_virtual;
+ info->flags = FBINFO_FLAG_DEFAULT|0;
+
+ /* set info->fix */
+ fix->type = FB_TYPE_PACKED_PIXELS;
+ fix->type_aux = 0;
+ fix->xpanstep = crtc->xpanstep;
+ fix->ypanstep = crtc->ypanstep;
+ fix->ywrapstep = crtc->ywrapstep;
+ fix->accel = FB_ACCEL_SMI;
+
+ strlcpy(fix->id,fixId[index],sizeof(fix->id));
+
+
+ fix->smem_start = crtc->oScreen + share->vidmem_start;
+ pr_info("fix->smem_start = %lx\n",fix->smem_start);
+ /* according to mmap experiment from user space application,
+ * fix->mmio_len should not larger than virtual size
+ * (xres_virtual x yres_virtual x ByPP)
+ * Below line maybe buggy when user mmap fb dev node and write
+ * data into the bound over virtual size
+ * */
+ fix->smem_len = crtc->vidmem_size;
+ pr_info("fix->smem_len = %x\n",fix->smem_len);
+ info->screen_size = fix->smem_len;
+ fix->line_length = line_length;
+ fix->mmio_start = share->vidreg_start;
+ pr_info("fix->mmio_start = %lx\n",fix->mmio_start);
+ fix->mmio_len = share->vidreg_size;
+ pr_info("fix->mmio_len = %x\n",fix->mmio_len);
+ switch(var->bits_per_pixel)
+ {
+ case 8:
+ fix->visual = FB_VISUAL_PSEUDOCOLOR;
+ break;
+ case 16:
+ case 32:
+ fix->visual = FB_VISUAL_TRUECOLOR;
+ break;
+ }
+
+ /* set var */
+ var->activate = FB_ACTIVATE_NOW;
+ var->accel_flags = 0;
+ var->vmode = FB_VMODE_NONINTERLACED;
+
+ pr_debug("#1 show info->cmap : \nstart=%d,len=%d,red=%p,green=%p,blue=%p,transp=%p\n",
+ info->cmap.start,info->cmap.len,
+ info->cmap.red,info->cmap.green,info->cmap.blue,
+ info->cmap.transp);
+
+ if((ret = fb_alloc_cmap(&info->cmap,256,0)) < 0){
+ pr_err("Could not allcate memory for cmap.\n");
+ goto exit;
+ }
+
+ pr_debug("#2 show info->cmap : \nstart=%d,len=%d,red=%p,green=%p,blue=%p,transp=%p\n",
+ info->cmap.start,info->cmap.len,
+ info->cmap.red,info->cmap.green,info->cmap.blue,
+ info->cmap.transp);
+
+exit:
+ lynxfb_ops_check_var(var,info);
+// lynxfb_ops_set_par(info);
+ return ret;
+}
+
+/* chip specific g_option configuration routine */
+static void sm750fb_setup(struct lynx_share * share,char * src)
+{
+ struct sm750_share * spec_share;
+ char * opt;
+#ifdef CAP_EXPENSION
+ char * exp_res;
+#endif
+ int swap;
+
+
+ spec_share = container_of(share,struct sm750_share,share);
+#ifdef CAP_EXPENSIION
+ exp_res = NULL;
+#endif
+ swap = 0;
+
+ spec_share->state.initParm.chip_clk = 0;
+ spec_share->state.initParm.mem_clk = 0;
+ spec_share->state.initParm.master_clk = 0;
+ spec_share->state.initParm.powerMode = 0;
+ spec_share->state.initParm.setAllEngOff = 0;
+ spec_share->state.initParm.resetMemory = 1;
+
+ /*defaultly turn g_hwcursor on for both view */
+ g_hwcursor = 3;
+
+ if(!src || !*src){
+ pr_warn("no specific g_option.\n");
+ goto NO_PARAM;
+ }
+
+ while((opt = strsep(&src,":")) != NULL && *opt != 0){
+ pr_err("opt=%s\n",opt);
+ pr_err("src=%s\n",src);
+
+ if(!strncmp(opt,"swap",strlen("swap")))
+ swap = 1;
+ else if(!strncmp(opt,"nocrt",strlen("nocrt")))
+ spec_share->state.nocrt = 1;
+ else if(!strncmp(opt,"36bit",strlen("36bit")))
+ spec_share->state.pnltype = sm750_doubleTFT;
+ else if(!strncmp(opt,"18bit",strlen("18bit")))
+ spec_share->state.pnltype = sm750_dualTFT;
+ else if(!strncmp(opt,"24bit",strlen("24bit")))
+ spec_share->state.pnltype = sm750_24TFT;
+#ifdef CAP_EXPANSION
+ else if(!strncmp(opt,"exp:",strlen("exp:")))
+ exp_res = opt + strlen("exp:");
+#endif
+ else if(!strncmp(opt,"nohwc0",strlen("nohwc0")))
+ g_hwcursor &= ~0x1;
+ else if(!strncmp(opt,"nohwc1",strlen("nohwc1")))
+ g_hwcursor &= ~0x2;
+ else if(!strncmp(opt,"nohwc",strlen("nohwc")))
+ g_hwcursor = 0;
+ else
+ {
+ if(!g_fbmode[0]){
+ g_fbmode[0] = opt;
+ pr_info("find fbmode0 : %s\n",g_fbmode[0]);
+ }else if(!g_fbmode[1]){
+ g_fbmode[1] = opt;
+ pr_info("find fbmode1 : %s\n",g_fbmode[1]);
+ }else{
+ pr_warn("How many view you wann set?\n");
+ }
+ }
+ }
+#ifdef CAP_EXPANSION
+ if(getExpRes(exp_res,&spec_share->state.xLCD,&spec_share->state.yLCD))
+ {
+ /* seems exp_res is not valid*/
+ spec_share->state.xLCD = spec_share->state.yLCD = 0;
+ }
+#endif
+
+NO_PARAM:
+ if(share->revid != SM750LE_REVISION_ID){
+ if(share->dual)
+ {
+ if(swap)
+ spec_share->state.dataflow = sm750_dual_swap;
+ else
+ spec_share->state.dataflow = sm750_dual_normal;
+ }else{
+ if(swap)
+ spec_share->state.dataflow = sm750_simul_sec;
+ else
+ spec_share->state.dataflow = sm750_simul_pri;
+ }
+ }else{
+ /* SM750LE only have one crt channel */
+ spec_share->state.dataflow = sm750_simul_sec;
+ /* sm750le do not have complex attributes*/
+ spec_share->state.nocrt = 0;
+ }
+}
+
+static int lynxfb_pci_probe(struct pci_dev * pdev,
+ const struct pci_device_id * ent)
+{
+ struct fb_info * info[] = {NULL,NULL};
+ struct lynx_share * share = NULL;
+
+ struct sm750_share *spec_share = NULL;
+ size_t spec_offset = 0;
+ int fbidx;
+
+
+ /* enable device */
+ if(pci_enable_device(pdev)){
+ pr_err("can not enable device.\n");
+ goto err_enable;
+ }
+
+ /* though offset of share in sm750_share is 0,
+ * we use this marcro as the same */
+ spec_offset = offsetof(struct sm750_share,share);
+
+ spec_share = kzalloc(sizeof(*spec_share),GFP_KERNEL);
+ if(!spec_share){
+ pr_err("Could not allocate memory for share.\n");
+ goto err_share;
+ }
+
+ /* setting share structure */
+ share = (struct lynx_share * )(&(spec_share->share));
+ share->fbinfo[0] = share->fbinfo[1] = NULL;
+ share->devid = pdev->device;
+ share->revid = pdev->revision;
+
+ pr_info("share->revid = %02x\n",share->revid);
+ share->pdev = pdev;
+#ifdef CONFIG_MTRR
+ share->mtrr_off = g_nomtrr;
+ share->mtrr.vram = 0;
+ share->mtrr.vram_added = 0;
+#endif
+ share->accel_off = g_noaccel;
+ share->dual = g_dualview;
+ spin_lock_init(&share->slock);
+
+ if(!share->accel_off){
+ /* hook deInit and 2d routines, notes that below hw_xxx
+ * routine can work on most of lynx chips
+ * if some chip need specific function,please hook it in smXXX_set_drv
+ * routine */
+ share->accel.de_init = hw_de_init;
+ share->accel.de_fillrect = hw_fillrect;
+ share->accel.de_copyarea = hw_copyarea;
+ share->accel.de_imageblit = hw_imageblit;
+ pr_info("enable 2d acceleration\n");
+ }else{
+ pr_info("disable 2d acceleration\n");
+ }
+
+ /* call chip specific setup routine */
+ sm750fb_setup(share,g_settings);
+
+ /* call chip specific mmap routine */
+ if(hw_sm750_map(share,pdev)){
+ pr_err("Memory map failed\n");
+ goto err_map;
+ }
+
+#ifdef CONFIG_MTRR
+ if(!share->mtrr_off){
+ pr_info("enable mtrr\n");
+ share->mtrr.vram = mtrr_add(share->vidmem_start,
+ share->vidmem_size,
+ MTRR_TYPE_WRCOMB,1);
+
+ if(share->mtrr.vram < 0){
+ /* don't block driver with the failure of MTRR */
+ pr_err("Unable to setup MTRR.\n");
+ }else{
+ share->mtrr.vram_added = 1;
+ pr_info("MTRR added succesfully\n");
+ }
+ }
+#endif
+
+ memset(share->pvMem,0,share->vidmem_size);
+
+ pr_info("sm%3x mmio address = %p\n",share->devid,share->pvReg);
+
+ pci_set_drvdata(pdev,share);
+
+ /* call chipInit routine */
+ hw_sm750_inithw(share,pdev);
+
+ /* allocate frame buffer info structor according to g_dualview */
+ fbidx = 0;
+ALLOC_FB:
+ info[fbidx] = framebuffer_alloc(sizeof(struct lynxfb_par),&pdev->dev);
+ if(!info[fbidx])
+ {
+ pr_err("Could not allocate framebuffer #%d.\n",fbidx);
+ if(fbidx == 0)
+ goto err_info0_alloc;
+ else
+ goto err_info1_alloc;
+ }
+ else
+ {
+ struct lynxfb_par * par;
+ int errno;
+ pr_info("framebuffer #%d alloc okay\n",fbidx);
+ share->fbinfo[fbidx] = info[fbidx];
+ par = info[fbidx]->par;
+ par->share = share;
+
+ /* set fb_info structure */
+ if(lynxfb_set_fbinfo(info[fbidx],fbidx)){
+ pr_err("Failed to initial fb_info #%d.\n",fbidx);
+ if(fbidx == 0)
+ goto err_info0_set;
+ else
+ goto err_info1_set;
+ }
+
+ /* register frame buffer*/
+ pr_info("Ready to register framebuffer #%d.\n",fbidx);
+ errno = register_framebuffer(info[fbidx]);
+ if (errno < 0) {
+ pr_err("Failed to register fb_info #%d. err %d\n",fbidx, errno);
+ if(fbidx == 0)
+ goto err_register0;
+ else
+ goto err_register1;
+ }
+ pr_info("Accomplished register framebuffer #%d.\n",fbidx);
+ }
+
+ /* no dual view by far */
+ fbidx++;
+ if(share->dual && fbidx < 2)
+ goto ALLOC_FB;
+
+ return 0;
+
+err_register1:
+err_info1_set:
+ framebuffer_release(info[1]);
+err_info1_alloc:
+ unregister_framebuffer(info[0]);
+err_register0:
+err_info0_set:
+ framebuffer_release(info[0]);
+err_info0_alloc:
+err_map:
+ kfree(spec_share);
+err_share:
+err_enable:
+ return -ENODEV;
+}
+
+static void __exit lynxfb_pci_remove(struct pci_dev * pdev)
+{
+ struct fb_info * info;
+ struct lynx_share * share;
+ void * spec_share;
+ struct lynxfb_par * par;
+ int cnt;
+
+ cnt = 2;
+ share = pci_get_drvdata(pdev);
+
+ while(cnt-- > 0){
+ info = share->fbinfo[cnt];
+ if(!info)
+ continue;
+ par = info->par;
+
+ unregister_framebuffer(info);
+ /* clean crtc & output allocations*/
+ par->crtc.clear(&par->crtc);
+ par->output.clear(&par->output);
+ /* release frame buffer*/
+ framebuffer_release(info);
+ }
+#ifdef CONFIG_MTRR
+ if(share->mtrr.vram_added)
+ mtrr_del(share->mtrr.vram,share->vidmem_start,share->vidmem_size);
+#endif
+ // pci_release_regions(pdev);
+
+ iounmap(share->pvReg);
+ iounmap(share->pvMem);
+ spec_share = container_of(share,struct sm750_share,share);
+ kfree(g_settings);
+ kfree(spec_share);
+ pci_set_drvdata(pdev,NULL);
+}
+
+static int __init lynxfb_setup(char * options)
+{
+ int len;
+ char * opt,*tmp;
+
+
+ if(!options || !*options){
+ pr_warn("no options.\n");
+ return 0;
+ }
+
+ pr_info("options:%s\n",options);
+
+ len = strlen(options) + 1;
+ g_settings = kzalloc(len, GFP_KERNEL);
+ if(!g_settings)
+ return -ENOMEM;
+
+ tmp = g_settings;
+
+ /* Notes:
+ char * strsep(char **s,const char * ct);
+ @s: the string to be searched
+ @ct :the characters to search for
+
+ strsep() updates @options to pointer after the first found token
+ it also returns the pointer ahead the token.
+ */
+ while((opt = strsep(&options,":"))!=NULL)
+ {
+ /* options that mean for any lynx chips are configured here */
+ if(!strncmp(opt,"noaccel",strlen("noaccel")))
+ g_noaccel = 1;
+#ifdef CONFIG_MTRR
+ else if(!strncmp(opt,"nomtrr",strlen("nomtrr")))
+ g_nomtrr = 1;
+#endif
+ else if(!strncmp(opt,"dual",strlen("dual")))
+ g_dualview = 1;
+ else
+ {
+ strcat(tmp,opt);
+ tmp += strlen(opt);
+ if(options != NULL)
+ *tmp++ = ':';
+ else
+ *tmp++ = 0;
+ }
+ }
+
+ /* misc g_settings are transport to chip specific routines */
+ pr_info("parameter left for chip specific analysis:%s\n",g_settings);
+ return 0;
+}
+
+static struct pci_device_id smi_pci_table[] = {
+ { PCI_DEVICE(0x126f, 0x0750), },
+ {0,}
+};
+
+MODULE_DEVICE_TABLE(pci,smi_pci_table);
+
+static struct pci_driver lynxfb_driver = {
+ .name = "sm750fb",
+ .id_table = smi_pci_table,
+ .probe = lynxfb_pci_probe,
+ .remove = lynxfb_pci_remove,
+#ifdef CONFIG_PM
+ .suspend = lynxfb_suspend,
+ .resume = lynxfb_resume,
+#endif
+};
+
+
+static int __init lynxfb_init(void)
+{
+ char *option ;
+ int ret;
+
+#ifdef MODULE
+ option = g_option;
+#else
+ if(fb_get_options("sm750fb",&option))
+ return -ENODEV;
+#endif
+
+ lynxfb_setup(option);
+ ret = pci_register_driver(&lynxfb_driver);
+ return ret;
+}
+module_init(lynxfb_init);
+
+static void __exit lynxfb_exit(void)
+{
+ pci_unregister_driver(&lynxfb_driver);
+}
+module_exit(lynxfb_exit);
+
+module_param(g_option,charp,S_IRUGO);
+
+MODULE_PARM_DESC(g_option,
+ "\n\t\tCommon options:\n"
+ "\t\tnoaccel:disable 2d capabilities\n"
+ "\t\tnomtrr:disable MTRR attribute for video memory\n"
+ "\t\tdualview:dual frame buffer feature enabled\n"
+ "\t\tnohwc:disable hardware cursor\n"
+ "\t\tUsual example:\n"
+ "\t\tinsmod ./sm750fb.ko g_option=\"noaccel,nohwc,1280x1024-8@60\"\n"
+ );
+
+MODULE_AUTHOR("monk liu <monk.liu@siliconmotion.com>");
+MODULE_AUTHOR("Sudip Mukherjee <sudip@vectorindia.org>");
+MODULE_DESCRIPTION("Frame buffer driver for SM750 chipset");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+#ifndef LYNXDRV_H_
+#define LYNXDRV_H_
+
+
+
+#define FB_ACCEL_SMI 0xab
+/* please use revision id to distinguish sm750le and sm750*/
+#define SPC_SM750 0
+
+//#define SPC_SM750LE 8
+
+#define MB(x) ((x)<<20)
+#define MHZ(x) ((x) * 1000000)
+/* align should be 2,4,8,16 */
+#define PADDING(align,data) (((data)+(align)-1)&(~((align) -1)))
+extern int smi_indent;
+
+
+struct lynx_accel{
+ /* base virtual address of DPR registers */
+ volatile unsigned char __iomem * dprBase;
+ /* base virtual address of de data port */
+ volatile unsigned char __iomem * dpPortBase;
+
+ /* function fointers */
+ void (*de_init)(struct lynx_accel *);
+
+ int (*de_wait)(void);/* see if hardware ready to work */
+
+ int (*de_fillrect)(struct lynx_accel *,u32,u32,u32,
+ u32,u32,u32,u32,u32,u32);
+
+ int (*de_copyarea)(struct lynx_accel *,u32,u32,u32,u32,
+ u32,u32,u32,u32,
+ u32,u32,u32,u32);
+
+ int (*de_imageblit)(struct lynx_accel *,const char *,u32,u32,u32,
+ u32,u32,u32,u32,u32,u32,u32,u32,u32);
+
+};
+
+/* lynx_share stands for a presentation of two frame buffer
+ that use one smi adaptor , it is similar to a basic class of C++
+*/
+struct lynx_share{
+ /* common members */
+ u16 devid;
+ u8 revid;
+ struct pci_dev * pdev;
+ struct fb_info * fbinfo[2];
+ struct lynx_accel accel;
+ int accel_off;
+ int dual;
+#ifdef CONFIG_MTRR
+ int mtrr_off;
+ struct{
+ int vram;
+ int vram_added;
+ }mtrr;
+#endif
+ /* all smi graphic adaptor got below attributes */
+ unsigned long vidmem_start;
+ unsigned long vidreg_start;
+ __u32 vidmem_size;
+ __u32 vidreg_size;
+ void __iomem * pvReg;
+ unsigned char __iomem * pvMem;
+ /* locks*/
+ spinlock_t slock;
+ /* function pointers */
+ void (*suspend)(struct lynx_share*);
+ void (*resume)(struct lynx_share*);
+};
+
+struct lynx_cursor{
+ /* cursor width ,height and size */
+ int w;
+ int h;
+ int size;
+ /* hardware limitation */
+ int maxW;
+ int maxH;
+ /* base virtual address and offset of cursor image */
+ char __iomem * vstart;
+ int offset;
+ /* mmio addr of hw cursor */
+ volatile char __iomem * mmio;
+ /* the lynx_share of this adaptor */
+ struct lynx_share * share;
+ /* proc_routines */
+ void (*enable)(struct lynx_cursor *);
+ void (*disable)(struct lynx_cursor *);
+ void (*setSize)(struct lynx_cursor *,int,int);
+ void (*setPos)(struct lynx_cursor *,int,int);
+ void (*setColor)(struct lynx_cursor *,u32,u32);
+ void (*setData)(struct lynx_cursor *,u16,const u8*,const u8*);
+};
+
+struct lynxfb_crtc{
+ unsigned char __iomem * vCursor;//virtual address of cursor
+ unsigned char __iomem * vScreen;//virtual address of on_screen
+ int oCursor;//cursor address offset in vidmem
+ int oScreen;//onscreen address offset in vidmem
+ int channel;/* which channel this crtc stands for*/
+ resource_size_t vidmem_size;/* this view's video memory max size */
+
+ /* below attributes belong to info->fix, their value depends on specific adaptor*/
+ u16 line_pad;/* padding information:0,1,2,4,8,16,... */
+ u16 xpanstep;
+ u16 ypanstep;
+ u16 ywrapstep;
+
+ void * priv;
+
+ int(*proc_setMode)(struct lynxfb_crtc*,
+ struct fb_var_screeninfo*,
+ struct fb_fix_screeninfo*);
+
+ int(*proc_checkMode)(struct lynxfb_crtc*,struct fb_var_screeninfo*);
+ int(*proc_setColReg)(struct lynxfb_crtc*,ushort,ushort,ushort,ushort);
+ void (*clear)(struct lynxfb_crtc*);
+ /* pan display */
+ int (*proc_panDisplay)(struct lynxfb_crtc *,
+ const struct fb_var_screeninfo *,
+ const struct fb_info *);
+ /* cursor information */
+ struct lynx_cursor cursor;
+};
+
+struct lynxfb_output{
+ int dpms;
+ int paths;
+ /* which paths(s) this output stands for,for sm750:
+ paths=1:means output for panel paths
+ paths=2:means output for crt paths
+ paths=3:means output for both panel and crt paths
+ */
+
+ int * channel;
+ /* which channel these outputs linked with,for sm750:
+ *channel=0 means primary channel
+ *channel=1 means secondary channel
+ output->channel ==> &crtc->channel
+ */
+ void * priv;
+
+ int(*proc_setMode)(struct lynxfb_output*,
+ struct fb_var_screeninfo*,
+ struct fb_fix_screeninfo*);
+
+ int(*proc_checkMode)(struct lynxfb_output*,struct fb_var_screeninfo*);
+ int(*proc_setBLANK)(struct lynxfb_output*,int);
+ void (*clear)(struct lynxfb_output*);
+};
+
+struct lynxfb_par{
+ /* either 0 or 1 for dual head adaptor,0 is the older one registered */
+ int index;
+ unsigned int pseudo_palette[256];
+ struct lynxfb_crtc crtc;
+ struct lynxfb_output output;
+ struct fb_info * info;
+ struct lynx_share * share;
+};
+
+#ifndef offsetof
+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
+#endif
+
+
+#define PS_TO_HZ(ps) \
+ ({ \
+ unsigned long long hz = 1000*1000*1000*1000ULL; \
+ do_div(hz,ps); \
+ (unsigned long)hz;})
+
+static inline unsigned long ps_to_hz(unsigned int psvalue)
+{
+ unsigned long long numerator=1000*1000*1000*1000ULL;
+ /* 10^12 / picosecond period gives frequency in Hz */
+ do_div(numerator, psvalue);
+ return (unsigned long)numerator;
+}
+
+
+#endif
--- /dev/null
+#include<linux/module.h>
+#include<linux/kernel.h>
+#include<linux/errno.h>
+#include<linux/string.h>
+#include<linux/mm.h>
+#include<linux/slab.h>
+#include<linux/delay.h>
+#include<linux/fb.h>
+#include<linux/ioport.h>
+#include<linux/init.h>
+#include<linux/pci.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include <linux/console.h>
+#include<linux/platform_device.h>
+#include<linux/screen_info.h>
+
+#include "sm750.h"
+#include "sm750_accel.h"
+#include "sm750_help.h"
+static inline void write_dpr(struct lynx_accel * accel,int offset,u32 regValue)
+{
+ writel(regValue,accel->dprBase + offset);
+}
+
+static inline u32 read_dpr(struct lynx_accel * accel,int offset)
+{
+ return readl(accel->dprBase + offset);
+}
+
+static inline void write_dpPort(struct lynx_accel * accel,u32 data)
+{
+ writel(data,accel->dpPortBase);
+}
+
+void hw_de_init(struct lynx_accel * accel)
+{
+ /* setup 2d engine registers */
+ u32 reg,clr;
+
+ write_dpr(accel,DE_MASKS,0xFFFFFFFF);
+
+ /* dpr1c */
+ reg = FIELD_SET(0,DE_STRETCH_FORMAT,PATTERN_XY,NORMAL)|
+ FIELD_VALUE(0,DE_STRETCH_FORMAT,PATTERN_Y,0)|
+ FIELD_VALUE(0,DE_STRETCH_FORMAT,PATTERN_X,0)|
+ FIELD_SET(0,DE_STRETCH_FORMAT,ADDRESSING,XY)|
+ FIELD_VALUE(0,DE_STRETCH_FORMAT,SOURCE_HEIGHT,3);
+
+ clr = FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_XY)&
+ FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_Y)&
+ FIELD_CLEAR(DE_STRETCH_FORMAT,PATTERN_X)&
+ FIELD_CLEAR(DE_STRETCH_FORMAT,ADDRESSING)&
+ FIELD_CLEAR(DE_STRETCH_FORMAT,SOURCE_HEIGHT);
+
+ /* DE_STRETCH bpp format need be initilized in setMode routine */
+ write_dpr(accel,DE_STRETCH_FORMAT,(read_dpr(accel,DE_STRETCH_FORMAT) & clr) | reg);
+
+ /* disable clipping and transparent */
+ write_dpr(accel,DE_CLIP_TL,0);//dpr2c
+ write_dpr(accel,DE_CLIP_BR,0);//dpr30
+
+ write_dpr(accel,DE_COLOR_COMPARE_MASK,0);//dpr24
+ write_dpr(accel,DE_COLOR_COMPARE,0);
+
+ reg = FIELD_SET(0,DE_CONTROL,TRANSPARENCY,DISABLE)|
+ FIELD_SET(0,DE_CONTROL,TRANSPARENCY_MATCH,OPAQUE)|
+ FIELD_SET(0,DE_CONTROL,TRANSPARENCY_SELECT,SOURCE);
+
+ clr = FIELD_CLEAR(DE_CONTROL,TRANSPARENCY)&
+ FIELD_CLEAR(DE_CONTROL,TRANSPARENCY_MATCH)&
+ FIELD_CLEAR(DE_CONTROL,TRANSPARENCY_SELECT);
+
+ /* dpr0c */
+ write_dpr(accel,DE_CONTROL,(read_dpr(accel,DE_CONTROL)&clr)|reg);
+}
+
+/* set2dformat only be called from setmode functions
+ * but if you need dual framebuffer driver,need call set2dformat
+ * every time you use 2d function */
+
+void hw_set2dformat(struct lynx_accel * accel,int fmt)
+{
+ u32 reg;
+
+ /* fmt=0,1,2 for 8,16,32,bpp on sm718/750/502 */
+ reg = read_dpr(accel,DE_STRETCH_FORMAT);
+ reg = FIELD_VALUE(reg,DE_STRETCH_FORMAT,PIXEL_FORMAT,fmt);
+ write_dpr(accel,DE_STRETCH_FORMAT,reg);
+}
+
+/* seems sm712 RectFill command is broken,so need use BitBlt to
+ * replace it. */
+
+int hw712_fillrect(struct lynx_accel * accel,
+ u32 base,u32 pitch,u32 Bpp,
+ u32 x,u32 y,u32 width,u32 height,
+ u32 color,u32 rop)
+{
+ u32 deCtrl;
+ if(accel->de_wait() != 0)
+ {
+ /* int time wait and always busy,seems hardware
+ * got something error */
+ pr_debug("%s:De engine always bussy\n",__func__);
+ return -1;
+ }
+ /* 24bpp 2d acceleration still not work,we already support 2d on
+ * both 8/16/32 bpp now, so there is no harm if we disable 2d on
+ * 24bpp for current stage. */
+#if 0
+ if(Bpp == 3){
+ width *= 3;
+ x *= 3;
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0,DE_PITCH,DESTINATION,pitch)|
+ FIELD_VALUE(0,DE_PITCH,SOURCE,pitch));//dpr10
+ }
+ else
+#endif
+ {
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0,DE_PITCH,DESTINATION,pitch/Bpp)|
+ FIELD_VALUE(0,DE_PITCH,SOURCE,pitch/Bpp));//dpr10
+
+ }
+
+ write_dpr(accel,DE_FOREGROUND,color);//DPR14
+ write_dpr(accel,DE_MONO_PATTERN_HIGH,~0);//DPR34
+ write_dpr(accel,DE_MONO_PATTERN_LOW,~0);//DPR38
+
+ write_dpr(accel,DE_WINDOW_SOURCE_BASE,base);//dpr44
+ write_dpr(accel,DE_WINDOW_DESTINATION_BASE,base);//dpr40
+
+
+ write_dpr(accel,DE_WINDOW_WIDTH,
+ FIELD_VALUE(0,DE_WINDOW_WIDTH,DESTINATION,pitch/Bpp)|
+ FIELD_VALUE(0,DE_WINDOW_WIDTH,SOURCE,pitch/Bpp));//dpr3c
+
+
+ write_dpr(accel,DE_DESTINATION,
+ FIELD_SET(0,DE_DESTINATION,WRAP,DISABLE)|
+ FIELD_VALUE(0,DE_DESTINATION,X,x)|
+ FIELD_VALUE(0,DE_DESTINATION,Y,y));//dpr4
+
+ write_dpr(accel,DE_DIMENSION,
+ FIELD_VALUE(0,DE_DIMENSION,X,width)|
+ FIELD_VALUE(0,DE_DIMENSION,Y_ET,height));//dpr8
+
+ deCtrl =
+ FIELD_SET(0,DE_CONTROL,STATUS,START)|
+ FIELD_SET(0,DE_CONTROL,COMMAND,BITBLT)|
+ FIELD_SET(0,DE_CONTROL,ROP2_SOURCE,PATTERN)|
+ FIELD_SET(0,DE_CONTROL,ROP_SELECT,ROP2)|
+ FIELD_VALUE(0,DE_CONTROL,ROP,rop);//dpr0xc
+#if 0
+ /* dump registers */
+ int i;
+ inf_msg("x,y,w,h = %d,%d,%d,%d\n",x,y,width,height);
+ for(i=0x04;i<=0x44;i+=4){
+ inf_msg("dpr%02x = %08x\n",i,read_dpr(accel,i));
+ }
+ inf_msg("deCtrl = %08x\n",deCtrl);
+#endif
+
+ write_dpr(accel,DE_CONTROL,deCtrl);
+ return 0;
+}
+
+int hw_fillrect(struct lynx_accel * accel,
+ u32 base,u32 pitch,u32 Bpp,
+ u32 x,u32 y,u32 width,u32 height,
+ u32 color,u32 rop)
+{
+ u32 deCtrl;
+
+ if(accel->de_wait() != 0)
+ {
+ /* int time wait and always busy,seems hardware
+ * got something error */
+ pr_debug("%s:De engine always bussy\n",__func__);
+ return -1;
+ }
+
+ write_dpr(accel,DE_WINDOW_DESTINATION_BASE,base);//dpr40
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0,DE_PITCH,DESTINATION,pitch/Bpp)|
+ FIELD_VALUE(0,DE_PITCH,SOURCE,pitch/Bpp));//dpr10
+
+ write_dpr(accel,DE_WINDOW_WIDTH,
+ FIELD_VALUE(0,DE_WINDOW_WIDTH,DESTINATION,pitch/Bpp)|
+ FIELD_VALUE(0,DE_WINDOW_WIDTH,SOURCE,pitch/Bpp));//dpr44
+
+ write_dpr(accel,DE_FOREGROUND,color);//DPR14
+
+ write_dpr(accel,DE_DESTINATION,
+ FIELD_SET(0,DE_DESTINATION,WRAP,DISABLE)|
+ FIELD_VALUE(0,DE_DESTINATION,X,x)|
+ FIELD_VALUE(0,DE_DESTINATION,Y,y));//dpr4
+
+ write_dpr(accel,DE_DIMENSION,
+ FIELD_VALUE(0,DE_DIMENSION,X,width)|
+ FIELD_VALUE(0,DE_DIMENSION,Y_ET,height));//dpr8
+
+ deCtrl =
+ FIELD_SET(0,DE_CONTROL,STATUS,START)|
+ FIELD_SET(0,DE_CONTROL,DIRECTION,LEFT_TO_RIGHT)|
+ FIELD_SET(0,DE_CONTROL,LAST_PIXEL,ON)|
+ FIELD_SET(0,DE_CONTROL,COMMAND,RECTANGLE_FILL)|
+ FIELD_SET(0,DE_CONTROL,ROP_SELECT,ROP2)|
+ FIELD_VALUE(0,DE_CONTROL,ROP,rop);//dpr0xc
+
+ write_dpr(accel,DE_CONTROL,deCtrl);
+ return 0;
+}
+
+int hw_copyarea(
+struct lynx_accel * accel,
+unsigned int sBase, /* Address of source: offset in frame buffer */
+unsigned int sPitch, /* Pitch value of source surface in BYTE */
+unsigned int sx,
+unsigned int sy, /* Starting coordinate of source surface */
+unsigned int dBase, /* Address of destination: offset in frame buffer */
+unsigned int dPitch, /* Pitch value of destination surface in BYTE */
+unsigned int Bpp, /* Color depth of destination surface */
+unsigned int dx,
+unsigned int dy, /* Starting coordinate of destination surface */
+unsigned int width,
+unsigned int height, /* width and height of rectangle in pixel value */
+unsigned int rop2) /* ROP value */
+{
+ unsigned int nDirection, de_ctrl;
+ int opSign;
+ nDirection = LEFT_TO_RIGHT;
+ /* Direction of ROP2 operation: 1 = Left to Right, (-1) = Right to Left */
+ opSign = 1;
+ de_ctrl = 0;
+
+ /* If source and destination are the same surface, need to check for overlay cases */
+ if (sBase == dBase && sPitch == dPitch)
+ {
+ /* Determine direction of operation */
+ if (sy < dy)
+ {
+ /* +----------+
+ |S |
+ | +----------+
+ | | | |
+ | | | |
+ +---|------+ |
+ | D|
+ +----------+ */
+
+ nDirection = BOTTOM_TO_TOP;
+ }
+ else if (sy > dy)
+ {
+ /* +----------+
+ |D |
+ | +----------+
+ | | | |
+ | | | |
+ +---|------+ |
+ | S|
+ +----------+ */
+
+ nDirection = TOP_TO_BOTTOM;
+ }
+ else
+ {
+ /* sy == dy */
+
+ if (sx <= dx)
+ {
+ /* +------+---+------+
+ |S | | D|
+ | | | |
+ | | | |
+ | | | |
+ +------+---+------+ */
+
+ nDirection = RIGHT_TO_LEFT;
+ }
+ else
+ {
+ /* sx > dx */
+
+ /* +------+---+------+
+ |D | | S|
+ | | | |
+ | | | |
+ | | | |
+ +------+---+------+ */
+
+ nDirection = LEFT_TO_RIGHT;
+ }
+ }
+ }
+
+ if ((nDirection == BOTTOM_TO_TOP) || (nDirection == RIGHT_TO_LEFT))
+ {
+ sx += width - 1;
+ sy += height - 1;
+ dx += width - 1;
+ dy += height - 1;
+ opSign = (-1);
+ }
+
+ /* Note:
+ DE_FOREGROUND are DE_BACKGROUND are don't care.
+ DE_COLOR_COMPARE and DE_COLOR_COMPARE_MAKS are set by set deSetTransparency().
+ */
+
+ /* 2D Source Base.
+ It is an address offset (128 bit aligned) from the beginning of frame buffer.
+ */
+ write_dpr(accel,DE_WINDOW_SOURCE_BASE, sBase);//dpr40
+
+ /* 2D Destination Base.
+ It is an address offset (128 bit aligned) from the beginning of frame buffer.
+ */
+ write_dpr(accel,DE_WINDOW_DESTINATION_BASE, dBase);//dpr44
+
+#if 0
+ /* Program pitch (distance between the 1st points of two adjacent lines).
+ Note that input pitch is BYTE value, but the 2D Pitch register uses
+ pixel values. Need Byte to pixel convertion.
+ */
+ if(Bpp == 3){
+ sx *= 3;
+ dx *= 3;
+ width *= 3;
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
+ FIELD_VALUE(0, DE_PITCH, SOURCE, sPitch));//dpr10
+ }
+ else
+#endif
+ {
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0, DE_PITCH, DESTINATION, (dPitch/Bpp)) |
+ FIELD_VALUE(0, DE_PITCH, SOURCE, (sPitch/Bpp)));//dpr10
+ }
+
+ /* Screen Window width in Pixels.
+ 2D engine uses this value to calculate the linear address in frame buffer for a given point.
+ */
+ write_dpr(accel,DE_WINDOW_WIDTH,
+ FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/Bpp)) |
+ FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (sPitch/Bpp)));//dpr3c
+
+ if (accel->de_wait() != 0){
+ return -1;
+ }
+
+ {
+
+ write_dpr(accel,DE_SOURCE,
+ FIELD_SET (0, DE_SOURCE, WRAP, DISABLE) |
+ FIELD_VALUE(0, DE_SOURCE, X_K1, sx) |
+ FIELD_VALUE(0, DE_SOURCE, Y_K2, sy));//dpr0
+ write_dpr(accel,DE_DESTINATION,
+ FIELD_SET (0, DE_DESTINATION, WRAP, DISABLE) |
+ FIELD_VALUE(0, DE_DESTINATION, X, dx) |
+ FIELD_VALUE(0, DE_DESTINATION, Y, dy));//dpr04
+ write_dpr(accel,DE_DIMENSION,
+ FIELD_VALUE(0, DE_DIMENSION, X, width) |
+ FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));//dpr08
+
+ de_ctrl =
+ FIELD_VALUE(0, DE_CONTROL, ROP, rop2) |
+ FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
+ FIELD_SET(0, DE_CONTROL, COMMAND, BITBLT) |
+ ((nDirection == RIGHT_TO_LEFT) ?
+ FIELD_SET(0, DE_CONTROL, DIRECTION, RIGHT_TO_LEFT)
+ : FIELD_SET(0, DE_CONTROL, DIRECTION, LEFT_TO_RIGHT)) |
+ FIELD_SET(0, DE_CONTROL, STATUS, START);
+ write_dpr(accel,DE_CONTROL,de_ctrl);//dpr0c
+ }
+
+ return 0;
+}
+
+static unsigned int deGetTransparency(struct lynx_accel * accel)
+{
+ unsigned int de_ctrl;
+
+ de_ctrl = read_dpr(accel,DE_CONTROL);
+
+ de_ctrl &=
+ FIELD_MASK(DE_CONTROL_TRANSPARENCY_MATCH) |
+ FIELD_MASK(DE_CONTROL_TRANSPARENCY_SELECT)|
+ FIELD_MASK(DE_CONTROL_TRANSPARENCY);
+
+ return de_ctrl;
+}
+
+int hw_imageblit(struct lynx_accel *accel,
+ const char *pSrcbuf, /* pointer to start of source buffer in system memory */
+ u32 srcDelta, /* Pitch value (in bytes) of the source buffer, +ive means top down and -ive mean button up */
+ u32 startBit, /* Mono data can start at any bit in a byte, this value should be 0 to 7 */
+ u32 dBase, /* Address of destination: offset in frame buffer */
+ u32 dPitch, /* Pitch value of destination surface in BYTE */
+ u32 bytePerPixel, /* Color depth of destination surface */
+ u32 dx,
+ u32 dy, /* Starting coordinate of destination surface */
+ u32 width,
+ u32 height, /* width and height of rectange in pixel value */
+ u32 fColor, /* Foreground color (corresponding to a 1 in the monochrome data */
+ u32 bColor, /* Background color (corresponding to a 0 in the monochrome data */
+ u32 rop2) /* ROP value */
+{
+ unsigned int ulBytesPerScan;
+ unsigned int ul4BytesPerScan;
+ unsigned int ulBytesRemain;
+ unsigned int de_ctrl = 0;
+ unsigned char ajRemain[4];
+ int i, j;
+
+ startBit &= 7; /* Just make sure the start bit is within legal range */
+ ulBytesPerScan = (width + startBit + 7) / 8;
+ ul4BytesPerScan = ulBytesPerScan & ~3;
+ ulBytesRemain = ulBytesPerScan & 3;
+
+ if(accel->de_wait() != 0)
+ {
+// inf_msg("*** ImageBlit return -1 ***\n");
+ return -1;
+ }
+
+ /* 2D Source Base.
+ Use 0 for HOST Blt.
+ */
+ write_dpr(accel,DE_WINDOW_SOURCE_BASE, 0);
+
+ /* 2D Destination Base.
+ It is an address offset (128 bit aligned) from the beginning of frame buffer.
+ */
+ write_dpr(accel,DE_WINDOW_DESTINATION_BASE, dBase);
+#if 0
+ /* Program pitch (distance between the 1st points of two adjacent lines).
+ Note that input pitch is BYTE value, but the 2D Pitch register uses
+ pixel values. Need Byte to pixel convertion.
+ */
+ if(bytePerPixel == 3 ){
+ dx *= 3;
+ width *= 3;
+ startBit *= 3;
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch) |
+ FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch));//dpr10
+
+ }
+ else
+#endif
+ {
+ write_dpr(accel,DE_PITCH,
+ FIELD_VALUE(0, DE_PITCH, DESTINATION, dPitch/bytePerPixel) |
+ FIELD_VALUE(0, DE_PITCH, SOURCE, dPitch/bytePerPixel));//dpr10
+ }
+
+ /* Screen Window width in Pixels.
+ 2D engine uses this value to calculate the linear address in frame buffer for a given point.
+ */
+ write_dpr(accel,DE_WINDOW_WIDTH,
+ FIELD_VALUE(0, DE_WINDOW_WIDTH, DESTINATION, (dPitch/bytePerPixel)) |
+ FIELD_VALUE(0, DE_WINDOW_WIDTH, SOURCE, (dPitch/bytePerPixel)));
+
+ /* Note: For 2D Source in Host Write, only X_K1_MONO field is needed, and Y_K2 field is not used.
+ For mono bitmap, use startBit for X_K1. */
+ write_dpr(accel,DE_SOURCE,
+ FIELD_SET (0, DE_SOURCE, WRAP, DISABLE) |
+ FIELD_VALUE(0, DE_SOURCE, X_K1_MONO, startBit));//dpr00
+
+ write_dpr(accel,DE_DESTINATION,
+ FIELD_SET (0, DE_DESTINATION, WRAP, DISABLE) |
+ FIELD_VALUE(0, DE_DESTINATION, X, dx) |
+ FIELD_VALUE(0, DE_DESTINATION, Y, dy));//dpr04
+
+ write_dpr(accel,DE_DIMENSION,
+ FIELD_VALUE(0, DE_DIMENSION, X, width) |
+ FIELD_VALUE(0, DE_DIMENSION, Y_ET, height));//dpr08
+
+ write_dpr(accel,DE_FOREGROUND, fColor);
+ write_dpr(accel,DE_BACKGROUND, bColor);
+
+ de_ctrl = FIELD_VALUE(0, DE_CONTROL, ROP, rop2) |
+ FIELD_SET(0, DE_CONTROL, ROP_SELECT, ROP2) |
+ FIELD_SET(0, DE_CONTROL, COMMAND, HOST_WRITE) |
+ FIELD_SET(0, DE_CONTROL, HOST, MONO) |
+ FIELD_SET(0, DE_CONTROL, STATUS, START);
+
+ write_dpr(accel,DE_CONTROL, de_ctrl | deGetTransparency(accel));
+
+ /* Write MONO data (line by line) to 2D Engine data port */
+ for (i=0; i<height; i++)
+ {
+ /* For each line, send the data in chunks of 4 bytes */
+ for (j=0; j<(ul4BytesPerScan/4); j++)
+ {
+ write_dpPort(accel, *(unsigned int *)(pSrcbuf + (j * 4)));
+ }
+
+ if (ulBytesRemain)
+ {
+ memcpy(ajRemain, pSrcbuf+ul4BytesPerScan, ulBytesRemain);
+ write_dpPort(accel, *(unsigned int *)ajRemain);
+ }
+
+ pSrcbuf += srcDelta;
+ }
+
+ return 0;
+}
+
--- /dev/null
+#ifndef ACCEL_H__
+#define ACCEL_H__
+
+#define HW_ROP2_COPY 0xc
+#define HW_ROP2_XOR 0x6
+
+/* notes: below address are the offset value from de_base_address (0x100000)*/
+
+/* for sm718/750/502 de_base is at mmreg_1mb*/
+#define DE_BASE_ADDR_TYPE1 0x100000
+/* for sm712,de_base is at mmreg_32kb */
+#define DE_BASE_ADDR_TYPE2 0x8000
+/* for sm722,de_base is at mmreg_0 */
+#define DE_BASE_ADDR_TYPE3 0
+
+/* type1 data port address is at mmreg_0x110000*/
+#define DE_PORT_ADDR_TYPE1 0x110000
+/* for sm712,data port address is at mmreg_0 */
+#define DE_PORT_ADDR_TYPE2 0x100000
+/* for sm722,data port address is at mmreg_1mb */
+#define DE_PORT_ADDR_TYPE3 0x100000
+
+#define DE_SOURCE 0x0
+#define DE_SOURCE_WRAP 31:31
+#define DE_SOURCE_WRAP_DISABLE 0
+#define DE_SOURCE_WRAP_ENABLE 1
+#define DE_SOURCE_X_K1 29:16
+#define DE_SOURCE_Y_K2 15:0
+#define DE_SOURCE_X_K1_MONO 20:16
+
+#define DE_DESTINATION 0x4
+#define DE_DESTINATION_WRAP 31:31
+#define DE_DESTINATION_WRAP_DISABLE 0
+#define DE_DESTINATION_WRAP_ENABLE 1
+#define DE_DESTINATION_X 28:16
+#define DE_DESTINATION_Y 15:0
+
+#define DE_DIMENSION 0x8
+#define DE_DIMENSION_X 28:16
+#define DE_DIMENSION_Y_ET 15:0
+
+#define DE_CONTROL 0xC
+#define DE_CONTROL_STATUS 31:31
+#define DE_CONTROL_STATUS_STOP 0
+#define DE_CONTROL_STATUS_START 1
+#define DE_CONTROL_PATTERN 30:30
+#define DE_CONTROL_PATTERN_MONO 0
+#define DE_CONTROL_PATTERN_COLOR 1
+#define DE_CONTROL_UPDATE_DESTINATION_X 29:29
+#define DE_CONTROL_UPDATE_DESTINATION_X_DISABLE 0
+#define DE_CONTROL_UPDATE_DESTINATION_X_ENABLE 1
+#define DE_CONTROL_QUICK_START 28:28
+#define DE_CONTROL_QUICK_START_DISABLE 0
+#define DE_CONTROL_QUICK_START_ENABLE 1
+#define DE_CONTROL_DIRECTION 27:27
+#define DE_CONTROL_DIRECTION_LEFT_TO_RIGHT 0
+#define DE_CONTROL_DIRECTION_RIGHT_TO_LEFT 1
+#define DE_CONTROL_MAJOR 26:26
+#define DE_CONTROL_MAJOR_X 0
+#define DE_CONTROL_MAJOR_Y 1
+#define DE_CONTROL_STEP_X 25:25
+#define DE_CONTROL_STEP_X_POSITIVE 1
+#define DE_CONTROL_STEP_X_NEGATIVE 0
+#define DE_CONTROL_STEP_Y 24:24
+#define DE_CONTROL_STEP_Y_POSITIVE 1
+#define DE_CONTROL_STEP_Y_NEGATIVE 0
+#define DE_CONTROL_STRETCH 23:23
+#define DE_CONTROL_STRETCH_DISABLE 0
+#define DE_CONTROL_STRETCH_ENABLE 1
+#define DE_CONTROL_HOST 22:22
+#define DE_CONTROL_HOST_COLOR 0
+#define DE_CONTROL_HOST_MONO 1
+#define DE_CONTROL_LAST_PIXEL 21:21
+#define DE_CONTROL_LAST_PIXEL_OFF 0
+#define DE_CONTROL_LAST_PIXEL_ON 1
+#define DE_CONTROL_COMMAND 20:16
+#define DE_CONTROL_COMMAND_BITBLT 0
+#define DE_CONTROL_COMMAND_RECTANGLE_FILL 1
+#define DE_CONTROL_COMMAND_DE_TILE 2
+#define DE_CONTROL_COMMAND_TRAPEZOID_FILL 3
+#define DE_CONTROL_COMMAND_ALPHA_BLEND 4
+#define DE_CONTROL_COMMAND_RLE_STRIP 5
+#define DE_CONTROL_COMMAND_SHORT_STROKE 6
+#define DE_CONTROL_COMMAND_LINE_DRAW 7
+#define DE_CONTROL_COMMAND_HOST_WRITE 8
+#define DE_CONTROL_COMMAND_HOST_READ 9
+#define DE_CONTROL_COMMAND_HOST_WRITE_BOTTOM_UP 10
+#define DE_CONTROL_COMMAND_ROTATE 11
+#define DE_CONTROL_COMMAND_FONT 12
+#define DE_CONTROL_COMMAND_TEXTURE_LOAD 15
+#define DE_CONTROL_ROP_SELECT 15:15
+#define DE_CONTROL_ROP_SELECT_ROP3 0
+#define DE_CONTROL_ROP_SELECT_ROP2 1
+#define DE_CONTROL_ROP2_SOURCE 14:14
+#define DE_CONTROL_ROP2_SOURCE_BITMAP 0
+#define DE_CONTROL_ROP2_SOURCE_PATTERN 1
+#define DE_CONTROL_MONO_DATA 13:12
+#define DE_CONTROL_MONO_DATA_NOT_PACKED 0
+#define DE_CONTROL_MONO_DATA_8_PACKED 1
+#define DE_CONTROL_MONO_DATA_16_PACKED 2
+#define DE_CONTROL_MONO_DATA_32_PACKED 3
+#define DE_CONTROL_REPEAT_ROTATE 11:11
+#define DE_CONTROL_REPEAT_ROTATE_DISABLE 0
+#define DE_CONTROL_REPEAT_ROTATE_ENABLE 1
+#define DE_CONTROL_TRANSPARENCY_MATCH 10:10
+#define DE_CONTROL_TRANSPARENCY_MATCH_OPAQUE 0
+#define DE_CONTROL_TRANSPARENCY_MATCH_TRANSPARENT 1
+#define DE_CONTROL_TRANSPARENCY_SELECT 9:9
+#define DE_CONTROL_TRANSPARENCY_SELECT_SOURCE 0
+#define DE_CONTROL_TRANSPARENCY_SELECT_DESTINATION 1
+#define DE_CONTROL_TRANSPARENCY 8:8
+#define DE_CONTROL_TRANSPARENCY_DISABLE 0
+#define DE_CONTROL_TRANSPARENCY_ENABLE 1
+#define DE_CONTROL_ROP 7:0
+
+// Pseudo fields.
+
+#define DE_CONTROL_SHORT_STROKE_DIR 27:24
+#define DE_CONTROL_SHORT_STROKE_DIR_225 0
+#define DE_CONTROL_SHORT_STROKE_DIR_135 1
+#define DE_CONTROL_SHORT_STROKE_DIR_315 2
+#define DE_CONTROL_SHORT_STROKE_DIR_45 3
+#define DE_CONTROL_SHORT_STROKE_DIR_270 4
+#define DE_CONTROL_SHORT_STROKE_DIR_90 5
+#define DE_CONTROL_SHORT_STROKE_DIR_180 8
+#define DE_CONTROL_SHORT_STROKE_DIR_0 10
+#define DE_CONTROL_ROTATION 25:24
+#define DE_CONTROL_ROTATION_0 0
+#define DE_CONTROL_ROTATION_270 1
+#define DE_CONTROL_ROTATION_90 2
+#define DE_CONTROL_ROTATION_180 3
+
+#define DE_PITCH 0x000010
+#define DE_PITCH_DESTINATION 28:16
+#define DE_PITCH_SOURCE 12:0
+
+#define DE_FOREGROUND 0x000014
+#define DE_FOREGROUND_COLOR 31:0
+
+#define DE_BACKGROUND 0x000018
+#define DE_BACKGROUND_COLOR 31:0
+
+#define DE_STRETCH_FORMAT 0x00001C
+#define DE_STRETCH_FORMAT_PATTERN_XY 30:30
+#define DE_STRETCH_FORMAT_PATTERN_XY_NORMAL 0
+#define DE_STRETCH_FORMAT_PATTERN_XY_OVERWRITE 1
+#define DE_STRETCH_FORMAT_PATTERN_Y 29:27
+#define DE_STRETCH_FORMAT_PATTERN_X 25:23
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT 21:20
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_8 0
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_16 1
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_32 2
+#define DE_STRETCH_FORMAT_PIXEL_FORMAT_24 3
+
+#define DE_STRETCH_FORMAT_ADDRESSING 19:16
+#define DE_STRETCH_FORMAT_ADDRESSING_XY 0
+#define DE_STRETCH_FORMAT_ADDRESSING_LINEAR 15
+#define DE_STRETCH_FORMAT_SOURCE_HEIGHT 11:0
+
+#define DE_COLOR_COMPARE 0x000020
+#define DE_COLOR_COMPARE_COLOR 23:0
+
+#define DE_COLOR_COMPARE_MASK 0x000024
+#define DE_COLOR_COMPARE_MASK_MASKS 23:0
+
+#define DE_MASKS 0x000028
+#define DE_MASKS_BYTE_MASK 31:16
+#define DE_MASKS_BIT_MASK 15:0
+
+#define DE_CLIP_TL 0x00002C
+#define DE_CLIP_TL_TOP 31:16
+#define DE_CLIP_TL_STATUS 13:13
+#define DE_CLIP_TL_STATUS_DISABLE 0
+#define DE_CLIP_TL_STATUS_ENABLE 1
+#define DE_CLIP_TL_INHIBIT 12:12
+#define DE_CLIP_TL_INHIBIT_OUTSIDE 0
+#define DE_CLIP_TL_INHIBIT_INSIDE 1
+#define DE_CLIP_TL_LEFT 11:0
+
+#define DE_CLIP_BR 0x000030
+#define DE_CLIP_BR_BOTTOM 31:16
+#define DE_CLIP_BR_RIGHT 12:0
+
+#define DE_MONO_PATTERN_LOW 0x000034
+#define DE_MONO_PATTERN_LOW_PATTERN 31:0
+
+#define DE_MONO_PATTERN_HIGH 0x000038
+#define DE_MONO_PATTERN_HIGH_PATTERN 31:0
+
+#define DE_WINDOW_WIDTH 0x00003C
+#define DE_WINDOW_WIDTH_DESTINATION 28:16
+#define DE_WINDOW_WIDTH_SOURCE 12:0
+
+#define DE_WINDOW_SOURCE_BASE 0x000040
+#define DE_WINDOW_SOURCE_BASE_EXT 27:27
+#define DE_WINDOW_SOURCE_BASE_EXT_LOCAL 0
+#define DE_WINDOW_SOURCE_BASE_EXT_EXTERNAL 1
+#define DE_WINDOW_SOURCE_BASE_CS 26:26
+#define DE_WINDOW_SOURCE_BASE_CS_0 0
+#define DE_WINDOW_SOURCE_BASE_CS_1 1
+#define DE_WINDOW_SOURCE_BASE_ADDRESS 25:0
+
+#define DE_WINDOW_DESTINATION_BASE 0x000044
+#define DE_WINDOW_DESTINATION_BASE_EXT 27:27
+#define DE_WINDOW_DESTINATION_BASE_EXT_LOCAL 0
+#define DE_WINDOW_DESTINATION_BASE_EXT_EXTERNAL 1
+#define DE_WINDOW_DESTINATION_BASE_CS 26:26
+#define DE_WINDOW_DESTINATION_BASE_CS_0 0
+#define DE_WINDOW_DESTINATION_BASE_CS_1 1
+#define DE_WINDOW_DESTINATION_BASE_ADDRESS 25:0
+
+#define DE_ALPHA 0x000048
+#define DE_ALPHA_VALUE 7:0
+
+#define DE_WRAP 0x00004C
+#define DE_WRAP_X 31:16
+#define DE_WRAP_Y 15:0
+
+#define DE_STATUS 0x000050
+#define DE_STATUS_CSC 1:1
+#define DE_STATUS_CSC_CLEAR 0
+#define DE_STATUS_CSC_NOT_ACTIVE 0
+#define DE_STATUS_CSC_ACTIVE 1
+#define DE_STATUS_2D 0:0
+#define DE_STATUS_2D_CLEAR 0
+#define DE_STATUS_2D_NOT_ACTIVE 0
+#define DE_STATUS_2D_ACTIVE 1
+
+
+
+/* blt direction */
+#define TOP_TO_BOTTOM 0
+#define LEFT_TO_RIGHT 0
+#define BOTTOM_TO_TOP 1
+#define RIGHT_TO_LEFT 1
+
+void hw_set2dformat(struct lynx_accel * accel,int fmt);
+
+void hw_de_init(struct lynx_accel * accel);
+
+int hw_fillrect(struct lynx_accel * accel,
+ u32 base,u32 pitch,u32 Bpp,
+ u32 x,u32 y,u32 width,u32 height,
+ u32 color,u32 rop);
+
+int hw_copyarea(
+struct lynx_accel * accel,
+unsigned int sBase, /* Address of source: offset in frame buffer */
+unsigned int sPitch, /* Pitch value of source surface in BYTE */
+unsigned int sx,
+unsigned int sy, /* Starting coordinate of source surface */
+unsigned int dBase, /* Address of destination: offset in frame buffer */
+unsigned int dPitch, /* Pitch value of destination surface in BYTE */
+unsigned int bpp, /* Color depth of destination surface */
+unsigned int dx,
+unsigned int dy, /* Starting coordinate of destination surface */
+unsigned int width,
+unsigned int height, /* width and height of rectangle in pixel value */
+unsigned int rop2);
+
+int hw_imageblit(struct lynx_accel *accel,
+ const char *pSrcbuf, /* pointer to start of source buffer in system memory */
+ u32 srcDelta, /* Pitch value (in bytes) of the source buffer, +ive means top down and -ive mean button up */
+ u32 startBit, /* Mono data can start at any bit in a byte, this value should be 0 to 7 */
+ u32 dBase, /* Address of destination: offset in frame buffer */
+ u32 dPitch, /* Pitch value of destination surface in BYTE */
+ u32 bytePerPixel, /* Color depth of destination surface */
+ u32 dx,
+ u32 dy, /* Starting coordinate of destination surface */
+ u32 width,
+ u32 height, /* width and height of rectange in pixel value */
+ u32 fColor, /* Foreground color (corresponding to a 1 in the monochrome data */
+ u32 bColor, /* Background color (corresponding to a 0 in the monochrome data */
+ u32 rop2);
+#endif
--- /dev/null
+#include<linux/module.h>
+#include<linux/kernel.h>
+#include<linux/errno.h>
+#include<linux/string.h>
+#include<linux/mm.h>
+#include<linux/slab.h>
+#include<linux/delay.h>
+#include<linux/fb.h>
+#include<linux/ioport.h>
+#include<linux/init.h>
+#include<linux/pci.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include <linux/console.h>
+#include<linux/platform_device.h>
+#include<linux/screen_info.h>
+
+#include "sm750.h"
+#include "sm750_help.h"
+#include "sm750_cursor.h"
+
+
+#define PEEK32(addr) \
+readl(cursor->mmio + (addr))
+
+#define POKE32(addr,data) \
+writel((data),cursor->mmio + (addr))
+
+/* cursor control for voyager and 718/750*/
+#define HWC_ADDRESS 0x0
+#define HWC_ADDRESS_ENABLE 31:31
+#define HWC_ADDRESS_ENABLE_DISABLE 0
+#define HWC_ADDRESS_ENABLE_ENABLE 1
+#define HWC_ADDRESS_EXT 27:27
+#define HWC_ADDRESS_EXT_LOCAL 0
+#define HWC_ADDRESS_EXT_EXTERNAL 1
+#define HWC_ADDRESS_CS 26:26
+#define HWC_ADDRESS_CS_0 0
+#define HWC_ADDRESS_CS_1 1
+#define HWC_ADDRESS_ADDRESS 25:0
+
+#define HWC_LOCATION 0x4
+#define HWC_LOCATION_TOP 27:27
+#define HWC_LOCATION_TOP_INSIDE 0
+#define HWC_LOCATION_TOP_OUTSIDE 1
+#define HWC_LOCATION_Y 26:16
+#define HWC_LOCATION_LEFT 11:11
+#define HWC_LOCATION_LEFT_INSIDE 0
+#define HWC_LOCATION_LEFT_OUTSIDE 1
+#define HWC_LOCATION_X 10:0
+
+#define HWC_COLOR_12 0x8
+#define HWC_COLOR_12_2_RGB565 31:16
+#define HWC_COLOR_12_1_RGB565 15:0
+
+#define HWC_COLOR_3 0xC
+#define HWC_COLOR_3_RGB565 15:0
+
+
+/* hw_cursor_xxx works for voyager,718 and 750 */
+void hw_cursor_enable(struct lynx_cursor * cursor)
+{
+ u32 reg;
+ reg = FIELD_VALUE(0,HWC_ADDRESS,ADDRESS,cursor->offset)|
+ FIELD_SET(0,HWC_ADDRESS,EXT,LOCAL)|
+ FIELD_SET(0,HWC_ADDRESS,ENABLE,ENABLE);
+ POKE32(HWC_ADDRESS,reg);
+}
+void hw_cursor_disable(struct lynx_cursor * cursor)
+{
+ POKE32(HWC_ADDRESS,0);
+}
+
+void hw_cursor_setSize(struct lynx_cursor * cursor,
+ int w,int h)
+{
+ cursor->w = w;
+ cursor->h = h;
+}
+void hw_cursor_setPos(struct lynx_cursor * cursor,
+ int x,int y)
+{
+ u32 reg;
+ reg = FIELD_VALUE(0,HWC_LOCATION,Y,y)|
+ FIELD_VALUE(0,HWC_LOCATION,X,x);
+ POKE32(HWC_LOCATION,reg);
+}
+void hw_cursor_setColor(struct lynx_cursor * cursor,
+ u32 fg,u32 bg)
+{
+ POKE32(HWC_COLOR_12,(fg<<16)|(bg&0xffff));
+ POKE32(HWC_COLOR_3,0xffe0);
+}
+
+void hw_cursor_setData(struct lynx_cursor * cursor,
+ u16 rop,const u8* pcol,const u8* pmsk)
+{
+ int i,j,count,pitch,offset;
+ u8 color,mask,opr;
+ u16 data;
+ u16 * pbuffer,*pstart;
+
+ /* in byte*/
+ pitch = cursor->w >> 3;
+
+ /* in byte */
+ count = pitch * cursor->h;
+
+ /* in ushort */
+ offset = cursor->maxW * 2 / 8 / 2;
+
+ data = 0;
+ pstart = (u16 *)cursor->vstart;
+ pbuffer = pstart;
+
+/*
+ if(odd &1){
+ hw_cursor_setData2(cursor,rop,pcol,pmsk);
+ }
+ odd++;
+ if(odd > 0xfffffff0)
+ odd=0;
+*/
+
+ for(i=0;i<count;i++)
+ {
+ color = *pcol++;
+ mask = *pmsk++;
+ data = 0;
+
+ /* either method below works well,
+ * but method 2 shows no lag
+ * and method 1 seems a bit wrong*/
+#if 0
+ if(rop == ROP_XOR)
+ opr = mask ^ color;
+ else
+ opr = mask & color;
+
+ for(j=0;j<8;j++)
+ {
+
+ if(opr & (0x80 >> j))
+ { //use fg color,id = 2
+ data |= 2 << (j*2);
+ }else{
+ //use bg color,id = 1
+ data |= 1 << (j*2);
+ }
+ }
+#else
+ for(j=0;j<8;j++){
+ if(mask & (0x80>>j)){
+ if(rop == ROP_XOR)
+ opr = mask ^ color;
+ else
+ opr = mask & color;
+
+ /* 2 stands for forecolor and 1 for backcolor */
+ data |= ((opr & (0x80>>j))?2:1)<<(j*2);
+ }
+ }
+#endif
+ *pbuffer = data;
+
+ /* assume pitch is 1,2,4,8,...*/
+#if 0
+ if(!((i+1)&(pitch-1))) /* below line equal to is line */
+#else
+ if((i+1) % pitch == 0)
+#endif
+ {
+ /* need a return */
+ pstart += offset;
+ pbuffer = pstart;
+ }else{
+ pbuffer++;
+ }
+
+ }
+
+
+}
+
+
+void hw_cursor_setData2(struct lynx_cursor * cursor,
+ u16 rop,const u8* pcol,const u8* pmsk)
+{
+ int i,j,count,pitch,offset;
+ u8 color, mask;
+ u16 data;
+ u16 * pbuffer,*pstart;
+
+ /* in byte*/
+ pitch = cursor->w >> 3;
+
+ /* in byte */
+ count = pitch * cursor->h;
+
+ /* in ushort */
+ offset = cursor->maxW * 2 / 8 / 2;
+
+ data = 0;
+ pstart = (u16 *)cursor->vstart;
+ pbuffer = pstart;
+
+ for(i=0;i<count;i++)
+ {
+ color = *pcol++;
+ mask = *pmsk++;
+ data = 0;
+
+ /* either method below works well, but method 2 shows no lag */
+#if 0
+ if(rop == ROP_XOR)
+ opr = mask ^ color;
+ else
+ opr = mask & color;
+
+ for(j=0;j<8;j++)
+ {
+
+ if(opr & (0x80 >> j))
+ { //use fg color,id = 2
+ data |= 2 << (j*2);
+ }else{
+ //use bg color,id = 1
+ data |= 1 << (j*2);
+ }
+ }
+#else
+ for(j=0;j<8;j++){
+ if(mask & (1<<j))
+ data |= ((color & (1<<j))?1:2)<<(j*2);
+ }
+#endif
+ *pbuffer = data;
+
+ /* assume pitch is 1,2,4,8,...*/
+ if(!(i&(pitch-1)))
+ //if((i+1) % pitch == 0)
+ {
+ /* need a return */
+ pstart += offset;
+ pbuffer = pstart;
+ }else{
+ pbuffer++;
+ }
+
+ }
+}
--- /dev/null
+#ifndef LYNX_CURSOR_H__
+#define LYNX_CURSOR_H__
+
+/* hw_cursor_xxx works for voyager,718 and 750 */
+void hw_cursor_enable(struct lynx_cursor * cursor);
+void hw_cursor_disable(struct lynx_cursor * cursor);
+void hw_cursor_setSize(struct lynx_cursor * cursor,
+ int w,int h);
+void hw_cursor_setPos(struct lynx_cursor * cursor,
+ int x,int y);
+void hw_cursor_setColor(struct lynx_cursor * cursor,
+ u32 fg,u32 bg);
+void hw_cursor_setData(struct lynx_cursor * cursor,
+ u16 rop,const u8* data,const u8* mask);
+void hw_cursor_setData2(struct lynx_cursor * cursor,
+ u16 rop,const u8* data,const u8* mask);
+#endif
--- /dev/null
+#ifndef LYNX_HELP_H__
+#define LYNX_HELP_H__
+/*****************************************************************************\
+ * FIELD MACROS *
+\*****************************************************************************/
+
+#define _LSB(f) (0 ? f)
+#define _MSB(f) (1 ? f)
+#define _COUNT(f) (_MSB(f) - _LSB(f) + 1)
+
+#define RAW_MASK(f) (0xFFFFFFFF >> (32 - _COUNT(f)))
+#define GET_MASK(f) (RAW_MASK(f) << _LSB(f))
+#define GET_FIELD(d,f) (((d) >> _LSB(f)) & RAW_MASK(f))
+#define TEST_FIELD(d,f,v) (GET_FIELD(d,f) == f ## _ ## v)
+#define SET_FIELD(d,f,v) (((d) & ~GET_MASK(f)) | \
+ (((f ## _ ## v) & RAW_MASK(f)) << _LSB(f)))
+#define SET_FIELDV(d,f,v) (((d) & ~GET_MASK(f)) | \
+ (((v) & RAW_MASK(f)) << _LSB(f)))
+
+
+////////////////////////////////////////////////////////////////////////////////
+// //
+// Internal macros //
+// //
+////////////////////////////////////////////////////////////////////////////////
+
+#define _F_START(f) (0 ? f)
+#define _F_END(f) (1 ? f)
+#define _F_SIZE(f) (1 + _F_END(f) - _F_START(f))
+#define _F_MASK(f) (((1 << _F_SIZE(f)) - 1) << _F_START(f))
+#define _F_NORMALIZE(v, f) (((v) & _F_MASK(f)) >> _F_START(f))
+#define _F_DENORMALIZE(v, f) (((v) << _F_START(f)) & _F_MASK(f))
+
+
+////////////////////////////////////////////////////////////////////////////////
+// //
+// Global macros //
+// //
+////////////////////////////////////////////////////////////////////////////////
+
+#define FIELD_GET(x, reg, field) \
+( \
+ _F_NORMALIZE((x), reg ## _ ## field) \
+)
+
+#define FIELD_SET(x, reg, field, value) \
+( \
+ (x & ~_F_MASK(reg ## _ ## field)) \
+ | _F_DENORMALIZE(reg ## _ ## field ## _ ## value, reg ## _ ## field) \
+)
+
+#define FIELD_VALUE(x, reg, field, value) \
+( \
+ (x & ~_F_MASK(reg ## _ ## field)) \
+ | _F_DENORMALIZE(value, reg ## _ ## field) \
+)
+
+#define FIELD_CLEAR(reg, field) \
+( \
+ ~ _F_MASK(reg ## _ ## field) \
+)
+
+
+////////////////////////////////////////////////////////////////////////////////
+// //
+// Field Macros //
+// //
+////////////////////////////////////////////////////////////////////////////////
+
+#define FIELD_START(field) (0 ? field)
+#define FIELD_END(field) (1 ? field)
+#define FIELD_SIZE(field) (1 + FIELD_END(field) - FIELD_START(field))
+#define FIELD_MASK(field) (((1 << (FIELD_SIZE(field)-1)) | ((1 << (FIELD_SIZE(field)-1)) - 1)) << FIELD_START(field))
+#define FIELD_NORMALIZE(reg, field) (((reg) & FIELD_MASK(field)) >> FIELD_START(field))
+#define FIELD_DENORMALIZE(field, value) (((value) << FIELD_START(field)) & FIELD_MASK(field))
+
+#define FIELD_INIT(reg, field, value) FIELD_DENORMALIZE(reg ## _ ## field, \
+ reg ## _ ## field ## _ ## value)
+#define FIELD_INIT_VAL(reg, field, value) \
+ (FIELD_DENORMALIZE(reg ## _ ## field, value))
+#define FIELD_VAL_SET(x, r, f, v) x = x & ~FIELD_MASK(r ## _ ## f) \
+ | FIELD_DENORMALIZE(r ## _ ## f, r ## _ ## f ## _ ## v)
+
+#define RGB(r, g, b) \
+( \
+ (unsigned long) (((r) << 16) | ((g) << 8) | (b)) \
+)
+
+#define RGB16(r, g, b) \
+( \
+ (unsigned short) ((((r) & 0xF8) << 8) | (((g) & 0xFC) << 3) | (((b) & 0xF8) >> 3)) \
+)
+
+static inline unsigned int absDiff(unsigned int a,unsigned int b)
+{
+ if(a<b)
+ return b-a;
+ else
+ return a-b;
+}
+
+/* n / d + 1 / 2 = (2n + d) / 2d */
+#define roundedDiv(num,denom) ((2 * (num) + (denom)) / (2 * (denom)))
+#define MB(x) ((x)<<20)
+#define KB(x) ((x)<<10)
+#define MHz(x) ((x) * 1000000)
+
+
+
+
+#endif
--- /dev/null
+#include <linux/version.h>
+#include<linux/module.h>
+#include<linux/kernel.h>
+#include<linux/errno.h>
+#include<linux/string.h>
+#include<linux/mm.h>
+#include<linux/slab.h>
+#include<linux/delay.h>
+#include<linux/fb.h>
+#include<linux/ioport.h>
+#include<linux/init.h>
+#include<linux/pci.h>
+#include<linux/vmalloc.h>
+#include<linux/pagemap.h>
+#include <linux/console.h>
+#ifdef CONFIG_MTRR
+#include <asm/mtrr.h>
+#endif
+#include<linux/platform_device.h>
+#include<linux/screen_info.h>
+
+#include "sm750.h"
+#include "sm750_hw.h"
+#include "ddk750.h"
+#include "sm750_accel.h"
+
+int hw_sm750_map(struct lynx_share* share, struct pci_dev* pdev)
+{
+ int ret;
+ struct sm750_share * spec_share;
+
+
+ spec_share = container_of(share, struct sm750_share,share);
+ ret = 0;
+
+ share->vidreg_start = pci_resource_start(pdev, 1);
+ share->vidreg_size = MB(2);
+
+ pr_info("mmio phyAddr = %lx\n", share->vidreg_start);
+
+ /* reserve the vidreg space of smi adaptor
+ * if you do this, u need to add release region code
+ * in lynxfb_remove, or memory will not be mapped again
+ * successfully
+ * */
+
+ if((ret = pci_request_region(pdev, 1, "sm750fb")))
+ {
+ pr_err("Can not request PCI regions.\n");
+ goto exit;
+ }
+
+ /* now map mmio and vidmem*/
+ share->pvReg = ioremap_nocache(share->vidreg_start, share->vidreg_size);
+ if(!share->pvReg){
+ pr_err("mmio failed\n");
+ ret = -EFAULT;
+ goto exit;
+ }else{
+ pr_info("mmio virtual addr = %p\n", share->pvReg);
+ }
+
+
+ share->accel.dprBase = share->pvReg + DE_BASE_ADDR_TYPE1;
+ share->accel.dpPortBase = share->pvReg + DE_PORT_ADDR_TYPE1;
+
+ ddk750_set_mmio(share->pvReg,share->devid, share->revid);
+
+ share->vidmem_start = pci_resource_start(pdev, 0);
+ /* don't use pdev_resource[x].end - resource[x].start to
+ * calculate the resource size,its only the maximum available
+ * size but not the actual size,use
+ * @hw_sm750_getVMSize function can be safe.
+ * */
+ share->vidmem_size = hw_sm750_getVMSize(share);
+ pr_info("video memory phyAddr = %lx, size = %u bytes\n",
+ share->vidmem_start, share->vidmem_size);
+
+ /* reserve the vidmem space of smi adaptor */
+#if 0
+ if((ret = pci_request_region(pdev,0,_moduleName_)))
+ {
+ pr_err("Can not request PCI regions.\n");
+ goto exit;
+ }
+#endif
+
+ share->pvMem = ioremap(share->vidmem_start,
+ share->vidmem_size);
+
+ if(!share->pvMem){
+ pr_err("Map video memory failed\n");
+ ret = -EFAULT;
+ goto exit;
+ }else{
+ pr_info("video memory vaddr = %p\n", share->pvMem);
+ }
+exit:
+ return ret;
+}
+
+
+
+int hw_sm750_inithw(struct lynx_share* share, struct pci_dev * pdev)
+{
+ struct sm750_share * spec_share;
+ struct init_status * parm;
+
+ spec_share = container_of(share, struct sm750_share,share);
+ parm = &spec_share->state.initParm;
+ if(parm->chip_clk == 0)
+ parm->chip_clk = (getChipType() == SM750LE)?
+ DEFAULT_SM750LE_CHIP_CLOCK :
+ DEFAULT_SM750_CHIP_CLOCK;
+
+ if(parm->mem_clk == 0)
+ parm->mem_clk = parm->chip_clk;
+ if(parm->master_clk == 0)
+ parm->master_clk = parm->chip_clk/3;
+
+ ddk750_initHw((initchip_param_t *)&spec_share->state.initParm);
+ /* for sm718,open pci burst */
+ if(share->devid == 0x718){
+ POKE32(SYSTEM_CTRL,
+ FIELD_SET(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, PCI_BURST, ON));
+ }
+
+ /* sm750 use sii164, it can be setup with default value
+ * by on power, so initDVIDisp can be skipped */
+#if 0
+ ddk750_initDVIDisp();
+#endif
+
+ if(getChipType() != SM750LE)
+ {
+ /* does user need CRT ?*/
+ if(spec_share->state.nocrt){
+ POKE32(MISC_CTRL,
+ FIELD_SET(PEEK32(MISC_CTRL),
+ MISC_CTRL,
+ DAC_POWER, OFF));
+ /* shut off dpms */
+ POKE32(SYSTEM_CTRL,
+ FIELD_SET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ DPMS, VNHN));
+ }else{
+ POKE32(MISC_CTRL,
+ FIELD_SET(PEEK32(MISC_CTRL),
+ MISC_CTRL,
+ DAC_POWER, ON));
+ /* turn on dpms */
+ POKE32(SYSTEM_CTRL,
+ FIELD_SET(PEEK32(SYSTEM_CTRL),
+ SYSTEM_CTRL,
+ DPMS, VPHP));
+ }
+
+ switch (spec_share->state.pnltype){
+ case sm750_doubleTFT:
+ case sm750_24TFT:
+ case sm750_dualTFT:
+ POKE32(PANEL_DISPLAY_CTRL,
+ FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL),
+ PANEL_DISPLAY_CTRL,
+ TFT_DISP,
+ spec_share->state.pnltype));
+ break;
+ }
+ }else{
+ /* for 750LE ,no DVI chip initilization makes Monitor no signal */
+ /* Set up GPIO for software I2C to program DVI chip in the
+ Xilinx SP605 board, in order to have video signal.
+ */
+ swI2CInit(0,1);
+
+
+ /* Customer may NOT use CH7301 DVI chip, which has to be
+ initialized differently.
+ */
+ if (swI2CReadReg(0xec, 0x4a) == 0x95)
+ {
+ /* The following register values for CH7301 are from
+ Chrontel app note and our experiment.
+ */
+ pr_info("yes,CH7301 DVI chip found\n");
+ swI2CWriteReg(0xec, 0x1d, 0x16);
+ swI2CWriteReg(0xec, 0x21, 0x9);
+ swI2CWriteReg(0xec, 0x49, 0xC0);
+ pr_info("okay,CH7301 DVI chip setup done\n");
+ }
+ }
+
+ /* init 2d engine */
+ if(!share->accel_off){
+ hw_sm750_initAccel(share);
+// share->accel.de_wait = hw_sm750_deWait;
+ }
+
+ return 0;
+}
+
+
+resource_size_t hw_sm750_getVMSize(struct lynx_share * share)
+{
+ resource_size_t ret;
+
+ ret = ddk750_getVMSize();
+ return ret;
+}
+
+
+
+int hw_sm750_output_checkMode(struct lynxfb_output* output, struct fb_var_screeninfo* var)
+{
+
+ return 0;
+}
+
+
+int hw_sm750_output_setMode(struct lynxfb_output* output,
+ struct fb_var_screeninfo* var, struct fb_fix_screeninfo* fix)
+{
+ int ret;
+ disp_output_t dispSet;
+ int channel;
+
+ ret = 0;
+ dispSet = 0;
+ channel = *output->channel;
+
+
+ if(getChipType() != SM750LE){
+ if(channel == sm750_primary){
+ pr_info("primary channel\n");
+ if(output->paths & sm750_panel)
+ dispSet |= do_LCD1_PRI;
+ if(output->paths & sm750_crt)
+ dispSet |= do_CRT_PRI;
+
+ }else{
+ pr_info("secondary channel\n");
+ if(output->paths & sm750_panel)
+ dispSet |= do_LCD1_SEC;
+ if(output->paths & sm750_crt)
+ dispSet |= do_CRT_SEC;
+
+ }
+ ddk750_setLogicalDispOut(dispSet);
+ }else{
+ /* just open DISPLAY_CONTROL_750LE register bit 3:0*/
+ u32 reg;
+ reg = PEEK32(DISPLAY_CONTROL_750LE);
+ reg |= 0xf;
+ POKE32(DISPLAY_CONTROL_750LE, reg);
+ }
+
+ pr_info("ddk setlogicdispout done \n");
+ return ret;
+}
+
+void hw_sm750_output_clear(struct lynxfb_output* output)
+{
+
+ return;
+}
+
+int hw_sm750_crtc_checkMode(struct lynxfb_crtc* crtc, struct fb_var_screeninfo* var)
+{
+ struct lynx_share * share;
+
+
+ share = container_of(crtc, struct lynxfb_par,crtc)->share;
+
+ switch (var->bits_per_pixel){
+ case 8:
+ case 16:
+ break;
+ case 32:
+ if (share->revid == SM750LE_REVISION_ID) {
+ pr_debug("750le do not support 32bpp\n");
+ return -EINVAL;
+ }
+ break;
+ default:
+ return -EINVAL;
+
+ }
+
+ return 0;
+}
+
+
+/*
+ set the controller's mode for @crtc charged with @var and @fix parameters
+*/
+int hw_sm750_crtc_setMode(struct lynxfb_crtc* crtc,
+ struct fb_var_screeninfo* var,
+ struct fb_fix_screeninfo* fix)
+{
+ int ret,fmt;
+ u32 reg;
+ mode_parameter_t modparm;
+ clock_type_t clock;
+ struct lynx_share * share;
+ struct lynxfb_par * par;
+
+
+ ret = 0;
+ par = container_of(crtc, struct lynxfb_par, crtc);
+ share = par->share;
+#if 1
+ if(!share->accel_off){
+ /* set 2d engine pixel format according to mode bpp */
+ switch(var->bits_per_pixel){
+ case 8:
+ fmt = 0;
+ break;
+ case 16:
+ fmt = 1;
+ break;
+ case 32:
+ default:
+ fmt = 2;
+ break;
+ }
+ hw_set2dformat(&share->accel, fmt);
+ }
+#endif
+
+ /* set timing */
+// modparm.pixel_clock = PS_TO_HZ(var->pixclock);
+ modparm.pixel_clock = ps_to_hz(var->pixclock);
+ modparm.vertical_sync_polarity = (var->sync & FB_SYNC_HOR_HIGH_ACT) ? POS:NEG;
+ modparm.horizontal_sync_polarity = (var->sync & FB_SYNC_VERT_HIGH_ACT) ? POS:NEG;
+ modparm.clock_phase_polarity = (var->sync& FB_SYNC_COMP_HIGH_ACT) ? POS:NEG;
+ modparm.horizontal_display_end = var->xres;
+ modparm.horizontal_sync_width = var->hsync_len;
+ modparm.horizontal_sync_start = var->xres + var->right_margin;
+ modparm.horizontal_total = var->xres + var->left_margin + var->right_margin + var->hsync_len;
+ modparm.vertical_display_end = var->yres;
+ modparm.vertical_sync_height = var->vsync_len;
+ modparm.vertical_sync_start = var->yres + var->lower_margin;
+ modparm.vertical_total = var->yres + var->upper_margin + var->lower_margin + var->vsync_len;
+
+ /* choose pll */
+ if(crtc->channel != sm750_secondary)
+ clock = PRIMARY_PLL;
+ else
+ clock = SECONDARY_PLL;
+
+ pr_debug("Request pixel clock = %lu\n", modparm.pixel_clock);
+ ret = ddk750_setModeTiming(&modparm, clock);
+ if(ret){
+ pr_err("Set mode timing failed\n");
+ goto exit;
+ }
+
+ if(crtc->channel != sm750_secondary){
+ /* set pitch, offset ,width,start address ,etc... */
+ POKE32(PANEL_FB_ADDRESS,
+ FIELD_SET(0, PANEL_FB_ADDRESS, STATUS, CURRENT)|
+ FIELD_SET(0, PANEL_FB_ADDRESS, EXT, LOCAL)|
+ FIELD_VALUE(0, PANEL_FB_ADDRESS, ADDRESS, crtc->oScreen));
+
+ reg = var->xres * (var->bits_per_pixel >> 3);
+ /* crtc->channel is not equal to par->index on numeric,be aware of that */
+ reg = PADDING(crtc->line_pad,reg);
+
+ POKE32(PANEL_FB_WIDTH,
+ FIELD_VALUE(0, PANEL_FB_WIDTH, WIDTH, reg)|
+ FIELD_VALUE(0, PANEL_FB_WIDTH, OFFSET, fix->line_length));
+
+ POKE32(PANEL_WINDOW_WIDTH,
+ FIELD_VALUE(0, PANEL_WINDOW_WIDTH, WIDTH, var->xres -1)|
+ FIELD_VALUE(0, PANEL_WINDOW_WIDTH, X, var->xoffset));
+
+ POKE32(PANEL_WINDOW_HEIGHT,
+ FIELD_VALUE(0, PANEL_WINDOW_HEIGHT, HEIGHT, var->yres_virtual - 1)|
+ FIELD_VALUE(0, PANEL_WINDOW_HEIGHT, Y, var->yoffset));
+
+ POKE32(PANEL_PLANE_TL, 0);
+
+ POKE32(PANEL_PLANE_BR,
+ FIELD_VALUE(0, PANEL_PLANE_BR, BOTTOM, var->yres - 1)|
+ FIELD_VALUE(0, PANEL_PLANE_BR,RIGHT, var->xres - 1));
+
+ /* set pixel format */
+ reg = PEEK32(PANEL_DISPLAY_CTRL);
+ POKE32(PANEL_DISPLAY_CTRL,
+ FIELD_VALUE(reg,
+ PANEL_DISPLAY_CTRL, FORMAT,
+ (var->bits_per_pixel >> 4)
+ ));
+ }else{
+ /* not implemented now */
+ POKE32(CRT_FB_ADDRESS, crtc->oScreen);
+ reg = var->xres * (var->bits_per_pixel >> 3);
+ /* crtc->channel is not equal to par->index on numeric,be aware of that */
+ reg = PADDING(crtc->line_pad, reg);
+
+ POKE32(CRT_FB_WIDTH,
+ FIELD_VALUE(0, CRT_FB_WIDTH, WIDTH, reg)|
+ FIELD_VALUE(0, CRT_FB_WIDTH, OFFSET, fix->line_length));
+
+ /* SET PIXEL FORMAT */
+ reg = PEEK32(CRT_DISPLAY_CTRL);
+ reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, FORMAT, var->bits_per_pixel >> 4);
+ POKE32(CRT_DISPLAY_CTRL, reg);
+
+ }
+
+
+exit:
+ return ret;
+}
+
+void hw_sm750_crtc_clear(struct lynxfb_crtc* crtc)
+{
+
+ return;
+}
+
+int hw_sm750_setColReg(struct lynxfb_crtc* crtc, ushort index,
+ ushort red, ushort green, ushort blue)
+{
+ static unsigned int add[]={PANEL_PALETTE_RAM,CRT_PALETTE_RAM};
+ POKE32(add[crtc->channel] + index*4, (red<<16)|(green<<8)|blue);
+ return 0;
+}
+
+int hw_sm750le_setBLANK(struct lynxfb_output * output, int blank){
+ int dpms,crtdb;
+
+ switch(blank)
+ {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_UNBLANK:
+#else
+ case VESA_NO_BLANKING:
+#endif
+ dpms = CRT_DISPLAY_CTRL_DPMS_0;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_OFF;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_NORMAL:
+ dpms = CRT_DISPLAY_CTRL_DPMS_0;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_VSYNC_SUSPEND:
+#else
+ case VESA_VSYNC_SUSPEND:
+#endif
+ dpms = CRT_DISPLAY_CTRL_DPMS_2;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_HSYNC_SUSPEND:
+#else
+ case VESA_HSYNC_SUSPEND:
+#endif
+ dpms = CRT_DISPLAY_CTRL_DPMS_1;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_POWERDOWN:
+#else
+ case VESA_POWERDOWN:
+#endif
+ dpms = CRT_DISPLAY_CTRL_DPMS_3;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if(output->paths & sm750_crt){
+ POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms));
+ POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
+ }
+ return 0;
+}
+
+int hw_sm750_setBLANK(struct lynxfb_output* output,int blank)
+{
+ unsigned int dpms, pps, crtdb;
+
+ dpms = pps = crtdb = 0;
+
+ switch (blank)
+ {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_UNBLANK:
+#else
+ case VESA_NO_BLANKING:
+#endif
+ pr_info("flag = FB_BLANK_UNBLANK \n");
+ dpms = SYSTEM_CTRL_DPMS_VPHP;
+ pps = PANEL_DISPLAY_CTRL_DATA_ENABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_OFF;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_NORMAL:
+ pr_info("flag = FB_BLANK_NORMAL \n");
+ dpms = SYSTEM_CTRL_DPMS_VPHP;
+ pps = PANEL_DISPLAY_CTRL_DATA_DISABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_VSYNC_SUSPEND:
+#else
+ case VESA_VSYNC_SUSPEND:
+#endif
+ dpms = SYSTEM_CTRL_DPMS_VNHP;
+ pps = PANEL_DISPLAY_CTRL_DATA_DISABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_HSYNC_SUSPEND:
+#else
+ case VESA_HSYNC_SUSPEND:
+#endif
+ dpms = SYSTEM_CTRL_DPMS_VPHN;
+ pps = PANEL_DISPLAY_CTRL_DATA_DISABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+ case FB_BLANK_POWERDOWN:
+#else
+ case VESA_POWERDOWN:
+#endif
+ dpms = SYSTEM_CTRL_DPMS_VNHN;
+ pps = PANEL_DISPLAY_CTRL_DATA_DISABLE;
+ crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ break;
+ }
+
+ if(output->paths & sm750_crt){
+
+ POKE32(SYSTEM_CTRL,FIELD_VALUE(PEEK32(SYSTEM_CTRL), SYSTEM_CTRL, DPMS, dpms));
+ POKE32(CRT_DISPLAY_CTRL,FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL,BLANK, crtdb));
+ }
+
+ if(output->paths & sm750_panel){
+ POKE32(PANEL_DISPLAY_CTRL, FIELD_VALUE(PEEK32(PANEL_DISPLAY_CTRL), PANEL_DISPLAY_CTRL, DATA, pps));
+ }
+
+ return 0;
+}
+
+
+void hw_sm750_initAccel(struct lynx_share * share)
+{
+ u32 reg;
+ enable2DEngine(1);
+
+ if(getChipType() == SM750LE){
+ reg = PEEK32(DE_STATE1);
+ reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,ON);
+ POKE32(DE_STATE1,reg);
+
+ reg = PEEK32(DE_STATE1);
+ reg = FIELD_SET(reg, DE_STATE1, DE_ABORT,OFF);
+ POKE32(DE_STATE1, reg);
+
+ }else{
+ /* engine reset */
+ reg = PEEK32(SYSTEM_CTRL);
+ reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,ON);
+ POKE32(SYSTEM_CTRL, reg);
+
+ reg = PEEK32(SYSTEM_CTRL);
+ reg = FIELD_SET(reg, SYSTEM_CTRL, DE_ABORT,OFF);
+ POKE32(SYSTEM_CTRL, reg);
+ }
+
+ /* call 2d init */
+ share->accel.de_init(&share->accel);
+}
+
+int hw_sm750le_deWait(void)
+{
+ int i=0x10000000;
+ while(i--){
+ unsigned int dwVal = PEEK32(DE_STATE2);
+ if((FIELD_GET(dwVal, DE_STATE2, DE_STATUS) == DE_STATE2_DE_STATUS_IDLE) &&
+ (FIELD_GET(dwVal, DE_STATE2, DE_FIFO) == DE_STATE2_DE_FIFO_EMPTY) &&
+ (FIELD_GET(dwVal, DE_STATE2, DE_MEM_FIFO) == DE_STATE2_DE_MEM_FIFO_EMPTY))
+ {
+ return 0;
+ }
+ }
+ /* timeout error */
+ return -1;
+}
+
+
+int hw_sm750_deWait(void)
+{
+ int i=0x10000000;
+ while(i--){
+ unsigned int dwVal = PEEK32(SYSTEM_CTRL);
+ if((FIELD_GET(dwVal,SYSTEM_CTRL,DE_STATUS) == SYSTEM_CTRL_DE_STATUS_IDLE) &&
+ (FIELD_GET(dwVal,SYSTEM_CTRL,DE_FIFO) == SYSTEM_CTRL_DE_FIFO_EMPTY) &&
+ (FIELD_GET(dwVal,SYSTEM_CTRL,DE_MEM_FIFO) == SYSTEM_CTRL_DE_MEM_FIFO_EMPTY))
+ {
+ return 0;
+ }
+ }
+ /* timeout error */
+ return -1;
+}
+
+int hw_sm750_pan_display(struct lynxfb_crtc *crtc,
+ const struct fb_var_screeninfo *var,
+ const struct fb_info *info)
+{
+ uint32_t total;
+ //check params
+ if ((var->xoffset + var->xres > var->xres_virtual) ||
+ (var->yoffset + var->yres > var->yres_virtual)) {
+ return -EINVAL;
+ }
+
+ total = var->yoffset * info->fix.line_length +
+ ((var->xoffset * var->bits_per_pixel) >> 3);
+ total += crtc->oScreen;
+ if (crtc->channel == sm750_primary) {
+ POKE32(PANEL_FB_ADDRESS,
+ FIELD_VALUE(PEEK32(PANEL_FB_ADDRESS),
+ PANEL_FB_ADDRESS, ADDRESS, total));
+ } else {
+ POKE32(CRT_FB_ADDRESS,
+ FIELD_VALUE(PEEK32(CRT_FB_ADDRESS),
+ CRT_FB_ADDRESS, ADDRESS, total));
+ }
+ return 0;
+}
+
--- /dev/null
+#ifndef LYNX_HW750_H__
+#define LYNX_HW750_H__
+
+
+#define DEFAULT_SM750_CHIP_CLOCK 290
+#define DEFAULT_SM750LE_CHIP_CLOCK 333
+#ifndef SM750LE_REVISION_ID
+#define SM750LE_REVISION_ID (unsigned char)0xfe
+#endif
+
+//#define DEFAULT_MEM_CLOCK (DEFAULT_SM750_CHIP_CLOCK/1)
+//#define DEFAULT_MASTER_CLOCK (DEFAULT_SM750_CHIP_CLOCK/3)
+
+
+enum sm750_pnltype{
+
+ sm750_24TFT = 0,/* 24bit tft */
+
+ sm750_dualTFT = 2,/* dual 18 bit tft */
+
+ sm750_doubleTFT = 1,/* 36 bit double pixel tft */
+};
+
+/* vga channel is not concerned */
+enum sm750_dataflow{
+ sm750_simul_pri,/* primary => all head */
+
+ sm750_simul_sec,/* secondary => all head */
+
+ sm750_dual_normal,/* primary => panel head and secondary => crt */
+
+ sm750_dual_swap,/* primary => crt head and secondary => panel */
+};
+
+
+enum sm750_channel{
+ sm750_primary = 0,
+ /* enum value equal to the register filed data */
+ sm750_secondary = 1,
+};
+
+enum sm750_path{
+ sm750_panel = 1,
+ sm750_crt = 2,
+ sm750_pnc = 3,/* panel and crt */
+};
+
+struct init_status{
+ ushort powerMode;
+ /* below three clocks are in unit of MHZ*/
+ ushort chip_clk;
+ ushort mem_clk;
+ ushort master_clk;
+ ushort setAllEngOff;
+ ushort resetMemory;
+};
+
+struct sm750_state{
+ struct init_status initParm;
+ enum sm750_pnltype pnltype;
+ enum sm750_dataflow dataflow;
+ int nocrt;
+ int xLCD;
+ int yLCD;
+};
+
+/* sm750_share stands for a presentation of two frame buffer
+ that use one sm750 adaptor, it is similiar to the super class of lynx_share
+ in C++
+*/
+
+struct sm750_share{
+ /* it's better to put lynx_share struct to the first place of sm750_share */
+ struct lynx_share share;
+ struct sm750_state state;
+ int hwCursor;
+ /* 0: no hardware cursor
+ 1: primary crtc hw cursor enabled,
+ 2: secondary crtc hw cursor enabled
+ 3: both ctrc hw cursor enabled
+ */
+};
+
+int hw_sm750_map(struct lynx_share* share,struct pci_dev* pdev);
+int hw_sm750_inithw(struct lynx_share*,struct pci_dev *);
+void hw_sm750_initAccel(struct lynx_share *);
+int hw_sm750_deWait(void);
+int hw_sm750le_deWait(void);
+
+resource_size_t hw_sm750_getVMSize(struct lynx_share *);
+int hw_sm750_output_checkMode(struct lynxfb_output*,struct fb_var_screeninfo*);
+int hw_sm750_output_setMode(struct lynxfb_output*,struct fb_var_screeninfo*,struct fb_fix_screeninfo*);
+int hw_sm750_crtc_checkMode(struct lynxfb_crtc*,struct fb_var_screeninfo*);
+int hw_sm750_crtc_setMode(struct lynxfb_crtc*,struct fb_var_screeninfo*,struct fb_fix_screeninfo*);
+int hw_sm750_setColReg(struct lynxfb_crtc*,ushort,ushort,ushort,ushort);
+int hw_sm750_setBLANK(struct lynxfb_output*,int);
+int hw_sm750le_setBLANK(struct lynxfb_output*,int);
+void hw_sm750_crtc_clear(struct lynxfb_crtc*);
+void hw_sm750_output_clear(struct lynxfb_output*);
+int hw_sm750_pan_display(struct lynxfb_crtc *crtc,
+ const struct fb_var_screeninfo *var,
+ const struct fb_info *info);
+
+#endif
/**********************************************************************
SM712 Mode table.
**********************************************************************/
-struct ModeInit vgamode[] = {
+static struct ModeInit vgamode[] = {
{
/* mode#0: 640 x 480 16Bpp 60Hz */
640, 480, 16, 60,
static struct screen_info smtc_scr_info;
+static char *mode_option;
+
/* process command line options, get vga parameter */
-static int __init sm7xx_vga_setup(char *options)
+static void __init sm7xx_vga_setup(char *options)
{
int i;
if (!options || !*options)
- return -EINVAL;
+ return;
smtc_scr_info.lfb_width = 0;
smtc_scr_info.lfb_height = 0;
smtc_scr_info.lfb_height =
vesa_mode_table[i].lfb_height;
smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
- return 0;
+ return;
}
}
-
- return -1;
}
-__setup("vga=", sm7xx_vga_setup);
static void sm712_setpalette(int regno, unsigned red, unsigned green,
unsigned blue, struct fb_info *info)
.driver.pm = SM7XX_PM_OPS,
};
-module_pci_driver(smtcfb_driver);
+static int __init sm712fb_init(void)
+{
+#ifndef MODULE
+ char *option = NULL;
+
+ if (fb_get_options("sm712fb", &option))
+ return -ENODEV;
+ if (option && *option)
+ mode_option = option;
+#endif
+ sm7xx_vga_setup(mode_option);
+
+ return pci_register_driver(&smtcfb_driver);
+}
+
+module_init(sm712fb_init);
+
+static void __exit sm712fb_exit(void)
+{
+ pci_unregister_driver(&smtcfb_driver);
+}
+
+module_exit(sm712fb_exit);
MODULE_AUTHOR("Siliconmotion ");
MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
static ssize_t message_store(struct kobject *kobj, struct kobj_attribute *attr,
const char *buf, size_t count)
{
- ssize_t retval = 0;
struct msg_group_t *group = spk_find_msg_group(attr->attr.name);
BUG_ON(!group);
- retval = message_store_helper(buf, count, group);
- return retval;
+ return message_store_helper(buf, count, group);
}
/*
int i, bi, hi;
int vc_num = vc->vc_num;
- bi = ((vc->vc_attr & 0x70) >> 4);
+ bi = (vc->vc_attr & 0x70) >> 4;
hi = speakup_console[vc_num]->ht.highsize[bi];
i = 0;
MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init acntpc_init(void)
-{
- return synth_add(&synth_acntpc);
-}
-
-static void __exit acntpc_exit(void)
-{
- synth_remove(&synth_acntpc);
-}
+module_spk_synth(synth_acntpc);
-module_init(acntpc_init);
-module_exit(acntpc_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Accent PC synthesizer");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init acntsa_init(void)
-{
- return synth_add(&synth_acntsa);
-}
-
-static void __exit acntsa_exit(void)
-{
- synth_remove(&synth_acntsa);
-}
+module_spk_synth(synth_acntsa);
-module_init(acntsa_init);
-module_exit(acntsa_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Accent SA synthesizer");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init apollo_init(void)
-{
- return synth_add(&synth_apollo);
-}
-
-static void __exit apollo_exit(void)
-{
- synth_remove(&synth_apollo);
-}
+module_spk_synth(synth_apollo);
-module_init(apollo_init);
-module_exit(apollo_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Apollo II synthesizer");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init audptr_init(void)
-{
- return synth_add(&synth_audptr);
-}
-
-static void __exit audptr_exit(void)
-{
- synth_remove(&synth_audptr);
-}
+module_spk_synth(synth_audptr);
-module_init(audptr_init);
-module_exit(audptr_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Audapter synthesizer");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init bns_init(void)
-{
- return synth_add(&synth_bns);
-}
+module_spk_synth(synth_bns);
-static void __exit bns_exit(void)
-{
- synth_remove(&synth_bns);
-}
-
-module_init(bns_init);
-module_exit(bns_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Braille 'n Speak synthesizers");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init decext_init(void)
-{
- return synth_add(&synth_decext);
-}
-
-static void __exit decext_exit(void)
-{
- synth_remove(&synth_decext);
-}
+module_spk_synth(synth_decext);
-module_init(decext_init);
-module_exit(decext_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DECtalk External synthesizers");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init decpc_init(void)
-{
- return synth_add(&synth_dec_pc);
-}
-
-static void __exit decpc_exit(void)
-{
- synth_remove(&synth_dec_pc);
-}
+module_spk_synth(synth_dec_pc);
-module_init(decpc_init);
-module_exit(decpc_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DECtalk PC synthesizers");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init dectlk_init(void)
-{
- return synth_add(&synth_dectlk);
-}
-
-static void __exit dectlk_exit(void)
-{
- synth_remove(&synth_dectlk);
-}
+module_spk_synth(synth_dectlk);
-module_init(dectlk_init);
-module_exit(dectlk_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DECtalk Express synthesizers");
MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init dtlk_init(void)
-{
- return synth_add(&synth_dtlk);
-}
-
-static void __exit dtlk_exit(void)
-{
- synth_remove(&synth_dtlk);
-}
+module_spk_synth(synth_dtlk);
-module_init(dtlk_init);
-module_exit(dtlk_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DoubleTalk PC synthesizers");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init dummy_init(void)
-{
- return synth_add(&synth_dummy);
-}
+module_spk_synth(synth_dummy);
-static void __exit dummy_exit(void)
-{
- synth_remove(&synth_dummy);
-}
-
-module_init(dummy_init);
-module_exit(dummy_exit);
MODULE_AUTHOR("Samuel Thibault <samuel.thibault@ens-lyon.org>");
MODULE_DESCRIPTION("Speakup support for text console");
MODULE_LICENSE("GPL");
MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init keypc_init(void)
-{
- return synth_add(&synth_keypc);
-}
-
-static void __exit keypc_exit(void)
-{
- synth_remove(&synth_keypc);
-}
+module_spk_synth(synth_keypc);
-module_init(keypc_init);
-module_exit(keypc_exit);
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Keynote Gold PC synthesizers");
MODULE_LICENSE("GPL");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init ltlk_init(void)
-{
- return synth_add(&synth_ltlk);
-}
-
-static void __exit ltlk_exit(void)
-{
- synth_remove(&synth_ltlk);
-}
+module_spk_synth(synth_ltlk);
-module_init(ltlk_init);
-module_exit(ltlk_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for DoubleTalk LT/LiteTalk synthesizers");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
+module_spk_synth(synth_soft);
-static int __init soft_init(void)
-{
- return synth_add(&synth_soft);
-}
-
-static void __exit soft_exit(void)
-{
- synth_remove(&synth_soft);
-}
-
-module_init(soft_init);
-module_exit(soft_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_DESCRIPTION("Speakup userspace software synthesizer support");
MODULE_LICENSE("GPL");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init spkout_init(void)
-{
- return synth_add(&synth_spkout);
-}
-
-static void __exit spkout_exit(void)
-{
- synth_remove(&synth_spkout);
-}
+module_spk_synth(synth_spkout);
-module_init(spkout_init);
-module_exit(spkout_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Speak Out synthesizers");
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
-static int __init txprt_init(void)
-{
- return synth_add(&synth_txprt);
-}
+module_spk_synth(synth_txprt);
-static void __exit txprt_exit(void)
-{
- synth_remove(&synth_txprt);
-}
-
-module_init(txprt_init);
-module_exit(txprt_exit);
MODULE_AUTHOR("Kirk Reiser <kirk@braille.uwo.ca>");
MODULE_AUTHOR("David Borowski");
MODULE_DESCRIPTION("Speakup support for Transport synthesizers");
#define KT_SPKUP 15
-extern const struct old_serial_port *spk_serial_init(int index);
-extern void spk_stop_serial_interrupt(void);
-extern int spk_wait_for_xmitr(void);
-extern unsigned char spk_serial_in(void);
-extern unsigned char spk_serial_in_nowait(void);
-extern int spk_serial_out(const char ch);
-extern void spk_serial_release(void);
+const struct old_serial_port *spk_serial_init(int index);
+void spk_stop_serial_interrupt(void);
+int spk_wait_for_xmitr(void);
+unsigned char spk_serial_in(void);
+unsigned char spk_serial_in_nowait(void);
+int spk_serial_out(const char ch);
+void spk_serial_release(void);
-extern char synth_buffer_getc(void);
-extern char synth_buffer_peek(void);
-extern int synth_buffer_empty(void);
-extern struct var_t *spk_get_var(enum var_id_t var_id);
-extern ssize_t spk_var_show(struct kobject *kobj, struct kobj_attribute *attr,
- char *buf);
-extern ssize_t spk_var_store(struct kobject *kobj, struct kobj_attribute *attr,
- const char *buf, size_t count);
+char synth_buffer_getc(void);
+char synth_buffer_peek(void);
+int synth_buffer_empty(void);
+struct var_t *spk_get_var(enum var_id_t var_id);
+ssize_t spk_var_show(struct kobject *kobj, struct kobj_attribute *attr,
+ char *buf);
+ssize_t spk_var_store(struct kobject *kobj, struct kobj_attribute *attr,
+ const char *buf, size_t count);
-extern int spk_serial_synth_probe(struct spk_synth *synth);
-extern const char *spk_synth_immediate(struct spk_synth *synth, const char *buff);
-extern void spk_do_catch_up(struct spk_synth *synth);
-extern void spk_synth_flush(struct spk_synth *synth);
-extern int spk_synth_is_alive_nop(struct spk_synth *synth);
-extern int spk_synth_is_alive_restart(struct spk_synth *synth);
-extern void synth_printf(const char *buf, ...);
-extern int synth_request_region(u_long, u_long);
-extern int synth_release_region(u_long, u_long);
-extern int synth_add(struct spk_synth *in_synth);
-extern void synth_remove(struct spk_synth *in_synth);
+int spk_serial_synth_probe(struct spk_synth *synth);
+const char *spk_synth_immediate(struct spk_synth *synth, const char *buff);
+void spk_do_catch_up(struct spk_synth *synth);
+void spk_synth_flush(struct spk_synth *synth);
+int spk_synth_is_alive_nop(struct spk_synth *synth);
+int spk_synth_is_alive_restart(struct spk_synth *synth);
+void synth_printf(const char *buf, ...);
+int synth_request_region(u_long, u_long);
+int synth_release_region(u_long, u_long);
+int synth_add(struct spk_synth *in_synth);
+void synth_remove(struct spk_synth *in_synth);
extern struct speakup_info_t speakup_info;
#include <linux/spinlock.h>
#include <linux/mutex.h>
#include <linux/io.h> /* for inb_p, outb_p, inb, outb, etc... */
+#include <linux/device.h>
enum var_type_t {
VAR_NUM = 0,
struct attribute_group attributes;
};
+/**
+ * module_spk_synth() - Helper macro for registering a speakup driver
+ * @__spk_synth: spk_synth struct
+ * Helper macro for speakup drivers which do not do anything special in module
+ * init/exit. This eliminates a lot of boilerplate. Each module may only
+ * use this macro once, and calling it replaces module_init() and module_exit()
+ */
+#define module_spk_synth(__spk_synth) \
+ module_driver(__spk_synth, synth_add, synth_remove)
+
struct speakup_info_t {
spinlock_t spinlock;
int port_tts;
txbuf[1] = page;
retval = i2c_master_send(i2c, txbuf, PAGE_LEN);
if (retval != PAGE_LEN)
- dev_err(&i2c->dev, "%s:failed:%d\n", __func__, retval);
+ dev_err(&i2c->dev, "failed:%d\n", retval);
else
pdata->current_page = page;
} else
retval = i2c_master_send(pdata->i2c_client, txbuf, 2);
/* Add in retry on writes only in certain error return values */
if (retval != 2) {
- dev_err(&i2c->dev, "%s:failed:%d\n", __func__, retval);
+ dev_err(&i2c->dev, "failed:%d\n", retval);
retval = -EIO;
} else
retval = 1;
/* Check if this is a Synaptics device - report if not. */
if (pdata->rmi4_mod_info.manufacturer_id != 1)
- dev_err(&client->dev, "%s: non-Synaptics mfg id:%d\n",
- __func__, pdata->rmi4_mod_info.manufacturer_id);
+ dev_err(&client->dev, "non-Synaptics mfg id:%d\n",
+ pdata->rmi4_mod_info.manufacturer_id);
list_for_each_entry(rfi, &pdata->rmi4_mod_info.support_fn_list, link)
data_sources += rfi->num_of_data_sources;
platformdata->irq_type,
DRIVER_NAME, rmi4_data);
if (retval) {
- dev_err(&client->dev, "%s:Unable to get attn irq %d\n",
- __func__, client->irq);
+ dev_err(&client->dev, "Unable to get attn irq %d\n",
+ client->irq);
goto err_query_dev;
}
return 0;
}
-static const struct dev_pm_ops synaptics_rmi4_dev_pm_ops = {
- .suspend = synaptics_rmi4_suspend,
- .resume = synaptics_rmi4_resume,
-};
#endif
+static SIMPLE_DEV_PM_OPS(synaptics_rmi4_dev_pm_ops, synaptics_rmi4_suspend,
+ synaptics_rmi4_resume);
+
static const struct i2c_device_id synaptics_rmi4_id_table[] = {
{ DRIVER_NAME, 0 },
{ },
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
-#ifdef CONFIG_PM
.pm = &synaptics_rmi4_dev_pm_ops,
-#endif
},
.probe = synaptics_rmi4_probe,
.remove = synaptics_rmi4_remove,
/* peripheral type of 3 - processor */
/* specifies device capable, but not present */
-#define DEV_HISUPPORT 0x10; /* HiSup = 1; shows support for report luns */
+#define DEV_HISUPPORT 0x10 /* HiSup = 1; shows support for report luns */
/* must be returned for lun 0. */
/* NOTE: Linux code assumes inquiry contains 36 bytes. Without checking length
#define ISSUE_IO_VMCALL(method, param, result) \
(result = unisys_vmcall(method, (param) & 0xFFFFFFFF, \
(param) >> 32))
-#define ISSUE_IO_EXTENDED_VMCALL(method, param1, param2, \
- param3, result) \
- (result = unisys_extended_vmcall(method, param1, \
- param2, param3))
+#define ISSUE_IO_EXTENDED_VMCALL(method, param1, param2, param3) \
+ unisys_extended_vmcall(method, param1, param2, param3)
/* The following uses VMCALL_POST_CODE_LOGEVENT interface but is currently
* not used much */
#define ISSUE_IO_VMCALL_POSTCODE_SEVERITY(postcode, severity) \
do { \
- u32 _tempresult = VMCALL_SUCCESS; \
ISSUE_IO_EXTENDED_VMCALL(VMCALL_POST_CODE_LOGEVENT, severity, \
- MDS_APPOS, postcode, _tempresult); \
+ MDS_APPOS, postcode); \
} while (0)
#endif
#ifndef __PROCOBJECTTREE_H__
#define __PROCOBJECTTREE_H__
-#include "uniklog.h"
#include "timskmod.h"
/* These are opaque structures to users.
#define HOSTADDRESS unsigned long long
#endif
-/** Try to evaulate the provided expression, and do a RETINT(x) iff
- * the expression evaluates to < 0.
- */
-#define ASSERT(cond) \
- do { if (!(cond)) \
- HUHDRV("ASSERT failed - %s", \
- __stringify(cond)); \
- } while (0)
-
#define sizeofmember(TYPE, MEMBER) (sizeof(((TYPE *)0)->MEMBER))
/** "Covered quotient" function */
#define COVQ(v, d) (((v) + (d) - 1) / (d))
(void *)(p2) = SWAPPOINTERS_TEMP; \
} while (0)
-#define PRINTKDRV(fmt, args...) LOGINF(fmt, ## args)
-#define TBDDRV(fmt, args...) LOGERR(fmt, ## args)
-#define HUHDRV(fmt, args...) LOGERR(fmt, ## args)
-#define ERRDRV(fmt, args...) LOGERR(fmt, ## args)
#define WARNDRV(fmt, args...) LOGWRN(fmt, ## args)
#define SECUREDRV(fmt, args...) LOGWRN(fmt, ## args)
-#define INFODRV(fmt, args...) LOGINF(fmt, ## args)
-#define DEBUGDRV(fmt, args...) DBGINF(fmt, ## args)
#define PRINTKDEV(devname, fmt, args...) LOGINFDEV(devname, fmt, ## args)
#define TBDDEV(devname, fmt, args...) LOGERRDEV(devname, fmt, ## args)
#define SECUREDEV(devname, fmt, args...) LOGWRNDEV(devname, fmt, ## args)
#define INFODEV(devname, fmt, args...) LOGINFDEV(devname, fmt, ## args)
#define INFODEVX(devno, fmt, args...) LOGINFDEVX(devno, fmt, ## args)
-#define DEBUGDEV(devname, fmt, args...) DBGINFDEV(devname, fmt, ## args)
/** Verifies the consistency of your PRIVATEDEVICEDATA structure using
* conventional "signature" fields:
#include "linux/version.h"
#include "iochannel.h"
-#include "uniklog.h"
#include <linux/atomic.h>
#include <linux/semaphore.h>
#include <linux/uuid.h>
struct uisthread_info {
struct task_struct *task;
int id;
- int should_stop;
struct completion has_stopped;
};
struct list_head list_link; /* links into ReqHandlerInfo_list */
};
-struct req_handler_info *req_handler_add(uuid_le switch_uuid,
- const char *switch_type_name,
- int (*controlfunc)(struct io_msgs *),
- unsigned long min_channel_bytes,
- int (*svr_channel_ok)(unsigned long
- channel_bytes),
- int (*svr_channel_init)(void *x,
- unsigned char *client_str,
- u32 client_str_len, u64 bytes));
struct req_handler_info *req_handler_find(uuid_le switch_uuid);
-int req_handler_del(uuid_le switch_uuid);
#define uislib_ioremap_cache(addr, size) \
dbg_ioremap_cache(addr, size, __FILE__, __LINE__)
int uisctrl_register_req_handler(int type, void *fptr,
struct ultra_vbus_deviceinfo *chipset_driver_info);
-int uisctrl_register_req_handler_ex(uuid_le switch_guid,
- const char *switch_type_name,
- int (*fptr)(struct io_msgs *),
- unsigned long min_channel_bytes,
- int (*svr_channel_ok)(unsigned long
- channel_bytes),
- int (*svr_channel_init)(void *x,
- unsigned char *client_str,
- u32 client_str_len,
- u64 bytes),
- struct ultra_vbus_deviceinfo *chipset_driver_info);
-int uisctrl_unregister_req_handler_ex(uuid_le switch_uuid);
unsigned char *util_map_virt(struct phys_info *sg);
void util_unmap_virt(struct phys_info *sg);
unsigned char *util_map_virt_atomic(struct phys_info *sg);
(void __iomem *)guid, sizeof(uuid_le));
if (uuid_le_cmp(tmpguid, NULL_UUID_LE) != 0)
break;
- LOGERR("Waiting for non-0 GUID (why???)...\n");
UIS_THREAD_WAIT_SEC(5);
}
- LOGERR("OK... GUID is non-0 now\n");
}
-/* CopyFragsInfoFromSkb returns the number of entries added to frags array
- * Returns -1 on failure.
- */
-unsigned int uisutil_copy_fragsinfo_from_skb(unsigned char *calling_ctx,
- void *skb_in,
- unsigned int firstfraglen,
- unsigned int frags_max,
- struct phys_info frags[]);
-
static inline unsigned int
issue_vmcall_io_controlvm_addr(u64 *control_addr, u32 *control_bytes)
{
+++ /dev/null
-/* uniklog.h
- *
- * Copyright (C) 2010 - 2013 UNISYS CORPORATION
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful, but
- * WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
- * NON INFRINGEMENT. See the GNU General Public License for more
- * details.
- */
-
-/* This module contains macros to aid developers in logging messages.
- *
- * This module is affected by the DEBUG compiletime option.
- *
- */
-#ifndef __UNIKLOG_H__
-#define __UNIKLOG_H__
-
-#include <linux/printk.h>
-
-/*
- * # DBGINF
- *
- * \brief Log debug informational message - log a LOG_INFO message only
- * if DEBUG compiletime option enabled
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the
- * format string.
- * \return nothing
- *
- * Log a message at the LOG_INFO level, but only if DEBUG is enabled. If
- * DEBUG is disabled, this expands to a no-op.
- */
-
-/*
- * # DBGVER
- *
- * \brief Log debug verbose message - log a LOG_DEBUG message only if
- * DEBUG compiletime option enabled
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the
- * format string.
- * \return nothing
- *
- * Log a message at the LOG_DEBUG level, but only if DEBUG is enabled. If
- * DEBUG is disabled, this expands to a no-op. Note also that LOG_DEBUG
- * messages can be enabled/disabled at runtime as well.
- */
-#define DBGINFDEV(devname, fmt, args...) do { } while (0)
-#define DBGVERDEV(devname, fmt, args...) do { } while (0)
-#define DBGINF(fmt, args...) do { } while (0)
-#define DBGVER(fmt, args...) do { } while (0)
-
-/*
- * # LOGINF
- *
- * \brief Log informational message - logs a message at the LOG_INFO level
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the
- * format string.
- * \return nothing
- *
- * Logs the specified message at the LOG_INFO level.
- */
-
-#define LOGINF(fmt, args...) pr_info(fmt, ## args)
-#define LOGINFDEV(devname, fmt, args...) \
- pr_info("%s " fmt, devname, ## args)
-#define LOGINFDEVX(devno, fmt, args...) \
- pr_info("dev%d " fmt, devno, ## args)
-#define LOGINFNAME(vnic, fmt, args...) \
- do { \
- if (vnic != NULL) { \
- pr_info("%s " fmt, vnic->name, ## args); \
- } else { \
- pr_info(fmt, ## args); \
- } \
- } while (0)
-
-/*
- * # LOGVER
- *
- * \brief Log verbose message - logs a message at the LOG_DEBUG level,
- * which can be disabled at runtime
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the format
- * \param string.
- * \return nothing
- *
- * Logs the specified message at the LOG_DEBUG level. Note also that
- * LOG_DEBUG messages can be enabled/disabled at runtime as well.
- */
-#define LOGVER(fmt, args...) pr_debug(fmt, ## args)
-#define LOGVERDEV(devname, fmt, args...) \
- pr_debug("%s " fmt, devname, ## args)
-#define LOGVERNAME(vnic, fmt, args...) \
- do { \
- if (vnic != NULL) { \
- pr_debug("%s " fmt, vnic->name, ## args); \
- } else { \
- pr_debug(fmt, ## args); \
- } \
- } while (0)
-
-/*
- * # LOGERR
- *
- * \brief Log error message - logs a message at the LOG_ERR level,
- * including source line number information
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the format
- * \param string.
- * \return nothing
- *
- * Logs the specified error message at the LOG_ERR level. It will also
- * include the file, line number, and function name of where the error
- * originated in the log message.
- */
-#define LOGERR(fmt, args...) pr_err(fmt, ## args)
-#define LOGERRDEV(devname, fmt, args...) \
- pr_err("%s " fmt, devname, ## args)
-#define LOGERRDEVX(devno, fmt, args...) \
- pr_err("dev%d " fmt, devno, ## args)
-#define LOGERRNAME(vnic, fmt, args...) \
- do { \
- if (vnic != NULL) { \
- pr_err("%s " fmt, vnic->name, ## args); \
- } else { \
- pr_err(fmt, ## args); \
- } \
- } while (0)
-#define LOGORDUMPERR(seqfile, fmt, args...) do { \
- if (seqfile) { \
- seq_printf(seqfile, fmt, ## args); \
- } else { \
- LOGERR(fmt, ## args); \
- } \
- } while (0)
-
-/*
- * # LOGWRN
- *
- * \brief Log warning message - Logs a message at the LOG_WARNING level,
- * including source line number information
- *
- * \param devname the device name of the device reporting this message, or
- * NULL if this message is NOT device-related.
- * \param fmt printf()-style format string containing the message to log.
- * \param args Optional arguments to be formatted and inserted into the format
- * \param string.
- * \return nothing
- *
- * Logs the specified error message at the LOG_WARNING level. It will also
- * include the file, line number, and function name of where the error
- * originated in the log message.
- */
-#define LOGWRN(fmt, args...) pr_warn(fmt, ## args)
-#define LOGWRNDEV(devname, fmt, args...) \
- pr_warn("%s " fmt, devname, ## args)
-#define LOGWRNNAME(vnic, fmt, args...) \
- do { \
- if (vnic != NULL) { \
- pr_warn("%s " fmt, vnic->name, ## args); \
- } else { \
- pr_warn(fmt, ## args); \
- } \
- } while (0)
-
-#endif /* __UNIKLOG_H__ */
config UNISYS_UISLIB
tristate "Unisys uislib driver"
- depends on UNISYSSPAR && UNISYS_VISORCHIPSET && HAS_IOMEM
+ select UNISYS_VISORCHIPSET
---help---
If you say Y here, you will enable the Unisys uislib driver.
visoruislib-y := uislib.o uisqueue.o uisthread.o uisutils.o
ccflags-y += -Idrivers/staging/unisys/include
-ccflags-y += -Idrivers/staging/unisys/channels
ccflags-y += -Idrivers/staging/unisys/visorchipset
-ccflags-y += -Idrivers/staging/unisys/sparstopdriver
ccflags-y += -Idrivers/staging/unisys/common-spar/include
ccflags-y += -Idrivers/staging/unisys/common-spar/include/channels
#include <linux/uuid.h>
#include <linux/version.h>
-#include "uniklog.h"
#include "diagnostics/appos_subsystems.h"
#include "uisutils.h"
#include "vbuschannel.h"
{
void __iomem *ch = uislib_ioremap_cache(ch_addr, ch_bytes);
- if (!ch) {
- LOGERR("CONTROLVM_BUS_CREATE error: ioremap_cache of channelAddr:%Lx for channelBytes:%llu failed",
- (unsigned long long)ch_addr,
- (unsigned long long)ch_bytes);
+ if (!ch)
return NULL;
- }
+
if (!SPAR_VBUS_CHANNEL_OK_CLIENT(ch)) {
- ERRDRV("%s channel cannot be used", __func__);
uislib_iounmap(ch);
return NULL;
}
size_t size;
if (max_bus_count == bus_list_count) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: max buses:%d already created\n",
- max_bus_count);
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, max_bus_count,
POSTCODE_SEVERITY_ERR);
return CONTROLVM_RESP_ERROR_MAX_BUSES;
(dev_count * sizeof(struct device_info *));
bus = kzalloc(size, GFP_ATOMIC);
if (!bus) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: kmalloc for bus failed.\n");
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus_no,
POSTCODE_SEVERITY_ERR);
return CONTROLVM_RESP_ERROR_KMALLOC_FAILED;
/* found a bus already in the list with same bus_no -
* reject add
*/
- LOGERR("CONTROLVM_BUS_CREATE Failed: bus %d already exists.\n",
- bus->bus_no);
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->bus_no,
POSTCODE_SEVERITY_ERR);
kfree(bus);
cmd.add_vbus.bus_uuid = msg->cmd.create_bus.bus_data_type_uuid;
cmd.add_vbus.instance_uuid = msg->cmd.create_bus.bus_inst_uuid;
if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci callback not registered.");
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->bus_no,
POSTCODE_SEVERITY_ERR);
kfree(bus);
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
}
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: virtpci GUEST_ADD_VBUS returned error.");
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus->bus_no,
POSTCODE_SEVERITY_ERR);
kfree(bus);
}
if (!bus) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: failed to find bus %d.\n",
- bus_no);
read_unlock(&bus_list_lock);
return CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
/* verify that this bus has no devices. */
for (i = 0; i < bus->device_count; i++) {
if (bus->device[i] != NULL) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: device %i attached to bus %d.",
- i, bus_no);
read_unlock(&bus_list_lock);
return CONTROLVM_RESP_ERROR_BUS_DEVICE_ATTACHED;
}
with this bus. */
cmd.msgtype = GUEST_DEL_VBUS;
cmd.del_vbus.bus_no = bus_no;
- if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: virtpci callback not registered.");
+ if (!virt_control_chan_func)
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
- }
- if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: virtpci GUEST_DEL_VBUS returned error.");
+
+ if (!virt_control_chan_func(&cmd))
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
- }
/* finally, remove the bus from the list */
remove:
dev = kzalloc(sizeof(*dev), GFP_ATOMIC);
if (!dev) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: kmalloc for dev failed.\n");
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
return CONTROLVM_RESP_ERROR_KMALLOC_FAILED;
*/
min_size = req_handler->min_channel_bytes;
if (min_size > msg->cmd.create_device.channel_bytes) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: channel size is too small, channel size:0x%lx, required size:0x%lx",
- (ulong)msg->cmd.create_device.channel_bytes,
- (ulong)min_size);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
result = CONTROLVM_RESP_ERROR_CHANNEL_SIZE_TOO_SMALL;
uislib_ioremap_cache(dev->channel_addr,
msg->cmd.create_device.channel_bytes);
if (!dev->chanptr) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: ioremap_cache of channelAddr:%Lx for channelBytes:%llu failed",
- dev->channel_addr,
- msg->cmd.create_device.channel_bytes);
result = CONTROLVM_RESP_ERROR_IOREMAP_FAILED;
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
continue;
/* make sure the device number is valid */
if (dev_no >= bus->device_count) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: device (%d) >= deviceCount (%d).",
- dev_no, bus->device_count);
result = CONTROLVM_RESP_ERROR_MAX_DEVICES;
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
}
/* make sure this device is not already set */
if (bus->device[dev_no]) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: device %d is already exists.",
- dev_no);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC,
dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
wait_for_valid_guid(&((struct channel_header __iomem *)
(dev->chanptr))->chtype);
if (!SPAR_VHBA_CHANNEL_OK_CLIENT(dev->chanptr)) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed:[CLIENT]VHBA dev %d chan invalid.",
- dev_no);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC,
dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
wait_for_valid_guid(&((struct channel_header __iomem *)
(dev->chanptr))->chtype);
if (!SPAR_VNIC_CHANNEL_OK_CLIENT(dev->chanptr)) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: VNIC[CLIENT] dev %d chan invalid.",
- dev_no);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC,
dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
cmd.add_vnic.instance_uuid = dev->instance_uuid;
cmd.add_vhba.intr = dev->intr;
} else {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: unknown channelTypeGuid.\n");
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
result = CONTROLVM_RESP_ERROR_CHANNEL_TYPE_UNKNOWN;
}
if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: virtpci callback not registered.");
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
result = CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
}
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: virtpci GUEST_ADD_[VHBA||VNIC] returned error.");
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no,
bus_no, POSTCODE_SEVERITY_ERR);
result =
}
read_unlock(&bus_list_lock);
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: failed to find bus %d.",
- bus_no);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
result = CONTROLVM_RESP_ERROR_BUS_INVALID;
if (bus->bus_no == bus_no) {
/* make sure the device number is valid */
if (dev_no >= bus->device_count) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: device(%d) >= deviceCount(%d).",
- dev_no, bus->device_count);
retval = CONTROLVM_RESP_ERROR_DEVICE_INVALID;
} else {
/* make sure this device exists */
dev = bus->device[dev_no];
if (!dev) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: device %d does not exist.",
- dev_no);
retval =
CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
break;
}
}
- if (!bus) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: bus %d does not exist",
- bus_no);
+ if (!bus)
retval = CONTROLVM_RESP_ERROR_BUS_INVALID;
- }
+
read_unlock(&bus_list_lock);
if (retval == CONTROLVM_RESP_SUCCESS) {
/* the msg is bound for virtpci; send
cmd.msgtype = GUEST_PAUSE_VNIC;
cmd.pause_vnic.chanptr = dev->chanptr;
} else {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: unknown channelTypeGuid.\n");
return CONTROLVM_RESP_ERROR_CHANNEL_TYPE_UNKNOWN;
}
- if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE Failed: virtpci callback not registered.");
+ if (!virt_control_chan_func)
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
- }
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:pause Failed: virtpci GUEST_PAUSE_[VHBA||VNIC] returned error.");
return
CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
}
if (bus->bus_no == bus_no) {
/* make sure the device number is valid */
if (dev_no >= bus->device_count) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: device(%d) >= deviceCount(%d).",
- dev_no, bus->device_count);
retval = CONTROLVM_RESP_ERROR_DEVICE_INVALID;
} else {
/* make sure this device exists */
dev = bus->device[dev_no];
if (!dev) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: device %d does not exist.",
- dev_no);
retval =
CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
}
}
- if (!bus) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: bus %d does not exist",
- bus_no);
+ if (!bus)
retval = CONTROLVM_RESP_ERROR_BUS_INVALID;
- }
+
read_unlock(&bus_list_lock);
/* the msg is bound for virtpci; send
* guest_msgs struct to callback
cmd.msgtype = GUEST_RESUME_VNIC;
cmd.resume_vnic.chanptr = dev->chanptr;
} else {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: unknown channelTypeGuid.\n");
return CONTROLVM_RESP_ERROR_CHANNEL_TYPE_UNKNOWN;
}
- if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE Failed: virtpci callback not registered.");
+ if (!virt_control_chan_func)
return CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
- }
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE:resume Failed: virtpci GUEST_RESUME_[VHBA||VNIC] returned error.");
return
CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
}
dev_no = msg->cmd.destroy_device.bus_no;
read_lock(&bus_list_lock);
- LOGINF("destroy_device called for bus_no=%u, dev_no=%u", bus_no,
- dev_no);
for (bus = bus_list; bus; bus = bus->next) {
if (bus->bus_no == bus_no) {
/* make sure the device number is valid */
if (dev_no >= bus->device_count) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: device(%d) >= device_count(%d).",
- dev_no, bus->device_count);
retval = CONTROLVM_RESP_ERROR_DEVICE_INVALID;
} else {
/* make sure this device exists */
dev = bus->device[dev_no];
if (!dev) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: device %d does not exist.",
- dev_no);
retval =
CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
}
}
- if (!bus) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: bus %d does not exist",
- bus_no);
+ if (!bus)
retval = CONTROLVM_RESP_ERROR_BUS_INVALID;
- }
read_unlock(&bus_list_lock);
if (retval == CONTROLVM_RESP_SUCCESS) {
/* the msg is bound for virtpci; send
cmd.msgtype = GUEST_DEL_VNIC;
cmd.del_vnic.chanptr = dev->chanptr;
} else {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: unknown channelTypeGuid.\n");
return
CONTROLVM_RESP_ERROR_CHANNEL_TYPE_UNKNOWN;
}
if (!virt_control_chan_func) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: virtpci callback not registered.");
return
CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_FAILURE;
}
if (!virt_control_chan_func(&cmd)) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: virtpci GUEST_DEL_[VHBA||VNIC] returned error.");
return
CONTROLVM_RESP_ERROR_VIRTPCI_DRIVER_CALLBACK_ERROR;
}
* on which accesses the channel and you will get a "unable to handle
* kernel paging request"
*/
- if (dev->polling) {
- LOGINF("calling uislib_disable_channel_interrupts");
+ if (dev->polling)
uislib_disable_channel_interrupts(bus_no, dev_no);
- }
/* unmap the channel memory for the device. */
- if (!msg->hdr.flags.test_message) {
- LOGINF("destroy_device, doing iounmap");
+ if (!msg->hdr.flags.test_message)
uislib_iounmap(dev->chanptr);
- }
kfree(dev);
bus->device[dev_no] = NULL;
}
init_msg_header(&msg, CONTROLVM_BUS_DESTROY, 0, 0);
msg.cmd.destroy_bus.bus_no = bus_no;
- if (destroy_bus(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("destroy_bus failed. bus_no=0x%x\n", bus_no);
+ if (destroy_bus(&msg, NULL) != CONTROLVM_RESP_SUCCESS)
return 0;
- }
return 1;
}
init_msg_header(&msg, CONTROLVM_DEVICE_DESTROY, 0, 0);
msg.cmd.destroy_device.bus_no = bus_no;
msg.cmd.destroy_device.dev_no = dev_no;
- if (destroy_device(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("destroy_device failed. bus_no=0x%x dev_no=0x%x\n",
- bus_no, dev_no);
+ if (destroy_device(&msg, NULL) != CONTROLVM_RESP_SUCCESS)
return 0;
- }
return 1;
}
{
struct controlvm_message msg;
- LOGINF("enter busNo=0x%x\n", bus_no);
/* step 0: init the chipset */
POSTCODE_LINUX_3(CHIPSET_INIT_ENTRY_PC, bus_no, POSTCODE_SEVERITY_INFO);
*/
msg.cmd.init_chipset.bus_count = 23;
msg.cmd.init_chipset.switch_count = 0;
- if (init_chipset(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("init_chipset failed.\n");
+ if (init_chipset(&msg, NULL) != CONTROLVM_RESP_SUCCESS)
return 0;
- }
- LOGINF("chipset initialized\n");
POSTCODE_LINUX_3(CHIPSET_INIT_EXIT_PC, bus_no,
POSTCODE_SEVERITY_INFO);
}
msg.cmd.create_bus.channel_addr = channel_addr;
msg.cmd.create_bus.channel_bytes = n_channel_bytes;
if (create_bus(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("create_bus failed.\n");
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, bus_no,
POSTCODE_SEVERITY_ERR);
return 0;
msg.cmd.device_change_state.dev_no = dev_no;
msg.cmd.device_change_state.state = segment_state_standby;
rc = pause_device(&msg);
- if (rc != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VHBA pause_device failed. busNo=0x%x devNo=0x%x\n",
- bus_no, dev_no);
+ if (rc != CONTROLVM_RESP_SUCCESS)
return rc;
- }
return 0;
}
EXPORT_SYMBOL_GPL(uislib_client_inject_pause_vhba);
msg.cmd.device_change_state.dev_no = dev_no;
msg.cmd.device_change_state.state = segment_state_running;
rc = resume_device(&msg);
- if (rc != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VHBA resume_device failed. busNo=0x%x devNo=0x%x\n",
- bus_no, dev_no);
+ if (rc != CONTROLVM_RESP_SUCCESS)
return rc;
- }
return 0;
}
EXPORT_SYMBOL_GPL(uislib_client_inject_resume_vhba);
{
struct controlvm_message msg;
- LOGINF(" enter busNo=0x%x devNo=0x%x\n", bus_no, dev_no);
/* chipset init'ed with bus bus has been previously created -
* Verify it still exists step 2: create the VHBA device on the
* bus
sizeof(struct irq_info));
msg.cmd.create_device.channel_addr = phys_chan_addr;
if (chan_bytes < MIN_IO_CHANNEL_SIZE) {
- LOGERR("wrong channel size.chan_bytes = 0x%x IO_CHANNEL_SIZE= 0x%x\n",
- chan_bytes, (unsigned int)MIN_IO_CHANNEL_SIZE);
POSTCODE_LINUX_4(VHBA_CREATE_FAILURE_PC, chan_bytes,
MIN_IO_CHANNEL_SIZE, POSTCODE_SEVERITY_ERR);
return 0;
msg.cmd.create_device.channel_bytes = chan_bytes;
msg.cmd.create_device.data_type_uuid = spar_vhba_channel_protocol_uuid;
if (create_device(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VHBA create_device failed.\n");
POSTCODE_LINUX_4(VHBA_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
return 0;
{
struct controlvm_message msg;
- LOGINF(" enter busNo=0x%x devNo=0x%x\n", bus_no, dev_no);
/* chipset init'ed with bus bus has been previously created -
* Verify it still exists step 2: create the VNIC device on the
* bus
sizeof(struct irq_info));
msg.cmd.create_device.channel_addr = phys_chan_addr;
if (chan_bytes < MIN_IO_CHANNEL_SIZE) {
- LOGERR("wrong channel size.chan_bytes = 0x%x IO_CHANNEL_SIZE= 0x%x\n",
- chan_bytes, (unsigned int)MIN_IO_CHANNEL_SIZE);
POSTCODE_LINUX_4(VNIC_CREATE_FAILURE_PC, chan_bytes,
MIN_IO_CHANNEL_SIZE, POSTCODE_SEVERITY_ERR);
return 0;
msg.cmd.create_device.channel_bytes = chan_bytes;
msg.cmd.create_device.data_type_uuid = spar_vnic_channel_protocol_uuid;
if (create_device(&msg, NULL) != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VNIC create_device failed.\n");
POSTCODE_LINUX_4(VNIC_CREATE_FAILURE_PC, dev_no, bus_no,
POSTCODE_SEVERITY_ERR);
return 0;
msg.cmd.device_change_state.dev_no = dev_no;
msg.cmd.device_change_state.state = segment_state_standby;
rc = pause_device(&msg);
- if (rc != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VNIC pause_device failed. busNo=0x%x devNo=0x%x\n",
- bus_no, dev_no);
+ if (rc != CONTROLVM_RESP_SUCCESS)
return -1;
- }
return 0;
}
EXPORT_SYMBOL_GPL(uislib_client_inject_pause_vnic);
msg.cmd.device_change_state.dev_no = dev_no;
msg.cmd.device_change_state.state = segment_state_running;
rc = resume_device(&msg);
- if (rc != CONTROLVM_RESP_SUCCESS) {
- LOGERR("VNIC resume_device failed. busNo=0x%x devNo=0x%x\n",
- bus_no, dev_no);
+ if (rc != CONTROLVM_RESP_SUCCESS)
return -1;
- }
return 0;
}
EXPORT_SYMBOL_GPL(uislib_client_inject_resume_vnic);
*/
void *p = kmem_cache_alloc(cur_pool, GFP_ATOMIC | __GFP_NORETRY);
- if (p == NULL) {
- LOGERR("uislib_malloc failed to alloc uiscmdrsp @%s:%d",
- fn, ln);
+ if (p == NULL)
return NULL;
- }
return p;
}
EXPORT_SYMBOL_GPL(uislib_cache_alloc);
void
uislib_cache_free(struct kmem_cache *cur_pool, void *p, char *fn, int ln)
{
- if (p == NULL) {
- LOGERR("uislib_free NULL pointer @%s:%d", fn, ln);
+ if (p == NULL)
return;
- }
kmem_cache_free(cur_pool, p);
}
EXPORT_SYMBOL_GPL(uislib_cache_free);
/* *start = buf; */
if (debug_buf == NULL) {
- DBGINF("debug_buf == NULL; allocating buffer.\n.");
debug_buf = vmalloc(PROC_READ_BUFFER_SIZE);
- if (debug_buf == NULL) {
- LOGERR("failed to allocate buffer to provide proc data.\n");
+ if (debug_buf == NULL)
return -ENOMEM;
- }
}
temp = debug_buf;
if ((*offset == 0) || (!debug_buf_valid)) {
- DBGINF("calling info_debugfs_read_helper.\n");
/* if the read fails, then -1 will be returned */
total_bytes = info_debugfs_read_helper(&temp, &remaining_bytes);
debug_buf_valid = 1;
for (bus = bus_list; bus; bus = bus->next) {
if (bus->bus_no == bus_no) {
/* make sure the device number is valid */
- if (dev_no >= bus->device_count) {
- LOGERR("%s bad bus_no, dev_no=%d,%d",
- __func__,
- (int)bus_no, (int)dev_no);
+ if (dev_no >= bus->device_count)
break;
- }
dev = bus->device[dev_no];
- if (!dev)
- LOGERR("%s bad bus_no, dev_no=%d,%d",
- __func__,
- (int)bus_no, (int)dev_no);
break;
}
}
wait_cycles = (cur_cycles - old_cycles);
}
}
- LOGINF("wait_cycles=%llu", wait_cycles);
cycles_before_wait = wait_cycles;
idle_cycles = 0;
poll_dev_start = 0;
}
}
}
- if (incoming_ti.should_stop)
+ if (kthread_should_stop())
break;
}
if (new_tail != NULL) {
* - there is no input waiting on any of the channels
* - we have received a signal to stop this thread
*/
- if (incoming_ti.should_stop)
+ if (kthread_should_stop())
break;
- if (en_smart_wakeup == 0xFF) {
- LOGINF("en_smart_wakeup set to 0xff, to force exiting process_incoming");
+ if (en_smart_wakeup == 0xFF)
break;
- }
/* wait for POLLJIFFIES_NORMAL jiffies, or until
* someone wakes up poll_dev_wake_q,
* whichever comes first only do a wait when we have
idle_cycles = idle_cycles + delta_cycles;
}
}
- DBGINF("exiting.\n");
complete_and_exit(&incoming_ti.has_stopped, 0);
}
return TRUE;
if (!uisthread_start(&incoming_ti,
&process_incoming, NULL, "dev_incoming")) {
- LOGERR("uisthread_start initialize_incoming_thread ****FAILED");
return FALSE;
}
incoming_started = TRUE;
struct device_info *dev;
dev = find_dev(bus_no, dev_no);
- if (!dev) {
- LOGERR("%s busNo=%d, devNo=%d", __func__, (int)(bus_no),
- (int)(dev_no));
+ if (!dev)
return;
- }
+
down(&poll_dev_lock);
initialize_incoming_thread();
dev->interrupt = interrupt;
struct device_info *dev;
dev = find_dev(bus_no, dev_no);
- if (!dev) {
- LOGERR("%s busNo=%d, devNo=%d", __func__, (int)(bus_no),
- (int)(dev_no));
+ if (!dev)
return;
- }
down(&poll_dev_lock);
list_del(&dev->list_polling_device_channels);
dev->polling = FALSE;
if (!unisys_spar_platform)
return -ENODEV;
- LOGINF("MONITORAPIS");
-
- LOGINF("sizeof(struct uiscmdrsp):%lu bytes\n",
- (ulong)sizeof(struct uiscmdrsp));
- LOGINF("sizeof(struct phys_info):%lu\n",
- (ulong)sizeof(struct phys_info));
- LOGINF("sizeof(uiscmdrsp_scsi):%lu\n",
- (ulong)sizeof(struct uiscmdrsp_scsi));
- LOGINF("sizeof(uiscmdrsp_net):%lu\n",
- (ulong)sizeof(struct uiscmdrsp_net));
- LOGINF("sizeof(CONTROLVM_MESSAGE):%lu bytes\n",
- (ulong)sizeof(struct controlvm_message));
- LOGINF("sizeof(struct spar_controlvm_channel_protocol):%lu bytes\n",
- (ulong)sizeof(struct spar_controlvm_channel_protocol));
- LOGINF("sizeof(CHANNEL_HEADER):%lu bytes\n",
- (ulong)sizeof(struct channel_header));
- LOGINF("sizeof(struct spar_io_channel_protocol):%lu bytes\n",
- (ulong)sizeof(struct spar_io_channel_protocol));
- LOGINF("SIZEOF_CMDRSP:%lu bytes\n", SIZEOF_CMDRSP);
- LOGINF("SIZEOF_PROTOCOL:%lu bytes\n", SIZEOF_PROTOCOL);
-
/* initialize global pointers to NULL */
bus_list = NULL;
bus_list_count = 0;
debugfs_remove(cycles_before_wait_debugfs_read);
debugfs_remove(platformnumber_debugfs_read);
debugfs_remove(dir_debugfs);
-
- DBGINF("goodbye.\n");
}
module_init(uislib_mod_init);
while (!do_locked_client_insert(queueinfo, whichqueue, cmdrsp,
(spinlock_t *)insertlock,
channel_id)) {
- if (oktowait != OK_TO_WAIT) {
- LOGERR("****FAILED visor_signal_insert failed; cannot wait; insert aborted\n");
+ if (oktowait != OK_TO_WAIT)
return 0; /* failed to queue */
- }
+
/* try again */
- LOGERR("****FAILED visor_signal_insert failed; waiting to try again\n");
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(msecs_to_jiffies(10));
}
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/kthread.h>
-#include "uniklog.h"
#include "uisutils.h"
#include "uisthread.h"
-#define KILL(a, b, c) kill_pid(find_vpid(a), b, c)
-
/* this is shorter than using __FILE__ (full path name) in
* debug/info/error messages
*/
uisthread_start(struct uisthread_info *thrinfo,
int (*threadfn)(void *), void *thrcontext, char *name)
{
- thrinfo->should_stop = 0;
/* used to stop the thread */
init_completion(&thrinfo->has_stopped);
- thrinfo->task = kthread_create(threadfn, thrcontext, name, NULL);
+ thrinfo->task = kthread_run(threadfn, thrcontext, name);
if (IS_ERR(thrinfo->task)) {
thrinfo->id = 0;
return 0; /* failure */
}
thrinfo->id = thrinfo->task->pid;
- wake_up_process(thrinfo->task);
- LOGINF("started thread pid:%d\n", thrinfo->id);
return 1;
}
EXPORT_SYMBOL_GPL(uisthread_start);
void
uisthread_stop(struct uisthread_info *thrinfo)
{
- int ret;
int stopped = 0;
if (thrinfo->id == 0)
return; /* thread not running */
- LOGINF("uisthread_stop stopping id:%d\n", thrinfo->id);
- thrinfo->should_stop = 1;
- ret = KILL(thrinfo->id, SIGHUP, 1);
- if (ret) {
- LOGERR("unable to signal thread %d\n", ret);
- } else {
- /* give up if the thread has NOT died in 1 minute */
- if (wait_for_completion_timeout(&thrinfo->has_stopped, 60 * HZ))
- stopped = 1;
- else
- LOGERR("timed out trying to signal thread\n");
- }
- if (stopped) {
- LOGINF("uisthread_stop stopped id:%d\n", thrinfo->id);
+ kthread_stop(thrinfo->task);
+ /* give up if the thread has NOT died in 1 minute */
+ if (wait_for_completion_timeout(&thrinfo->has_stopped, 60 * HZ))
+ stopped = 1;
+
+ if (stopped)
thrinfo->id = 0;
- }
}
EXPORT_SYMBOL_GPL(uisthread_stop);
#include <linux/uuid.h>
#include <linux/spinlock.h>
#include <linux/list.h>
-#include "uniklog.h"
#include "uisutils.h"
#include "version.h"
#include "vbushelper.h"
va_list args;
int len;
- DBGINF("buffer = 0x%p : *buffer = 0x%p.\n", buffer, *buffer);
va_start(args, format);
len = vsnprintf(*buffer, *buffer_remaining, format, args);
va_end(args);
*buffer += *buffer_remaining;
*total += *buffer_remaining;
*buffer_remaining = 0;
- LOGERR("bytes remaining is too small!\n");
return -1;
}
*buffer_remaining -= len;
uisctrl_register_req_handler(int type, void *fptr,
struct ultra_vbus_deviceinfo *chipset_driver_info)
{
- LOGINF("type = %d, fptr = 0x%p.\n", type, fptr);
-
switch (type) {
case 2:
if (fptr) {
break;
default:
- LOGERR("invalid type %d.\n", type);
return 0;
}
if (chipset_driver_info)
}
EXPORT_SYMBOL_GPL(uisctrl_register_req_handler);
-int
-uisctrl_register_req_handler_ex(uuid_le switch_uuid,
- const char *switch_type_name,
- int (*controlfunc)(struct io_msgs *),
- unsigned long min_channel_bytes,
- int (*server_channel_ok)(unsigned long channel_bytes),
- int (*server_channel_init)(void *x,
- unsigned char *client_str,
- u32 client_str_len, u64 bytes),
- struct ultra_vbus_deviceinfo *chipset_driver_info)
-{
- struct req_handler_info *req_handler;
-
- LOGINF("type=%pUL, controlfunc=0x%p.\n",
- &switch_uuid, controlfunc);
- if (!controlfunc) {
- LOGERR("%pUL: controlfunc must be supplied\n", &switch_uuid);
- return 0;
- }
- if (!server_channel_ok) {
- LOGERR("%pUL: Server_Channel_Ok must be supplied\n",
- &switch_uuid);
- return 0;
- }
- if (!server_channel_init) {
- LOGERR("%pUL: Server_Channel_Init must be supplied\n",
- &switch_uuid);
- return 0;
- }
- req_handler = req_handler_add(switch_uuid,
- switch_type_name,
- controlfunc,
- min_channel_bytes,
- server_channel_ok, server_channel_init);
- if (!req_handler) {
- LOGERR("failed to add %pUL to server list\n", &switch_uuid);
- return 0;
- }
-
- atomic_inc(&uisutils_registered_services);
- if (chipset_driver_info) {
- bus_device_info_init(chipset_driver_info, "chipset",
- "uislib", VERSION, NULL);
- return 1;
- }
-
- LOGERR("failed to register type %pUL.\n", &switch_uuid);
- return 0;
-}
-EXPORT_SYMBOL_GPL(uisctrl_register_req_handler_ex);
-
-int
-uisctrl_unregister_req_handler_ex(uuid_le switch_uuid)
-{
- LOGINF("type=%pUL.\n", &switch_uuid);
- if (req_handler_del(switch_uuid) < 0) {
- LOGERR("failed to remove %pUL from server list\n",
- &switch_uuid);
- return 0;
- }
- atomic_dec(&uisutils_registered_services);
- return 1;
-}
-EXPORT_SYMBOL_GPL(uisctrl_unregister_req_handler_ex);
-
/*
* unsigned int uisutil_copy_fragsinfo_from_skb(unsigned char *calling_ctx,
* void *skb_in,
* return value indicates number of
* entries filled in frags
*/
-unsigned int
-uisutil_copy_fragsinfo_from_skb(unsigned char *calling_ctx, void *skb_in,
- unsigned int firstfraglen,
- unsigned int frags_max,
- struct phys_info frags[])
-{
- unsigned int count = 0, ii, size, offset = 0, numfrags;
- struct sk_buff *skb = skb_in;
-
- numfrags = skb_shinfo(skb)->nr_frags;
-
- while (firstfraglen) {
- if (count == frags_max) {
- LOGERR("%s frags array too small: max:%d count:%d\n",
- calling_ctx, frags_max, count);
- return -1; /* failure */
- }
- frags[count].pi_pfn =
- page_to_pfn(virt_to_page(skb->data + offset));
- frags[count].pi_off =
- (unsigned long)(skb->data + offset) & PI_PAGE_MASK;
- size =
- min(firstfraglen,
- (unsigned int)(PI_PAGE_SIZE - frags[count].pi_off));
- /* can take smallest of firstfraglen(what's left) OR
- * bytes left in the page
- */
- frags[count].pi_len = size;
- firstfraglen -= size;
- offset += size;
- count++;
- }
- if (!numfrags)
- goto dolist;
-
- if ((count + numfrags) > frags_max) {
- LOGERR("**** FAILED %s frags array too small: max:%d count+nr_frags:%d\n",
- calling_ctx, frags_max, count + numfrags);
- return -1; /* failure */
- }
-
- for (ii = 0; ii < numfrags; ii++) {
- count = add_physinfo_entries(page_to_pfn(
- skb_frag_page(&skb_shinfo(skb)->frags[ii])),
- skb_shinfo(skb)->frags[ii].
- page_offset,
- skb_shinfo(skb)->frags[ii].
- size, count, frags_max,
- frags);
- if (count == 0) {
- LOGERR("**** FAILED to add physinfo entries\n");
- return -1; /* failure */
- }
- }
-
-dolist: if (skb_shinfo(skb)->frag_list) {
- struct sk_buff *skbinlist;
- int c;
-
- for (skbinlist = skb_shinfo(skb)->frag_list; skbinlist;
- skbinlist = skbinlist->next) {
- c = uisutil_copy_fragsinfo_from_skb("recursive",
- skbinlist,
- skbinlist->len - skbinlist->data_len,
- frags_max - count,
- &frags[count]);
- if (c == -1) {
- LOGERR("**** FAILED recursive call failed\n");
- return -1;
- }
- count += c;
- }
- }
- return count;
-}
-EXPORT_SYMBOL_GPL(uisutil_copy_fragsinfo_from_skb);
static LIST_HEAD(req_handler_info_list); /* list of struct req_handler_info */
static DEFINE_SPINLOCK(req_handler_info_list_lock);
-struct req_handler_info *
-req_handler_add(uuid_le switch_uuid,
- const char *switch_type_name,
- int (*controlfunc)(struct io_msgs *),
- unsigned long min_channel_bytes,
- int (*server_channel_ok)(unsigned long channel_bytes),
- int (*server_channel_init)
- (void *x, unsigned char *clientstr, u32 clientstr_len,
- u64 bytes))
-{
- struct req_handler_info *rc = NULL;
-
- rc = kzalloc(sizeof(*rc), GFP_ATOMIC);
- if (!rc)
- return NULL;
- rc->switch_uuid = switch_uuid;
- rc->controlfunc = controlfunc;
- rc->min_channel_bytes = min_channel_bytes;
- rc->server_channel_ok = server_channel_ok;
- rc->server_channel_init = server_channel_init;
- if (switch_type_name)
- strncpy(rc->switch_type_name, switch_type_name,
- sizeof(rc->switch_type_name) - 1);
- spin_lock(&req_handler_info_list_lock);
- list_add_tail(&rc->list_link, &req_handler_info_list);
- spin_unlock(&req_handler_info_list_lock);
-
- return rc;
-}
-
struct req_handler_info *
req_handler_find(uuid_le switch_uuid)
{
spin_unlock(&req_handler_info_list_lock);
return NULL;
}
-
-int
-req_handler_del(uuid_le switch_uuid)
-{
- struct list_head *lelt, *tmp;
- struct req_handler_info *entry = NULL;
- int rc = -1;
-
- spin_lock(&req_handler_info_list_lock);
- list_for_each_safe(lelt, tmp, &req_handler_info_list) {
- entry = list_entry(lelt, struct req_handler_info, list_link);
- if (uuid_le_cmp(entry->switch_uuid, switch_uuid) == 0) {
- list_del(lelt);
- kfree(entry);
- rc++;
- }
- }
- spin_unlock(&req_handler_info_list_lock);
- return rc;
-}
config UNISYS_VIRTHBA
tristate "Unisys virthba driver"
- depends on UNISYSSPAR && UNISYS_VISORCHIPSET && UNISYS_UISLIB && UNISYS_VIRTPCI && SCSI
+ depends on SCSI
+ select UNISYS_VISORCHIPSET
+ select UNISYS_UISLIB
+ select UNISYS_VIRTPCI
---help---
If you say Y here, you will enable the Unisys virthba driver.
ccflags-y += -Idrivers/staging/unisys/include
ccflags-y += -Idrivers/staging/unisys/uislib
-ccflags-y += -Idrivers/staging/unisys/timskmod
ccflags-y += -Idrivers/staging/unisys/visorchipset
ccflags-y += -Idrivers/staging/unisys/virtpci
ccflags-y += -Idrivers/staging/unisys/common-spar/include
* which start with an 8 digit sequence number, a colon, and then
* letters after that */
-#undef DBGINF
-
#include <linux/kernel.h>
#ifdef CONFIG_MODVERSIONS
#include <config/modversions.h>
#endif
-#include "uniklog.h"
#include "diagnostics/appos_subsystems.h"
#include "uisutils.h"
#include "uisqueue.h"
spin_lock_irqsave(&vhbainfo->privlock, flags);
insert_location = vhbainfo->nextinsert;
- while (vhbainfo->pending[insert_location].sent != NULL) {
+ while (vhbainfo->pending[insert_location].sent) {
insert_location = (insert_location + 1) % MAX_PENDING_REQUESTS;
if (insert_location == (int)vhbainfo->nextinsert) {
- LOGERR("Queue should be full. insert_location<<%d>> Unable to find open slot for pending commands.\n",
- insert_location);
spin_unlock_irqrestore(&vhbainfo->privlock, flags);
return -1;
}
int insert_location = add_scsipending_entry(vhbainfo, cmdtype, new);
while (insert_location == -1) {
- LOGERR("Failed to find empty queue slot. Waiting to try again\n");
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(msecs_to_jiffies(10));
insert_location = add_scsipending_entry(vhbainfo, cmdtype, new);
unsigned long flags;
void *sent = NULL;
- if (del >= MAX_PENDING_REQUESTS) {
- LOGERR("Invalid queue position <<%lu>> given to delete. MAX_PENDING_REQUESTS <<%d>>\n",
- (unsigned long)del, MAX_PENDING_REQUESTS);
- } else {
+ if (del < MAX_PENDING_REQUESTS) {
spin_lock_irqsave(&vhbainfo->privlock, flags);
-
- if (vhbainfo->pending[del].sent == NULL)
- LOGERR("Deleting already cleared queue entry at <<%lu>>.\n",
- (unsigned long)del);
-
sent = vhbainfo->pending[del].sent;
vhbainfo->pending[del].cmdtype = 0;
error =
scsi_add_device(dar->shost, dar->channel, dar->id,
dar->lun);
- if (error)
- LOGERR("Failed scsi_add_device: host_no=%d[chan=%d:id=%d:lun=%d]\n",
- dar->shost->host_no, dar->channel, dar->id,
- dar->lun);
- } else
- LOGERR("Failed scsi_device_lookup:[chan=%d:id=%d:lun=%d]\n",
- dar->channel, dar->id, dar->lun);
+ }
kfree(dar);
}
dar->id = cmdrsp->disknotify.id;
dar->lun = cmdrsp->disknotify.lun;
QUEUE_DISKADDREMOVE(dar);
- } else {
- LOGERR("kmalloc failed for dar. host_no=%d[chan=%d:id=%d:lun=%d]\n",
- shost->host_no, cmdrsp->disknotify.channel,
- cmdrsp->disknotify.id, cmdrsp->disknotify.lun);
}
}
u64 mask;
unsigned long long rc1;
- if (virthbainfo == NULL)
+ if (!virthbainfo)
return IRQ_NONE;
virthbainfo->interrupts_rcvd++;
channel_header = virthbainfo->chinfo.queueinfo->chan;
struct signal_queue_header __iomem *pqhdr;
u64 mask;
- LOGVER("entering virthba_probe...\n");
- LOGVER("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
-
- LOGINF("entering virthba_probe...\n");
- LOGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
POSTCODE_LINUX_2(VHBA_PROBE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
/* call scsi_host_alloc to register a scsi host adapter
* instance - this virthba that has just been created is an
* initialization. The host is not published to the scsi
* midlayer until scsi_add_host is called.
*/
- DBGINF("calling scsi_host_alloc.\n");
/* arg 2 passed in length of extra space we want allocated
* with scsi_host struct for our own use scsi_host_alloc
*/
scsihost = scsi_host_alloc(&virthba_driver_template,
sizeof(struct virthba_info));
- if (scsihost == NULL)
+ if (!scsihost)
return -ENODEV;
- DBGINF("scsihost: 0x%p, scsihost->this_id: %d, host_no: %d.\n",
- scsihost, scsihost->this_id, scsihost->host_no);
-
scsihost->this_id = UIS_MAGIC_VHBA;
/* linux treats max-channel differently than max-id & max-lun.
* In the latter cases, those two values result in 0 to max-1
* scan is 0 to max (inclusive); so we will subtract one from
* the max-channel value.
*/
- LOGINF("virtpcidev->scsi.max.max_channel=%u, max_id=%u, max_lun=%u, cmd_per_lun=%u, max_io_size=%u\n",
- (unsigned)virtpcidev->scsi.max.max_channel - 1,
- (unsigned)virtpcidev->scsi.max.max_id,
- (unsigned)virtpcidev->scsi.max.max_lun,
- (unsigned)virtpcidev->scsi.max.cmd_per_lun,
- (unsigned)virtpcidev->scsi.max.max_io_size);
scsihost->max_channel = (unsigned)virtpcidev->scsi.max.max_channel;
scsihost->max_id = (unsigned)virtpcidev->scsi.max.max_id;
scsihost->max_lun = (unsigned)virtpcidev->scsi.max.max_lun;
(unsigned short)(virtpcidev->scsi.max.max_io_size / PAGE_SIZE);
if (scsihost->sg_tablesize > MAX_PHYS_INFO)
scsihost->sg_tablesize = MAX_PHYS_INFO;
- LOGINF("scsihost->max_channel=%u, max_id=%u, max_lun=%llu, cmd_per_lun=%u, max_sectors=%hu, sg_tablesize=%hu\n",
- scsihost->max_channel, scsihost->max_id, scsihost->max_lun,
- scsihost->cmd_per_lun, scsihost->max_sectors,
- scsihost->sg_tablesize);
- LOGINF("scsihost->can_queue=%u, scsihost->cmd_per_lun=%u, max_sectors=%hu, sg_tablesize=%hu\n",
- scsihost->can_queue, scsihost->cmd_per_lun, scsihost->max_sectors,
- scsihost->sg_tablesize);
-
- DBGINF("calling scsi_add_host\n");
/* this creates "host%d" in sysfs. If 2nd argument is NULL,
* then this generic /sys/devices/platform/host? device is
*/
error = scsi_add_host(scsihost, &virtpcidev->generic_dev);
if (error) {
- LOGERR("scsi_add_host ****FAILED 0x%x TBD - RECOVER\n", error);
POSTCODE_LINUX_2(VHBA_PROBE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
/* decr refcount on scsihost which was incremented by
* scsi_add_host so the scsi_host gets deleted
virthbainfo = (struct virthba_info *)scsihost->hostdata;
memset(virthbainfo, 0, sizeof(struct virthba_info));
for (i = 0; i < VIRTHBASOPENMAX; i++) {
- if (virthbas_open[i].virthbainfo == NULL) {
+ if (!virthbas_open[i].virthbainfo) {
virthbas_open[i].virthbainfo = virthbainfo;
break;
}
virthbainfo->virtpcidev = virtpcidev;
spin_lock_init(&virthbainfo->chinfo.insertlock);
- DBGINF("generic_dev: 0x%p, queueinfo: 0x%p.\n",
- &virtpcidev->generic_dev, &virtpcidev->queueinfo);
-
init_waitqueue_head(&virthbainfo->rsp_queue);
spin_lock_init(&virthbainfo->privlock);
memset(&virthbainfo->pending, 0, sizeof(virthbainfo->pending));
ULTRA_IO_CHANNEL_IS_POLLING,
&virthbainfo->chinfo.queueinfo->chan->features);
/* start thread that will receive scsicmnd responses */
- DBGINF("starting rsp thread -- queueinfo: 0x%p, threadinfo: 0x%p.\n",
- virthbainfo->chinfo.queueinfo, &virthbainfo->chinfo.threadinfo);
channel_header = virthbainfo->chinfo.queueinfo->chan;
pqhdr = (struct signal_queue_header __iomem *)
if (!uisthread_start(&virthbainfo->chinfo.threadinfo,
process_incoming_rsps,
virthbainfo, "vhba_incoming")) {
- LOGERR("uisthread_start rsp ****FAILED\n");
/* decr refcount on scsihost which was incremented by
* scsi_add_host so the scsi_host gets deleted
*/
scsi_host_put(scsihost);
return -ENODEV;
}
- LOGINF("sendInterruptHandle=0x%16llX",
- virthbainfo->intr.send_irq_handle);
- LOGINF("recvInterruptHandle=0x%16llX",
- virthbainfo->intr.recv_irq_handle);
- LOGINF("recvInterruptVector=0x%8X",
- virthbainfo->intr.recv_irq_vector);
- LOGINF("recvInterruptShared=0x%2X",
- virthbainfo->intr.recv_irq_shared);
- LOGINF("scsihost.hostt->name=%s", scsihost->hostt->name);
virthbainfo->interrupt_vector =
virthbainfo->intr.recv_irq_handle & INTERRUPT_VECTOR_MASK;
rsp = request_irq(virthbainfo->interrupt_vector, handler, IRQF_SHARED,
scsihost->hostt->name, virthbainfo);
if (rsp != 0) {
- LOGERR("request_irq(%d) uislib_virthba_ISR request failed with rsp=%d\n",
- virthbainfo->interrupt_vector, rsp);
virthbainfo->interrupt_vector = -1;
POSTCODE_LINUX_2(VHBA_PROBE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
} else {
- u64 __iomem *Features_addr =
+ u64 __iomem *features_addr =
&virthbainfo->chinfo.queueinfo->chan->features;
- LOGERR("request_irq(%d) uislib_virthba_ISR request succeeded\n",
- virthbainfo->interrupt_vector);
mask = ~(ULTRA_IO_CHANNEL_IS_POLLING |
ULTRA_IO_DRIVER_DISABLES_INTS);
- uisqueue_interlocked_and(Features_addr, mask);
+ uisqueue_interlocked_and(features_addr, mask);
mask = ULTRA_IO_DRIVER_ENABLES_INTS;
- uisqueue_interlocked_or(Features_addr, mask);
+ uisqueue_interlocked_or(features_addr, mask);
rsltq_wait_usecs = 4000000;
}
- DBGINF("calling scsi_scan_host.\n");
scsi_scan_host(scsihost);
- DBGINF("return from scsi_scan_host.\n");
- LOGINF("virthba added scsihost:0x%p\n", scsihost);
POSTCODE_LINUX_2(VHBA_PROBE_EXIT_PC, POSTCODE_SEVERITY_INFO);
return 0;
}
struct Scsi_Host *scsihost =
(struct Scsi_Host *)virtpcidev->scsi.scsihost;
- LOGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
virthbainfo = (struct virthba_info *)scsihost->hostdata;
if (virthbainfo->interrupt_vector != -1)
free_irq(virthbainfo->interrupt_vector, virthbainfo);
- LOGINF("Removing virtpcidev: 0x%p, virthbainfo: 0x%p\n", virtpcidev,
- virthbainfo);
- DBGINF("removing scsihost: 0x%p, scsihost->this_id: %d\n", scsihost,
- scsihost->this_id);
scsi_remove_host(scsihost);
- DBGINF("stopping thread.\n");
uisthread_stop(&virthbainfo->chinfo.threadinfo);
- DBGINF("calling scsi_host_put\n");
-
/* decr refcount on scsihost which was incremented by
* scsi_add_host so the scsi_host gets deleted
*/
scsi_host_put(scsihost);
- LOGINF("virthba removed scsi_host.\n");
}
static int
int notifyresult = 0xffff;
wait_queue_head_t notifyevent;
- LOGINF("vDiskMgmt:%d %d:%d:%d\n", vdiskcmdtype,
- vdest->channel, vdest->id, vdest->lun);
-
- if (virthbainfo->serverdown || virthbainfo->serverchangingstate) {
- DBGINF("Server is down/changing state. Returning Failure.\n");
+ if (virthbainfo->serverdown || virthbainfo->serverchangingstate)
return FAILED;
- }
cmdrsp = kzalloc(SIZEOF_CMDRSP, GFP_ATOMIC);
- if (cmdrsp == NULL) {
- LOGERR("kmalloc of cmdrsp failed.\n");
- return FAILED; /* reject */
- }
+ if (!cmdrsp)
+ return FAILED; /* reject */
init_waitqueue_head(¬ifyevent);
&virthbainfo->chinfo.insertlock,
DONT_ISSUE_INTERRUPT, (u64)NULL,
OK_TO_WAIT, "vhba");
- LOGINF("VdiskMgmt waiting on event notifyevent=0x%p\n",
- cmdrsp->scsitaskmgmt.notify);
wait_event(notifyevent, notifyresult != 0xffff);
- LOGINF("VdiskMgmt complete; result:%d\n", cmdrsp->vdiskmgmt.result);
kfree(cmdrsp);
return SUCCESS;
}
int notifyresult = 0xffff;
wait_queue_head_t notifyevent;
- LOGINF("TaskMgmt:%d %d:%d:%llu\n", tasktype,
- scsidev->channel, scsidev->id, scsidev->lun);
-
- if (virthbainfo->serverdown || virthbainfo->serverchangingstate) {
- DBGINF("Server is down/changing state. Returning Failure.\n");
+ if (virthbainfo->serverdown || virthbainfo->serverchangingstate)
return FAILED;
- }
cmdrsp = kzalloc(SIZEOF_CMDRSP, GFP_ATOMIC);
- if (cmdrsp == NULL) {
- LOGERR("kmalloc of cmdrsp failed.\n");
+ if (!cmdrsp)
return FAILED; /* reject */
- }
init_waitqueue_head(¬ifyevent);
&virthbainfo->chinfo.insertlock,
DONT_ISSUE_INTERRUPT, (u64)NULL,
OK_TO_WAIT, "vhba");
- LOGINF("TaskMgmt waiting on event notifyevent=0x%p\n",
- cmdrsp->scsitaskmgmt.notify);
wait_event(notifyevent, notifyresult != 0xffff);
- LOGINF("TaskMgmt complete; result:%d\n", cmdrsp->scsitaskmgmt.result);
kfree(cmdrsp);
return SUCCESS;
}
virthba_host_reset_handler(struct scsi_cmnd *scsicmd)
{
/* issue TASK_MGMT_TARGET_RESET for each target on each bus for host */
- LOGERR("virthba_host_reset_handler Not yet implemented\n");
return SUCCESS;
}
static int
virthba_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
{
- DBGINF("In virthba_ioctl: ioctl: cmd=0x%x\n", cmd);
return -EINVAL;
}
struct scatterlist *sgl = NULL;
int sg_failed = 0;
- if (virthbainfo->serverdown || virthbainfo->serverchangingstate) {
- DBGINF("Server is down/changing state. Returning SCSI_MLQUEUE_DEVICE_BUSY.\n");
+ if (virthbainfo->serverdown || virthbainfo->serverchangingstate)
return SCSI_MLQUEUE_DEVICE_BUSY;
- }
-
cmdrsp = kzalloc(SIZEOF_CMDRSP, GFP_ATOMIC);
- if (cmdrsp == NULL) {
- LOGERR("kmalloc of cmdrsp failed.\n");
+ if (!cmdrsp)
return 1; /* reject the command */
- }
/* now saving everything we need from scsi_cmd into cmdrsp
* before we queue cmdrsp set type to command - as opposed to
if (insert_location != -1) {
cmdrsp->scsi.scsicmd = (void *)(uintptr_t)insert_location;
} else {
- LOGERR("Queue is full. Returning busy.\n");
kfree(cmdrsp);
return SCSI_MLQUEUE_DEVICE_BUSY;
}
max_buff_len = cmdrsp->scsi.bufflen;
if (scsi_sg_count(scsicmd) > MAX_PHYS_INFO) {
- LOGERR("scsicmd use_sg:%d greater than MAX:%d\n",
- scsi_sg_count(scsicmd), MAX_PHYS_INFO);
del_scsipending_entry(virthbainfo, (uintptr_t)insert_location);
kfree(cmdrsp);
return 1; /* reject the command */
/* convert buffer to phys information */
if (scsi_sg_count(scsicmd) == 0) {
if (scsi_bufflen(scsicmd) > 0) {
- LOGERR("**** FAILED No scatter list for bufflen > 0\n");
BUG_ON(scsi_sg_count(scsicmd) == 0);
}
- DBGINF("No sg; buffer:0x%p bufflen:%d\n",
- scsi_sglist(scsicmd), scsi_bufflen(scsicmd));
} else {
/* buffer is scatterlist - copy it out */
sgl = scsi_sglist(scsicmd);
for_each_sg(sgl, sg, scsi_sg_count(scsicmd), i) {
cmdrsp->scsi.gpi_list[i].address = sg_phys(sg);
cmdrsp->scsi.gpi_list[i].length = sg->length;
- if ((i != 0) && (sg->offset != 0))
- LOGINF("Offset on a sg_entry other than zero =<<%d>>.\n",
- sg->offset);
}
if (sg_failed) {
- LOGERR("Start sg_list dump (entries %d, bufflen %d)...\n",
- scsi_sg_count(scsicmd), cmdrsp->scsi.bufflen);
- for_each_sg(sgl, sg, scsi_sg_count(scsicmd), i) {
- LOGERR(" Entry(%d): page->[0x%p], phys->[0x%Lx], off(%d), len(%d)\n",
- i, sg_page(sg),
- (unsigned long long)sg_phys(sg),
- sg->offset, sg->length);
- }
- LOGERR("Done sg_list dump.\n");
/* BUG(); ***** For now, let it fail in uissd
* if it is a problem, as it might just
* work
(u64)NULL, DONT_WAIT, "vhba");
if (i == 0) {
/* queue must be full - and we said don't wait - return busy */
- LOGERR("uisqueue_put_cmdrsp_with_lock ****FAILED\n");
kfree(cmdrsp);
del_scsipending_entry(virthbainfo, (uintptr_t)insert_location);
return SCSI_MLQUEUE_DEVICE_BUSY;
struct Scsi_Host *scsihost = (struct Scsi_Host *)scsidev->host;
virthbainfo = (struct virthba_info *)scsihost->hostdata;
- if (!virthbainfo) {
- LOGERR("Could not find virthba_info for scsihost\n");
+ if (!virthbainfo)
return 0; /* even though we errored, treat as success */
- }
+
for (vdisk = &virthbainfo->head; vdisk->next; vdisk = vdisk->next) {
if (vdisk->next->valid &&
(vdisk->next->channel == scsidev->channel) &&
return 0;
}
tmpvdisk = kzalloc(sizeof(*tmpvdisk), GFP_ATOMIC);
- if (!tmpvdisk) { /* error allocating */
- LOGERR("Could not allocate memory for disk\n");
+ if (!tmpvdisk)
return 0;
- }
tmpvdisk->channel = scsidev->channel;
tmpvdisk->id = scsidev->id;
struct Scsi_Host *scsihost = (struct Scsi_Host *)scsidev->host;
virthbainfo = (struct virthba_info *)scsihost->hostdata;
- if (!virthbainfo)
- LOGERR("Could not find virthba_info for scsihost\n");
for (vdisk = &virthbainfo->head; vdisk->next; vdisk = vdisk->next) {
if (vdisk->next->valid &&
(vdisk->next->channel == scsidev->channel) &&
if (atomic_read(&vdisk->error_count) < VIRTHBA_ERROR_COUNT) {
atomic_inc(&vdisk->error_count);
- LOGERR("SCSICMD ****FAILED scsicmd:0x%p op:0x%x <%d:%d:%d:%llu> 0x%x-0x%x-0x%x-0x%x-0x%x.\n",
- scsicmd, cmdrsp->scsi.cmnd[0],
- scsidev->host->host_no, scsidev->id,
- scsidev->channel, scsidev->lun,
- cmdrsp->scsi.linuxstat, sd->valid, sd->sense_key,
- sd->additional_sense_code,
- sd->additional_sense_code_qualifier);
- if (atomic_read(&vdisk->error_count) ==
- VIRTHBA_ERROR_COUNT) {
- LOGERR("Throtling SCSICMD errors disk <%d:%d:%d:%llu>\n",
- scsidev->host->host_no, scsidev->id,
- scsidev->channel, scsidev->lun);
- }
atomic_set(&vdisk->ios_threshold, IOS_ERROR_THRESHOLD);
}
}
if (scsi_sg_count(scsicmd) == 0) {
if (scsi_bufflen(scsicmd) > 0) {
- LOGERR("**** FAILED No scatter list for bufflen > 0\n");
BUG_ON(scsi_sg_count(scsicmd) ==
0);
}
sg = scsi_sglist(scsicmd);
for (i = 0; i < scsi_sg_count(scsicmd); i++) {
- DBGVER("copying OUT OF buf into 0x%p %d\n",
- sg_page(sg + i), sg[i].length);
thispage_orig = kmap_atomic(sg_page(sg + i));
thispage = (void *)((unsigned long)thispage_orig |
sg[i].offset);
if (atomic_read(&vdisk->ios_threshold) > 0) {
atomic_dec(&vdisk->ios_threshold);
if (atomic_read(&vdisk->ios_threshold) == 0) {
- LOGERR("Resetting error count for disk\n");
atomic_set(&vdisk->error_count, 0);
}
}
static void
complete_scsi_command(struct uiscmdrsp *cmdrsp, struct scsi_cmnd *scsicmd)
{
- DBGINF("cmdrsp: 0x%p, scsistat:0x%x.\n", cmdrsp, cmdrsp->scsi.scsistat);
-
/* take what we need out of cmdrsp and complete the scsicmd */
scsicmd->result = cmdrsp->scsi.linuxstat;
if (cmdrsp->scsi.linuxstat)
else
do_scsi_nolinuxstat(cmdrsp, scsicmd);
- if (scsicmd->scsi_done) {
- DBGVER("Scsi_DONE\n");
+ if (scsicmd->scsi_done)
scsicmd->scsi_done(scsicmd);
- }
}
static inline void
/* wake up the error handler that is waiting for this */
*(int *)cmdrsp->vdiskmgmt.notifyresult = cmdrsp->vdiskmgmt.result;
wake_up_all((wait_queue_head_t *)cmdrsp->vdiskmgmt.notify);
- LOGINF("set notify result to %d\n", cmdrsp->vdiskmgmt.result);
}
static inline void
*(int *)cmdrsp->scsitaskmgmt.notifyresult =
cmdrsp->scsitaskmgmt.result;
wake_up_all((wait_queue_head_t *)cmdrsp->scsitaskmgmt.notify);
- LOGINF("set notify result to %d\n", cmdrsp->scsitaskmgmt.result);
}
static void
cmdrsp->vdiskmgmt.scsicmd))
break;
complete_vdiskmgmt_command(cmdrsp);
- } else
- LOGERR("Invalid cmdtype %d\n", cmdrsp->cmdtype);
+ }
/* cmdrsp is now available for reuse */
}
}
UIS_DAEMONIZE("vhba_incoming");
/* alloc once and reuse */
cmdrsp = kmalloc(SZ, GFP_ATOMIC);
- if (cmdrsp == NULL) {
- LOGERR("process_incoming_rsps ****FAILED to malloc - thread exiting\n");
+ if (!cmdrsp) {
complete_and_exit(&dc->threadinfo.has_stopped, 0);
return 0;
}
mask = ULTRA_CHANNEL_ENABLE_INTS;
while (1) {
+ if (kthread_should_stop())
+ break;
wait_event_interruptible_timeout(virthbainfo->rsp_queue,
(atomic_read(&virthbainfo->interrupt_rcvd) == 1),
usecs_to_jiffies(rsltq_wait_usecs));
/* drain queue */
drain_queue(virthbainfo, dc, cmdrsp);
rc1 = uisqueue_interlocked_or(virthbainfo->flags_addr, mask);
- if (dc->threadinfo.should_stop)
- break;
}
kfree(cmdrsp);
- DBGINF("exiting processing incoming rsps.\n");
complete_and_exit(&dc->threadinfo.has_stopped, 0);
}
return -ENOMEM;
for (i = 0; i < VIRTHBASOPENMAX; i++) {
- if (virthbas_open[i].virthbainfo == NULL)
+ if (!virthbas_open[i].virthbainfo)
continue;
virthbainfo = virthbas_open[i].virthbainfo;
return -EINVAL;
buf[count] = '\0';
- if (copy_from_user(buf, buffer, count)) {
- LOGERR("copy_from_user failed. buf<<%.*s>> count<<%lu>>\n",
- (int)count, buf, count);
+ if (copy_from_user(buf, buffer, count))
return -EFAULT;
- }
i = kstrtoint(buf, 10, &new_value);
- if (i != 0) {
- LOGERR("Failed to scan value for enable_ints, buf<<%.*s>>",
- (int)count, buf);
+ if (i != 0)
return -EFAULT;
- }
/* set all counts to new_value usually 0 */
for (i = 0; i < VIRTHBASOPENMAX; i++) {
- if (virthbas_open[i].virthbainfo != NULL) {
+ if (virthbas_open[i].virthbainfo) {
virthbainfo = virthbas_open[i].virthbainfo;
features_addr =
&virthbainfo->chinfo.queueinfo->chan->features;
(struct virthba_info *)((struct Scsi_Host *)virtpcidev->scsi.
scsihost)->hostdata;
- DBGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
-
- if (!virthbainfo->serverdown) {
- DBGINF("Server up message received while server is already up.\n");
+ if (!virthbainfo->serverdown)
return 1;
- }
- if (virthbainfo->serverchangingstate) {
- LOGERR("Server already processing change state message\n");
+
+ if (virthbainfo->serverchangingstate)
return 0;
- }
virthbainfo->serverchangingstate = true;
/* Must transition channel to ATTACHED state BEFORE we
if (!uisthread_start(&virthbainfo->chinfo.threadinfo,
process_incoming_rsps,
virthbainfo, "vhba_incoming")) {
- LOGERR("uisthread_start rsp ****FAILED\n");
return 0;
}
virthbainfo->serverdown = false;
switch (pendingdel->cmdtype) {
case CMD_SCSI_TYPE:
scsicmd = (struct scsi_cmnd *)pendingdel->sent;
- scsicmd->result = (DID_RESET << 16);
+ scsicmd->result = DID_RESET << 16;
if (scsicmd->scsi_done)
scsicmd->scsi_done(scsicmd);
break;
case CMD_SCSITASKMGMT_TYPE:
cmdrsp = (struct uiscmdrsp *)pendingdel->sent;
- DBGINF("cmdrsp=0x%x, notify=0x%x\n", cmdrsp,
- cmdrsp->scsitaskmgmt.notify);
- *(int *)cmdrsp->scsitaskmgmt.notifyresult =
- TASK_MGMT_FAILED;
wake_up_all((wait_queue_head_t *)
cmdrsp->scsitaskmgmt.notify);
+ *(int *)cmdrsp->scsitaskmgmt.notifyresult =
+ TASK_MGMT_FAILED;
break;
case CMD_VDISKMGMT_TYPE:
cmdrsp = (struct uiscmdrsp *)pendingdel->sent;
cmdrsp->vdiskmgmt.notify);
break;
default:
- if (pendingdel->sent != NULL)
- LOGERR("Unknown command type: 0x%x. Only freeing list structure.\n",
- pendingdel->cmdtype);
+ break;
}
pendingdel->cmdtype = 0;
pendingdel->sent = NULL;
virtpcidev = virthbainfo->virtpcidev;
- DBGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
virthbainfo->serverdown = true;
virthbainfo->serverchangingstate = false;
/* Return the ServerDown response to Command */
(struct virthba_info *)((struct Scsi_Host *)virtpcidev->scsi.
scsihost)->hostdata;
- DBGINF("virthba_serverdown");
- DBGINF("virtpcidev bus_no<<%d>>devNo<<%d>>", virtpcidev->bus_no,
- virtpcidev->device_no);
-
if (!virthbainfo->serverdown && !virthbainfo->serverchangingstate) {
virthbainfo->serverchangingstate = true;
queue_work(virthba_serverdown_workqueue,
&virthbainfo->serverdown_completion);
} else if (virthbainfo->serverchangingstate) {
- LOGERR("Server already processing change state message\n");
stat = 0;
- } else {
- LOGERR("Server already down, but another server down message received.");
}
return stat;
static int __init
virthba_parse_line(char *str)
{
- DBGINF("In virthba_parse_line %s\n", str);
return 1;
}
char *next = line;
POSTCODE_LINUX_2(VHBA_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
- if (line == NULL || !*line)
+ if (!line || !*line)
return;
- while ((line = next) != NULL) {
+ while ((line = next)) {
next = strchr(line, ' ');
- if (next != NULL)
+ if (next)
*next++ = 0;
- if (!virthba_parse_line(line))
- DBGINF("Unknown option '%s'\n", line);
+ virthba_parse_line(line);
}
POSTCODE_LINUX_2(VHBA_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
if (!unisys_spar_platform)
return -ENODEV;
- LOGINF("Entering virthba_mod_init...\n");
-
POSTCODE_LINUX_2(VHBA_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
virthba_parse_options(virthba_options);
error = virtpci_register_driver(&virthba_driver);
if (error < 0) {
- LOGERR("register ****FAILED 0x%x\n", error);
POSTCODE_LINUX_3(VHBA_CREATE_FAILURE_PC, error,
POSTCODE_SEVERITY_ERR);
} else {
/* Initialize the serverdown workqueue */
virthba_serverdown_workqueue =
create_singlethread_workqueue("virthba_serverdown");
- if (virthba_serverdown_workqueue == NULL) {
- LOGERR("**** FAILED virthba_serverdown_workqueue creation\n");
+ if (!virthba_serverdown_workqueue) {
POSTCODE_LINUX_2(VHBA_CREATE_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
error = -1;
}
POSTCODE_LINUX_2(VHBA_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
- LOGINF("Leaving virthba_mod_init\n");
return error;
}
static void __exit
virthba_mod_exit(void)
{
- LOGINF("entering virthba_mod_exit...\n");
-
virtpci_unregister_driver(&virthba_driver);
/* unregister is going to call virthba_remove */
/* destroy serverdown completion workqueue */
}
debugfs_remove_recursive(virthba_debugfs_dir);
- LOGINF("Leaving virthba_mod_exit\n");
}
/* specify function to be run at module insertion time */
config UNISYS_VIRTPCI
tristate "Unisys virtpci driver"
- depends on UNISYSSPAR && UNISYS_UISLIB
+ select UNISYS_UISLIB
---help---
If you say Y here, you will enable the Unisys virtpci driver.
#ifdef CONFIG_MODVERSIONS
#include <config/modversions.h>
#endif
-#include "uniklog.h"
#include "diagnostics/appos_subsystems.h"
#include "uisutils.h"
#include "vbuschannel.h"
{
int off;
- if (!chan) {
- LOGERR("vbus channel not present");
+ if (!chan)
return -1;
- }
+
off = sizeof(struct channel_header) + chan->hdr_info.chp_info_offset;
if (chan->hdr_info.chp_info_offset == 0) {
- LOGERR("vbus channel not used, because chp_info_offset == 0");
return -1;
}
memcpy(((u8 *)(chan)) + off, info, sizeof(*info));
{
int off;
- if (!chan) {
- LOGERR("vbus channel not present");
+ if (!chan)
return -1;
- }
+
off = sizeof(struct channel_header) + chan->hdr_info.bus_info_offset;
- if (chan->hdr_info.bus_info_offset == 0) {
- LOGERR("vbus channel not used, because bus_info_offset == 0");
+ if (chan->hdr_info.bus_info_offset == 0)
return -1;
- }
memcpy(((u8 *)(chan)) + off, info, sizeof(*info));
return 0;
}
{
int off;
- if (!chan) {
- LOGERR("vbus channel not present");
+ if (!chan)
return -1;
- }
+
off =
(sizeof(struct channel_header) +
chan->hdr_info.dev_info_offset) +
(chan->hdr_info.device_info_struct_bytes * devix);
- if (chan->hdr_info.dev_info_offset == 0) {
- LOGERR("vbus channel not used, because dev_info_offset == 0");
+ if (chan->hdr_info.dev_info_offset == 0)
return -1;
- }
+
memcpy(((u8 *)(chan)) + off, info, sizeof(*info));
return 0;
}
*/
ret = device_register(vbus);
if (ret) {
- LOGERR("device_register FAILED:%d\n", ret);
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
&chipset_driver_info);
write_vbus_bus_info(vbus->platform_data /* chanptr */,
&bus_driver_info);
- LOGINF("Added vbus %d; device %s created successfully\n",
- addparams->bus_no, BUS_ID(vbus));
POSTCODE_LINUX_2(VPCI_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
return 1;
}
POSTCODE_LINUX_2(VPCI_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
if (!WAIT_FOR_IO_CHANNEL
((struct spar_io_channel_protocol __iomem *)addparams->chanptr)) {
- LOGERR("Timed out. Channel not ready\n");
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
sprintf(busid, "vbus%d", addparams->bus_no);
vbus = bus_find_device(&virtpci_bus_type, NULL,
(void *)busid, match_busid);
- if (!vbus) {
- LOGERR("**** FAILED to find vbus %s\n", busid);
+ if (!vbus)
return 0;
- }
- LOGINF("Adding vhba wwnn:%x:%x config:%d-%d-%d-%d chanptr:%p\n",
- scsi.wwnn.wwnn1, scsi.wwnn.wwnn2,
- scsi.max.max_channel, scsi.max.max_id, scsi.max.max_lun,
- scsi.max.cmd_per_lun, addparams->chanptr);
i = virtpci_device_add(vbus, VIRTHBA_TYPE, addparams, &scsi, NULL);
if (i) {
- LOGINF("Added vhba wwnn:%x:%x chanptr:%p\n", scsi.wwnn.wwnn1,
- scsi.wwnn.wwnn2, addparams->chanptr);
POSTCODE_LINUX_3(VPCI_CREATE_EXIT_PC, i,
POSTCODE_SEVERITY_INFO);
}
POSTCODE_LINUX_2(VPCI_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
if (!WAIT_FOR_IO_CHANNEL
((struct spar_io_channel_protocol __iomem *)addparams->chanptr)) {
- LOGERR("Timed out, channel not ready\n");
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
sprintf(busid, "vbus%d", addparams->bus_no);
vbus = bus_find_device(&virtpci_bus_type, NULL,
(void *)busid, match_busid);
- if (!vbus) {
- LOGERR("**** FAILED to find vbus %s\n", busid);
+ if (!vbus)
return 0;
- }
- LOGINF("Adding vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x rcvbufs:%d mtu:%d chanptr:%p%pUL\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5],
- net.num_rcv_bufs, net.mtu, addparams->chanptr, &net.zone_uuid);
i = virtpci_device_add(vbus, VIRTNIC_TYPE, addparams, NULL, &net);
if (i) {
- LOGINF("Added vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
POSTCODE_LINUX_3(VPCI_CREATE_EXIT_PC, i,
POSTCODE_SEVERITY_INFO);
return 1;
sprintf(busid, "vbus%d", delparams->bus_no);
vbus = bus_find_device(&virtpci_bus_type, NULL,
(void *)busid, match_busid);
- if (!vbus) {
- LOGERR("**** FAILED to find vbus %s\n", busid);
+ if (!vbus)
return 0;
- }
/* ensure that bus has no devices? -- TBD */
- LOGINF("Deleting %s\n", BUS_ID(vbus));
- if (delete_vbus_device(vbus, NULL))
- return 0; /* failure */
- LOGINF("Deleted vbus %d\n", delparams->bus_no);
return 1;
}
static int
delete_vbus_device(struct device *vbus, void *data)
{
- int checkforroot = (data != NULL);
struct device *dev = &virtpci_rootbus_device;
- if ((checkforroot) && match_busid(vbus, (void *)BUS_ID(dev))) {
+ if ((data) && match_busid(vbus, (void *)BUS_ID(dev))) {
/* skip it - don't delete root bus */
- LOGINF("skipping root bus\n");
return 0; /* pretend no error */
}
- LOGINF("Calling unregister for %s\n", BUS_ID(vbus));
device_unregister(vbus);
kfree(vbus);
- LOGINF("VBus unregister and freed\n");
return 0; /* no error */
}
GET_SCSIADAPINFO_FROM_CHANPTR(pauseparams->chanptr);
- LOGINF("Pausing vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1, scsi.wwnn.wwnn2);
i = virtpci_device_serverdown(NULL /*no parent bus */, VIRTHBA_TYPE,
&scsi.wwnn, NULL);
- if (i)
- LOGINF("Paused vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1,
- scsi.wwnn.wwnn2);
return i;
}
GET_NETADAPINFO_FROM_CHANPTR(pauseparams->chanptr);
- LOGINF("Pausing vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
i = virtpci_device_serverdown(NULL /*no parent bus */, VIRTNIC_TYPE,
NULL, net.mac_addr);
- if (i) {
- LOGINF(" Paused vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
- }
return i;
}
GET_SCSIADAPINFO_FROM_CHANPTR(resumeparams->chanptr);
- LOGINF("Resuming vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1, scsi.wwnn.wwnn2);
i = virtpci_device_serverup(NULL /*no parent bus */, VIRTHBA_TYPE,
&scsi.wwnn, NULL);
- if (i)
- LOGINF("Resumed vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1,
- scsi.wwnn.wwnn2);
return i;
}
GET_NETADAPINFO_FROM_CHANPTR(resumeparams->chanptr);
- LOGINF("Resuming vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
i = virtpci_device_serverup(NULL /*no parent bus */, VIRTNIC_TYPE,
NULL, net.mac_addr);
- if (i) {
- LOGINF(" Resumed vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
- }
return i;
}
GET_SCSIADAPINFO_FROM_CHANPTR(delparams->chanptr);
- LOGINF("Deleting vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1, scsi.wwnn.wwnn2);
i = virtpci_device_del(NULL /*no parent bus */, VIRTHBA_TYPE,
&scsi.wwnn, NULL);
if (i) {
- LOGINF("Deleted vhba wwnn:%x:%x\n", scsi.wwnn.wwnn1,
- scsi.wwnn.wwnn2);
return 1;
}
return 0;
GET_NETADAPINFO_FROM_CHANPTR(delparams->chanptr);
- LOGINF("Deleting vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
i = virtpci_device_del(NULL /*no parent bus */, VIRTNIC_TYPE, NULL,
net.mac_addr);
- if (i) {
- LOGINF("Deleted vnic macaddr:%02x:%02x:%02x:%02x:%02x:%02x\n",
- net.mac_addr[0], net.mac_addr[1], net.mac_addr[2],
- net.mac_addr[3], net.mac_addr[4], net.mac_addr[5]);
- }
return i;
}
#define DELETE_ONE_VPCIDEV(vpcidev) { \
- LOGINF("calling device_unregister:%p\n", &vpcidev->generic_dev); \
device_unregister(&vpcidev->generic_dev); \
- LOGINF("Deleted %p\n", vpcidev); \
kfree(vpcidev); \
}
tmpvpcidev = nextvpcidev;
count++;
}
- LOGINF("Deleted %d vhbas/vnics.\n", count);
/* now delete each vbus */
- if (bus_for_each_dev
- (&virtpci_bus_type, NULL, (void *)1, delete_vbus_device))
- LOGERR("delete of all vbus failed\n");
+ bus_for_each_dev(&virtpci_bus_type, NULL, (void *)1,
+ delete_vbus_device);
}
/* deletes all vnics or vhbas
sprintf(busid, "vbus%d", delparams->bus_no);
vbus = bus_find_device(&virtpci_bus_type, NULL,
(void *)busid, match_busid);
- if (!vbus) {
- LOGERR("**** FAILED to find vbus %s\n", busid);
+ if (!vbus)
return 0;
- }
- if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to delete all devices; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
+ if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE))
return 0;
- }
- LOGINF("Deleting all %s in vbus %s\n",
- devtype == VIRTHBA_TYPE ? "vhbas" : "vnics", busid);
/* delete all vhbas/vnics */
i = virtpci_device_del(vbus, devtype, NULL, NULL);
- if (i > 0)
- LOGINF("Deleted %d %s\n", i,
- devtype == VIRTHBA_TYPE ? "vhbas" : "vnics");
return 1;
}
case GUEST_RESUME_VNIC:
return resume_vnic(&msg->resume_vnic);
default:
- LOGERR("invalid message type %d.\n", msg->msgtype);
return 0;
}
}
const struct virtpci_dev *dev)
{
while (ids->vendor || ids->subvendor || ids->class_mask) {
- DBGINF("ids->vendor:%x dev->vendor:%x ids->device:%x dev->device:%x\n",
- ids->vendor, dev->vendor, ids->device, dev->device);
-
if ((ids->vendor == dev->vendor) &&
(ids->device == dev->device))
return ids;
struct virtpci_driver *virtpcidrv = driver_to_virtpci_driver(drv);
int match = 0;
- DBGINF("In virtpci_bus_match dev->bus_id:%s drv->name:%s\n",
- dev->bus_id, drv->name);
-
/* check ids list for a match */
if (virtpci_match_device(virtpcidrv->id_table, virtpcidev))
match = 1;
- DBGINF("returning match:%d\n", match);
return match; /* 0 - no match; 1 - yes it matches */
}
static int virtpci_uevent(struct device *dev, struct kobj_uevent_env *env)
{
- DBGINF("In virtpci_hotplug\n");
/* add variables to the environment prior to the generation of
* hotplug events to user space
*/
struct ultra_vbus_deviceinfo dev_info;
const char *stype;
- if (!dev) {
- LOGERR("%s dev is NULL", __func__);
+ if (!dev)
return;
- }
- if (!virtpcidrv) {
- LOGERR("%s driver is NULL", __func__);
+ if (!virtpcidrv)
return;
- }
+
vbus = dev->parent;
- if (!vbus) {
- LOGERR("%s dev has no parent bus", __func__);
+ if (!vbus)
return;
- }
+
chan = vbus->platform_data;
- if (!chan) {
- LOGERR("%s dev bus has no channel", __func__);
+ if (!chan)
return;
- }
+
switch (dev_type) {
case PCI_DEVICE_ID_VIRTHBA:
stype = "vHBA";
const struct pci_device_id *id;
int error = 0;
- LOGINF("In virtpci_device_probe dev:%p virtpcidev:%p virtpcidrv:%p\n",
- dev, virtpcidev, virtpcidrv); /* VERBOSE/DEBUG ? */
POSTCODE_LINUX_2(VPCI_PROBE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
/* static match and static probe vs dynamic match & dynamic
* probe - do we care?.
struct virtpci_dev *virtpcidev = device_to_virtpci_dev(dev_);
struct virtpci_driver *virtpcidrv = virtpcidev->mydriver;
- LOGINF("In virtpci_device_remove bus_id:%s dev_:%p virtpcidev:%p dev->driver:%p drivername:%s\n",
- BUS_ID(dev_), dev_, virtpcidev, dev_->driver,
- dev_->driver->name); /* VERBOSE/DEBUG */
if (virtpcidrv) {
/* TEMP: assuming we have only one such driver for now */
if (virtpcidrv->remove)
virtpcidev->mydriver = NULL;
}
- DBGINF("calling putdevice\n");
put_device(dev_);
-
- DBGINF("Leaving\n");
return 0;
}
static void virtpci_bus_release(struct device *dev)
{
- /* this function is called when the last reference to the
- * device is removed
- */
- DBGINF("In virtpci_bus_release\n");
- /* what else is supposed to happen here? */
}
/*****************************************************/
struct spar_io_channel_protocol __iomem *io_chan = NULL;
struct device *dev;
- LOGINF("virtpci_device_add parentbus:%p chanptr:%p\n", parentbus,
- addparams->chanptr);
-
POSTCODE_LINUX_2(VPCI_CREATE_ENTRY_PC, POSTCODE_SEVERITY_INFO);
if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to add device; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
POSTCODE_LINUX_3(VPCI_CREATE_FAILURE_PC, devtype,
POSTCODE_SEVERITY_ERR);
return 0;
/* add a Virtual Device */
virtpcidev = kzalloc(sizeof(*virtpcidev), GFP_ATOMIC);
- if (virtpcidev == NULL) {
- LOGERR("can't add device - malloc FALLED\n");
+ if (!virtpcidev) {
POSTCODE_LINUX_2(MALLOC_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
*/
write_unlock_irqrestore(&vpcidev_list_lock, flags);
kfree(virtpcidev);
- LOGERR("**** FAILED vhba/vnic already exists in the list\n");
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
return 0;
}
* list. Otherwise, a device_unregister from this function can
* cause a "scheduling while atomic".
*/
- DBGINF("registering device:%p with bus_id:%s\n",
- &virtpcidev->generic_dev, virtpcidev->generic_dev.bus_id);
ret = device_register(&virtpcidev->generic_dev);
/* NOTE: THIS IS CALLING HOTPLUG virtpci_hotplug!!!
* This call to device_register results in virtpci_bus_match
* virtpci_device_probe is successful
*/
if (ret) {
- LOGERR("device_register returned %d\n", ret);
dev = &virtpcidev->generic_dev;
SPAR_CHANNEL_CLIENT_TRANSITION(addparams->chanptr,
BUS_ID(dev),
return 0;
}
- LOGINF("Added %s:%d:%d &virtpcidev->generic_dev:%p\n",
- (devtype == VIRTHBA_TYPE) ? "virthba" : "virtnic",
- addparams->bus_no, addparams->device_no,
- &virtpcidev->generic_dev);
POSTCODE_LINUX_2(VPCI_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
return 1;
}
unsigned long flags;
int rc = 0;
- if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to pause device; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
+ if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE))
return 0;
- }
/* find the vhba or vnic in virtpci device list */
write_lock_irqsave(&vpcidev_list_lock, flags);
}
write_unlock_irqrestore(&vpcidev_list_lock, flags);
- if (!found) {
- LOGERR("**** FAILED to find vhba/vnic in the list\n");
+ if (!found)
return 0;
- }
return rc;
}
unsigned long flags;
int rc = 0;
- if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to resume device; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
+ if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE))
return 0;
- }
+
/* find the vhba or vnic in virtpci device list */
write_lock_irqsave(&vpcidev_list_lock, flags);
write_unlock_irqrestore(&vpcidev_list_lock, flags);
- if (!found) {
- LOGERR("**** FAILED to find vhba/vnic in the list\n");
+ if (!found)
return 0;
- }
return rc;
}
continue; \
}
- if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE)) {
- LOGERR("**** FAILED to delete device; devtype:%d not vhba:%d or vnic:%d\n",
- devtype, VIRTHBA_TYPE, VIRTNIC_TYPE);
+ if ((devtype != VIRTHBA_TYPE) && (devtype != VIRTNIC_TYPE))
return 0;
- }
/* see if we are to delete all - NOTE: all implies we have a
* valid parentbus
*/
- all = ((devtype == VIRTHBA_TYPE) && (wwnn == NULL)) ||
- ((devtype == VIRTNIC_TYPE) && (macaddr == NULL));
+ all = ((devtype == VIRTHBA_TYPE) && (!wwnn)) ||
+ ((devtype == VIRTNIC_TYPE) && (!macaddr));
/* find all the vhba or vnic or both in virtpci device list
* keep list of ones we are deleting so we can call
}
write_unlock_irqrestore(&vpcidev_list_lock, flags);
- if (!all && (count == 0)) {
- LOGERR("**** FAILED to find vhba/vnic in the list\n");
+ if (!all && (count == 0))
return 0;
- }
/* now delete each one from delete list */
while (dellist) {
/* this function is called when the last reference to the
* device is removed
*/
- LOGINF("In virtpci_device_release:%p - NOT YET IMPLEMENTED\n", dev_);
}
/*****************************************************/
struct driver_private *dprivate = to_driver(kobj);
struct device_driver *driver = dprivate->driver;
- DBGINF("In virtpci_driver_attr_show driver->name:%s\n", driver->name);
-
if (dattr->show)
ret = dattr->show(driver, buf);
struct driver_private *dprivate = to_driver(kobj);
struct device_driver *driver = dprivate->driver;
- DBGINF("In virtpci_driver_attr_store driver->name:%s\n", driver->name);
-
if (dattr->store)
ret = dattr->store(driver, buf, count);
{
int result = 0;
- DBGINF("In virtpci_register_driver\n");
-
- if (drv->id_table == NULL) {
- LOGERR("id_table missing\n");
+ if (!drv->id_table)
return 1;
- }
/* initialize core driver fields needed to call driver_register */
drv->core_driver.name = drv->name; /* name of driver in sysfs */
drv->core_driver.bus = &virtpci_bus_type; /* type of bus this
void virtpci_unregister_driver(struct virtpci_driver *drv)
{
- DBGINF("In virtpci_unregister_driver drv:%p\n", drv);
driver_unregister(&drv->core_driver);
/* driver_unregister calls bus_remove_driver
* bus_remove_driver calls device_detach
* virtpci_device_remove
* virtpci_device_remove calls virthba_remove
*/
- DBGINF("Leaving\n");
}
EXPORT_SYMBOL_GPL(virtpci_unregister_driver);
printparam.str_pos = &str_pos;
printparam.buf = vbuf;
printparam.len = &len;
- if (bus_for_each_dev(&virtpci_bus_type, NULL,
- (void *)&printparam, print_vbus))
- LOGERR("Failed to find bus\n");
+ bus_for_each_dev(&virtpci_bus_type, NULL, (void *)&printparam,
+ print_vbus);
str_pos += scnprintf(vbuf + str_pos, len - str_pos,
"\n Virtual PCI devices\n");
tmpvpcidev->scsi.max.cmd_per_lun);
} else {
str_pos += scnprintf(vbuf + str_pos, len - str_pos,
- "[%d:%d] VNic:%02x:%02x:%02x:%02x:%02x:%02x num_rcv_bufs:%d mtu:%d",
+ "[%d:%d] VNic:%pM num_rcv_bufs:%d mtu:%d",
tmpvpcidev->bus_no,
tmpvpcidev->device_no,
- tmpvpcidev->net.mac_addr[0],
- tmpvpcidev->net.mac_addr[1],
- tmpvpcidev->net.mac_addr[2],
- tmpvpcidev->net.mac_addr[3],
- tmpvpcidev->net.mac_addr[4],
- tmpvpcidev->net.mac_addr[5],
+ tmpvpcidev->net.mac_addr,
tmpvpcidev->net.num_rcv_bufs,
tmpvpcidev->net.mtu);
}
* drivers directory
*/
if (ret) {
- LOGERR("bus_register ****FAILED:%d\n", ret);
POSTCODE_LINUX_3(VPCI_CREATE_FAILURE_PC, ret,
POSTCODE_SEVERITY_ERR);
return ret;
}
- DBGINF("bus_register successful\n");
bus_device_info_init(&bus_driver_info, "clientbus", "virtpci",
VERSION, NULL);
/* create a root bus used to parent all the virtpci buses. */
ret = device_register(&virtpci_rootbus_device);
if (ret) {
- LOGERR("device_register FAILED:%d\n", ret);
bus_unregister(&virtpci_bus_type);
POSTCODE_LINUX_3(VPCI_CREATE_FAILURE_PC, ret,
POSTCODE_SEVERITY_ERR);
return ret;
}
- DBGINF("device_register successful ret:%x\n", ret);
if (!uisctrl_register_req_handler(2, (void *)&virtpci_ctrlchan_func,
&chipset_driver_info)) {
- LOGERR("uisctrl_register_req_handler ****FAILED.\n");
POSTCODE_LINUX_2(VPCI_CREATE_FAILURE_PC, POSTCODE_SEVERITY_ERR);
device_unregister(&virtpci_rootbus_device);
bus_unregister(&virtpci_bus_type);
return -1;
}
- LOGINF("successfully registered virtpci_ctrlchan_func (0x%p) as callback.\n",
- (void *)&virtpci_ctrlchan_func);
/* create debugfs directory and info file inside. */
virtpci_debugfs_dir = debugfs_create_dir("virtpci", NULL);
debugfs_create_file("info", S_IRUSR, virtpci_debugfs_dir,
NULL, &debugfs_info_fops);
- LOGINF("Leaving\n");
POSTCODE_LINUX_2(VPCI_CREATE_EXIT_PC, POSTCODE_SEVERITY_INFO);
return 0;
}
static void __exit virtpci_mod_exit(void)
{
- LOGINF("virtpci_mod_exit...\n");
-
/* unregister the callback function */
- if (!uisctrl_register_req_handler(2, NULL, NULL))
- LOGERR("uisctrl_register_req_handler ****FAILED.\n");
-
device_unregister(&virtpci_rootbus_device);
bus_unregister(&virtpci_bus_type);
debugfs_remove_recursive(virtpci_debugfs_dir);
- LOGINF("Leaving\n");
}
module_init(virtpci_mod_init);
config UNISYS_VISORCHANNEL
tristate "Unisys visorchannel driver"
- depends on UNISYSSPAR && UNISYS_VISORUTIL
+ select UNISYS_VISORUTIL
---help---
If you say Y here, you will enable the Unisys visorchannel driver.
#ifndef __VISORCHANNEL_GLOBALS_H__
#define __VISORCHANNEL_GLOBALS_H__
-#include "uniklog.h"
#include "timskmod.h"
#include "memregion.h"
#include "version.h"
void *rc = NULL;
p = kmalloc(sizeof(*p), GFP_KERNEL|__GFP_NORETRY);
- if (p == NULL) {
- ERRDRV("allocation failed: (status=0)\n");
+ if (!p) {
rc = NULL;
goto cleanup;
}
spin_lock_init(&p->remove_lock);
/* prepare chan_hdr (abstraction to read/write channel memory) */
- if (parent == NULL)
+ if (!parent)
p->memregion =
visor_memregion_create(physaddr,
sizeof(struct channel_header));
p->memregion =
visor_memregion_create_overlapped(parent->memregion,
off, sizeof(struct channel_header));
- if (p->memregion == NULL) {
- ERRDRV("visor_memregion_create failed failed: (status=0)\n");
+ if (!p->memregion) {
rc = NULL;
goto cleanup;
}
if (visor_memregion_read(p->memregion, 0, &p->chan_hdr,
sizeof(struct channel_header)) < 0) {
- ERRDRV("visor_memregion_read failed: (status=0)\n");
rc = NULL;
goto cleanup;
}
/* we had better be a CLIENT of this channel */
guid = p->chan_hdr.chtype;
if (visor_memregion_resize(p->memregion, channel_bytes) < 0) {
- ERRDRV("visor_memregion_resize failed: (status=0)\n");
rc = NULL;
goto cleanup;
}
rc = p;
cleanup:
- if (rc == NULL) {
- if (p != NULL) {
+ if (!rc) {
+ if (!p) {
visorchannel_destroy(p);
p = NULL;
}
void
visorchannel_destroy(struct visorchannel *channel)
{
- if (channel == NULL)
+ if (!channel)
return;
- if (channel->memregion != NULL) {
+ if (channel->memregion) {
visor_memregion_destroy(channel->memregion);
channel->memregion = NULL;
}
int written = 0;
u8 *buf = vmalloc(bufsize);
- if (buf == NULL) {
- ERRDRV("%s failed memory allocation", __func__);
+ if (!buf)
goto cleanup;
- }
+
memset(buf, ch, bufsize);
while (nbytes > 0) {
ulong thisbytes = bufsize;
rc = 0;
cleanup:
- if (buf != NULL) {
+ if (buf) {
vfree(buf);
buf = NULL;
}
{
BOOL rc = FALSE;
- if (channel->chan_hdr.ch_space_offset < sizeof(struct channel_header)) {
- ERRDRV("oChannelSpace too small: (status=%d)\n", rc);
+ if (channel->chan_hdr.ch_space_offset < sizeof(struct channel_header))
goto cleanup;
- }
/* Read the appropriate SIGNAL_QUEUE_HEADER into local memory. */
SIG_QUEUE_OFFSET(&channel->chan_hdr, queue),
sig_hdr,
sizeof(struct signal_queue_header)) < 0) {
- ERRDRV("queue=%d SIG_QUEUE_OFFSET=%d",
- queue, (int)SIG_QUEUE_OFFSET(&channel->chan_hdr, queue));
- ERRDRV("visor_memregion_read of signal queue failed: (status=%d)\n",
- rc);
goto cleanup;
}
rc = TRUE;
if (visor_memregion_write(channel->memregion,
signal_data_offset,
data, sig_hdr->signal_size) < 0) {
- ERRDRV("visor_memregion_write of signal data failed: (status=%d)\n",
- rc);
goto cleanup;
}
} else {
if (visor_memregion_read(channel->memregion, signal_data_offset,
data, sig_hdr->signal_size) < 0) {
- ERRDRV("visor_memregion_read of signal data failed: (status=%d)\n",
- rc);
goto cleanup;
}
}
punsafe_sqh->head = *phead;
punsafe_sqh->tail = *ptail;
- ERRDRV("safe_sig_queue_validate: head = 0x%x, tail = 0x%x, MaxSlots = 0x%x",
- *phead, *ptail, psafe_sqh->max_slots);
return 0;
}
return 1;
{
struct signal_queue_header sig_hdr;
- if (!sig_read_header(channel, queue, &sig_hdr)) {
+ if (!sig_read_header(channel, queue, &sig_hdr))
return FALSE;
- }
if (sig_hdr.head == sig_hdr.tail)
return FALSE; /* no signals to remove */
sig_hdr.tail = (sig_hdr.tail + 1) % sig_hdr.max_slots;
if (!sig_read_data(channel, queue, &sig_hdr, sig_hdr.tail, msg)) {
- ERRDRV("sig_read_data failed\n");
return FALSE;
}
sig_hdr.num_received++;
* update host memory.
*/
mb(); /* required for channel synch */
- if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, tail)) {
- ERRDRV("visor_memregion_write of Tail failed\n");
+ if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, tail))
return FALSE;
- }
- if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, num_received)) {
- ERRDRV("visor_memregion_write of NumSignalsReceived failed\n");
+ if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, num_received))
return FALSE;
- }
return TRUE;
}
{
struct signal_queue_header sig_hdr;
- if (!sig_read_header(channel, queue, &sig_hdr)) {
+ if (!sig_read_header(channel, queue, &sig_hdr))
return FALSE;
- }
sig_hdr.head = ((sig_hdr.head + 1) % sig_hdr.max_slots);
if (sig_hdr.head == sig_hdr.tail) {
sig_hdr.num_overflows++;
- if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, num_overflows))
- ERRDRV("visor_memregion_write of NumOverflows failed\n");
-
+ visor_memregion_write(channel->memregion,
+ SIG_QUEUE_OFFSET(&channel->chan_hdr,
+ queue) +
+ offsetof(struct signal_queue_header,
+ num_overflows),
+ &(sig_hdr.num_overflows),
+ sizeof(sig_hdr.num_overflows));
return FALSE;
}
- if (!sig_write_data(channel, queue, &sig_hdr, sig_hdr.head, msg)) {
- ERRDRV("sig_write_data failed\n");
+ if (!sig_write_data(channel, queue, &sig_hdr, sig_hdr.head, msg))
return FALSE;
- }
+
sig_hdr.num_sent++;
/* For each data field in SIGNAL_QUEUE_HEADER that was modified,
* update host memory.
*/
mb(); /* required for channel synch */
- if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, head)) {
- ERRDRV("visor_memregion_write of Head failed\n");
+ if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, head))
return FALSE;
- }
if (!SIG_WRITE_FIELD(channel, queue, &sig_hdr, num_sent)) {
- ERRDRV("visor_memregion_write of NumSignalsSent failed\n");
return FALSE;
}
int i = 0;
int errcode = 0;
- if (channel == NULL) {
- ERRDRV("%s no channel", __func__);
+ if (!channel)
return;
- }
memregion = channel->memregion;
- if (memregion == NULL) {
- ERRDRV("%s no memregion", __func__);
+ if (!memregion)
return;
- }
+
addr = visor_memregion_get_physaddr(memregion);
nbytes_region = visor_memregion_get_nbytes(memregion);
errcode = visorchannel_read(channel, off,
goto fmt_failed;
errcode = visorchannel_read(chan, off, buf, len);
- if (errcode < 0) {
- ERRDRV("%s failed to read %s from channel errcode=%d",
- s, __func__, errcode);
+ if (errcode < 0)
goto read_failed;
- }
seq_printf(seq, "channel %s:\n", s);
tbuf = buf;
while (len > 0) {
if (!unisys_spar_platform)
return -ENODEV;
- INFODRV("driver version %s loaded", VERSION);
return 0;
}
static void
visorchannel_exit(void)
{
- INFODRV("driver unloaded");
}
module_init(visorchannel_init);
config UNISYS_VISORCHIPSET
tristate "Unisys visorchipset driver"
- depends on UNISYSSPAR && UNISYS_VISORUTIL && UNISYS_VISORCHANNEL && HAS_IOMEM
+ select UNISYS_VISORUTIL
+ select UNISYS_VISORCHANNEL
---help---
If you say Y here, you will enable the Unisys visorchipset driver.
static int visorchipset_open(struct inode *inode, struct file *file);
static int visorchipset_release(struct inode *inode, struct file *file);
static int visorchipset_mmap(struct file *file, struct vm_area_struct *vma);
-long visorchipset_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
+static long visorchipset_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg);
static const struct file_operations visorchipset_fops = {
.owner = THIS_MODULE,
file_cdev.owner = THIS_MODULE;
if (MAJOR(majordev) == 0) {
/* dynamic major device number registration required */
- if (alloc_chrdev_region(&majordev, 0, 1, MYDRVNAME) < 0) {
- ERRDRV("Unable to allocate+register char device %s",
- MYDRVNAME);
+ if (alloc_chrdev_region(&majordev, 0, 1, MYDRVNAME) < 0)
return -1;
- }
registered = TRUE;
- INFODRV("New major number %d registered\n", MAJOR(majordev));
} else {
/* static major device number registration required */
- if (register_chrdev_region(majordev, 1, MYDRVNAME) < 0) {
- ERRDRV("Unable to register char device %s", MYDRVNAME);
+ if (register_chrdev_region(majordev, 1, MYDRVNAME) < 0)
return -1;
- }
registered = TRUE;
- INFODRV("Static major number %d registered\n", MAJOR(majordev));
}
rc = cdev_add(&file_cdev, MKDEV(MAJOR(majordev), 0), 1);
- if (rc < 0) {
- ERRDRV("failed to create char device: (status=%d)\n", rc);
+ if (rc < 0)
return -1;
- }
- INFODRV("Registered char device for %s (major=%d)",
- MYDRVNAME, MAJOR(majordev));
return 0;
}
{
unsigned minor_number = iminor(inode);
- DEBUGDRV("%s", __func__);
if (minor_number != 0)
return -ENODEV;
file->private_data = NULL;
static int
visorchipset_release(struct inode *inode, struct file *file)
{
- DEBUGDRV("%s", __func__);
return 0;
}
GUEST_PHYSICAL_ADDRESS addr = 0;
/* sv_enable_dfp(); */
- DEBUGDRV("%s", __func__);
- if (offset & (PAGE_SIZE - 1)) {
- ERRDRV("%s virtual address NOT page-aligned!", __func__);
+ if (offset & (PAGE_SIZE - 1))
return -ENXIO; /* need aligned offsets */
- }
+
switch (offset) {
case VISORCHIPSET_MMAP_CONTROLCHANOFFSET:
vma->vm_flags |= VM_IO;
if (*file_controlvm_channel == NULL) {
- ERRDRV("%s no controlvm channel yet", __func__);
return -ENXIO;
}
visorchannel_read(*file_controlvm_channel,
gp_control_channel),
&addr, sizeof(addr));
if (addr == 0) {
- ERRDRV("%s control channel address is 0", __func__);
return -ENXIO;
}
physaddr = (ulong)addr;
- DEBUGDRV("mapping physical address = 0x%lx", physaddr);
if (remap_pfn_range(vma, vma->vm_start,
physaddr >> PAGE_SHIFT,
vma->vm_end - vma->vm_start,
/*pgprot_noncached */
(vma->vm_page_prot))) {
- ERRDRV("%s remap_pfn_range failed", __func__);
return -EAGAIN;
}
break;
default:
return -ENOSYS;
}
- DEBUGDRV("%s success!", __func__);
return 0;
}
-long visorchipset_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+static long visorchipset_ioctl(struct file *file, unsigned int cmd,
+ unsigned long arg)
{
s64 adjustment;
s64 vrtc_offset;
- DBGINF("entered visorchipset_ioctl, cmd=%d", cmd);
switch (cmd) {
case VMCALL_QUERY_GUEST_VIRTUAL_TIME_OFFSET:
/* get the physical rtc offset */
((void __user *)arg, &vrtc_offset, sizeof(vrtc_offset))) {
return -EFAULT;
}
- DBGINF("insde visorchipset_ioctl, cmd=%d, vrtc_offset=%lld",
- cmd, vrtc_offset);
return SUCCESS;
case VMCALL_UPDATE_PHYSICAL_TIME:
if (copy_from_user
(&adjustment, (void __user *)arg, sizeof(adjustment))) {
return -EFAULT;
}
- DBGINF("insde visorchipset_ioctl, cmd=%d, adjustment=%lld", cmd,
- adjustment);
return issue_vmcall_update_physical_time(adjustment);
default:
- LOGERR("visorchipset_ioctl received invalid command");
return -EFAULT;
}
}
#ifndef __VISORCHIPSET_GLOBALS_H__
#define __VISORCHIPSET_GLOBALS_H__
-#include "uniklog.h"
#include "diagnostics/appos_subsystems.h"
#include "timskmod.h"
#include "visorchipset.h"
* incoming payloads. This serves as a throttling mechanism.
*/
#define MAX_CONTROLVM_PAYLOAD_BYTES (1024*128)
-static ulong Controlvm_Payload_Bytes_Buffered;
+static ulong controlvm_payload_bytes_buffered;
-struct PARSER_CONTEXT_Tag {
+struct parser_context {
ulong allocbytes;
ulong param_bytes;
u8 *curr;
char data[0];
};
-static PARSER_CONTEXT *
-parser_init_guts(u64 addr, u32 bytes, BOOL isLocal,
- BOOL hasStandardPayloadHeader, BOOL *tryAgain)
+static struct parser_context *
+parser_init_guts(u64 addr, u32 bytes, BOOL local,
+ BOOL standard_payload_header, BOOL *retry)
{
- int allocbytes = sizeof(PARSER_CONTEXT) + bytes;
- PARSER_CONTEXT *rc = NULL;
- PARSER_CONTEXT *ctx = NULL;
+ int allocbytes = sizeof(struct parser_context) + bytes;
+ struct parser_context *rc = NULL;
+ struct parser_context *ctx = NULL;
struct memregion *rgn = NULL;
struct spar_controlvm_parameters_header *phdr = NULL;
- if (tryAgain)
- *tryAgain = FALSE;
- if (!hasStandardPayloadHeader)
+ if (retry)
+ *retry = FALSE;
+ if (!standard_payload_header)
/* alloc and 0 extra byte to ensure payload is
* '\0'-terminated
*/
allocbytes++;
- if ((Controlvm_Payload_Bytes_Buffered + bytes)
+ if ((controlvm_payload_bytes_buffered + bytes)
> MAX_CONTROLVM_PAYLOAD_BYTES) {
- ERRDRV("%s (%s:%d) - prevented allocation of %d bytes to prevent exceeding throttling max (%d)",
- __func__, __FILE__, __LINE__, allocbytes,
- MAX_CONTROLVM_PAYLOAD_BYTES);
- if (tryAgain)
- *tryAgain = TRUE;
+ if (retry)
+ *retry = TRUE;
rc = NULL;
- goto Away;
+ goto cleanup;
}
ctx = kzalloc(allocbytes, GFP_KERNEL|__GFP_NORETRY);
- if (ctx == NULL) {
- ERRDRV("%s (%s:%d) - failed to allocate %d bytes",
- __func__, __FILE__, __LINE__, allocbytes);
- if (tryAgain)
- *tryAgain = TRUE;
+ if (!ctx) {
+ if (retry)
+ *retry = TRUE;
rc = NULL;
- goto Away;
+ goto cleanup;
}
ctx->allocbytes = allocbytes;
ctx->curr = NULL;
ctx->bytes_remaining = 0;
ctx->byte_stream = FALSE;
- if (isLocal) {
+ if (local) {
void *p;
if (addr > virt_to_phys(high_memory - 1)) {
- ERRDRV("%s - bad local address (0x%-16.16Lx for %lu)",
- __func__,
- (unsigned long long) addr, (ulong) bytes);
rc = NULL;
- goto Away;
+ goto cleanup;
}
p = __va((ulong) (addr));
memcpy(ctx->data, p, bytes);
rgn = visor_memregion_create(addr, bytes);
if (!rgn) {
rc = NULL;
- goto Away;
+ goto cleanup;
}
if (visor_memregion_read(rgn, 0, ctx->data, bytes) < 0) {
rc = NULL;
- goto Away;
+ goto cleanup;
}
}
- if (!hasStandardPayloadHeader) {
+ if (!standard_payload_header) {
ctx->byte_stream = TRUE;
rc = ctx;
- goto Away;
+ goto cleanup;
}
phdr = (struct spar_controlvm_parameters_header *)(ctx->data);
if (phdr->total_length != bytes) {
- ERRDRV("%s - bad total length %lu (should be %lu)",
- __func__,
- (ulong) (phdr->total_length), (ulong) (bytes));
rc = NULL;
- goto Away;
+ goto cleanup;
}
if (phdr->total_length < phdr->header_length) {
- ERRDRV("%s - total length < header length (%lu < %lu)",
- __func__,
- (ulong) (phdr->total_length),
- (ulong) (phdr->header_length));
rc = NULL;
- goto Away;
+ goto cleanup;
}
if (phdr->header_length <
sizeof(struct spar_controlvm_parameters_header)) {
- ERRDRV("%s - header is too small (%lu < %lu)",
- __func__,
- (ulong) (phdr->header_length),
- (ulong)(sizeof(
- struct spar_controlvm_parameters_header)));
rc = NULL;
- goto Away;
+ goto cleanup;
}
rc = ctx;
-Away:
+cleanup:
if (rgn) {
visor_memregion_destroy(rgn);
rgn = NULL;
}
- if (rc)
- Controlvm_Payload_Bytes_Buffered += ctx->param_bytes;
- else {
+ if (rc) {
+ controlvm_payload_bytes_buffered += ctx->param_bytes;
+ } else {
if (ctx) {
parser_done(ctx);
ctx = NULL;
return rc;
}
-PARSER_CONTEXT *
-parser_init(u64 addr, u32 bytes, BOOL isLocal, BOOL *tryAgain)
+struct parser_context *
+parser_init(u64 addr, u32 bytes, BOOL local, BOOL *retry)
{
- return parser_init_guts(addr, bytes, isLocal, TRUE, tryAgain);
+ return parser_init_guts(addr, bytes, local, TRUE, retry);
}
/* Call this instead of parser_init() if the payload area consists of just
* structures. Afterwards, you can call parser_simpleString_get() or
* parser_byteStream_get() to obtain the data.
*/
-PARSER_CONTEXT *
+struct parser_context *
parser_init_byteStream(u64 addr, u32 bytes, BOOL isLocal, BOOL *tryAgain)
{
return parser_init_guts(addr, bytes, isLocal, FALSE, tryAgain);
/* Obtain '\0'-terminated copy of string in payload area.
*/
char *
-parser_simpleString_get(PARSER_CONTEXT *ctx)
+parser_simpleString_get(struct parser_context *ctx)
{
if (!ctx->byte_stream)
return NULL;
/* Obtain a copy of the buffer in the payload area.
*/
void *
-parser_byteStream_get(PARSER_CONTEXT *ctx, ulong *nbytes)
+parser_byteStream_get(struct parser_context *ctx, ulong *nbytes)
{
if (!ctx->byte_stream)
return NULL;
}
uuid_le
-parser_id_get(PARSER_CONTEXT *ctx)
+parser_id_get(struct parser_context *ctx)
{
struct spar_controlvm_parameters_header *phdr = NULL;
- if (ctx == NULL) {
- ERRDRV("%s (%s:%d) - no context",
- __func__, __FILE__, __LINE__);
+ if (ctx == NULL)
return NULL_UUID_LE;
- }
phdr = (struct spar_controlvm_parameters_header *)(ctx->data);
return phdr->id;
}
void
-parser_param_start(PARSER_CONTEXT *ctx, PARSER_WHICH_STRING which_string)
+parser_param_start(struct parser_context *ctx, PARSER_WHICH_STRING which_string)
{
struct spar_controlvm_parameters_header *phdr = NULL;
- if (ctx == NULL) {
- ERRDRV("%s (%s:%d) - no context",
- __func__, __FILE__, __LINE__);
+ if (ctx == NULL)
goto Away;
- }
phdr = (struct spar_controlvm_parameters_header *)(ctx->data);
switch (which_string) {
case PARSERSTRING_INITIATOR:
ctx->bytes_remaining = phdr->name_length;
break;
default:
- ERRDRV("%s - bad which_string %d", __func__, which_string);
break;
}
}
void
-parser_done(PARSER_CONTEXT *ctx)
+parser_done(struct parser_context *ctx)
{
if (!ctx)
return;
- Controlvm_Payload_Bytes_Buffered -= ctx->param_bytes;
+ controlvm_payload_bytes_buffered -= ctx->param_bytes;
kfree(ctx);
}
* parameter
*/
void *
-parser_param_get(PARSER_CONTEXT *ctx, char *nam, int namesize)
+parser_param_get(struct parser_context *ctx, char *nam, int namesize)
{
u8 *pscan, *pnam = nam;
ulong nscan;
}
while (*pscan != ':') {
- if (namesize <= 0) {
- ERRDRV("%s - name too big", __func__);
+ if (namesize <= 0)
return NULL;
- }
*pnam = toupper(*pscan);
pnam++;
namesize--;
pscan++;
nscan--;
- if (nscan == 0) {
- ERRDRV("%s - unexpected end of input parsing name",
- __func__);
+ if (nscan == 0)
return NULL;
- }
}
- if (namesize <= 0) {
- ERRDRV("%s - name too big", __func__);
+ if (namesize <= 0)
return NULL;
- }
*pnam = '\0';
nam[string_length_no_trail(nam, strlen(nam))] = '\0';
while (isspace(*pscan)) {
pscan++;
nscan--;
- if (nscan == 0) {
- ERRDRV("%s - unexpected end of input looking for value",
- __func__);
+ if (nscan == 0)
return NULL;
- }
}
- if (nscan == 0) {
- ERRDRV("%s - unexpected end of input looking for value",
- __func__);
+ if (nscan == 0)
return NULL;
- }
if (*pscan == '\'' || *pscan == '"') {
closing_quote = *pscan;
pscan++;
nscan--;
- if (nscan == 0) {
- ERRDRV("%s - unexpected end of input after %c",
- __func__, closing_quote);
+ if (nscan == 0)
return NULL;
- }
}
/* look for a separator character, terminator character, or
*/
for (i = 0, value_length = -1; i < nscan; i++) {
if (closing_quote) {
- if (pscan[i] == '\0') {
- ERRDRV("%s - unexpected end of input parsing quoted value", __func__);
+ if (pscan[i] == '\0')
return NULL;
- }
if (pscan[i] == closing_quote) {
value_length = i;
break;
}
}
if (value_length < 0) {
- if (closing_quote) {
- ERRDRV("%s - unexpected end of input parsing quoted value", __func__);
+ if (closing_quote)
return NULL;
- }
value_length = nscan;
}
orig_value_length = value_length;
pscan++;
nscan--;
} else if (*pscan != '\0') {
- ERRDRV("%s - missing separator after quoted string", __func__);
kfree(value);
value = NULL;
return NULL;
}
void *
-parser_string_get(PARSER_CONTEXT *ctx)
+parser_string_get(struct parser_context *ctx)
{
u8 *pscan;
ulong nscan;
#include <linux/uuid.h>
-#include "uniklog.h"
#include "timskmod.h"
#include "channel.h"
PARSERSTRING_NAME,
} PARSER_WHICH_STRING;
-typedef struct PARSER_CONTEXT_Tag PARSER_CONTEXT;
-
-PARSER_CONTEXT *parser_init(u64 addr, u32 bytes, BOOL isLocal, BOOL *tryAgain);
-PARSER_CONTEXT *parser_init_byteStream(u64 addr, u32 bytes, BOOL isLocal,
+struct parser_context *parser_init(u64 addr, u32 bytes, BOOL isLocal,
+ BOOL *tryAgain);
+struct parser_context *parser_init_byteStream(u64 addr, u32 bytes, BOOL isLocal,
BOOL *tryAgain);
-void parser_param_start(PARSER_CONTEXT *ctx, PARSER_WHICH_STRING which_string);
-void *parser_param_get(PARSER_CONTEXT *ctx, char *nam, int namesize);
-void *parser_string_get(PARSER_CONTEXT *ctx);
-uuid_le parser_id_get(PARSER_CONTEXT *ctx);
-char *parser_simpleString_get(PARSER_CONTEXT *ctx);
-void *parser_byteStream_get(PARSER_CONTEXT *ctx, ulong *nbytes);
-void parser_done(PARSER_CONTEXT *ctx);
+void parser_param_start(struct parser_context *ctx,
+ PARSER_WHICH_STRING which_string);
+void *parser_param_get(struct parser_context *ctx, char *nam, int namesize);
+void *parser_string_get(struct parser_context *ctx);
+uuid_le parser_id_get(struct parser_context *ctx);
+char *parser_simpleString_get(struct parser_context *ctx);
+void *parser_byteStream_get(struct parser_context *ctx, ulong *nbytes);
+void parser_done(struct parser_context *ctx);
#endif
#include "periodic_work.h"
#include "file.h"
#include "parser.h"
-#include "uniklog.h"
#include "uisutils.h"
#include "controlvmcompletionstatus.h"
#include "guestlinuxdebug.h"
* message, we switch back to fast polling mode.
*/
#define MIN_IDLE_SECONDS 10
-static ulong Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
+static ulong poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
static ulong Most_recent_message_jiffies; /* when we got our last
* controlvm message */
static inline char *
static struct workqueue_struct *Periodic_controlvm_workqueue;
static DEFINE_SEMAPHORE(NotifierLock);
-typedef struct {
- struct controlvm_message message;
- unsigned int crc;
-} MESSAGE_ENVELOPE;
-
static struct controlvm_message_header g_DiagMsgHdr;
static struct controlvm_message_header g_ChipSetMsgHdr;
static struct controlvm_message_header g_DelDumpMsgHdr;
static struct visorchannel *ControlVm_channel;
-typedef struct {
+struct controlvm_payload_info {
u8 __iomem *ptr; /* pointer to base address of payload pool */
u64 offset; /* offset from beginning of controlvm
* channel to beginning of payload * pool */
u32 bytes; /* number of bytes in payload pool */
-} CONTROLVM_PAYLOAD_INFO;
+};
/* Manages the request payload in the controlvm channel */
-static CONTROLVM_PAYLOAD_INFO ControlVm_payload_info;
+static struct controlvm_payload_info ControlVm_payload_info;
static struct channel_header *Test_Vnic_channel;
-typedef struct {
+struct livedump_info {
struct controlvm_message_header Dumpcapture_header;
struct controlvm_message_header Gettextdump_header;
struct controlvm_message_header Dumpcomplete_header;
ulong length;
atomic_t buffers_in_use;
ulong destination;
-} LIVEDUMP_INFO;
+};
/* Manages the info for a CONTROLVM_DUMP_CAPTURESTATE /
* CONTROLVM_DUMP_GETTEXTDUMP / CONTROLVM_DUMP_COMPLETE conversation.
*/
-static LIVEDUMP_INFO LiveDump_info;
+static struct livedump_info LiveDump_info;
/* The following globals are used to handle the scenario where we are unable to
* offload the payload from a controlvm message due to memory requirements. In
*/
struct putfile_buffer_entry {
struct list_head next; /* putfile_buffer_entry list */
- PARSER_CONTEXT *parser_ctx; /* points to buffer containing input data */
+ struct parser_context *parser_ctx; /* points to input data buffer */
};
/* List of struct putfile_request *, via next_putfile_request member.
*/
struct putfile_active_buffer {
/* a payload from a controlvm message, containing a file data buffer */
- PARSER_CONTEXT *parser_ctx;
+ struct parser_context *parser_ctx;
/* points within data area of parser_ctx to next byte of data */
u8 *pnext;
/* # bytes left from <pnext> to the end of this data buffer */
POSTCODE_LINUX_2(CHIPSET_INIT_ENTRY_PC, POSTCODE_SEVERITY_INFO);
if (chipset_inited) {
- LOGERR("CONTROLVM_CHIPSET_INIT Failed: Already Done.");
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
goto Away;
}
&& g_DeviceChangeStatePacket.device_change_state.dev_no ==
g_diagpoolDevNo)
outmsg.cmd = g_DeviceChangeStatePacket;
- if (outmsg.hdr.flags.test_message == 1) {
- LOGINF("%s controlvm_msg=0x%x response=%d for test message",
- __func__, outmsg.hdr.id, response);
+ if (outmsg.hdr.flags.test_message == 1)
return;
- }
+
if (!visorchannel_signalinsert(ControlVm_channel,
CONTROLVM_QUEUE_REQUEST, &outmsg)) {
- LOGERR("signalinsert failed!");
return;
}
}
outmsg.cmd.init_chipset.features = features;
if (!visorchannel_signalinsert(ControlVm_channel,
CONTROLVM_QUEUE_REQUEST, &outmsg)) {
- LOGERR("signalinsert failed!");
return;
}
}
outmsg.cmd.device_change_state.flags.phys_device = 1;
if (!visorchannel_signalinsert(ControlVm_channel,
CONTROLVM_QUEUE_REQUEST, &outmsg)) {
- LOGERR("signalinsert failed!");
return;
}
}
offsetof(struct spar_controlvm_channel_protocol,
saved_crash_message_count),
&localSavedCrashMsgCount, sizeof(u16)) < 0) {
- LOGERR("failed to get Saved Message Count");
POSTCODE_LINUX_2(CRASH_DEV_CTRL_RD_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
if (localSavedCrashMsgCount != CONTROLVM_CRASHMSG_MAX) {
- LOGERR("Saved Message Count incorrect %d",
- localSavedCrashMsgCount);
POSTCODE_LINUX_3(CRASH_DEV_COUNT_FAILURE_PC,
localSavedCrashMsgCount,
POSTCODE_SEVERITY_ERR);
offsetof(struct spar_controlvm_channel_protocol,
saved_crash_message_offset),
&localSavedCrashMsgOffset, sizeof(u32)) < 0) {
- LOGERR("failed to get Saved Message Offset");
POSTCODE_LINUX_2(CRASH_DEV_CTRL_RD_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
localSavedCrashMsgOffset,
msg,
sizeof(struct controlvm_message)) < 0) {
- LOGERR("SAVE_MSG_BUS_FAILURE: Failed to write CrashCreateBusMsg!");
POSTCODE_LINUX_2(SAVE_MSG_BUS_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
localSavedCrashMsgOffset +
sizeof(struct controlvm_message), msg,
sizeof(struct controlvm_message)) < 0) {
- LOGERR("SAVE_MSG_DEV_FAILURE: Failed to write CrashCreateDevMsg!");
POSTCODE_LINUX_2(SAVE_MSG_DEV_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
BOOL need_clear = FALSE;
p = findbus(&BusInfoList, busNo);
- if (!p) {
- LOGERR("internal error busNo=%lu", busNo);
+ if (!p)
return;
- }
+
if (response < 0) {
if ((cmdId == CONTROLVM_BUS_CREATE) &&
(response != (-CONTROLVM_RESP_ERROR_ALREADY_DONE)))
need_clear = TRUE;
}
- if (p->pending_msg_hdr.id == CONTROLVM_INVALID) {
- LOGERR("bus_responder no pending msg");
+ if (p->pending_msg_hdr.id == CONTROLVM_INVALID)
return; /* no controlvm response needed */
- }
- if (p->pending_msg_hdr.id != (u32) cmdId) {
- LOGERR("expected=%d, found=%d", cmdId, p->pending_msg_hdr.id);
+ if (p->pending_msg_hdr.id != (u32) cmdId)
return;
- }
controlvm_respond(&p->pending_msg_hdr, response);
p->pending_msg_hdr.id = CONTROLVM_INVALID;
if (need_clear) {
struct controlvm_message outmsg;
p = finddevice(&DevInfoList, busNo, devNo);
- if (!p) {
- LOGERR("internal error; busNo=%lu, devNo=%lu", busNo, devNo);
+ if (!p)
return;
- }
- if (p->pending_msg_hdr.id == CONTROLVM_INVALID) {
- LOGERR("device_responder no pending msg");
+ if (p->pending_msg_hdr.id == CONTROLVM_INVALID)
return; /* no controlvm response needed */
- }
- if (p->pending_msg_hdr.id != cmdId) {
- LOGERR("expected=%d, found=%d", cmdId, p->pending_msg_hdr.id);
+ if (p->pending_msg_hdr.id != cmdId)
return;
- }
controlvm_init_response(&outmsg, &p->pending_msg_hdr, response);
outmsg.cmd.device_change_state.state = responseState;
if (!visorchannel_signalinsert(ControlVm_channel,
- CONTROLVM_QUEUE_REQUEST, &outmsg)) {
- LOGERR("signalinsert failed!");
+ CONTROLVM_QUEUE_REQUEST, &outmsg))
return;
- }
p->pending_msg_hdr.id = CONTROLVM_INVALID;
}
BOOL need_clear = FALSE;
p = finddevice(&DevInfoList, busNo, devNo);
- if (!p) {
- LOGERR("internal error; busNo=%lu, devNo=%lu", busNo, devNo);
+ if (!p)
return;
- }
if (response >= 0) {
if (cmdId == CONTROLVM_DEVICE_CREATE)
p->state.created = 1;
need_clear = TRUE;
}
- if (p->pending_msg_hdr.id == CONTROLVM_INVALID) {
- LOGERR("device_responder no pending msg");
+ if (p->pending_msg_hdr.id == CONTROLVM_INVALID)
return; /* no controlvm response needed */
- }
- if (p->pending_msg_hdr.id != (u32) cmdId) {
- LOGERR("expected=%d, found=%d", cmdId, p->pending_msg_hdr.id);
+
+ if (p->pending_msg_hdr.id != (u32) cmdId)
return;
- }
+
controlvm_respond(&p->pending_msg_hdr, response);
p->pending_msg_hdr.id = CONTROLVM_INVALID;
if (need_clear)
struct visorchipset_bus_info *pBusInfo = findbus(&BusInfoList, busNo);
- if (!pBusInfo) {
- LOGERR("HUH? bad busNo=%d", busNo);
+ if (!pBusInfo)
return;
- }
+
if (needResponse) {
memcpy(&pBusInfo->pending_msg_hdr, msgHdr,
sizeof(struct controlvm_message_header));
NULL
};
- if (!pDevInfo) {
- LOGERR("HUH? bad busNo=%d, devNo=%d", busNo, devNo);
+ if (!pDevInfo)
return;
- }
+
if (for_visorbus)
notifiers = &BusDev_Server_Notifiers;
else
*/
if (busNo == g_diagpoolBusNo
&& devNo == g_diagpoolDevNo) {
- LOGINF("DEVICE_CHANGESTATE(DiagpoolChannel busNo=%d devNo=%d is pausing...)",
- busNo, devNo);
/* this will trigger the
* diag_shutdown.sh script in
* the visorchipset hotplug */
pBusInfo = findbus(&BusInfoList, busNo);
if (pBusInfo && (pBusInfo->state.created == 1)) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: bus %lu already exists",
- busNo);
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
pBusInfo = kzalloc(sizeof(struct visorchipset_bus_info), GFP_KERNEL);
if (pBusInfo == NULL) {
- LOGERR("CONTROLVM_BUS_CREATE Failed: bus %lu kzalloc failed",
- busNo);
POSTCODE_LINUX_3(BUS_CREATE_FAILURE_PC, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_KMALLOC_FAILED;
pBusInfo = findbus(&BusInfoList, busNo);
if (!pBusInfo) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: bus %lu invalid", busNo);
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
goto Away;
}
if (pBusInfo->state.created == 0) {
- LOGERR("CONTROLVM_BUS_DESTROY Failed: bus %lu already destroyed",
- busNo);
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
goto Away;
}
}
static void
-bus_configure(struct controlvm_message *inmsg, PARSER_CONTEXT *parser_ctx)
+bus_configure(struct controlvm_message *inmsg,
+ struct parser_context *parser_ctx)
{
struct controlvm_message_packet *cmd = &inmsg->cmd;
ulong busNo = cmd->configure_bus.bus_no;
pBusInfo = findbus(&BusInfoList, busNo);
if (!pBusInfo) {
- LOGERR("CONTROLVM_BUS_CONFIGURE Failed: bus %lu invalid",
- busNo);
POSTCODE_LINUX_3(BUS_CONFIGURE_FAILURE_PC, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
goto Away;
}
if (pBusInfo->state.created == 0) {
- LOGERR("CONTROLVM_BUS_CONFIGURE Failed: Invalid bus %lu - not created yet",
- busNo);
POSTCODE_LINUX_3(BUS_CONFIGURE_FAILURE_PC, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
}
/* TBD - add this check to other commands also... */
if (pBusInfo->pending_msg_hdr.id != CONTROLVM_INVALID) {
- LOGERR("CONTROLVM_BUS_CONFIGURE Failed: bus %lu MsgId=%u outstanding",
- busNo, (uint) pBusInfo->pending_msg_hdr.id);
POSTCODE_LINUX_3(BUS_CONFIGURE_FAILURE_PC, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_MESSAGE_ID_INVALID_FOR_CLIENT;
pDevInfo = finddevice(&DevInfoList, busNo, devNo);
if (pDevInfo && (pDevInfo->state.created == 1)) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: busNo=%lu, devNo=%lu already exists",
- busNo, devNo);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, devNo, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
pBusInfo = findbus(&BusInfoList, busNo);
if (!pBusInfo) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: Invalid bus %lu - out of range",
- busNo);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, devNo, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
goto Away;
}
if (pBusInfo->state.created == 0) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: Invalid bus %lu - not created yet",
- busNo);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, devNo, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_BUS_INVALID;
}
pDevInfo = kzalloc(sizeof(struct visorchipset_device_info), GFP_KERNEL);
if (pDevInfo == NULL) {
- LOGERR("CONTROLVM_DEVICE_CREATE Failed: busNo=%lu, devNo=%lu kmaloc failed",
- busNo, devNo);
POSTCODE_LINUX_4(DEVICE_CREATE_FAILURE_PC, devNo, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_KMALLOC_FAILED;
is_diagpool_channel(pDevInfo->chan_info.channel_type_uuid)) {
g_diagpoolBusNo = busNo;
g_diagpoolDevNo = devNo;
- LOGINF("CONTROLVM_DEVICE_CREATE for DiagPool channel: busNo=%lu, devNo=%lu",
- g_diagpoolBusNo, g_diagpoolDevNo);
}
device_epilog(busNo, devNo, segment_state_running,
CONTROLVM_DEVICE_CREATE, &inmsg->hdr, rc,
pDevInfo = finddevice(&DevInfoList, busNo, devNo);
if (!pDevInfo) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE Failed: busNo=%lu, devNo=%lu invalid (doesn't exist)",
- busNo, devNo);
POSTCODE_LINUX_4(DEVICE_CHANGESTATE_FAILURE_PC, devNo, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_DEVICE_INVALID;
goto Away;
}
if (pDevInfo->state.created == 0) {
- LOGERR("CONTROLVM_DEVICE_CHANGESTATE Failed: busNo=%lu, devNo=%lu invalid (not created)",
- busNo, devNo);
POSTCODE_LINUX_4(DEVICE_CHANGESTATE_FAILURE_PC, devNo, busNo,
POSTCODE_SEVERITY_ERR);
rc = -CONTROLVM_RESP_ERROR_DEVICE_INVALID;
pDevInfo = finddevice(&DevInfoList, busNo, devNo);
if (!pDevInfo) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: busNo=%lu, devNo=%lu invalid",
- busNo, devNo);
rc = -CONTROLVM_RESP_ERROR_DEVICE_INVALID;
goto Away;
}
if (pDevInfo->state.created == 0) {
- LOGERR("CONTROLVM_DEVICE_DESTROY Failed: busNo=%lu, devNo=%lu already destroyed",
- busNo, devNo);
rc = -CONTROLVM_RESP_ERROR_ALREADY_DONE;
}
/* When provided with the physical address of the controlvm channel
* (phys_addr), the offset to the payload area we need to manage
* (offset), and the size of this payload area (bytes), fills in the
- * CONTROLVM_PAYLOAD_INFO struct. Returns TRUE for success or FALSE
+ * controlvm_payload_info struct. Returns TRUE for success or FALSE
* for failure.
*/
static int
initialize_controlvm_payload_info(HOSTADDRESS phys_addr, u64 offset, u32 bytes,
- CONTROLVM_PAYLOAD_INFO *info)
+ struct controlvm_payload_info *info)
{
u8 __iomem *payload = NULL;
int rc = CONTROLVM_RESP_SUCCESS;
if (info == NULL) {
- LOGERR("HUH ? CONTROLVM_PAYLOAD_INIT Failed : Programmer check at %s:%d",
- __FILE__, __LINE__);
rc = -CONTROLVM_RESP_ERROR_PAYLOAD_INVALID;
goto Away;
}
- memset(info, 0, sizeof(CONTROLVM_PAYLOAD_INFO));
+ memset(info, 0, sizeof(struct controlvm_payload_info));
if ((offset == 0) || (bytes == 0)) {
- LOGERR("CONTROLVM_PAYLOAD_INIT Failed: request_payload_offset=%llu request_payload_bytes=%llu!",
- (u64) offset, (u64) bytes);
rc = -CONTROLVM_RESP_ERROR_PAYLOAD_INVALID;
goto Away;
}
payload = ioremap_cache(phys_addr + offset, bytes);
if (payload == NULL) {
- LOGERR("CONTROLVM_PAYLOAD_INIT Failed: ioremap_cache %llu for %llu bytes failed",
- (u64) offset, (u64) bytes);
rc = -CONTROLVM_RESP_ERROR_IOREMAP_FAILED;
goto Away;
}
info->offset = offset;
info->bytes = bytes;
info->ptr = payload;
- LOGINF("offset=%llu, bytes=%lu, ptr=%p",
- (u64) (info->offset), (ulong) (info->bytes), info->ptr);
Away:
if (rc < 0) {
}
static void
-destroy_controlvm_payload_info(CONTROLVM_PAYLOAD_INFO *info)
+destroy_controlvm_payload_info(struct controlvm_payload_info *info)
{
if (info->ptr != NULL) {
iounmap(info->ptr);
info->ptr = NULL;
}
- memset(info, 0, sizeof(CONTROLVM_PAYLOAD_INFO));
+ memset(info, 0, sizeof(struct controlvm_payload_info));
}
static void
offsetof(struct spar_controlvm_channel_protocol,
request_payload_offset),
&payloadOffset, sizeof(payloadOffset)) < 0) {
- LOGERR("CONTROLVM_PAYLOAD_INIT Failed to read controlvm channel!");
POSTCODE_LINUX_2(CONTROLVM_INIT_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
offsetof(struct spar_controlvm_channel_protocol,
request_payload_bytes),
&payloadBytes, sizeof(payloadBytes)) < 0) {
- LOGERR("CONTROLVM_PAYLOAD_INIT Failed to read controlvm channel!");
POSTCODE_LINUX_2(CONTROLVM_INIT_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
* and disks mounted for the partition
*/
g_ChipSetMsgHdr = *msgHdr;
- LOGINF("Holding CHIPSET_READY response");
}
}
if (visorchannel_signalremove(ControlVm_channel,
CONTROLVM_QUEUE_EVENT, msg)) {
/* got a message */
- if (msg->hdr.flags.test_message == 1) {
- LOGERR("ignoring bad CONTROLVM_QUEUE_EVENT msg with controlvm_msg_id=0x%x because Flags.testMessage is nonsensical (=1)",
- msg->hdr.id);
+ if (msg->hdr.flags.test_message == 1)
return FALSE;
- }
return TRUE;
}
return FALSE;
static struct parahotplug_request *
parahotplug_request_create(struct controlvm_message *msg)
{
- struct parahotplug_request *req =
- kmalloc(sizeof(struct parahotplug_request),
- GFP_KERNEL|__GFP_NORETRY);
+ struct parahotplug_request *req;
+
+ req = kmalloc(sizeof(*req), GFP_KERNEL|__GFP_NORETRY);
if (req == NULL)
return NULL;
sprintf(env_func, "SPAR_PARAHOTPLUG_FUNCTION=%d",
cmd->device_change_state.dev_no & 0x7);
- LOGINF("parahotplug_request_kickoff: state=%d, bdf=%d/%d/%d, id=%u\n",
- cmd->device_change_state.state.active,
- cmd->device_change_state.bus_no,
- cmd->device_change_state.dev_no >> 3,
- cmd->device_change_state.dev_no & 7, req->id);
-
kobject_uevent_env(&Visorchipset_platform_device.dev.kobj, KOBJ_CHANGE,
envp);
}
req = parahotplug_request_create(inmsg);
- if (req == NULL) {
- LOGERR("parahotplug_process_message: couldn't allocate request");
+ if (req == NULL)
return;
- }
if (inmsg->cmd.device_change_state.state.active) {
/* For enable messages, just respond with success
struct controlvm_message_packet *cmd = &inmsg.cmd;
u64 parametersAddr = 0;
u32 parametersBytes = 0;
- PARSER_CONTEXT *parser_ctx = NULL;
+ struct parser_context *parser_ctx = NULL;
BOOL isLocalAddr = FALSE;
struct controlvm_message ackmsg;
/* create parsing context if necessary */
isLocalAddr = (inmsg.hdr.flags.test_message == 1);
- if (channel_addr == 0) {
- LOGERR("HUH? channel_addr is 0!");
+ if (channel_addr == 0)
return TRUE;
- }
parametersAddr = channel_addr + inmsg.hdr.payload_vm_offset;
parametersBytes = inmsg.hdr.payload_bytes;
parser_ctx =
parser_init_byteStream(parametersAddr, parametersBytes,
isLocalAddr, &retry);
- if (!parser_ctx) {
- if (retry) {
- LOGWRN("throttling to copy payload");
- return FALSE;
- }
- LOGWRN("parsing failed");
- LOGWRN("inmsg.hdr.Id=0x%lx", (ulong) inmsg.hdr.id);
- LOGWRN("parametersAddr=0x%llx", (u64) parametersAddr);
- LOGWRN("parametersBytes=%lu", (ulong) parametersBytes);
- LOGWRN("isLocalAddr=%d", isLocalAddr);
- }
+ if (!parser_ctx && retry)
+ return FALSE;
}
if (!isLocalAddr) {
controlvm_init_response(&ackmsg, &inmsg.hdr,
CONTROLVM_RESP_SUCCESS);
- if ((ControlVm_channel)
- &&
- (!visorchannel_signalinsert
- (ControlVm_channel, CONTROLVM_QUEUE_ACK, &ackmsg)))
- LOGWRN("failed to send ACK failed");
+ if (ControlVm_channel)
+ visorchannel_signalinsert(ControlVm_channel,
+ CONTROLVM_QUEUE_ACK,
+ &ackmsg);
}
switch (inmsg.hdr.id) {
case CONTROLVM_CHIPSET_INIT:
- LOGINF("CHIPSET_INIT(#busses=%lu,#switches=%lu)",
- (ulong) inmsg.cmd.init_chipset.bus_count,
- (ulong) inmsg.cmd.init_chipset.switch_count);
chipset_init(&inmsg);
break;
case CONTROLVM_BUS_CREATE:
- LOGINF("BUS_CREATE(%lu,#devs=%lu)",
- (ulong) cmd->create_bus.bus_no,
- (ulong) cmd->create_bus.dev_count);
bus_create(&inmsg);
break;
case CONTROLVM_BUS_DESTROY:
- LOGINF("BUS_DESTROY(%lu)", (ulong) cmd->destroy_bus.bus_no);
bus_destroy(&inmsg);
break;
case CONTROLVM_BUS_CONFIGURE:
- LOGINF("BUS_CONFIGURE(%lu)", (ulong) cmd->configure_bus.bus_no);
bus_configure(&inmsg, parser_ctx);
break;
case CONTROLVM_DEVICE_CREATE:
- LOGINF("DEVICE_CREATE(%lu,%lu)",
- (ulong) cmd->create_device.bus_no,
- (ulong) cmd->create_device.dev_no);
my_device_create(&inmsg);
break;
case CONTROLVM_DEVICE_CHANGESTATE:
if (cmd->device_change_state.flags.phys_device) {
- LOGINF("DEVICE_CHANGESTATE for physical device (%lu,%lu, active=%lu)",
- (ulong) cmd->device_change_state.bus_no,
- (ulong) cmd->device_change_state.dev_no,
- (ulong) cmd->device_change_state.state.active);
parahotplug_process_message(&inmsg);
} else {
- LOGINF("DEVICE_CHANGESTATE for virtual device (%lu,%lu, state.Alive=0x%lx)",
- (ulong) cmd->device_change_state.bus_no,
- (ulong) cmd->device_change_state.dev_no,
- (ulong) cmd->device_change_state.state.alive);
/* save the hdr and cmd structures for later use */
/* when sending back the response to Command */
my_device_changestate(&inmsg);
}
break;
case CONTROLVM_DEVICE_DESTROY:
- LOGINF("DEVICE_DESTROY(%lu,%lu)",
- (ulong) cmd->destroy_device.bus_no,
- (ulong) cmd->destroy_device.dev_no);
my_device_destroy(&inmsg);
break;
case CONTROLVM_DEVICE_CONFIGURE:
- LOGINF("DEVICE_CONFIGURE(%lu,%lu)",
- (ulong) cmd->configure_device.bus_no,
- (ulong) cmd->configure_device.dev_no);
/* no op for now, just send a respond that we passed */
if (inmsg.hdr.flags.response_expected)
controlvm_respond(&inmsg.hdr, CONTROLVM_RESP_SUCCESS);
break;
case CONTROLVM_CHIPSET_READY:
- LOGINF("CHIPSET_READY");
chipset_ready(&inmsg.hdr);
break;
case CONTROLVM_CHIPSET_SELFTEST:
- LOGINF("CHIPSET_SELFTEST");
chipset_selftest(&inmsg.hdr);
break;
case CONTROLVM_CHIPSET_STOP:
- LOGINF("CHIPSET_STOP");
chipset_notready(&inmsg.hdr);
break;
default:
- LOGERR("unrecognized controlvm cmd=%d", (int) inmsg.hdr.id);
if (inmsg.hdr.flags.response_expected)
controlvm_respond(&inmsg.hdr,
-CONTROLVM_RESP_ERROR_MESSAGE_ID_UNKNOWN);
u64 addr = 0;
u32 size = 0;
- if (!VMCALL_SUCCESSFUL(issue_vmcall_io_controlvm_addr(&addr, &size))) {
- ERRDRV("%s - vmcall to determine controlvm channel addr failed",
- __func__);
+ if (!VMCALL_SUCCESSFUL(issue_vmcall_io_controlvm_addr(&addr, &size)))
return 0;
- }
- INFODRV("controlvm addr=%Lx", addr);
+
return addr;
}
if (visorchipset_holdchipsetready
&& (g_ChipSetMsgHdr.id != CONTROLVM_INVALID)) {
if (check_chipset_events() == 1) {
- LOGINF("Sending CHIPSET_READY response");
controlvm_respond(&g_ChipSetMsgHdr, 0);
clear_chipset_events();
memset(&g_ChipSetMsgHdr, 0,
while (visorchannel_signalremove(ControlVm_channel,
CONTROLVM_QUEUE_RESPONSE,
&inmsg)) {
- if (inmsg.hdr.payload_max_bytes != 0) {
- LOGERR("Payload of size %lu returned @%lu with unexpected message id %d.",
- (ulong) inmsg.hdr.payload_max_bytes,
- (ulong) inmsg.hdr.payload_vm_offset,
- inmsg.hdr.id);
- }
}
if (!gotACommand) {
if (ControlVm_Pending_Msg_Valid) {
* processed our last controlvm message; slow down the
* polling
*/
- if (Poll_jiffies != POLLJIFFIES_CONTROLVMCHANNEL_SLOW) {
- LOGINF("switched to slow controlvm polling");
- Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_SLOW;
- }
+ if (poll_jiffies != POLLJIFFIES_CONTROLVMCHANNEL_SLOW)
+ poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_SLOW;
} else {
- if (Poll_jiffies != POLLJIFFIES_CONTROLVMCHANNEL_FAST) {
- Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
- LOGINF("switched to fast controlvm polling");
- }
+ if (poll_jiffies != POLLJIFFIES_CONTROLVMCHANNEL_FAST)
+ poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
}
queue_delayed_work(Periodic_controlvm_workqueue,
- &Periodic_controlvm_work, Poll_jiffies);
+ &Periodic_controlvm_work, poll_jiffies);
}
static void
offsetof(struct spar_controlvm_channel_protocol,
saved_crash_message_count),
&localSavedCrashMsgCount, sizeof(u16)) < 0) {
- LOGERR("failed to get Saved Message Count");
POSTCODE_LINUX_2(CRASH_DEV_CTRL_RD_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
if (localSavedCrashMsgCount != CONTROLVM_CRASHMSG_MAX) {
- LOGERR("Saved Message Count incorrect %d",
- localSavedCrashMsgCount);
POSTCODE_LINUX_3(CRASH_DEV_COUNT_FAILURE_PC,
localSavedCrashMsgCount,
POSTCODE_SEVERITY_ERR);
offsetof(struct spar_controlvm_channel_protocol,
saved_crash_message_offset),
&localSavedCrashMsgOffset, sizeof(u32)) < 0) {
- LOGERR("failed to get Saved Message Offset");
POSTCODE_LINUX_2(CRASH_DEV_CTRL_RD_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
localSavedCrashMsgOffset,
&localCrashCreateBusMsg,
sizeof(struct controlvm_message)) < 0) {
- LOGERR("CRASH_DEV_RD_BUS_FAIULRE: Failed to read CrashCreateBusMsg!");
POSTCODE_LINUX_2(CRASH_DEV_RD_BUS_FAIULRE_PC,
POSTCODE_SEVERITY_ERR);
return;
sizeof(struct controlvm_message),
&localCrashCreateDevMsg,
sizeof(struct controlvm_message)) < 0) {
- LOGERR("CRASH_DEV_RD_DEV_FAIULRE: Failed to read CrashCreateDevMsg!");
POSTCODE_LINUX_2(CRASH_DEV_RD_DEV_FAIULRE_PC,
POSTCODE_SEVERITY_ERR);
return;
if (localCrashCreateBusMsg.cmd.create_bus.channel_addr != 0)
bus_create(&localCrashCreateBusMsg);
else {
- LOGERR("CrashCreateBusMsg is null, no dump will be taken");
POSTCODE_LINUX_2(CRASH_DEV_BUS_NULL_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
if (localCrashCreateDevMsg.cmd.create_device.channel_addr != 0)
my_device_create(&localCrashCreateDevMsg);
else {
- LOGERR("CrashCreateDevMsg is null, no dump will be taken");
POSTCODE_LINUX_2(CRASH_DEV_DEV_NULL_FAILURE_PC,
POSTCODE_SEVERITY_ERR);
return;
}
- LOGINF("Bus and device ready for dumping");
POSTCODE_LINUX_2(CRASH_DEV_EXIT_PC, POSTCODE_SEVERITY_INFO);
return;
Away:
- Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_SLOW;
+ poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_SLOW;
queue_delayed_work(Periodic_controlvm_workqueue,
- &Periodic_controlvm_work, Poll_jiffies);
+ &Periodic_controlvm_work, poll_jiffies);
}
static void
{
void *p = findbus(&BusInfoList, bus_no);
- if (!p) {
- LOGERR("(%lu) failed", bus_no);
+ if (!p)
return FALSE;
- }
memcpy(bus_info, p, sizeof(struct visorchipset_bus_info));
return TRUE;
}
{
struct visorchipset_bus_info *p = findbus(&BusInfoList, bus_no);
- if (!p) {
- LOGERR("(%lu) failed", bus_no);
+ if (!p)
return FALSE;
- }
p->bus_driver_context = context;
return TRUE;
}
{
void *p = finddevice(&DevInfoList, bus_no, dev_no);
- if (!p) {
- LOGERR("(%lu,%lu) failed", bus_no, dev_no);
+ if (!p)
return FALSE;
- }
memcpy(dev_info, p, sizeof(struct visorchipset_device_info));
return TRUE;
}
struct visorchipset_device_info *p =
finddevice(&DevInfoList, bus_no, dev_no);
- if (!p) {
- LOGERR("(%lu,%lu) failed", bus_no, dev_no);
+ if (!p)
return FALSE;
- }
p->bus_driver_context = context;
return TRUE;
}
*/
gfp |= __GFP_NORETRY;
p = kmem_cache_alloc(pool, gfp);
- if (!p) {
- LOGERR("kmem_cache_alloc failed early @%s:%d\n", fn, ln);
+ if (!p)
return NULL;
- }
+
atomic_inc(&Visorchipset_cache_buffers_in_use);
return p;
}
void
visorchipset_cache_free(struct kmem_cache *pool, void *p, char *fn, int ln)
{
- if (!p) {
- LOGERR("NULL pointer @%s:%d\n", fn, ln);
+ if (!p)
return;
- }
+
atomic_dec(&Visorchipset_cache_buffers_in_use);
kmem_cache_free(pool, p);
}
visorchipset_init(void)
{
int rc = 0, x = 0;
- char s[64];
HOSTADDRESS addr;
if (!unisys_spar_platform)
return -ENODEV;
- LOGINF("chipset driver version %s loaded", VERSION);
- /* process module options */
- POSTCODE_LINUX_2(DRIVER_ENTRY_PC, POSTCODE_SEVERITY_INFO);
-
- LOGINF("option - testvnic=%d", visorchipset_testvnic);
- LOGINF("option - testvnicclient=%d", visorchipset_testvnicclient);
- LOGINF("option - testmsg=%d", visorchipset_testmsg);
- LOGINF("option - testteardown=%d", visorchipset_testteardown);
- LOGINF("option - major=%d", visorchipset_major);
- LOGINF("option - serverregwait=%d", visorchipset_serverregwait);
- LOGINF("option - clientregwait=%d", visorchipset_clientregwait);
- LOGINF("option - holdchipsetready=%d", visorchipset_holdchipsetready);
-
memset(&BusDev_Server_Notifiers, 0, sizeof(BusDev_Server_Notifiers));
memset(&BusDev_Client_Notifiers, 0, sizeof(BusDev_Client_Notifiers));
memset(&ControlVm_payload_info, 0, sizeof(ControlVm_payload_info));
atomic_set(&LiveDump_info.buffers_in_use, 0);
if (visorchipset_testvnic) {
- ERRDRV("testvnic option no longer supported: (status = %d)\n",
- x);
POSTCODE_LINUX_3(CHIPSET_INIT_FAILURE_PC, x, DIAG_SEVERITY_ERR);
rc = x;
goto Away;
spar_controlvm_channel_protocol_uuid);
if (SPAR_CONTROLVM_CHANNEL_OK_CLIENT(
visorchannel_get_header(ControlVm_channel))) {
- LOGINF("Channel %s (ControlVm) discovered",
- visorchannel_id(ControlVm_channel, s));
initialize_controlvm_payload();
} else {
- LOGERR("controlvm channel is invalid");
visorchannel_destroy(ControlVm_channel);
ControlVm_channel = NULL;
return -ENODEV;
}
} else {
- LOGERR("no controlvm channel discovered");
return -ENODEV;
}
MajorDev = MKDEV(visorchipset_major, 0);
rc = visorchipset_file_init(MajorDev, &ControlVm_channel);
if (rc < 0) {
- ERRDRV("visorchipset_file_init(MajorDev, &ControlVm_channel): error (status=%d)\n", rc);
POSTCODE_LINUX_2(CHIPSET_INIT_FAILURE_PC, DIAG_SEVERITY_ERR);
goto Away;
}
sizeof(struct putfile_buffer_entry),
0, SLAB_HWCACHE_ALIGN, NULL);
if (!Putfile_buffer_list_pool) {
- ERRDRV("failed to alloc Putfile_buffer_list_pool: (status=-1)\n");
POSTCODE_LINUX_2(CHIPSET_INIT_FAILURE_PC, DIAG_SEVERITY_ERR);
rc = -1;
goto Away;
}
- if (visorchipset_disable_controlvm) {
- LOGINF("visorchipset_init:controlvm disabled");
- } else {
+ if (!visorchipset_disable_controlvm) {
/* if booting in a crash kernel */
if (visorchipset_crash_kernel)
INIT_DELAYED_WORK(&Periodic_controlvm_work,
create_singlethread_workqueue("visorchipset_controlvm");
if (Periodic_controlvm_workqueue == NULL) {
- ERRDRV("cannot create controlvm workqueue: (status=%d)\n",
- -ENOMEM);
POSTCODE_LINUX_2(CREATE_WORKQUEUE_FAILED_PC,
DIAG_SEVERITY_ERR);
rc = -ENOMEM;
goto Away;
}
Most_recent_message_jiffies = jiffies;
- Poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
+ poll_jiffies = POLLJIFFIES_CONTROLVMCHANNEL_FAST;
rc = queue_delayed_work(Periodic_controlvm_workqueue,
- &Periodic_controlvm_work, Poll_jiffies);
+ &Periodic_controlvm_work, poll_jiffies);
if (rc < 0) {
- ERRDRV("queue_delayed_work(Periodic_controlvm_workqueue, &Periodic_controlvm_work, Poll_jiffies): error (status=%d)\n", rc);
POSTCODE_LINUX_2(QUEUE_DELAYED_WORK_PC,
DIAG_SEVERITY_ERR);
goto Away;
Visorchipset_platform_device.dev.devt = MajorDev;
if (platform_device_register(&Visorchipset_platform_device) < 0) {
- ERRDRV("platform_device_register(visorchipset) failed: (status=-1)\n");
POSTCODE_LINUX_2(DEVICE_REGISTER_FAILURE_PC, DIAG_SEVERITY_ERR);
rc = -1;
goto Away;
}
- LOGINF("visorchipset device created");
POSTCODE_LINUX_2(CHIPSET_INIT_SUCCESS_PC, POSTCODE_SEVERITY_INFO);
rc = 0;
Away:
if (rc) {
- LOGERR("visorchipset_init failed");
POSTCODE_LINUX_3(CHIPSET_INIT_FAILURE_PC, rc,
POSTCODE_SEVERITY_ERR);
}
static void
visorchipset_exit(void)
{
- char s[99];
-
POSTCODE_LINUX_2(DRIVER_EXIT_PC, POSTCODE_SEVERITY_INFO);
if (visorchipset_disable_controlvm) {
memset(&g_DelDumpMsgHdr, 0, sizeof(struct controlvm_message_header));
- LOGINF("Channel %s (ControlVm) disconnected",
- visorchannel_id(ControlVm_channel, s));
visorchannel_destroy(ControlVm_channel);
visorchipset_file_cleanup();
POSTCODE_LINUX_2(DRIVER_EXIT_PC, POSTCODE_SEVERITY_INFO);
- LOGINF("chipset driver unloaded");
}
module_param_named(testvnic, visorchipset_testvnic, int, S_IRUGO);
config UNISYS_VISORUTIL
tristate "Unisys visorutil driver"
- depends on UNISYSSPAR && HAS_IOMEM
---help---
If you say Y here, you will enable the Unisys visorutil driver.
struct charqueue *visor_charqueue_create(ulong nslots)
{
int alloc_size = sizeof(struct charqueue) + nslots + 1;
- struct charqueue *cq = kmalloc(alloc_size, GFP_KERNEL|__GFP_NORETRY);
+ struct charqueue *cq;
- if (cq == NULL) {
- ERRDRV("visor_charqueue_create allocation failed (alloc_size=%d)",
- alloc_size);
+ cq = kmalloc(alloc_size, GFP_KERNEL|__GFP_NORETRY);
+ if (cq == NULL)
return NULL;
- }
cq->alloc_size = alloc_size;
cq->nslots = nslots;
cq->head = 0;
#ifndef __CHARQUEUE_H__
#define __CHARQUEUE_H__
-#include "uniklog.h"
#include "timskmod.h"
/* struct charqueue is an opaque structure to users.
#include <linux/proc_fs.h>
-#include "uniklog.h"
#include "timskmod.h"
#include "easyproc.h"
createProcDir(char *name, struct proc_dir_entry *parent)
{
struct proc_dir_entry *p = proc_mkdir_mode(name, S_IFDIR, parent);
-
- if (p == NULL)
- ERRDRV("failed to create /proc directory %s", name);
return p;
}
{
memset(pdriver, 0, sizeof(struct easyproc_driver_info));
pdriver->ProcId = procId;
- if (pdriver->ProcId == NULL)
- ERRDRV("ProcId cannot be NULL (trouble ahead)!");
pdriver->Show_driver_info = show_driver_info;
pdriver->Show_device_info = show_device_info;
if (pdriver->ProcDir == NULL)
proc_create_data("diag", 0,
pdriver->ProcDriverDir,
&proc_fops_driver, pdriver);
- if (pdriver->ProcDriverDiagFile == NULL)
- ERRDRV("failed to register /proc/%s/driver/diag entry",
- pdriver->ProcId);
}
}
EXPORT_SYMBOL_GPL(visor_easyproc_InitDriver);
p->procDevicexDiagFile =
proc_create_data("diag", 0, p->procDevicexDir,
&proc_fops_device, p);
- if (p->procDevicexDiagFile == NULL)
- ERRDEVX(devno, "failed to register /proc/%s/device/%d/diag entry",
- pdriver->ProcId, devno
- );
}
memset(&(p->device_property_info[0]), 0,
sizeof(p->device_property_info));
size_t i;
struct easyproc_device_property_info *px = NULL;
- if (p->procDevicexDir == NULL) {
- ERRDRV("state error");
+ if (p->procDevicexDir == NULL)
return;
- }
for (i = 0; i < ARRAY_SIZE(p->device_property_info); i++) {
if (p->device_property_info[i].procEntry == NULL) {
px = &(p->device_property_info[i]);
break;
}
}
- if (!px) {
- ERRDEVX(p->devno, "too many device properties");
+ if (!px)
return;
- }
+
px->devdata = p->devdata;
px->pdriver = p->pdriver;
px->procEntry = proc_create_data(property_name, 0, p->procDevicexDir,
&proc_fops_device_property, px);
if (strlen(property_name)+1 > sizeof(px->property_name)) {
- ERRDEVX(p->devno, "device property name %s too long",
- property_name);
return;
}
strcpy(px->property_name, property_name);
if (px->procEntry == NULL) {
- ERRDEVX(p->devno,
- "failed to register /proc/%s/device/%d/%s entry",
- p->pdriver->ProcId, p->devno, property_name);
return;
}
px->show_device_property_info = show_property_info;
* channel memory (in main memory of the host system) from code running in
* a virtual partition.
*/
-#include "uniklog.h"
#include "timskmod.h"
#include "memregion.h"
visor_memregion_create(HOSTADDRESS physaddr, ulong nbytes)
{
struct memregion *rc = NULL;
- struct memregion *memregion = kzalloc(sizeof(*memregion),
- GFP_KERNEL | __GFP_NORETRY);
- if (memregion == NULL) {
- ERRDRV("visor_memregion_create allocation failed");
+ struct memregion *memregion;
+
+ memregion = kzalloc(sizeof(*memregion), GFP_KERNEL | __GFP_NORETRY);
+ if (memregion == NULL)
return NULL;
- }
+
memregion->physaddr = physaddr;
memregion->nbytes = nbytes;
memregion->overlapped = FALSE;
{
struct memregion *memregion = NULL;
- if (parent == NULL) {
- ERRDRV("%s parent is NULL", __func__);
+ if (parent == NULL)
return NULL;
- }
- if (parent->mapped == NULL) {
- ERRDRV("%s parent is not mapped!", __func__);
+
+ if (parent->mapped == NULL)
return NULL;
- }
+
if ((offset >= parent->nbytes) ||
- ((offset + nbytes) >= parent->nbytes)) {
- ERRDRV("%s range (%lu,%lu) out of parent range",
- __func__, offset, nbytes);
+ ((offset + nbytes) >= parent->nbytes))
return NULL;
- }
+
memregion = kzalloc(sizeof(*memregion), GFP_KERNEL|__GFP_NORETRY);
- if (memregion == NULL) {
- ERRDRV("%s allocation failed", __func__);
+ if (memregion == NULL)
return NULL;
- }
memregion->physaddr = parent->physaddr + offset;
memregion->nbytes = nbytes;
ulong nbytes = memregion->nbytes;
memregion->requested = FALSE;
- if (!request_mem_region(physaddr, nbytes, MYDRVNAME))
- ERRDRV("cannot reserve channel memory @0x%lx for 0x%lx-- no big deal",
- physaddr, nbytes);
- else
+ if (request_mem_region(physaddr, nbytes, MYDRVNAME))
memregion->requested = TRUE;
memregion->mapped = ioremap_cache(physaddr, nbytes);
- if (memregion->mapped == NULL) {
- ERRDRV("cannot ioremap_cache channel memory @0x%lx for 0x%lx",
- physaddr, nbytes);
+ if (!memregion->mapped)
return FALSE;
- }
return TRUE;
}
struct memregion *memregion, ulong offset,
void *local, ulong nbytes)
{
- if (offset + nbytes > memregion->nbytes) {
- ERRDRV("memregion_readwrite offset out of range!!");
+ if (offset + nbytes > memregion->nbytes)
return -EIO;
- }
+
if (is_write)
memcpy_toio(memregion->mapped + offset, local, nbytes);
else
* Helper functions to schedule periodic work in Linux kernel mode.
*/
-#include "uniklog.h"
#include "timskmod.h"
#include "periodic_work.h"
goto unlock;
} else if (queue_delayed_work(pw->workqueue, &pw->work,
pw->jiffy_interval) < 0) {
- ERRDEV(pw->devnam, "queue_delayed_work failed!");
pw->is_scheduled = FALSE;
rc = FALSE;
goto unlock;
goto unlock;
}
if (pw->want_to_stop) {
- ERRDEV(pw->devnam,
- "dev_start_periodic_work failed!");
rc = FALSE;
goto unlock;
}
INIT_DELAYED_WORK(&pw->work, &periodic_work_func);
if (queue_delayed_work(pw->workqueue, &pw->work,
pw->jiffy_interval) < 0) {
- ERRDEV(pw->devnam, "%s queue_delayed_work failed!", __func__);
rc = FALSE;
goto unlock;
}
/* We get here if the delayed work was pending as
* delayed work, but was NOT run.
*/
- ASSERT(pw->is_scheduled);
+ WARN_ON(!pw->is_scheduled);
pw->is_scheduled = FALSE;
} else {
/* If we get here, either the delayed work:
}
if (pw->is_scheduled) {
write_unlock(&pw->lock);
- WARNDEV(pw->devnam,
- "waiting for delayed work...");
- /* We rely on the delayed work function running here,
- * and eventually calling
- * visor_periodic_work_nextperiod(),
- * which will see that want_to_stop is set, and
- * subsequently clear is_scheduled.
- */
SLEEPJIFFIES(10);
write_lock(&pw->lock);
} else {
{
struct proc_dir_entry *p = proc_mkdir_mode(name, S_IFDIR, parent);
- if (p == NULL)
- ERRDRV("failed to create /proc directory %s", name);
return p;
}
{
struct proc_dir_entry *p = proc_create_data(name, 0, parent,
fops, data);
- if (p == NULL)
- ERRDRV("failed to create /proc file %s", name);
return p;
}
MYPROCTYPE *rc = NULL, *type = NULL;
struct proc_dir_entry *parent = NULL;
- if (procDirRoot == NULL) {
- ERRDRV("procDirRoot cannot be NULL!\n");
+ if (procDirRoot == NULL)
goto Away;
- }
- if (name == NULL || name[0] == NULL) {
- ERRDRV("name must contain at least 1 node name!\n");
+
+ if (name == NULL || name[0] == NULL)
goto Away;
- }
+
type = kzalloc(sizeof(MYPROCTYPE), GFP_KERNEL | __GFP_NORETRY);
- if (type == NULL) {
- ERRDRV("out of memory\n");
+ if (type == NULL)
goto Away;
- }
+
type->name = name;
type->propertyNames = propertyNames;
type->nProperties = 0;
type->nProperties++;
while (type->name[type->nNames] != NULL)
type->nNames++;
- type->procDirs = kzalloc((type->nNames + 1) *
+ type->procDirs = kcalloc((type->nNames + 1),
sizeof(struct proc_dir_entry *),
GFP_KERNEL | __GFP_NORETRY);
- if (type->procDirs == NULL) {
- ERRDRV("out of memory\n");
+ if (type->procDirs == NULL)
goto Away;
- }
parent = procDirRoot;
for (i = 0; i < type->nNames; i++) {
type->procDirs[i] = createProcDir(type->name[i], parent);
MYPROCOBJECT *obj = NULL, *rc = NULL;
int i = 0;
- if (type == NULL) {
- ERRDRV("type cannot be NULL\n");
+ if (type == NULL)
goto Away;
- }
+
obj = kzalloc(sizeof(MYPROCOBJECT), GFP_KERNEL | __GFP_NORETRY);
- if (obj == NULL) {
- ERRDRV("out of memory\n");
+ if (obj == NULL)
goto Away;
- }
+
obj->type = type;
obj->context = context;
if (name == NULL) {
obj->name = kmalloc(obj->namesize, GFP_KERNEL | __GFP_NORETRY);
if (obj->name == NULL) {
obj->namesize = 0;
- ERRDRV("out of memory\n");
goto Away;
}
strcpy(obj->name, name);
goto Away;
}
obj->procDirPropertyContexts =
- kzalloc((type->nProperties + 1) *
+ kcalloc((type->nProperties + 1),
sizeof(struct proc_dir_entry_context),
GFP_KERNEL | __GFP_NORETRY);
- if (obj->procDirPropertyContexts == NULL) {
- ERRDRV("out of memory\n");
+ if (obj->procDirPropertyContexts == NULL)
goto Away;
- }
- obj->procDirProperties = kzalloc((type->nProperties + 1) *
+ obj->procDirProperties = kcalloc((type->nProperties + 1),
sizeof(struct proc_dir_entry *),
GFP_KERNEL | __GFP_NORETRY);
- if (obj->procDirProperties == NULL) {
- ERRDRV("out of memory\n");
+ if (obj->procDirProperties == NULL)
goto Away;
- }
for (i = 0; i < type->nProperties; i++) {
obj->procDirPropertyContexts[i].procObject = obj;
obj->procDirPropertyContexts[i].propertyIndex = i;
{
struct proc_dir_entry_context *ctx = seq->private;
- if (ctx == NULL) {
- ERRDRV("I don't have a freakin' clue...");
+ if (ctx == NULL)
return 0;
- }
(*ctx->show_property)(seq, ctx->procObject->context,
ctx->propertyIndex);
return 0;
* details.
*/
-#include "uniklog.h"
#include "timskmod.h"
#define MYDRVNAME "timskmodutils"
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/errno.h>
*/
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#include <linux/atomic.h>
#include <linux/cdev.h>
#include <linux/delay.h>
#include <linux/device.h>
#include "vme_user.h"
-static DEFINE_MUTEX(vme_user_mutex);
static const char driver_name[] = "vme_user";
static int bus[VME_USER_BUS_MAX];
struct device *device; /* Sysfs device */
struct vme_resource *resource; /* VME resource */
int users; /* Number of current users */
+ int mmap_count; /* Number of current mmap's */
};
static struct image_desc image[VME_DEVS];
loff_t *);
static loff_t vme_user_llseek(struct file *, loff_t, int);
static long vme_user_unlocked_ioctl(struct file *, unsigned int, unsigned long);
+static int vme_user_mmap(struct file *file, struct vm_area_struct *vma);
+
+static void vme_user_vm_open(struct vm_area_struct *vma);
+static void vme_user_vm_close(struct vm_area_struct *vma);
static int vme_user_match(struct vme_dev *);
static int vme_user_probe(struct vme_dev *);
.llseek = vme_user_llseek,
.unlocked_ioctl = vme_user_unlocked_ioctl,
.compat_ioctl = vme_user_unlocked_ioctl,
+ .mmap = vme_user_mmap,
+};
+
+struct vme_user_vma_priv {
+ unsigned int minor;
+ atomic_t refcnt;
+};
+
+static const struct vm_operations_struct vme_user_vm_ops = {
+ .open = vme_user_vm_open,
+ .close = vme_user_vm_close,
};
case VME_SET_MASTER:
+ if (image[minor].mmap_count != 0) {
+ pr_warn("Can't adjust mapped window\n");
+ return -EPERM;
+ }
+
copied = copy_from_user(&master, argp, sizeof(master));
if (copied != 0) {
pr_warn("Partial copy from userspace\n");
vme_user_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
int ret;
+ struct inode *inode = file_inode(file);
+ unsigned int minor = MINOR(inode->i_rdev);
- mutex_lock(&vme_user_mutex);
- ret = vme_user_ioctl(file_inode(file), file, cmd, arg);
- mutex_unlock(&vme_user_mutex);
+ mutex_lock(&image[minor].mutex);
+ ret = vme_user_ioctl(inode, file, cmd, arg);
+ mutex_unlock(&image[minor].mutex);
return ret;
}
+static void vme_user_vm_open(struct vm_area_struct *vma)
+{
+ struct vme_user_vma_priv *vma_priv = vma->vm_private_data;
+
+ atomic_inc(&vma_priv->refcnt);
+}
+
+static void vme_user_vm_close(struct vm_area_struct *vma)
+{
+ struct vme_user_vma_priv *vma_priv = vma->vm_private_data;
+ unsigned int minor = vma_priv->minor;
+
+ if (!atomic_dec_and_test(&vma_priv->refcnt))
+ return;
+
+ mutex_lock(&image[minor].mutex);
+ image[minor].mmap_count--;
+ mutex_unlock(&image[minor].mutex);
+
+ kfree(vma_priv);
+}
+
+static int vme_user_master_mmap(unsigned int minor, struct vm_area_struct *vma)
+{
+ int err;
+ struct vme_user_vma_priv *vma_priv;
+
+ mutex_lock(&image[minor].mutex);
+
+ err = vme_master_mmap(image[minor].resource, vma);
+ if (err) {
+ mutex_unlock(&image[minor].mutex);
+ return err;
+ }
+
+ vma_priv = kmalloc(sizeof(struct vme_user_vma_priv), GFP_KERNEL);
+ if (vma_priv == NULL) {
+ mutex_unlock(&image[minor].mutex);
+ return -ENOMEM;
+ }
+
+ vma_priv->minor = minor;
+ atomic_set(&vma_priv->refcnt, 1);
+ vma->vm_ops = &vme_user_vm_ops;
+ vma->vm_private_data = vma_priv;
+
+ image[minor].mmap_count++;
+
+ mutex_unlock(&image[minor].mutex);
+
+ return 0;
+}
+
+static int vme_user_mmap(struct file *file, struct vm_area_struct *vma)
+{
+ unsigned int minor = MINOR(file_inode(file)->i_rdev);
+
+ if (type[minor] == MASTER_MINOR)
+ return vme_user_master_mmap(minor, vma);
+
+ return -ENODEV;
+}
+
/*
* Unallocate a previously allocated buffer
if (byRFType == RF_RFMD2959) {
if (byLocalID <= REV_ID_VT3253_A1) {
for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253InitTab_RFMD[ii][0], byVT3253InitTab_RFMD[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253InitTab_RFMD[ii][0],
+ byVT3253InitTab_RFMD[ii][1]);
} else {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_RFMD[ii][0], byVT3253B0_RFMD[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_RFMD[ii][0],
+ byVT3253B0_RFMD[ii][1]);
for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC4_RFMD2959[ii][0], byVT3253B0_AGC4_RFMD2959[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC4_RFMD2959[ii][0],
+ byVT3253B0_AGC4_RFMD2959[ii][1]);
VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23);
MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0));
priv->ldBmThreshold[3] = 0;
} else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S)) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AIROHA2230[ii][0],
+ byVT3253B0_AIROHA2230[ii][1]);
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
priv->abyBBVGA[0] = 0x1C;
priv->abyBBVGA[1] = 0x10;
priv->ldBmThreshold[3] = 0;
} else if (byRFType == RF_UW2451) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_UW2451[ii][0],
+ byVT3253B0_UW2451[ii][1]);
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0],
+ byVT3253B0_AGC[ii][1]);
VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23);
MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0));
priv->ldBmThreshold[3] = 0;
} else if (byRFType == RF_UW2452) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_UW2451[ii][0], byVT3253B0_UW2451[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_UW2451[ii][0],
+ byVT3253B0_UW2451[ii][1]);
/* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
/*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
bResult &= BBbWriteEmbedded(priv, 0xb0, 0x58);
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
priv->abyBBVGA[0] = 0x14;
priv->abyBBVGA[1] = 0x0A;
} else if (byRFType == RF_VT3226) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AIROHA2230[ii][0],
+ byVT3253B0_AIROHA2230[ii][1]);
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
priv->abyBBVGA[0] = 0x1C;
priv->abyBBVGA[1] = 0x10;
/* {{ RobertYu: 20050104 */
} else if (byRFType == RF_AIROHA7230) {
for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AIROHA2230[ii][0], byVT3253B0_AIROHA2230[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AIROHA2230[ii][0],
+ byVT3253B0_AIROHA2230[ii][1]);
/* {{ RobertYu:20050223, request by JerryChung */
/* }} */
for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
- bResult &= BBbWriteEmbedded(priv, byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
+ bResult &= BBbWriteEmbedded(priv,
+ byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
priv->abyBBVGA[0] = 0x1C;
priv->abyBBVGA[1] = 0x10;
/* clear NAV */
MACvRegBitsOn(pDevice->PortOffset, MAC_REG_MACCR, MACCR_CLRNAV);
- /* TX_PE will reserve 3 us for MAX2829 A mode only, it is for better TX throughput */
+ /* TX_PE will reserve 3 us for MAX2829 A mode only,
+ it is for better TX throughput */
if (pDevice->byRFType == RF_AIROHA7230)
RFbAL7230SelectChannelPostProcess(pDevice, pDevice->byCurrentCh,
/* set HW default power register */
MACvSelectPage1(pDevice->PortOffset);
RFbSetPower(pDevice, RATE_1M, pDevice->byCurrentCh);
- VNSvOutPortB(pDevice->PortOffset + MAC_REG_PWRCCK, pDevice->byCurPwr);
+ VNSvOutPortB(pDevice->PortOffset + MAC_REG_PWRCCK,
+ pDevice->byCurPwr);
RFbSetPower(pDevice, RATE_6M, pDevice->byCurrentCh);
- VNSvOutPortB(pDevice->PortOffset + MAC_REG_PWROFDM, pDevice->byCurPwr);
+ VNSvOutPortB(pDevice->PortOffset + MAC_REG_PWROFDM,
+ pDevice->byCurPwr);
MACvSelectPage0(pDevice->PortOffset);
spin_unlock_irqrestore(&pDevice->lock, flags);
#include <linux/slab.h>
/*--------------------- Static Definitions -------------------------*/
-//
-// Define module options
-//
+/*
+ * Define module options
+ */
MODULE_AUTHOR("VIA Networking Technologies, Inc., <lyndonchen@vntek.com.tw>");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("VIA Networking Solomon-A/B/G Wireless LAN Adapter Driver");
DEVICE_PARAM(BasebandType, "baseband type");
-//
-// Static vars definitions
-//
+/*
+ * Static vars definitions
+ */
static CHIP_INFO chip_info_table[] = {
{ VT3253, "VIA Networking Solomon-A/B/G Wireless LAN Adapter ",
256, 1, DEVICE_FLAGS_IP_ALIGN|DEVICE_FLAGS_TX_ALIGN },
pr_debug(" byBBType= %d\n", (int)pDevice->byBBType);
}
-//
-// Initialisation of MAC & BBP registers
-//
+/*
+ * Initialisation of MAC & BBP registers
+ */
static void device_init_registers(struct vnt_private *pDevice)
{
void *vir_pool;
/*allocate all RD/TD rings a single pool*/
- vir_pool = pci_zalloc_consistent(pDevice->pcid,
+ vir_pool = dma_zalloc_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
pDevice->sOpts.nTxDescs[1] * sizeof(STxDesc),
- &pDevice->pool_dma);
+ &pDevice->pool_dma, GFP_ATOMIC);
if (vir_pool == NULL) {
dev_err(&pDevice->pcid->dev, "allocate desc dma memory failed\n");
return false;
pDevice->rd1_pool_dma = pDevice->rd0_pool_dma +
pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc);
- pDevice->tx0_bufs = pci_zalloc_consistent(pDevice->pcid,
+ pDevice->tx0_bufs = dma_zalloc_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
CB_BEACON_BUF_SIZE +
CB_MAX_BUF_SIZE,
- &pDevice->tx_bufs_dma0);
+ &pDevice->tx_bufs_dma0,
+ GFP_ATOMIC);
if (pDevice->tx0_bufs == NULL) {
dev_err(&pDevice->pcid->dev, "allocate buf dma memory failed\n");
- pci_free_consistent(pDevice->pcid,
+ dma_free_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
pDevice->td1_pool_dma = pDevice->td0_pool_dma +
pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc);
- // vir_pool: pvoid type
+ /* vir_pool: pvoid type */
pDevice->apTD0Rings = vir_pool
+ pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc)
+ pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc);
static void device_free_rings(struct vnt_private *pDevice)
{
- pci_free_consistent(pDevice->pcid,
+ dma_free_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nRxDescs0 * sizeof(SRxDesc) +
pDevice->sOpts.nRxDescs1 * sizeof(SRxDesc) +
pDevice->sOpts.nTxDescs[0] * sizeof(STxDesc) +
);
if (pDevice->tx0_bufs)
- pci_free_consistent(pDevice->pcid,
+ dma_free_coherent(&pDevice->pcid->dev,
pDevice->sOpts.nTxDescs[0] * PKT_BUF_SZ +
pDevice->sOpts.nTxDescs[1] * PKT_BUF_SZ +
CB_BEACON_BUF_SIZE +
PSRxDesc pDesc = &(pDevice->aRD0Ring[i]);
PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
- pci_unmap_single(pDevice->pcid, pRDInfo->skb_dma,
- pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
+ pDevice->rx_buf_sz, DMA_FROM_DEVICE);
dev_kfree_skb(pRDInfo->skb);
PSRxDesc pDesc = &(pDevice->aRD1Ring[i]);
PDEVICE_RD_INFO pRDInfo = pDesc->pRDInfo;
- pci_unmap_single(pDevice->pcid, pRDInfo->skb_dma,
- pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pRDInfo->skb_dma,
+ pDevice->rx_buf_sz, DMA_FROM_DEVICE);
dev_kfree_skb(pRDInfo->skb);
PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
- pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma,
- pTDInfo->skb->len, PCI_DMA_TODEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
+ pTDInfo->skb->len, DMA_TO_DEVICE);
if (pTDInfo->skb)
dev_kfree_skb(pTDInfo->skb);
PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma))
- pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma,
- pTDInfo->skb->len, PCI_DMA_TODEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
+ pTDInfo->skb->len, DMA_TO_DEVICE);
if (pTDInfo->skb)
dev_kfree_skb(pTDInfo->skb);
ASSERT(pRDInfo->skb);
pRDInfo->skb_dma =
- pci_map_single(pDevice->pcid,
+ dma_map_single(&pDevice->pcid->dev,
skb_put(pRDInfo->skb, skb_tailroom(pRDInfo->skb)),
- pDevice->rx_buf_sz, PCI_DMA_FROMDEVICE);
+ pDevice->rx_buf_sz, DMA_FROM_DEVICE);
*((unsigned int *)&(pRD->m_rd0RD0)) = 0; /* FIX cast */
byTsr0 = pTD->m_td0TD0.byTSR0;
byTsr1 = pTD->m_td0TD0.byTSR1;
- //Only the status of first TD in the chain is correct
+ /* Only the status of first TD in the chain is correct */
if (pTD->m_td1TD1.byTCR & TCR_STP) {
if ((pTD->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB) != 0) {
PDEVICE_TD_INFO pTDInfo = pDesc->pTDInfo;
struct sk_buff *skb = pTDInfo->skb;
- // pre-allocated buf_dma can't be unmapped.
+ /* pre-allocated buf_dma can't be unmapped. */
if (pTDInfo->skb_dma && (pTDInfo->skb_dma != pTDInfo->buf_dma)) {
- pci_unmap_single(pDevice->pcid, pTDInfo->skb_dma, skb->len,
- PCI_DMA_TODEVICE);
+ dma_unmap_single(&pDevice->pcid->dev, pTDInfo->skb_dma,
+ skb->len, DMA_TO_DEVICE);
}
if (pTDInfo->byFlags & TD_FLAGS_NETIF_SKB)
spin_lock_irqsave(&pDevice->lock, flags);
- //Make sure current page is 0
+ /* Make sure current page is 0 */
VNSvInPortB(pDevice->PortOffset + MAC_REG_PAGE1SEL, &byOrgPageSel);
if (byOrgPageSel == 1)
MACvSelectPage0(pDevice->PortOffset);
byOrgPageSel = 0;
MACvReadMIBCounter(pDevice->PortOffset, &dwMIBCounter);
- // TBD....
- // Must do this after doing rx/tx, cause ISR bit is slow
- // than RD/TD write back
- // update ISR counter
+ /*
+ * TBD....
+ * Must do this after doing rx/tx, cause ISR bit is slow
+ * than RD/TD write back
+ * update ISR counter
+ */
STAvUpdate802_11Counter(&pDevice->s802_11Counter, &pDevice->scStatistic, dwMIBCounter);
while (pDevice->dwIsr != 0) {
STAvUpdateIsrStatCounter(&pDevice->scStatistic, pDevice->dwIsr);
skb = rd_info->skb;
- pci_unmap_single(priv->pcid, rd_info->skb_dma,
- priv->rx_buf_sz, PCI_DMA_FROMDEVICE);
+ dma_unmap_single(&priv->pcid->dev, rd_info->skb_dma,
+ priv->rx_buf_sz, DMA_FROM_DEVICE);
frame_size = le16_to_cpu(curr_rd->m_rd1RD1.wReqCount)
- cpu_to_le16(curr_rd->m_rd0RD0.wResCount);
int vnt_set_keys(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
struct ieee80211_vif *vif, struct ieee80211_key_conf *key);
-#endif // __KEY_H__
+#endif /* __KEY_H__ */
*/
void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
{
- // set SRT
+ /* set SRT */
VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
}
*/
void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
{
- // set LRT
+ /* set LRT */
VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
}
ASSERT(byLoopbackMode < 3);
byLoopbackMode <<= 6;
- // set TCR
+ /* set TCR */
VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
byOrgValue = byOrgValue & 0x3F;
byOrgValue = byOrgValue | byLoopbackMode;
{
int ii;
- // read page0 register
+ /* read page0 register */
for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++)
VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
MACvSelectPage1(dwIoBase);
- // read page1 register
+ /* read page1 register */
for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
int ii;
MACvSelectPage1(dwIoBase);
- // restore page1
+ /* restore page1 */
for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
MACvSelectPage0(dwIoBase);
- // restore RCR,TCR,IMR...
+ /* restore RCR,TCR,IMR... */
for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
- // restore MAC Config.
+ /* restore MAC Config. */
for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
- // restore PS Config.
+ /* restore PS Config. */
for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
- // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
+ /* restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR */
VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
unsigned char byData;
unsigned short ww;
- // turn on HOSTCR_SOFTRST, just write 0x01 to reset
+ /* turn on HOSTCR_SOFTRST, just write 0x01 to reset */
VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
bool bRetVal;
- // PATCH....
- // save some important register's value, then do
- // reset, then restore register's value
-
- // save MAC context
+ /* PATCH....
+ * save some important register's value, then do
+ * reset, then restore register's value
+ */
+ /* save MAC context */
MACvSaveContext(dwIoBase, abyTmpRegData);
- // do reset
+ /* do reset */
bRetVal = MACbSoftwareReset(dwIoBase);
- // restore MAC context, except CR0
+ /* restore MAC context, except CR0 */
MACvRestoreContext(dwIoBase, abyTmpRegData);
return bRetVal;
unsigned long dwData;
unsigned char byData;
- // turn off wow temp for turn off Rx safely
+ /* turn off wow temp for turn off Rx safely */
- // Clear RX DMA0,1
+ /* Clear RX DMA0,1 */
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
return false;
}
- // try to safe shutdown RX
+ /* try to safe shutdown RX */
MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
- // W_MAX_TIMEOUT is the timeout period
+ /* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
if (!(byData & HOSTCR_RXONST))
unsigned long dwData;
unsigned char byData;
- // Clear TX DMA
- //Tx0
+ /* Clear TX DMA */
+ /* Tx0 */
VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
- //AC0
+ /* AC0 */
VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
return false;
}
- // try to safe shutdown TX
+ /* try to safe shutdown TX */
MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
- // W_MAX_TIMEOUT is the timeout period
+ /* W_MAX_TIMEOUT is the timeout period */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
if (!(byData & HOSTCR_TXONST))
*/
bool MACbShutdown(void __iomem *dwIoBase)
{
- // disable MAC IMR
+ /* disable MAC IMR */
MACvIntDisable(dwIoBase);
MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
- // stop the adapter
+ /* stop the adapter */
if (!MACbSafeStop(dwIoBase)) {
MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
return false;
*/
void MACvInitialize(void __iomem *dwIoBase)
{
- // clear sticky bits
+ /* clear sticky bits */
MACvClearStckDS(dwIoBase);
- // disable force PME-enable
+ /* disable force PME-enable */
VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
- // only 3253 A
+ /* only 3253 A */
- // do reset
+ /* do reset */
MACbSoftwareReset(dwIoBase);
- // reset TSF counter
+ /* reset TSF counter */
VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
- // enable TSF counter
+ /* enable TSF counter */
VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
}
* Return Value: none
*
*/
-//TxDMA1 = AC0DMA
+/* TxDMA1 = AC0DMA */
void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
{
unsigned short ww;
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
- for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
+ for (ii = 0; ii < 66; ii++) { /* assume max PCI clock is 66Mhz */
for (uu = 0; uu < uDelay; uu++) {
VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
if ((byValue == 0) ||
{
unsigned char byOrgValue;
unsigned int ww;
- // Read PSCTL
+ /* Read PSCTL */
if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS))
return true;
- // Disable PS
+ /* Disable PS */
MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
- // Check if SyncFlushOK
+ /* Check if SyncFlushOK */
for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
VNSvInPortB(dwIoBase + MAC_REG_PSCTL, &byOrgValue);
if (byOrgValue & PSCTL_WAKEDONE)
wOffset += (uKeyIdx * 4);
for (ii = 0; ii < 4; ii++) {
- // always push 128 bits
+ /* always push 128 bits */
pr_debug("3.(%d) wOffset: %d, Data: %X\n",
ii, wOffset+ii, *pdwKey);
VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
/**********************/
/* ABNORMAL interrupt */
/**********************/
- // not any IMR bit invoke irq
+ /* not any IMR bit invoke irq */
if (dwIsr == 0) {
pStatistic->ISRStat.dwIsrUnknown++;
return;
}
-//Added by Kyle
- if (dwIsr & ISR_TXDMA0) // ISR, bit0
- pStatistic->ISRStat.dwIsrTx0OK++; // TXDMA0 successful
+/* Added by Kyle */
+ if (dwIsr & ISR_TXDMA0) /* ISR, bit0 */
+ pStatistic->ISRStat.dwIsrTx0OK++; /* TXDMA0 successful */
- if (dwIsr & ISR_AC0DMA) // ISR, bit1
- pStatistic->ISRStat.dwIsrAC0TxOK++; // AC0DMA successful
+ if (dwIsr & ISR_AC0DMA) /* ISR, bit1 */
+ pStatistic->ISRStat.dwIsrAC0TxOK++; /* AC0DMA successful */
- if (dwIsr & ISR_BNTX) // ISR, bit2
- pStatistic->ISRStat.dwIsrBeaconTxOK++; // BeaconTx successful
+ if (dwIsr & ISR_BNTX) /* ISR, bit2 */
+ pStatistic->ISRStat.dwIsrBeaconTxOK++; /* BeaconTx successful */
- if (dwIsr & ISR_RXDMA0) // ISR, bit3
- pStatistic->ISRStat.dwIsrRx0OK++; // Rx0 successful
+ if (dwIsr & ISR_RXDMA0) /* ISR, bit3 */
+ pStatistic->ISRStat.dwIsrRx0OK++; /* Rx0 successful */
- if (dwIsr & ISR_TBTT) // ISR, bit4
- pStatistic->ISRStat.dwIsrTBTTInt++; // TBTT successful
+ if (dwIsr & ISR_TBTT) /* ISR, bit4 */
+ pStatistic->ISRStat.dwIsrTBTTInt++; /* TBTT successful */
- if (dwIsr & ISR_SOFTTIMER) // ISR, bit6
+ if (dwIsr & ISR_SOFTTIMER) /* ISR, bit6 */
pStatistic->ISRStat.dwIsrSTIMERInt++;
- if (dwIsr & ISR_WATCHDOG) // ISR, bit7
+ if (dwIsr & ISR_WATCHDOG) /* ISR, bit7 */
pStatistic->ISRStat.dwIsrWatchDog++;
- if (dwIsr & ISR_FETALERR) // ISR, bit8
+ if (dwIsr & ISR_FETALERR) /* ISR, bit8 */
pStatistic->ISRStat.dwIsrUnrecoverableError++;
- if (dwIsr & ISR_SOFTINT) // ISR, bit9
- pStatistic->ISRStat.dwIsrSoftInterrupt++; // software interrupt
+ if (dwIsr & ISR_SOFTINT) /* ISR, bit9 */
+ pStatistic->ISRStat.dwIsrSoftInterrupt++; /* software interrupt */
- if (dwIsr & ISR_MIBNEARFULL) // ISR, bit10
+ if (dwIsr & ISR_MIBNEARFULL) /* ISR, bit10 */
pStatistic->ISRStat.dwIsrMIBNearfull++;
- if (dwIsr & ISR_RXNOBUF) // ISR, bit11
- pStatistic->ISRStat.dwIsrRxNoBuf++; // Rx No Buff
+ if (dwIsr & ISR_RXNOBUF) /* ISR, bit11 */
+ pStatistic->ISRStat.dwIsrRxNoBuf++; /* Rx No Buff */
- if (dwIsr & ISR_RXDMA1) // ISR, bit12
- pStatistic->ISRStat.dwIsrRx1OK++; // Rx1 successful
+ if (dwIsr & ISR_RXDMA1) /* ISR, bit12 */
+ pStatistic->ISRStat.dwIsrRx1OK++; /* Rx1 successful */
- if (dwIsr & ISR_SOFTTIMER1) // ISR, bit21
+ if (dwIsr & ISR_SOFTTIMER1) /* ISR, bit21 */
pStatistic->ISRStat.dwIsrSTIMER1Int++;
}
/*--------------------- Static Functions --------------------------*/
/*--------------------- Static Definitions -------------------------*/
-#define CRITICAL_PACKET_LEN 256 // if packet size < 256 -> in-direct send
- // packet size >= 256 -> direct send
+#define CRITICAL_PACKET_LEN 256 /* if packet size < 256 -> in-direct send
+ packet size >= 256 -> direct send */
static const unsigned short wTimeStampOff[2][MAX_RATE] = {
- {384, 288, 226, 209, 54, 43, 37, 31, 28, 25, 24, 23}, // Long Preamble
- {384, 192, 130, 113, 54, 43, 37, 31, 28, 25, 24, 23}, // Short Preamble
+ {384, 288, 226, 209, 54, 43, 37, 31, 28, 25, 24, 23}, /* Long Preamble */
+ {384, 192, 130, 113, 54, 43, 37, 31, 28, 25, 24, 23}, /* Short Preamble */
};
static const unsigned short wFB_Opt0[2][5] = {
- {RATE_12M, RATE_18M, RATE_24M, RATE_36M, RATE_48M}, // fallback_rate0
- {RATE_12M, RATE_12M, RATE_18M, RATE_24M, RATE_36M}, // fallback_rate1
+ {RATE_12M, RATE_18M, RATE_24M, RATE_36M, RATE_48M}, /* fallback_rate0 */
+ {RATE_12M, RATE_12M, RATE_18M, RATE_24M, RATE_36M}, /* fallback_rate1 */
};
static const unsigned short wFB_Opt1[2][5] = {
- {RATE_12M, RATE_18M, RATE_24M, RATE_24M, RATE_36M}, // fallback_rate0
- {RATE_6M , RATE_6M, RATE_12M, RATE_12M, RATE_18M}, // fallback_rate1
+ {RATE_12M, RATE_18M, RATE_24M, RATE_24M, RATE_36M}, /* fallback_rate0 */
+ {RATE_6M , RATE_6M, RATE_12M, RATE_12M, RATE_18M}, /* fallback_rate1 */
};
#define RTSDUR_BB 0
unsigned int uDataTime, uAckTime;
uDataTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, cbFrameLength, wRate);
- if (byPktType == PK_TYPE_11B) //llb,CCK mode
+ if (byPktType == PK_TYPE_11B) /* llb,CCK mode */
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, (unsigned short)pDevice->byTopCCKBasicRate);
- else //11g 2.4G OFDM mode & 11a 5G OFDM mode
+ else /* 11g 2.4G OFDM mode & 11a 5G OFDM mode */
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, (unsigned short)pDevice->byTopOFDMBasicRate);
if (bNeedAck)
frame_length, rate, need_ack));
}
-//byFreqType: 0=>5GHZ 1=>2.4GHZ
+/* byFreqType: 0=>5GHZ 1=>2.4GHZ */
static
__le16
s_uGetRTSCTSRsvTime(
uRrvTime = uRTSTime = uCTSTime = uAckTime = uDataTime = 0;
uDataTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, cbFrameLength, wCurrentRate);
- if (byRTSRsvType == 0) { //RTSTxRrvTime_bb
+ if (byRTSRsvType == 0) { /* RTSTxRrvTime_bb */
uRTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 20, pDevice->byTopCCKBasicRate);
uCTSTime = uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
- } else if (byRTSRsvType == 1) { //RTSTxRrvTime_ba, only in 2.4GHZ
+ } else if (byRTSRsvType == 1) { /* RTSTxRrvTime_ba, only in 2.4GHZ */
uRTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 20, pDevice->byTopCCKBasicRate);
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
- } else if (byRTSRsvType == 2) { //RTSTxRrvTime_aa
+ } else if (byRTSRsvType == 2) { /* RTSTxRrvTime_aa */
uRTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 20, pDevice->byTopOFDMBasicRate);
uCTSTime = uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
- } else if (byRTSRsvType == 3) { //CTSTxRrvTime_ba, only in 2.4GHZ
+ } else if (byRTSRsvType == 3) { /* CTSTxRrvTime_ba, only in 2.4GHZ */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
uRrvTime = uCTSTime + uAckTime + uDataTime + 2*pDevice->uSIFS;
return cpu_to_le16((u16)uRrvTime);
}
- //RTSRrvTime
+ /* RTSRrvTime */
uRrvTime = uRTSTime + uCTSTime + uAckTime + uDataTime + 3*pDevice->uSIFS;
return cpu_to_le16((u16)uRrvTime);
}
-//byFreqType 0: 5GHz, 1:2.4Ghz
+/* byFreqType 0: 5GHz, 1:2.4Ghz */
static
unsigned int
s_uGetDataDuration(
unsigned char byFBOption
)
{
- bool bLastFrag = 0;
+ bool bLastFrag = false;
unsigned int uAckTime = 0, uNextPktTime = 0;
if (uFragIdx == (uMACfragNum-1))
- bLastFrag = 1;
+ bLastFrag = true;
switch (byDurType) {
- case DATADUR_B: //DATADUR_B
- if (((uMACfragNum == 1)) || bLastFrag) {//Non Frag or Last Frag
+ case DATADUR_B: /* DATADUR_B */
+ if (((uMACfragNum == 1)) || bLastFrag) {/* Non Frag or Last Frag */
if (bNeedAck) {
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
return pDevice->uSIFS + uAckTime;
} else {
return 0;
}
- } else {//First Frag or Mid Frag
+ } else {/* First Frag or Mid Frag */
if (uFragIdx == (uMACfragNum-2))
uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wRate, bNeedAck);
else
}
break;
- case DATADUR_A: //DATADUR_A
- if (((uMACfragNum == 1)) || bLastFrag) {//Non Frag or Last Frag
+ case DATADUR_A: /* DATADUR_A */
+ if (((uMACfragNum == 1)) || bLastFrag) {/* Non Frag or Last Frag */
if (bNeedAck) {
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
return pDevice->uSIFS + uAckTime;
} else {
return 0;
}
- } else {//First Frag or Mid Frag
+ } else {/* First Frag or Mid Frag */
if (uFragIdx == (uMACfragNum-2))
uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbLastFragmentSize, wRate, bNeedAck);
else
}
break;
- case DATADUR_A_F0: //DATADUR_A_F0
- if (((uMACfragNum == 1)) || bLastFrag) {//Non Frag or Last Frag
+ case DATADUR_A_F0: /* DATADUR_A_F0 */
+ if (((uMACfragNum == 1)) || bLastFrag) {/* Non Frag or Last Frag */
if (bNeedAck) {
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
return pDevice->uSIFS + uAckTime;
} else {
return 0;
}
- } else { //First Frag or Mid Frag
+ } else { /* First Frag or Mid Frag */
if (byFBOption == AUTO_FB_0) {
if (wRate < RATE_18M)
wRate = RATE_18M;
else
uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck);
- } else { // (byFBOption == AUTO_FB_1)
+ } else { /* (byFBOption == AUTO_FB_1) */
if (wRate < RATE_18M)
wRate = RATE_18M;
else if (wRate > RATE_54M)
}
break;
- case DATADUR_A_F1: //DATADUR_A_F1
- if (((uMACfragNum == 1)) || bLastFrag) {//Non Frag or Last Frag
+ case DATADUR_A_F1: /* DATADUR_A_F1 */
+ if (((uMACfragNum == 1)) || bLastFrag) { /* Non Frag or Last Frag */
if (bNeedAck) {
uAckTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
return pDevice->uSIFS + uAckTime;
} else {
return 0;
}
- } else { //First Frag or Mid Frag
+ } else { /* First Frag or Mid Frag */
if (byFBOption == AUTO_FB_0) {
if (wRate < RATE_18M)
wRate = RATE_18M;
else
uNextPktTime = s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck);
- } else { // (byFBOption == AUTO_FB_1)
+ } else { /* (byFBOption == AUTO_FB_1) */
if (wRate < RATE_18M)
wRate = RATE_18M;
else if (wRate > RATE_54M)
return 0;
}
-//byFreqType: 0=>5GHZ 1=>2.4GHZ
+/* byFreqType: 0=>5GHZ 1=>2.4GHZ */
static
__le16
s_uGetRTSCTSDuration(
unsigned int uCTSTime = 0, uDurTime = 0;
switch (byDurType) {
- case RTSDUR_BB: //RTSDuration_bb
+ case RTSDUR_BB: /* RTSDuration_bb */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck);
break;
- case RTSDUR_BA: //RTSDuration_ba
+ case RTSDUR_BA: /* RTSDuration_ba */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck);
break;
- case RTSDUR_AA: //RTSDuration_aa
+ case RTSDUR_AA: /* RTSDuration_aa */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck);
break;
- case CTSDUR_BA: //CTSDuration_ba
+ case CTSDUR_BA: /* CTSDuration_ba */
uDurTime = pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wRate, bNeedAck);
break;
- case RTSDUR_BA_F0: //RTSDuration_ba_f0
+ case RTSDUR_BA_F0: /* RTSDuration_ba_f0 */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = uCTSTime + 2 * pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck);
break;
- case RTSDUR_AA_F0: //RTSDuration_aa_f0
+ case RTSDUR_AA_F0: /* RTSDuration_aa_f0 */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck);
break;
- case RTSDUR_BA_F1: //RTSDuration_ba_f1
+ case RTSDUR_BA_F1: /* RTSDuration_ba_f1 */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopCCKBasicRate);
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck);
break;
- case RTSDUR_AA_F1: //RTSDuration_aa_f1
+ case RTSDUR_AA_F1: /* RTSDuration_aa_f1 */
uCTSTime = BBuGetFrameTime(pDevice->byPreambleType, byPktType, 14, pDevice->byTopOFDMBasicRate);
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = uCTSTime + 2*pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck);
break;
- case CTSDUR_BA_F0: //CTSDuration_ba_f0
+ case CTSDUR_BA_F0: /* CTSDuration_ba_f0 */
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE0][wRate-RATE_18M], bNeedAck);
else if ((byFBOption == AUTO_FB_1) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
break;
- case CTSDUR_BA_F1: //CTSDuration_ba_f1
+ case CTSDUR_BA_F1: /* CTSDuration_ba_f1 */
if ((byFBOption == AUTO_FB_0) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
uDurTime = pDevice->uSIFS + s_uGetTxRsvTime(pDevice, byPktType, cbFrameLength, wFB_Opt0[FB_RATE1][wRate-RATE_18M], bNeedAck);
else if ((byFBOption == AUTO_FB_1) && (wRate >= RATE_18M) && (wRate <= RATE_54M))
buf->time_stamp_off_b = vnt_time_stamp_off(pDevice, pDevice->byTopCCKBasicRate);
return buf->duration_a;
- } //if (byFBOption == AUTO_FB_NONE)
+ } /* if (byFBOption == AUTO_FB_NONE) */
} else if (byPktType == PK_TYPE_11A) {
if ((byFBOption != AUTO_FB_NONE)) {
/* Auto Fallback */
return;
if (bDisCRC) {
- // When CRCDIS bit is on, H/W forgot to generate FCS for RTS frame,
- // in this case we need to decrease its length by 4.
+ /* When CRCDIS bit is on, H/W forgot to generate FCS for RTS frame,
+ in this case we need to decrease its length by 4. */
uRTSFrameLen -= 4;
}
- // Note: So far RTSHead dosen't appear in ATIM & Beacom DMA, so we don't need to take them into account.
- // Otherwise, we need to modify codes for them.
+ /* Note: So far RTSHead dosen't appear in ATIM & Beacom DMA, so we don't need to take them into account.
+ Otherwise, we need to modify codes for them. */
if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {
if (byFBOption == AUTO_FB_NONE) {
struct vnt_rts_g *buf = pvRTS;
ether_addr_copy(buf->data.ra, hdr->addr1);
ether_addr_copy(buf->data.ta, hdr->addr2);
- } // if (byFBOption == AUTO_FB_NONE)
+ } /* if (byFBOption == AUTO_FB_NONE) */
} else if (byPktType == PK_TYPE_11A) {
if (byFBOption == AUTO_FB_NONE) {
struct vnt_rts_ab *buf = pvRTS;
return;
if (bDisCRC) {
- // When CRCDIS bit is on, H/W forgot to generate FCS for CTS frame,
- // in this case we need to decrease its length by 4.
+ /* When CRCDIS bit is on, H/W forgot to generate FCS for CTS frame,
+ in this case we need to decrease its length by 4. */
uCTSFrameLen -= 4;
}
if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {
if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA) {
- // Auto Fall back
+ /* Auto Fall back */
struct vnt_cts_fb *buf = pvCTS;
/* Get SignalField, ServiceField & Length */
vnt_get_phy_field(pDevice, uCTSFrameLen,
ether_addr_copy(buf->data.ra,
pDevice->abyCurrentNetAddr);
- } else { //if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA)
+ } else { /* if (byFBOption != AUTO_FB_NONE && uDMAIdx != TYPE_ATIMDMA && uDMAIdx != TYPE_BEACONDMA) */
struct vnt_cts *buf = pvCTS;
/* Get SignalField, ServiceField & Length */
vnt_get_phy_field(pDevice, uCTSFrameLen,
*
* Return Value: none
*
- -*/
-// unsigned int cbFrameSize,//Hdr+Payload+FCS
+ -
+ * unsigned int cbFrameSize, Hdr+Payload+FCS */
static
void
s_vGenerateTxParameter(
return;
if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {
- if (pvRTS != NULL) { //RTS_need
- /* Fill RsvTime */
+ if (pvRTS != NULL) { /* RTS_need
+ Fill RsvTime */
struct vnt_rrv_time_rts *buf = pvRrvTime;
buf->rts_rrv_time_aa = s_uGetRTSCTSRsvTime(pDevice, 2, byPktType, cbFrameSize, wCurrentRate);
buf->rrv_time_b = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11B, cbFrameSize, pDevice->byTopCCKBasicRate, bNeedACK);
s_vFillRTSHead(pDevice, byPktType, pvRTS, cbFrameSize, bNeedACK, bDisCRC, psEthHeader, wCurrentRate, byFBOption);
- } else {//RTS_needless, PCF mode
+ } else {/* RTS_needless, PCF mode */
struct vnt_rrv_time_cts *buf = pvRrvTime;
buf->rrv_time_a = vnt_rxtx_rsvtime_le16(pDevice, byPktType, cbFrameSize, wCurrentRate, bNeedACK);
buf->rrv_time_b = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11B, cbFrameSize, pDevice->byTopCCKBasicRate, bNeedACK);
buf->cts_rrv_time_ba = s_uGetRTSCTSRsvTime(pDevice, 3, byPktType, cbFrameSize, wCurrentRate);
- //Fill CTS
+ /* Fill CTS */
s_vFillCTSHead(pDevice, uDMAIdx, byPktType, pvCTS, cbFrameSize, bNeedACK, bDisCRC, wCurrentRate, byFBOption);
}
} else if (byPktType == PK_TYPE_11A) {
- if (pvRTS != NULL) {//RTS_need, non PCF mode
+ if (pvRTS != NULL) {/* RTS_need, non PCF mode */
struct vnt_rrv_time_ab *buf = pvRrvTime;
buf->rts_rrv_time = s_uGetRTSCTSRsvTime(pDevice, 2, byPktType, cbFrameSize, wCurrentRate);
buf->rrv_time = vnt_rxtx_rsvtime_le16(pDevice, byPktType, cbFrameSize, wCurrentRate, bNeedACK);
- //Fill RTS
+ /* Fill RTS */
s_vFillRTSHead(pDevice, byPktType, pvRTS, cbFrameSize, bNeedACK, bDisCRC, psEthHeader, wCurrentRate, byFBOption);
- } else if (pvRTS == NULL) {//RTS_needless, non PCF mode
+ } else if (pvRTS == NULL) {/* RTS_needless, non PCF mode */
struct vnt_rrv_time_ab *buf = pvRrvTime;
buf->rrv_time = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11A, cbFrameSize, wCurrentRate, bNeedACK);
}
} else if (byPktType == PK_TYPE_11B) {
- if ((pvRTS != NULL)) {//RTS_need, non PCF mode
+ if ((pvRTS != NULL)) {/* RTS_need, non PCF mode */
struct vnt_rrv_time_ab *buf = pvRrvTime;
buf->rts_rrv_time = s_uGetRTSCTSRsvTime(pDevice, 0, byPktType, cbFrameSize, wCurrentRate);
buf->rrv_time = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11B, cbFrameSize, wCurrentRate, bNeedACK);
- //Fill RTS
+ /* Fill RTS */
s_vFillRTSHead(pDevice, byPktType, pvRTS, cbFrameSize, bNeedACK, bDisCRC, psEthHeader, wCurrentRate, byFBOption);
- } else { //RTS_needless, non PCF mode
+ } else { /* RTS_needless, non PCF mode */
struct vnt_rrv_time_ab *buf = pvRrvTime;
buf->rrv_time = vnt_rxtx_rsvtime_le16(pDevice, PK_TYPE_11B, cbFrameSize, wCurrentRate, bNeedACK);
void *pvRTS;
void *pvCTS;
void *pvTxDataHd;
- unsigned short wTxBufSize; // FFinfo size
+ unsigned short wTxBufSize; /* FFinfo size */
unsigned char byFBOption = AUTO_FB_NONE;
pvRrvTime = pMICHDR = pvRTS = pvCTS = pvTxDataHd = NULL;
cbFrameSize += info->control.hw_key->icv_len;
if (pDevice->byLocalID > REV_ID_VT3253_A1) {
- //MAC Header should be padding 0 to DW alignment.
+ /* MAC Header should be padding 0 to DW alignment. */
uPadding = 4 - (ieee80211_get_hdrlen_from_skb(skb) % 4);
uPadding %= 4;
}
}
- //
- // Use for AUTO FALL BACK
- //
+ /*
+ * Use for AUTO FALL BACK
+ */
if (fifo_ctl & FIFOCTL_AUTO_FB_0)
byFBOption = AUTO_FB_0;
else if (fifo_ctl & FIFOCTL_AUTO_FB_1)
byFBOption = AUTO_FB_1;
- //////////////////////////////////////////////////////
- //Set RrvTime/RTS/CTS Buffer
+
+ /* Set RrvTime/RTS/CTS Buffer */
wTxBufSize = sizeof(STxBufHead);
- if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {//802.11g packet
+ if (byPktType == PK_TYPE_11GB || byPktType == PK_TYPE_11GA) {/* 802.11g packet */
if (byFBOption == AUTO_FB_NONE) {
- if (bRTS == true) {//RTS_need
+ if (bRTS == true) {/* RTS_need */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts));
pvRTS = (void *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts) + cbMICHDR);
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_rts) +
cbMICHDR + sizeof(struct vnt_rts_g) +
sizeof(struct vnt_tx_datahead_g);
- } else { //RTS_needless
+ } else { /* RTS_needless */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts));
pvRTS = NULL;
cbMICHDR + sizeof(struct vnt_cts) + sizeof(struct vnt_tx_datahead_g);
}
} else {
- // Auto Fall Back
- if (bRTS == true) {//RTS_need
+ /* Auto Fall Back */
+ if (bRTS == true) {/* RTS_need */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts));
pvRTS = (void *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_rts) + cbMICHDR);
cbMICHDR + sizeof(struct vnt_rts_g_fb));
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_rts) +
cbMICHDR + sizeof(struct vnt_rts_g_fb) + sizeof(struct vnt_tx_datahead_g_fb);
- } else { //RTS_needless
+ } else { /* RTS_needless */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_cts));
pvRTS = NULL;
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_cts) +
cbMICHDR + sizeof(struct vnt_cts_fb) + sizeof(struct vnt_tx_datahead_g_fb);
}
- } // Auto Fall Back
- } else {//802.11a/b packet
+ } /* Auto Fall Back */
+ } else {/* 802.11a/b packet */
if (byFBOption == AUTO_FB_NONE) {
if (bRTS == true) {
sizeof(struct vnt_rrv_time_ab) + cbMICHDR + sizeof(struct vnt_rts_ab));
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
cbMICHDR + sizeof(struct vnt_rts_ab) + sizeof(struct vnt_tx_datahead_ab);
- } else { //RTS_needless, need MICHDR
+ } else { /* RTS_needless, need MICHDR */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab));
pvRTS = NULL;
cbMICHDR + sizeof(struct vnt_tx_datahead_ab);
}
} else {
- // Auto Fall Back
- if (bRTS == true) {//RTS_need
+ /* Auto Fall Back */
+ if (bRTS == true) { /* RTS_need */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *) (pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab));
pvRTS = (void *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab) + cbMICHDR);
sizeof(struct vnt_rrv_time_ab) + cbMICHDR + sizeof(struct vnt_rts_a_fb));
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
cbMICHDR + sizeof(struct vnt_rts_a_fb) + sizeof(struct vnt_tx_datahead_a_fb);
- } else { //RTS_needless
+ } else { /* RTS_needless */
pvRrvTime = (void *)(pbyTxBufferAddr + wTxBufSize);
pMICHDR = (struct vnt_mic_hdr *)(pbyTxBufferAddr + wTxBufSize + sizeof(struct vnt_rrv_time_ab));
pvRTS = NULL;
cbHeaderLength = wTxBufSize + sizeof(struct vnt_rrv_time_ab) +
cbMICHDR + sizeof(struct vnt_tx_datahead_a_fb);
}
- } // Auto Fall Back
+ } /* Auto Fall Back */
}
td_info->mic_hdr = pMICHDR;
int vnt_beacon_enable(struct vnt_private *priv, struct ieee80211_vif *vif,
struct ieee80211_bss_conf *conf)
{
- int ret;
-
VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
VNSvOutPortB(priv->PortOffset + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
CARDbSetBeaconPeriod(priv, conf->beacon_int);
- ret = vnt_beacon_make(priv, vif);
-
- return ret;
+ return vnt_beacon_make(priv, vif);
}
* Author: Jerry Chen
*
* Date: Jan 29, 2003
- *
*/
#ifndef __SROM_H__
#define EEP_MAX_CONTEXT_SIZE 256
-#define CB_EEPROM_READBYTE_WAIT 900 //us
+#define CB_EEPROM_READBYTE_WAIT 900 /* us */
#define W_MAX_I2CRETRY 0x0fff
-//
-// Contents in the EEPROM
-//
-#define EEP_OFS_PAR 0x00 // physical address
+/* Contents in the EEPROM */
+#define EEP_OFS_PAR 0x00 /* physical address */
#define EEP_OFS_ANTENNA 0x16
#define EEP_OFS_RADIOCTL 0x17
-#define EEP_OFS_RFTYPE 0x1B // for select RF
-#define EEP_OFS_MINCHANNEL 0x1C // Min Channel #
-#define EEP_OFS_MAXCHANNEL 0x1D // Max Channel #
-#define EEP_OFS_SIGNATURE 0x1E //
-#define EEP_OFS_ZONETYPE 0x1F //
-#define EEP_OFS_RFTABLE 0x20 // RF POWER TABLE
+#define EEP_OFS_RFTYPE 0x1B /* for select RF */
+#define EEP_OFS_MINCHANNEL 0x1C /* Min Channel # */
+#define EEP_OFS_MAXCHANNEL 0x1D /* Max Channel # */
+#define EEP_OFS_SIGNATURE 0x1E
+#define EEP_OFS_ZONETYPE 0x1F
+#define EEP_OFS_RFTABLE 0x20 /* RF POWER TABLE */
#define EEP_OFS_PWR_CCK 0x20
#define EEP_OFS_SETPT_CCK 0x21
#define EEP_OFS_PWR_OFDMG 0x23
#define EEP_OFS_SETPT_OFDMG 0x24
-#define EEP_OFS_PWR_FORMULA_OST 0x26 //
+#define EEP_OFS_PWR_FORMULA_OST 0x26
#define EEP_OFS_MAJOR_VER 0x2E
#define EEP_OFS_MINOR_VER 0x2F
#define EEP_OFS_CCK_PWR_TBL 0x30
#define EEP_OFS_CCK_PWR_dBm 0x3F
#define EEP_OFS_OFDM_PWR_TBL 0x40
#define EEP_OFS_OFDM_PWR_dBm 0x4F
-//{{ RobertYu: 20041124
+/*{{ RobertYu: 20041124 */
#define EEP_OFS_SETPT_OFDMA 0x4E
#define EEP_OFS_OFDMA_PWR_TBL 0x50
-//}}
+/*}}*/
#define EEP_OFS_OFDMA_PWR_dBm 0xD2
-//----------need to remove --------------------
-#define EEP_OFS_BBTAB_LEN 0x70 // BB Table Length
-#define EEP_OFS_BBTAB_ADR 0x71 // BB Table Offset
-#define EEP_OFS_CHECKSUM 0xFF // reserved area for baseband 28h ~ 78h
+/*----------need to remove --------------------*/
+#define EEP_OFS_BBTAB_LEN 0x70 /* BB Table Length */
+#define EEP_OFS_BBTAB_ADR 0x71 /* BB Table Offset */
+#define EEP_OFS_CHECKSUM 0xFF /* reserved area for baseband 28h~78h */
-#define EEP_I2C_DEV_ID 0x50 // EEPROM device address on the I2C bus
+#define EEP_I2C_DEV_ID 0x50 /* EEPROM device address on I2C bus */
-//
-// Bits in EEP_OFS_ANTENNA
-//
+/* Bits in EEP_OFS_ANTENNA */
#define EEP_ANTENNA_MAIN 0x01
#define EEP_ANTENNA_AUX 0x02
#define EEP_ANTINV 0x04
-//
-// Bits in EEP_OFS_RADIOCTL
-//
+/* Bits in EEP_OFS_RADIOCTL */
#define EEP_RADIOCTL_ENABLE 0x80
#define EEP_RADIOCTL_INV 0x01
/*--------------------- Export Functions --------------------------*/
-unsigned char SROMbyReadEmbedded(void __iomem *dwIoBase, unsigned char byContntOffset);
+unsigned char SROMbyReadEmbedded(void __iomem *dwIoBase,
+ unsigned char byContntOffset);
void SROMvReadAllContents(void __iomem *dwIoBase, unsigned char *pbyEepromRegs);
-void SROMvReadEtherAddress(void __iomem *dwIoBase, unsigned char *pbyEtherAddress);
+void SROMvReadEtherAddress(void __iomem *dwIoBase,
+ unsigned char *pbyEtherAddress);
-#endif // __EEPROM_H__
+#endif /* __EEPROM_H__*/
#define MAKEDWORD(lw, hw) ((unsigned long)(((unsigned short)(lw)) | (((unsigned long)((unsigned short)(hw))) << 16)))
#endif
-#endif // __TMACRO_H__
+#endif /* __TMACRO_H__ */
buffer = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL);
if (!buffer)
- goto out;
+ goto free_fw;
for (ii = 0; ii < fw->size; ii += FIRMWARE_CHUNK_SIZE) {
length = min_t(int, fw->size - ii, FIRMWARE_CHUNK_SIZE);
* Revision History:
*/
+#include <linux/etherdevice.h>
+
#include "desc.h"
#include "mac.h"
#include "usbpipe.h"
offset += (entry_idx * MISCFIFO_KEYENTRYSIZE);
set_key.u.write.key_ctl = cpu_to_le16(key_ctl);
- memcpy(set_key.u.write.addr, addr, ETH_ALEN);
+ ether_addr_copy(set_key.u.write.addr, addr);
/* swap over swap[0] and swap[1] to get correct write order */
swap(set_key.u.swap[0], set_key.u.swap[1]);
hw = ieee80211_alloc_hw(sizeof(struct vnt_private), &vnt_mac_ops);
if (!hw) {
dev_err(&udev->dev, "could not register ieee80211_hw\n");
+ rc = -ENOMEM;
goto err_nomem;
}
else
mic_hdr->hlen = cpu_to_be16(22);
- memcpy(mic_hdr->addr1, hdr->addr1, ETH_ALEN);
- memcpy(mic_hdr->addr2, hdr->addr2, ETH_ALEN);
- memcpy(mic_hdr->addr3, hdr->addr3, ETH_ALEN);
+ ether_addr_copy(mic_hdr->addr1, hdr->addr1);
+ ether_addr_copy(mic_hdr->addr2, hdr->addr2);
+ ether_addr_copy(mic_hdr->addr3, hdr->addr3);
mic_hdr->frame_control = cpu_to_le16(
le16_to_cpu(hdr->frame_control) & 0xc78f);
le16_to_cpu(hdr->seq_ctrl) & 0xf);
if (ieee80211_has_a4(hdr->frame_control))
- memcpy(mic_hdr->addr4, hdr->addr4, ETH_ALEN);
+ ether_addr_copy(mic_hdr->addr4, hdr->addr4);
memcpy(key_buffer, tx_key->key, WLAN_KEY_LEN_CCMP);
int hfa384x_drvr_stop(hfa384x_t *hw);
int
hfa384x_drvr_txframe(hfa384x_t *hw, struct sk_buff *skb,
- union p80211_hdr *p80211_hdr, struct p80211_metawep *p80211_wep);
+ union p80211_hdr *p80211_hdr,
+ struct p80211_metawep *p80211_wep);
void hfa384x_tx_timeout(wlandevice_t *wlandev);
int hfa384x_cmd_initialize(hfa384x_t *hw);
INIT_WORK(&hw->link_bh, prism2sta_processing_defer);
INIT_WORK(&hw->usb_work, hfa384x_usb_defer);
- init_timer(&hw->throttle);
- hw->throttle.function = hfa384x_usb_throttlefn;
- hw->throttle.data = (unsigned long)hw;
+ setup_timer(&hw->throttle, hfa384x_usb_throttlefn, (unsigned long)hw);
- init_timer(&hw->resptimer);
- hw->resptimer.function = hfa384x_usbctlx_resptimerfn;
- hw->resptimer.data = (unsigned long)hw;
+ setup_timer(&hw->resptimer, hfa384x_usbctlx_resptimerfn,
+ (unsigned long)hw);
- init_timer(&hw->reqtimer);
- hw->reqtimer.function = hfa384x_usbctlx_reqtimerfn;
- hw->reqtimer.data = (unsigned long)hw;
+ setup_timer(&hw->reqtimer, hfa384x_usbctlx_reqtimerfn,
+ (unsigned long)hw);
usb_init_urb(&hw->rx_urb);
usb_init_urb(&hw->tx_urb);
hw->state = HFA384x_STATE_INIT;
INIT_WORK(&hw->commsqual_bh, prism2sta_commsqual_defer);
- init_timer(&hw->commsqual_timer);
- hw->commsqual_timer.data = (unsigned long)hw;
- hw->commsqual_timer.function = prism2sta_commsqual_timer;
+ setup_timer(&hw->commsqual_timer, prism2sta_commsqual_timer,
+ (unsigned long)hw);
}
/*----------------------------------------------------------------
{
hfa384x_usbctlx_t *ctlx;
- ctlx = kmalloc(sizeof(*ctlx), in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
- if (ctlx != NULL) {
- memset(ctlx, 0, sizeof(*ctlx));
+ ctlx = kzalloc(sizeof(*ctlx),
+ in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
+ if (ctlx != NULL)
init_completion(&ctlx->done);
- }
return ctlx;
}
struct p80211msg_dot11req_mibset *msg,
void *data)
{
- int result;
-
if (wlandev->hostwep & HOSTWEP_DECRYPT) {
if (wlandev->hostwep & HOSTWEP_DECRYPT)
mib->parm2 |= HFA384x_WEPFLAGS_DISABLE_RXCRYPT;
mib->parm2 |= HFA384x_WEPFLAGS_DISABLE_TXCRYPT;
}
- result = prism2mib_flag(mib, isget, wlandev, hw, msg, data);
-
- return result;
+ return prism2mib_flag(mib, isget, wlandev, hw, msg, data);
}
/*----------------------------------------------------------------
struct p80211msg_dot11req_mibset *msg,
void *data)
{
- int result;
-
- result = prism2mib_flag(mib, isget, wlandev, hw, msg, data);
- return result;
+ return prism2mib_flag(mib, isget, wlandev, hw, msg, data);
}
/*----------------------------------------------------------------
*/
#include <linux/module.h>
-#include <linux/moduleparam.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/netdevice.h>
#include <linux/workqueue.h>
#include <linux/byteorder/generic.h>
+#include <linux/etherdevice.h>
#include <linux/io.h>
#include <linux/delay.h>
struct p80211_metawep *p80211_wep)
{
hfa384x_t *hw = (hfa384x_t *) wlandev->priv;
- int result;
/* If necessary, set the 802.11 WEP bit */
if ((wlandev->hostwep & (HOSTWEP_PRIVACYINVOKED | HOSTWEP_ENCRYPT)) ==
p80211_hdr->a3.fc |= cpu_to_le16(WLAN_SET_FC_ISWEP(1));
}
- result = hfa384x_drvr_txframe(hw, skb, p80211_hdr, p80211_wep);
-
- return result;
+ return hfa384x_drvr_txframe(hw, skb, p80211_hdr, p80211_wep);
}
/*----------------------------------------------------------------
** authentication.
*/
- memcpy(rec.address, inf->info.authreq.sta_addr, ETH_ALEN);
+ ether_addr_copy(rec.address, inf->info.authreq.sta_addr);
rec.status = P80211ENUM_status_unspec_failure;
/*
if (hw->authlist.cnt >= WLAN_AUTH_MAX) {
rec.status = P80211ENUM_status_ap_full;
} else {
- memcpy(hw->authlist.addr[hw->authlist.cnt],
- rec.address, ETH_ALEN);
+ ether_addr_copy(hw->authlist.addr[hw->authlist.cnt],
+ rec.address);
hw->authlist.cnt++;
added = 1;
}
sr_data = XGI_CRT1Table[index].CR[5];
- HDE = (XGI330_RefIndex[RefreshRateTableIndex].XRes >> 3);
+ HDE = XGI330_RefIndex[RefreshRateTableIndex].XRes >> 3;
cr_data = XGI_CRT1Table[index].CR[3];
XGIbios_mode[xgifb_info->mode_idx].mode_no);
return -EINVAL;
}
- info->fix.line_length = ((info->var.xres_virtual
- * info->var.bits_per_pixel) >> 6);
+ info->fix.line_length = (info->var.xres_virtual
+ * info->var.bits_per_pixel) >> 6;
xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
data |= data1;
xgifb_reg_set(pVBInfo->P3d4, 0x05, data);
data = xgifb_reg_get(pVBInfo->P3c4, 0x0e);
- data = data >> 5;
+ data >>= 5;
data = data + 3;
if (data > 7)
data = data - 7;
- data = data << 5;
+ data <<= 5;
xgifb_reg_and_or(pVBInfo->P3c4, 0x0e, ~0xE0, data);
}
}
data = pVBInfo->TimingV.data[6];
data &= 0x80;
- data = data >> 2;
+ data >>= 2;
i = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
i &= DoubleScanMode;
tempbx = XGI330_ModeResInfo[resindex].VTotal;
if (modeflag & HalfDCLK)
- tempax = tempax >> 1;
+ tempax >>= 1;
if (modeflag & HalfDCLK)
- tempax = tempax << 1;
+ tempax <<= 1;
temp = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
if (temp & InterlaceMode)
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
if (modeflag & DoubleScanMode)
- tempbx = tempbx << 1;
+ tempbx <<= 1;
tempcx = 8;
(unsigned short) ((tempcx & 0x0ff00) >> 10));
xgifb_reg_set(pVBInfo->P3d4, 0x12, (unsigned short) (tempbx & 0xff));
tempax = 0;
- tempbx = tempbx >> 8;
+ tempbx >>= 8;
if (tempbx & 0x01)
tempax |= 0x02;
/* GetOffset */
temp = XGI330_EModeIDTable[ModeIdIndex].Ext_ModeInfo;
- temp = temp >> 8;
+ temp >>= 8;
temp = XGI330_ScreenOffset[temp];
temp2 = XGI330_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
temp2 &= InterlaceMode;
if (temp2)
- temp = temp << 1;
+ temp <<= 1;
temp2 = pVBInfo->ModeType - ModeEGA;
/* SetOffset */
DisplayUnit = temp;
temp2 = temp;
- temp = temp >> 8; /* ah */
+ temp >>= 8; /* ah */
temp &= 0x0F;
i = xgifb_reg_get(pVBInfo->P3c4, 0x0E);
i &= 0xF0;
if (temp2)
DisplayUnit >>= 1;
- DisplayUnit = DisplayUnit << 5;
+ DisplayUnit <<= 5;
ah = (DisplayUnit & 0xff00) >> 8;
al = DisplayUnit & 0x00ff;
if (al == 0)
index = data;
index &= 0xE0;
data &= 0x1F;
- data = data << 1;
+ data <<= 1;
data += 1;
data |= index;
xgifb_reg_set(pVBInfo->P3c4, 0x2C, data);
data2 = 0;
data2 |= 0x02;
data3 = pVBInfo->ModeType - ModeVGA;
- data3 = data3 << 2;
+ data3 <<= 2;
data2 |= data3;
data &= InterlaceMode;
data2 += 0x15;
outb(data2, pVBInfo->P3c9);
- data = data >> 2;
+ data >>= 2;
}
}
yres = XGI330_ModeResInfo[resindex].VTotal;
if (modeflag & HalfDCLK)
- xres = xres << 1;
+ xres <<= 1;
if (modeflag & DoubleScanMode)
- yres = yres << 1;
+ yres <<= 1;
if (xres == 720)
xres = 640;
xgifb_reg_set(pVBInfo->Part1Port, 0x1A, tempbx & 0x07);
- tempcx = tempcx >> 3;
- tempbx = tempbx >> 3;
+ tempcx >>= 3;
+ tempbx >>= 3;
xgifb_reg_set(pVBInfo->Part1Port, 0x16,
(unsigned short) (tempbx & 0xff));
tempcx -= tempax;
tempax = tempbx & 0x07;
- tempax = tempax >> 5;
- tempcx = tempcx >> 3;
- tempbx = tempbx >> 3;
+ tempax >>= 5;
+ tempcx >>= 3;
+ tempbx >>= 3;
tempcx &= 0x1f;
tempax |= tempcx;
temp1 = pVBInfo->VGAHDE << 16;
temp1 /= temp3;
- temp3 = temp3 << 16;
+ temp3 <<= 16;
temp1 -= 1;
temp3 = (temp3 & 0xffff0000) + (temp1 & 0xffff);
xgifb_reg_set(pVBInfo->Part1Port, 0x21,
(unsigned short) (tempbx & 0xff));
- temp3 = temp3 >> 16;
+ temp3 >>= 16;
if (modeflag & HalfDCLK)
- temp3 = temp3 >> 1;
+ temp3 >>= 1;
xgifb_reg_set(pVBInfo->Part1Port, 0x22,
(unsigned short) ((temp3 >> 8) & 0xff));
tempbx = tempbx | temp;
temp = xgifb_reg_get(pVBInfo->P3d4, 0x31);
push = temp;
- push = push << 8;
+ push <<= 8;
tempax = temp << 8;
tempbx = tempbx | tempax;
temp = (SetCRT2ToDualEdge | SetCRT2ToYPbPr525750 | XGI_SetCRT2ToLCDA
if (pVBInfo->VBInfo & XGI_SetCRT2ToLCDA)
tempax &= 0x0F;
else
- tempax = tempax >> 4;
+ tempax >>= 4;
if ((resinfo == 6) || (resinfo == 9)) {
if (tempax >= 3)
unsigned char i = 0;
for (i = 0; i < 8; i++) {
- ujRet = ujRet << 1;
+ ujRet <<= 1;
ujRet |= (ujDate >> i) & 1;
}
tempcx = (unsigned short)
XGI_CRT1Table[CRT1Index].CR[14] << 8;
tempcx &= 0x0100;
- tempcx = tempcx << 2;
+ tempcx <<= 2;
tempbx |= tempcx;
temp1 = (unsigned short) XGI_CRT1Table[CRT1Index].CR[9];
temp = XGI330_ScreenOffset[index];
if (infoflag & InterlaceMode)
- temp = temp << 1;
+ temp <<= 1;
colordepth = XGI_GetColorDepth(ModeIdIndex);
colordepth = ColorDepth[temp];
temp = 0x6B;
if (infoflag & InterlaceMode)
- temp = temp << 1;
+ temp <<= 1;
}
return temp * colordepth;
}
xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp);
tempcx = ((pVBInfo->VGAHT - pVBInfo->VGAHDE) / 2) >> 2;
pushbx = pVBInfo->VGAHDE / 2 + 16;
- tempcx = tempcx >> 1;
+ tempcx >>= 1;
tempbx = pushbx + tempcx; /* bx BTVGA@HRS 0x0B,0x0C */
tempcx += tempbx;
xgifb_reg_set(pVBInfo->Part1Port, 0x0A, temp);
tempcx = (pVBInfo->VGAHT - pVBInfo->VGAHDE) >> 2; /* cx */
pushbx = pVBInfo->VGAHDE + 16;
- tempcx = tempcx >> 1;
+ tempcx >>= 1;
tempbx = pushbx + tempcx; /* bx BTVGA@HRS 0x0B,0x0C */
tempcx += tempbx;
tempax = pVBInfo->VGAHDE; /* 0x04 Horizontal Display End */
if (modeflag & HalfDCLK)
- tempax = tempax >> 1;
+ tempax >>= 1;
tempax = (tempax / tempcx) - 1;
tempbx |= ((tempax & 0x00FF) << 8);
tempax = pVBInfo->VGAHT;
if (modeflag & HalfDCLK)
- tempax = tempax >> 1;
+ tempax >>= 1;
tempax = (tempax / tempcx) - 5;
tempcx = tempax; /* 20030401 0x07 horizontal Retrace Start */
tempax = push1;
tempax -= tempbx; /* 0x0C Vertical Retrace Start */
- tempax = tempax >> 2;
+ tempax >>= 2;
push1 = tempax; /* push ax */
if (resinfo != 0x09) {
- tempax = tempax << 1;
+ tempax <<= 1;
tempbx += tempax;
}
}
}
tempax = push1;
- tempax = tempax >> 2;
+ tempax >>= 2;
tempax++;
tempax += tempbx;
push1 = tempax; /* push ax */
if (pVBInfo->VDE <= tempax) {
tempax -= pVBInfo->VDE;
- tempax = tempax >> 2;
+ tempax >>= 2;
tempax = (tempax & 0x00FF) | ((tempax & 0x00FF) << 8);
push1 = tempax;
temp = (tempax & 0xFF00) >> 8;
tempcx = pVBInfo->HT;
if (XGI_IsLCDDualLink(pVBInfo))
- tempcx = tempcx >> 1;
+ tempcx >>= 1;
tempcx -= 2;
temp = tempcx & 0x00FF;
tempcx -= 4;
temp = tempcx & 0x00FF;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x22, 0x0F, temp);
tempbx = TimingPoint[j] | ((TimingPoint[j + 1]) << 8);
temp = tempbx & 0x00FF;
xgifb_reg_set(pVBInfo->Part2Port, 0x24, temp);
temp = (tempbx & 0xFF00) >> 8;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x25, 0x0F, temp);
tempbx = push2;
tempcx -= 4;
temp = tempcx & 0xFF;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x2A, 0x0F, temp);
tempcx = push1; /* pop cx */
temp = TimingPoint[j] | ((TimingPoint[j + 1]) << 8);
tempcx -= temp;
temp = tempcx & 0x00FF;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x2D, 0x0F, temp);
tempcx -= 11;
(VB_SIS301LV | VB_SIS302LV | VB_XGI301C)) {
if (!(pVBInfo->TVInfo &
(TVSetYPbPr525p | TVSetYPbPr750p)))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
} else
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
}
tempbx -= 2;
if (pVBInfo->VBInfo & SetCRT2ToTV) {
if (!(pVBInfo->TVInfo & (TVSetYPbPr525p
| TVSetYPbPr750p)))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
}
if (pVBInfo->VBType & (VB_SIS302LV | VB_XGI301C)) {
xgifb_reg_set(pVBInfo->Part2Port, 0x4c, temp);
temp = ((tempcx & 0xFF00) >> 8) & 0x03;
- temp = temp << 2;
+ temp <<= 2;
temp |= ((tempbx & 0xFF00) >> 8) & 0x03;
if (pVBInfo->VBInfo & SetCRT2ToYPbPr525750) {
tempbx = pVBInfo->HDE; /* RHACTE=HDE-1 */
if (XGI_IsLCDDualLink(pVBInfo))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
tempbx -= 1;
temp = tempbx & 0x00FF;
xgifb_reg_set(pVBInfo->Part2Port, 0x2C, temp);
temp = (tempbx & 0xFF00) >> 8;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x2B, 0x0F, temp);
temp = 0x01;
temp = tempcx & 0x00FF; /* RVTVT=VT-1 */
xgifb_reg_set(pVBInfo->Part2Port, 0x19, temp);
temp = (tempcx & 0xFF00) >> 8;
- temp = temp << 5;
+ temp <<= 5;
xgifb_reg_set(pVBInfo->Part2Port, 0x1A, temp);
xgifb_reg_and_or(pVBInfo->Part2Port, 0x09, 0xF0, 0x00);
xgifb_reg_and_or(pVBInfo->Part2Port, 0x0A, 0xF0, 0x00);
tempch = ((tempcx & 0xFF00) >> 8) & 0x07;
tempbh = ((tempbx & 0xFF00) >> 8) & 0x07;
tempah = tempch;
- tempah = tempah << 3;
+ tempah <<= 3;
tempah |= tempbh;
xgifb_reg_set(pVBInfo->Part2Port, 0x02, tempah);
temp = tempbx & 0x00FF; /* RTVACTEE=lcdvrs */
xgifb_reg_set(pVBInfo->Part2Port, 0x04, temp);
temp = (tempbx & 0xFF00) >> 8;
- temp = temp << 4;
+ temp <<= 4;
temp |= (tempcx & 0x000F);
xgifb_reg_set(pVBInfo->Part2Port, 0x01, temp);
tempcx = pushbx;
tempbx &= 0x0FFF;
if (XGI_IsLCDDualLink(pVBInfo)) {
- tempax = tempax >> 1;
- tempbx = tempbx >> 1;
- tempcx = tempcx >> 1;
+ tempax >>= 1;
+ tempbx >>= 1;
+ tempcx >>= 1;
}
if (pVBInfo->VBType & VB_SIS302LV)
tempax = pVBInfo->HT;
tempbx = pVBInfo->LCDHRS;
if (XGI_IsLCDDualLink(pVBInfo)) {
- tempax = tempax >> 1;
- tempbx = tempbx >> 1;
- tempcx = tempcx >> 1;
+ tempax >>= 1;
+ tempbx >>= 1;
+ tempcx >>= 1;
}
if (pVBInfo->VBType & VB_SIS302LV)
xgifb_reg_set(pVBInfo->Part2Port, 0x1C, temp);
temp = (tempbx & 0xFF00) >> 8;
- temp = temp << 4;
+ temp <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x1D, ~0x0F0, temp);
temp = tempcx & 0x00FF; /* RHSYEXP2S=lcdhre */
xgifb_reg_set(pVBInfo->Part2Port, 0x21, temp);
tempbx = pVBInfo->VGAHDE;
if (modeflag & HalfDCLK)
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
if (XGI_IsLCDDualLink(pVBInfo))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
if (tempcx & SetCRT2ToHiVision) {
temp = 0;
xgifb_reg_set(pVBInfo->Part4Port, 0x1A, temp);
tempbx = (unsigned short) (tempebx >> 16);
temp = tempbx & 0x00FF;
- temp = temp << 4;
+ temp <<= 4;
temp |= ((tempcx & 0xFF00) >> 8);
xgifb_reg_set(pVBInfo->Part4Port, 0x19, temp);
xgifb_reg_set(pVBInfo->Part4Port, 0x1C, temp);
tempax = pVBInfo->VGAHDE;
if (modeflag & HalfDCLK)
- tempax = tempax >> 1;
+ tempax >>= 1;
if (XGI_IsLCDDualLink(pVBInfo))
- tempax = tempax >> 1;
+ tempax >>= 1;
if (pVBInfo->VBInfo & SetCRT2ToLCD) {
if (tempax > 800)
xgifb_reg_and_or(pVBInfo->Part4Port, 0x1F, 0x00C0, temp);
tempbx = pVBInfo->HT;
if (XGI_IsLCDDualLink(pVBInfo))
- tempbx = tempbx >> 1;
+ tempbx >>= 1;
tempbx = (tempbx >> 1) - 2;
temp = ((tempbx & 0x0700) >> 8) << 3;
xgifb_reg_and_or(pVBInfo->Part4Port, 0x21, 0x00C0, temp);
tempbl = XGI301TVDelay;
if (pVBInfo->VBInfo & SetCRT2ToDualEdge)
- tempbl = tempbl >> 4;
+ tempbl >>= 4;
if (pVBInfo->VBInfo &
(SetCRT2ToLCD | XGI_SetCRT2ToLCDA)) {
tempbh = XGI301LCDDelay;
tempbx = XGI_GetTVPtrIndex(pVBInfo);
tempbx &= 0xFE;
tempah = TVAntiFlickList[tempbx];
- tempah = tempah << 4;
+ tempah <<= 4;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x0A, 0x8F, tempah);
}
tempbx = XGI_GetTVPtrIndex(pVBInfo);
tempbx &= 0xFE;
tempah = TVEdgeList[tempbx];
- tempah = tempah << 5;
+ tempah <<= 5;
xgifb_reg_and_or(pVBInfo->Part2Port, 0x3A, 0x1F, tempah);
}
unsigned short RefreshRateTableIndex, i, index, temp;
index = xgifb_reg_get(pVBInfo->P3d4, 0x33);
- index = index >> pVBInfo->SelectCRT2Rate;
+ index >>= pVBInfo->SelectCRT2Rate;
index &= 0x0F;
if (pVBInfo->LCDInfo & LCDNonExpanding)
granularity = 0x10000;
addr |= TSI148_LCSR_ITAT_AS_A64;
break;
- case VME_CRCSR:
- case VME_USER1:
- case VME_USER2:
- case VME_USER3:
- case VME_USER4:
default:
dev_err(tsi148_bridge->parent, "Invalid address space\n");
return -EINVAL;
master_image->locked = 0;
master_image->number = i;
master_image->address_attr = VME_A16 | VME_A24 | VME_A32 |
- VME_A64;
+ VME_A64 | VME_CRCSR | VME_USER1 | VME_USER2 |
+ VME_USER3 | VME_USER4;
master_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT |
VME_2eVME | VME_2eSST | VME_2eSSTB | VME_2eSST160 |
VME_2eSST267 | VME_2eSST320 | VME_SUPER | VME_USER |
slave_image->locked = 0;
slave_image->number = i;
slave_image->address_attr = VME_A16 | VME_A24 | VME_A32 |
- VME_A64 | VME_CRCSR | VME_USER1 | VME_USER2 |
- VME_USER3 | VME_USER4;
+ VME_A64;
slave_image->cycle_attr = VME_SCT | VME_BLT | VME_MBLT |
VME_2eVME | VME_2eSST | VME_2eSSTB | VME_2eSST160 |
VME_2eSST267 | VME_2eSST320 | VME_SUPER | VME_USER |
}
EXPORT_SYMBOL(vme_master_rmw);
+int vme_master_mmap(struct vme_resource *resource, struct vm_area_struct *vma)
+{
+ struct vme_master_resource *image;
+ phys_addr_t phys_addr;
+ unsigned long vma_size;
+
+ if (resource->type != VME_MASTER) {
+ pr_err("Not a master resource\n");
+ return -EINVAL;
+ }
+
+ image = list_entry(resource->entry, struct vme_master_resource, list);
+ phys_addr = image->bus_resource.start + (vma->vm_pgoff << PAGE_SHIFT);
+ vma_size = vma->vm_end - vma->vm_start;
+
+ if (phys_addr + vma_size > image->bus_resource.end + 1) {
+ pr_err("Map size cannot exceed the window size\n");
+ return -EFAULT;
+ }
+
+ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+ return vm_iomap_memory(vma, phys_addr, vma->vm_end - vma->vm_start);
+}
+EXPORT_SYMBOL(vme_master_mmap);
+
void vme_master_free(struct vme_resource *resource)
{
struct vme_master_resource *master_image;
ssize_t vme_master_write(struct vme_resource *, void *, size_t, loff_t);
unsigned int vme_master_rmw(struct vme_resource *, unsigned int, unsigned int,
unsigned int, loff_t);
+int vme_master_mmap(struct vme_resource *resource, struct vm_area_struct *vma);
void vme_master_free(struct vme_resource *);
struct vme_resource *vme_dma_request(struct vme_dev *, u32);
projects / deliverable / linux.git / commitdiff
