spi: sirf: correct TXFIFO empty interrupt status bit
authorQipan Li <Qipan.Li@csr.com>
Mon, 14 Apr 2014 06:29:57 +0000 (14:29 +0800)
committerMark Brown <broonie@linaro.org>
Mon, 14 Apr 2014 20:01:50 +0000 (21:01 +0100)
the old code uses wrong marco - SIRFSOC_SPI_FIFO_FULL is not for
FIFO interrupt status, it is for FIFO status. here in the ISR,
SIRFSOC_SPI_TXFIFO_EMPTY is the right bit for SPI TXFIFO interrupt
status.

Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
drivers/spi/spi-sirf.c

index 1a77ad52812fd79d3a2524264e7a2a8678ca1464..51d7c988d3aec16d133081c1ea2e155692868fbe 100644 (file)
@@ -287,8 +287,8 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id)
                                sspi->left_rx_word)
                        sspi->rx_word(sspi);
 
-       if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY
-                       SIRFSOC_SPI_TXFIFO_THD_REACH))
+       if (spi_stat & (SIRFSOC_SPI_TXFIFO_EMPTY |
+                       SIRFSOC_SPI_TXFIFO_THD_REACH))
                while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS)
                                & SIRFSOC_SPI_FIFO_FULL)) &&
                                sspi->left_tx_word)
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