iommu, x86: Implement irq_set_vcpu_affinity for intel_ir_chip

Interrupt chip callback to set the VCPU affinity for posted interrupts.

[ tglx: Use the helper function to copy from the remap irte instead of
        open coding it. Massage the comment as well ]

Signed-off-by: Feng Wu <feng.wu@intel.com>
Reviewed-by: Jiang Liu <jiang.liu@linux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Cc: iommu@lists.linux-foundation.org
Cc: joro@8bytes.org
Cc: dwmw2@infradead.org
Link: http://lkml.kernel.org/r/1433827237-3382-5-git-send-email-feng.wu@intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index 8b432dd8f170b8af19fd1c08c5bc3663db5d02c6..e479fbda55cf5c26882e46eab7acc5cd2a4bbd4c 100644 (file)
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -57,6 +57,11 @@ static inline struct irq_domain *arch_get_ir_parent_domain(void)
        return x86_vector_domain;
 }
 
+struct vcpu_data {
+       u64 pi_desc_addr;       /* Physical address of PI Descriptor */
+       u32 vector;             /* Guest vector of the interrupt */
+};
+
 #else  /* CONFIG_IRQ_REMAP */
 
 static inline void set_irq_remapping_broken(void) { }

diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index 8fad71cc27e79ca2d29ac6e80698294a2d4c3d52..a643eecf9d29fb5ba4bb15ce10101ee3768cb793 100644 (file)
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -1013,10 +1013,47 @@ static void intel_ir_compose_msi_msg(struct irq_data *irq_data,
        *msg = ir_data->msi_entry;
 }
 
+static int intel_ir_set_vcpu_affinity(struct irq_data *data, void *info)
+{
+       struct intel_ir_data *ir_data = data->chip_data;
+       struct vcpu_data *vcpu_pi_info = info;
+
+       /* stop posting interrupts, back to remapping mode */
+       if (!vcpu_pi_info) {
+               modify_irte(&ir_data->irq_2_iommu, &ir_data->irte_entry);
+       } else {
+               struct irte irte_pi;
+
+               /*
+                * We are not caching the posted interrupt entry. We
+                * copy the data from the remapped entry and modify
+                * the fields which are relevant for posted mode. The
+                * cached remapped entry is used for switching back to
+                * remapped mode.
+                */
+               memset(&irte_pi, 0, sizeof(irte_pi));
+               dmar_copy_shared_irte(&irte_pi, &ir_data->irte_entry);
+
+               /* Update the posted mode fields */
+               irte_pi.p_pst = 1;
+               irte_pi.p_urgent = 0;
+               irte_pi.p_vector = vcpu_pi_info->vector;
+               irte_pi.pda_l = (vcpu_pi_info->pi_desc_addr >>
+                               (32 - PDA_LOW_BIT)) & ~(-1UL << PDA_LOW_BIT);
+               irte_pi.pda_h = (vcpu_pi_info->pi_desc_addr >> 32) &
+                               ~(-1UL << PDA_HIGH_BIT);
+
+               modify_irte(&ir_data->irq_2_iommu, &irte_pi);
+       }
+
+       return 0;
+}
+
 static struct irq_chip intel_ir_chip = {
        .irq_ack = ir_ack_apic_edge,
        .irq_set_affinity = intel_ir_set_affinity,
        .irq_compose_msi_msg = intel_ir_compose_msi_msg,
+       .irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity,
 };
 
 static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data,