ASoC: Manage Speyside system clocking only in bias management
authorMark Brown <broonie@opensource.wolfsonmicro.com>
Mon, 6 Jun 2011 18:12:44 +0000 (19:12 +0100)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Mon, 6 Jun 2011 20:47:28 +0000 (21:47 +0100)
Now that the CODEC driver supports it defer configuration of the system
clock until bias management which is a much more idiomatic place to do
system power control and makes things a lot more happy when we're using
both interfaces.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>
sound/soc/samsung/speyside.c

index 99fb0337ba5de1e15e167e6ffd26055f63847220..2515dba9f4aad7da4a8eaabbdc0ea562c03c7624 100644 (file)
@@ -42,11 +42,51 @@ static int speyside_set_bias_level(struct snd_soc_card *card,
                        pr_err("Failed to stop FLL\n");
                        return ret;
                }
+               break;
+
+       default:
+               break;
+       }
+
+       return 0;
+}
+
+static int speyside_set_bias_level_post(struct snd_soc_card *card,
+                                       struct snd_soc_dapm_context *dapm,
+                                       enum snd_soc_bias_level level)
+{
+       struct snd_soc_dai *codec_dai = card->rtd[0].codec_dai;
+       int ret;
+
+       if (dapm->dev != codec_dai->dev)
+               return 0;
+
+       switch (level) {
+       case SND_SOC_BIAS_PREPARE:
+               if (card->dapm.bias_level == SND_SOC_BIAS_STANDBY) {
+                       ret = snd_soc_dai_set_pll(codec_dai, 0,
+                                                 WM8915_FLL_MCLK2,
+                                                 32768, 48000 * 256);
+                       if (ret < 0) {
+                               pr_err("Failed to start FLL\n");
+                               return ret;
+                       }
+
+                       ret = snd_soc_dai_set_sysclk(codec_dai,
+                                                    WM8915_SYSCLK_FLL,
+                                                    48000 * 256,
+                                                    SND_SOC_CLOCK_IN);
+                       if (ret < 0)
+                               return ret;
+               }
+               break;
 
        default:
                break;
        }
 
+       card->dapm.bias_level = level;
+
        return 0;
 }
 
@@ -70,16 +110,6 @@ static int speyside_hw_params(struct snd_pcm_substream *substream,
        if (ret < 0)
                return ret;
 
-       ret = snd_soc_dai_set_pll(codec_dai, 0, WM8915_FLL_MCLK2,
-                                 32768, 256 * 48000);
-       if (ret < 0)
-               return ret;
-
-       ret = snd_soc_dai_set_sysclk(codec_dai, WM8915_SYSCLK_FLL,
-                                    256 * 48000, SND_SOC_CLOCK_IN);
-       if (ret < 0)
-               return ret;
-
        return 0;
 }
 
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