aarch64: Add basic support for armv8.7-a architecture

This patch adds support for AArch64 -march=armv8.7-a command line option
in GAS.

Please note that this change ONLY extends -march= command line interface
with a new "armv8.7-a" option. Architectural changes like new instructions
will be added in following patches.

gas/ChangeLog:

2020-10-16  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>

	* NEWS: Docs update.
	* config/tc-aarch64.c (armv8.7-a): New arch.
	* doc/c-aarch64.texi (-march=armv8.7-a): Update docs.

include/ChangeLog:

2020-10-16  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_V8_7): New feature bitmask.
	(AARCH64_ARCH_V8_7): New arch feature set.

opcodes/ChangeLog:

2020-10-16  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>

	* aarch64-tbl.h (ARMV8_7): New macro.

diff --git a/gas/NEWS b/gas/NEWS
index da1189c4c1e2fe786a7ddf4d03eb519bbbcad89e..07fe535900cf7cd9a7dcda2e29d9099a99bb7db2 100644 (file)
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -19,7 +19,7 @@
   Extension) and BRBE (Branch Record Buffer Extension) system registers for
   AArch64.
 
-* Add support for Armv8-R AArch64.
+* Add support for Armv8-R and Armv8.7-A AArch64.
 
 * Add support for Intel TDX instructions.
 

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index fac571ea5734d3fe741ba0dd0d66d288caf9d45f..d17d118cc6915de625cce3f797caba92df6dbe9a 100644 (file)
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -9033,6 +9033,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = {
   {"armv8.4-a", AARCH64_ARCH_V8_4},
   {"armv8.5-a", AARCH64_ARCH_V8_5},
   {"armv8.6-a", AARCH64_ARCH_V8_6},
+  {"armv8.7-a", AARCH64_ARCH_V8_7},
   {"armv8-r",  AARCH64_ARCH_V8_R},
   {NULL, AARCH64_ARCH_NONE}
 };

diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 3dc982882dbdf84813391fbef15a5ce0557f3196..526e8089b76d51efc4280f949e50d736f615ce84 100644 (file)
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -106,7 +106,7 @@ issue an error message if an attempt is made to assemble an
 instruction which will not execute on the target architecture.  The
 following architecture names are recognized: @code{armv8-a},
 @code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
-@code{armv8.5-a}, @code{armv8.6-a}, and @code{armv8-r}.
+@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, and @code{armv8-r}.
 
 If both @option{-mcpu} and @option{-march} are specified, the
 assembler will use the setting for @option{-mcpu}.  If neither are

diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index 44626483c92a17bd949986e2d349bedec2c03f11..a5f9e71716170976d0b935d0115915e8d8c4ce4a 100644 (file)
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -50,6 +50,7 @@ typedef uint32_t aarch64_insn;
 #define AARCH64_FEATURE_SVE2_SHA3    (1ULL << 10)
 #define AARCH64_FEATURE_V8_4        (1ULL << 11) /* ARMv8.4 processors.  */
 #define AARCH64_FEATURE_V8_R        (1ULL << 12) /* Armv8-R processors.  */
+#define AARCH64_FEATURE_V8_7        (1ULL << 13) /* Armv8.7 processors.  */
 #define AARCH64_FEATURE_FP          (1ULL << 17) /* FP instructions.  */
 #define AARCH64_FEATURE_SIMD        (1ULL << 18) /* SIMD instructions.  */
 #define AARCH64_FEATURE_CRC         (1ULL << 19) /* CRC instructions.  */
@@ -128,6 +129,8 @@ typedef uint32_t aarch64_insn;
                                                 AARCH64_FEATURE_V8_6   \
                                                 | AARCH64_FEATURE_BFLOAT16 \
                                                 | AARCH64_FEATURE_I8MM)
+#define AARCH64_ARCH_V8_7      AARCH64_FEATURE (AARCH64_ARCH_V8_6,     \
+                                                AARCH64_FEATURE_V8_7)
 #define AARCH64_ARCH_V8_R      (AARCH64_FEATURE (AARCH64_ARCH_V8_4,    \
                                                 AARCH64_FEATURE_V8_R)  \
                              & ~(AARCH64_FEATURE_V8_A | AARCH64_FEATURE_LOR))

diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 1cecaead14dff5d9b6ff97884872513062a6f30d..16d008d7521650c94de258f8aaa939d56cc93261 100644 (file)
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2395,6 +2395,8 @@ static const aarch64_feature_set aarch64_feature_sve2bitperm =
   AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SVE2_BITPERM, 0);
 static const aarch64_feature_set aarch64_feature_v8_6 =
   AARCH64_FEATURE (AARCH64_FEATURE_V8_6, 0);
+static const aarch64_feature_set aarch64_feature_v8_7 =
+  AARCH64_FEATURE (AARCH64_FEATURE_V8_7, 0);
 static const aarch64_feature_set aarch64_feature_i8mm =
   AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_I8MM, 0);
 static const aarch64_feature_set aarch64_feature_i8mm_sve =
@@ -2453,6 +2455,7 @@ static const aarch64_feature_set aarch64_feature_v8_r =
 #define F64MM_SVE     &aarch64_feature_f64mm_sve
 #define I8MM      &aarch64_feature_i8mm
 #define ARMV8_R          &aarch64_feature_v8_r
+#define ARMV8_7          &aarch64_feature_v8_7
 
 #define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
   { NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL }