staging: comedi: me4000: only enable PLX interrupt if we have and irq

Currently me4000_reset() always enables the PLX interrupt. Move the
enable of the interrupt into me4000_auto_attach() and only do the
enable if we actually have and irq.

Make sure the PLX interrupt is disabled in me4000_reset() before we
try to request the irq.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/comedi/drivers/me4000.c b/drivers/staging/comedi/drivers/me4000.c
index da0075b926a51f453b113518997b7ed76859b18a..a4c28fa90759ed28f51ab23701f2ff8b9f11afe5 100644 (file)
--- a/drivers/staging/comedi/drivers/me4000.c
+++ b/drivers/staging/comedi/drivers/me4000.c
@@ -412,7 +412,10 @@ static void me4000_reset(struct comedi_device *dev)
        unsigned int val;
        int chan;
 
-       /* Make a hardware reset */
+       /* Disable interrupts on the PLX */
+       outl(0, devpriv->plx_regbase + PLX9052_INTCSR);
+
+       /* Software reset the PLX */
        val = inl(devpriv->plx_regbase + PLX9052_CNTRL);
        val |= PLX9052_CNTRL_PCI_RESET;
        outl(val, devpriv->plx_regbase + PLX9052_CNTRL);
@@ -430,11 +433,6 @@ static void me4000_reset(struct comedi_device *dev)
        for (chan = 0; chan < 4; chan++)
                outl(val, dev->iobase + ME4000_AO_CTRL_REG(chan));
 
-       /* Enable interrupts on the PLX */
-       outl(PLX9052_INTCSR_LI1ENAB |
-            PLX9052_INTCSR_LI1POL |
-            PLX9052_INTCSR_PCIENAB, devpriv->plx_regbase + PLX9052_INTCSR);
-
        /* Set the adustment register for AO demux */
        outl(ME4000_AO_DEMUX_ADJUST_VALUE,
             dev->iobase + ME4000_AO_DEMUX_ADJUST_REG);
@@ -1181,8 +1179,14 @@ static int me4000_auto_attach(struct comedi_device *dev,
        if (pcidev->irq > 0) {
                result = request_irq(pcidev->irq, me4000_ai_isr, IRQF_SHARED,
                                     dev->board_name, dev);
-               if (result == 0)
+               if (result == 0) {
                        dev->irq = pcidev->irq;
+
+                       /* Enable interrupts on the PLX */
+                       outl(PLX9052_INTCSR_LI1ENAB | PLX9052_INTCSR_LI1POL |
+                            PLX9052_INTCSR_PCIENAB,
+                            devpriv->plx_regbase + PLX9052_INTCSR);
+               }
        }
 
        result = comedi_alloc_subdevices(dev, 4);