ARM: dts: Add rtc_src clk for s3c-rtc on exynos5250-snow

commit 546b117fdf17 ("rtc: s3c: add support for RTC of Exynos3250 SoC")
added an "rtc_src" DT property for the Samsung's S3C Real Time Clock
controller that specifies the 32.768 kHz clock that uses the RTC as
its source clock. In the case of the Exynos5250 based Snow board, the
Maxim 77686 32kHz AP clock is used as the source clock.

Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts
index 7f24b00255e687371aa2692b4ca034982c77562e..f9bc04b8f7b34e050b72635fdfc4a196bd08cf12 100644 (file)
--- a/arch/arm/boot/dts/exynos5250-snow.dts
+++ b/arch/arm/boot/dts/exynos5250-snow.dts
@@ -10,6 +10,7 @@
 
 /dts-v1/;
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/maxim,max77686.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/input/input.h>
 #include "exynos5250.dtsi"
@@ -268,7 +269,7 @@
        samsung,i2c-sda-delay = <100>;
        samsung,i2c-max-bus-freq = <378000>;
 
-       max77686@09 {
+       max77686: max77686@09 {
                compatible = "maxim,max77686";
                interrupt-parent = <&gpx3>;
                interrupts = <2 IRQ_TYPE_NONE>;
@@ -600,6 +601,8 @@
 
 &rtc {
        status = "okay";
+       clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
+       clock-names = "rtc", "rtc_src";
 };
 
 &sd3_bus4 {