clocksource: Build Tegra timer on 32-bit ARM only
authorThierry Reding <treding@nvidia.com>
Mon, 7 Jul 2014 13:26:30 +0000 (15:26 +0200)
committerThierry Reding <treding@nvidia.com>
Fri, 9 Jan 2015 13:45:43 +0000 (14:45 +0100)
Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this
driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which
can be selected by the various SoCs.

This is useful to disable building the driver on Tegra132 (64-bit ARM)
where it doesn't currently compile but also isn't needed (yet).

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/mach-tegra/Kconfig
drivers/clocksource/Kconfig
drivers/clocksource/Makefile

index d0be9a1ef6b8c136bd873b19242ed4421df3673e..5d1a318f1302c53b37b6fa896f24c03ac247404b 100644 (file)
@@ -27,6 +27,7 @@ config ARCH_TEGRA_2x_SOC
        select PINCTRL_TEGRA20
        select PL310_ERRATA_727915 if CACHE_L2X0
        select PL310_ERRATA_769419 if CACHE_L2X0
+       select TEGRA_TIMER
        help
          Support for NVIDIA Tegra AP20 and T20 processors, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -37,6 +38,7 @@ config ARCH_TEGRA_3x_SOC
        select ARM_ERRATA_764369 if SMP
        select PINCTRL_TEGRA30
        select PL310_ERRATA_769419 if CACHE_L2X0
+       select TEGRA_TIMER
        help
          Support for NVIDIA Tegra T30 processor family, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -47,6 +49,7 @@ config ARCH_TEGRA_114_SOC
        select ARM_L1_CACHE_SHIFT_6
        select HAVE_ARM_ARCH_TIMER
        select PINCTRL_TEGRA114
+       select TEGRA_TIMER
        help
          Support for NVIDIA Tegra T114 processor family, based on the
          ARM CortexA15MP CPU
@@ -56,6 +59,7 @@ config ARCH_TEGRA_124_SOC
        select ARM_L1_CACHE_SHIFT_6
        select HAVE_ARM_ARCH_TIMER
        select PINCTRL_TEGRA124
+       select TEGRA_TIMER
        help
          Support for NVIDIA Tegra T124 processor family, based on the
          ARM CortexA15MP CPU
index fc01ec27d3c8424113cf2084683c68c40297d274..c062b6105d494ef804ebd4c5389b92ec4130a873 100644 (file)
@@ -47,6 +47,9 @@ config SUN5I_HSTIMER
        select CLKSRC_MMIO
        bool
 
+config TEGRA_TIMER
+       bool
+
 config VT8500_TIMER
        bool
 
index 94d90b24b56bf49ca9ab908780800567a809558b..ba9ebd868ec5a8206fb295e4764ae36e2b4b166e 100644 (file)
@@ -27,7 +27,7 @@ obj-$(CONFIG_ARCH_U300)               += timer-u300.o
 obj-$(CONFIG_SUN4I_TIMER)      += sun4i_timer.o
 obj-$(CONFIG_SUN5I_HSTIMER)    += timer-sun5i.o
 obj-$(CONFIG_MESON6_TIMER)     += meson6_timer.o
-obj-$(CONFIG_ARCH_TEGRA)       += tegra20_timer.o
+obj-$(CONFIG_TEGRA_TIMER)      += tegra20_timer.o
 obj-$(CONFIG_VT8500_TIMER)     += vt8500_timer.o
 obj-$(CONFIG_ARCH_NSPIRE)      += zevio-timer.o
 obj-$(CONFIG_ARCH_BCM_MOBILE)  += bcm_kona_timer.o
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