+2001-05-04 Alan Modra <amodra@one.net.au>
+
+ * gas/i386/katmai.d: Correct pmovmskb and pextrw opcodes.
+ * gas/i386/ssemmx2.d: Likewise. Correct register for pextrw,
+ pinsrw, and pmovmskb.
+ * gas/i386/sse2.d: Correct register for movmskpd.
+
2001-05-02 Johan Rydberg <jrydberg@opencores.org>
* gas/openrisc/addi.s: New file.
1e4: 0f e0 0a [ ]*pavgb \(%edx\),%mm1
1e7: 0f e3 d3 [ ]*pavgw %mm3,%mm2
1ea: 0f e3 1c 24 [ ]*pavgw \(%esp,1\),%mm3
- 1ee: 0f c5 c8 00 [ ]*pextrw \$0x0,%mm1,%eax
+ 1ee: 0f c5 c1 00 [ ]*pextrw \$0x0,%mm1,%eax
1f2: 0f c4 09 01 [ ]*pinsrw \$0x1,\(%ecx\),%mm1
1f6: 0f c4 d2 02 [ ]*pinsrw \$0x2,%edx,%mm2
1fa: 0f ee c1 [ ]*pmaxsw %mm1,%mm0
20a: 0f ea 2e [ ]*pminsw \(%esi\),%mm5
20d: 0f da f7 [ ]*pminub %mm7,%mm6
210: 0f da 38 [ ]*pminub \(%eax\),%mm7
- 213: 0f d7 e8 [ ]*pmovmskb %mm5,%eax
+ 213: 0f d7 c5 [ ]*pmovmskb %mm5,%eax
216: 0f e4 e5 [ ]*pmulhuw %mm5,%mm4
219: 0f e4 2e [ ]*pmulhuw \(%esi\),%mm5
21c: 0f f6 f7 [ ]*psadbw %mm7,%mm6
181: 66 0f 16 2e[ ]+movhpd \(%esi\),%xmm5
185: 66 0f 13 07[ ]+movlpd %xmm0,\(%edi\)
189: 66 0f 12 00[ ]+movlpd \(%eax\),%xmm0
- 18d: 66 0f 50 ca[ ]+movmskpd %xmm2,%cx
+ 18d: 66 0f 50 ca[ ]+movmskpd %xmm2,%ecx
191: 66 0f 10 d3[ ]+movupd %xmm3,%xmm2
195: 66 0f 11 22[ ]+movupd %xmm4,\(%edx\)
199: 66 0f 10 65 00[ ]+movupd 0x0\(%ebp\),%xmm4
[ ]+4: 66 0f e0 0a[ ]+pavgb[ ]+\(%edx\),%xmm1
[ ]+8: 66 0f e3 d3[ ]+pavgw[ ]+%xmm3,%xmm2
[ ]+c: 66 0f e3 1c 24[ ]+pavgw[ ]+\(%esp,1\),%xmm3
-[ ]+11: 66 0f c5 c8 00[ ]+pextrw \$0x0,%xmm1,%ax
+[ ]+11: 66 0f c5 c1 00[ ]+pextrw \$0x0,%xmm1,%eax
[ ]+16: 66 0f c4 09 01[ ]+pinsrw \$0x1,\(%ecx\),%xmm1
-[ ]+1b: 66 0f c4 d2 02[ ]+pinsrw \$0x2,%dx,%xmm2
+[ ]+1b: 66 0f c4 d2 02[ ]+pinsrw \$0x2,%edx,%xmm2
[ ]+20: 66 0f ee c1[ ]+pmaxsw %xmm1,%xmm0
[ ]+24: 66 0f ee 0a[ ]+pmaxsw \(%edx\),%xmm1
[ ]+28: 66 0f de d2[ ]+pmaxub %xmm2,%xmm2
[ ]+35: 66 0f ea 2e[ ]+pminsw \(%esi\),%xmm5
[ ]+39: 66 0f da f7[ ]+pminub %xmm7,%xmm6
[ ]+3d: 66 0f da 38[ ]+pminub \(%eax\),%xmm7
-[ ]+41: 66 0f d7 e8[ ]+pmovmskb %xmm5,%ax
+[ ]+41: 66 0f d7 c5[ ]+pmovmskb %xmm5,%eax
[ ]+45: 66 0f e4 e5[ ]+pmulhuw %xmm5,%xmm4
[ ]+49: 66 0f e4 2e[ ]+pmulhuw \(%esi\),%xmm5
[ ]+4d: 66 0f f6 f7[ ]+psadbw %xmm7,%xmm6
+2001-05-04 Alan Modra <amodra@one.net.au>
+
+ * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
+ and pextrw to swap reg/rm assignments.
+
2001-04-05 Hans-Peter Nilsson <hp@axis.com>
* cris.h (enum cris_insn_version_usage): Correct comment for
{"pavgb", 2, 0x660fe0, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
{"pavgw", 2, 0x0fe3, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
{"pavgw", 2, 0x660fe3, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
-{"pextrw", 3, 0x0fc5, X, CpuSSE, FP|Modrm, { Imm8, RegMMX, Reg32|InvMem } },
-{"pextrw", 3, 0x660fc5, X, CpuSSE2,FP|Modrm, { Imm8, RegXMM, Reg32|InvMem } },
+{"pextrw", 3, 0x0fc5, X, CpuSSE, FP|Modrm, { Imm8, RegMMX|InvMem, Reg32 } },
+{"pextrw", 3, 0x660fc5, X, CpuSSE2,FP|Modrm, { Imm8, RegXMM|InvMem, Reg32 } },
{"pinsrw", 3, 0x0fc4, X, CpuSSE, FP|Modrm, { Imm8, Reg32|ShortMem, RegMMX } },
{"pinsrw", 3, 0x660fc4, X, CpuSSE2, FP|Modrm, { Imm8, Reg32|ShortMem, RegXMM } },
{"pmaxsw", 2, 0x0fee, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
{"pminsw", 2, 0x660fea, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
{"pminub", 2, 0x0fda, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
{"pminub", 2, 0x660fda, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
-{"pmovmskb", 2, 0x0fd7, X, CpuSSE, FP|Modrm, { RegMMX, Reg32|InvMem, 0 } },
-{"pmovmskb", 2, 0x660fd7, X, CpuSSE2,FP|Modrm, { RegXMM, Reg32|InvMem, 0 } },
+{"pmovmskb", 2, 0x0fd7, X, CpuSSE, FP|Modrm, { RegMMX|InvMem, Reg32, 0 } },
+{"pmovmskb", 2, 0x660fd7, X, CpuSSE2,FP|Modrm, { RegXMM|InvMem, Reg32, 0 } },
{"pmulhuw", 2, 0x0fe4, X, CpuSSE, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } },
{"pmulhuw", 2, 0x660fe4, X, CpuSSE2,FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } },
{"prefetchnta", 1, 0x0f18, 0, CpuSSE, FP|Modrm, { LLongMem, 0, 0 } },
+2001-05-04 Alan Modra <amodra@one.net.au>
+
+ * i386-dis.c (Ev, Ed): Remove duplicate define.
+ (Gd): Define.
+ (XS): Define.
+ (OP_XS): New function.
+ (dis386_twobyte_att): Correct pinsrw, pextrw, pmovmskb, and
+ movmskp operands.
+ (dis386_twobyte_intel): Likewise.
+ (prefix_user_table): Use MS for maskmovq operand.
+
2001-04-27 Johan Rydberg <jrydberg@opencores.org>
* Makefile.am: Add OpenRISC target.
#define Ev OP_E, v_mode
#define Ed OP_E, d_mode
#define indirEb OP_indirE, b_mode
-#define Gb OP_G, b_mode
-#define Ev OP_E, v_mode
-#define Ed OP_E, d_mode
#define indirEv OP_indirE, v_mode
#define Ew OP_E, w_mode
#define Ma OP_E, v_mode
#define M OP_E, 0 /* lea */
#define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
+#define Gb OP_G, b_mode
#define Gv OP_G, v_mode
+#define Gd OP_G, d_mode
#define Gw OP_G, w_mode
#define Rd OP_Rd, d_mode
#define Rm OP_Rd, m_mode
#define EM OP_EM, v_mode
#define EX OP_EX, v_mode
#define MS OP_MS, v_mode
+#define XS OP_XS, v_mode
#define None OP_E, 0
#define OPSUF OP_3DNowSuffix, 0
#define OPSIMD OP_SIMD_Suffix, 0
static void OP_EM PARAMS ((int, int));
static void OP_EX PARAMS ((int, int));
static void OP_MS PARAMS ((int, int));
+static void OP_XS PARAMS ((int, int));
static void OP_3DNowSuffix PARAMS ((int, int));
static void OP_SIMD_Suffix PARAMS ((int, int));
static void SIMD_Fixup PARAMS ((int, int));
{ "cmovle", Gv, Ev, XX },
{ "cmovg", Gv, Ev, XX },
/* 50 */
- { "movmskpX", Gv, EX, XX },
+ { "movmskpX", Gd, XS, XX },
{ PREGRP13 },
{ PREGRP12 },
{ PREGRP11 },
{ "xaddS", Ev, Gv, XX },
{ PREGRP1 },
{ "movntiS", Ev, Gv, XX },
- { "pinsrw", MX, Ev, Ib },
- { "pextrw", Ev, MX, Ib },
+ { "pinsrw", MX, Ed, Ib },
+ { "pextrw", Gd, MS, Ib },
{ "shufpX", XM, EX, Ib },
{ GRP9 },
/* c8 */
{ "paddq", MX, EM, XX },
{ "pmullw", MX, EM, XX },
{ PREGRP21 },
- { "pmovmskb", Ev, MX, XX },
+ { "pmovmskb", Gd, MS, XX },
/* d8 */
{ "psubusb", MX, EM, XX },
{ "psubusw", MX, EM, XX },
{ "cmovle", Gv, Ev, XX },
{ "cmovg", Gv, Ev, XX },
/* 50 */
- { "movmskpX", Gv, EX, XX },
+ { "movmskpX", Gd, XS, XX },
{ PREGRP13 },
{ PREGRP12 },
{ PREGRP11 },
{ "xadd", Ev, Gv, XX },
{ PREGRP1 },
{ "movnti", Ev, Gv, XX },
- { "pinsrw", MX, Ev, Ib },
- { "pextrw", Ev, MX, Ib },
+ { "pinsrw", MX, Ed, Ib },
+ { "pextrw", Gd, MS, Ib },
{ "shufpX", XM, EX, Ib },
{ GRP9 },
/* c8 */
{ "paddq", MX, EM, XX },
{ "pmullw", MX, EM, XX },
{ PREGRP21 },
- { "pmovmskb", Ev, MX, XX },
+ { "pmovmskb", Gd, MS, XX },
/* d8 */
{ "psubusb", MX, EM, XX },
{ "psubusw", MX, EM, XX },
},
/* PREGRP18 */
{
- { "maskmovq", MX, EM, XX },
+ { "maskmovq", MX, MS, XX },
{ "(bad)", XM, EX, XX },
{ "maskmovdqu", XM, EX, XX },
{ "(bad)", XM, EX, XX },
used_prefixes |= (prefixes & PREFIX_REPNZ);
if (prefixes & PREFIX_REPNZ)
index = 3;
-
}
}
dp = &prefix_user_table[dp->bytemode1][index];
BadOp();
}
+static void
+OP_XS (bytemode, sizeflag)
+ int bytemode;
+ int sizeflag;
+{
+ if (mod == 3)
+ OP_EX (bytemode, sizeflag);
+ else
+ BadOp();
+}
+
static const char *Suffix3DNow[] = {
/* 00 */ NULL, NULL, NULL, NULL,
/* 04 */ NULL, NULL, NULL, NULL,