ARM: DT: STiH407: Add DRM dt nodes

This patch adds the DRM/KMS dt nodes.
This node can't be in stih407-family.dtsi file because in the future we
will integrate a new stih418-b2199 board. It's a stih407 family board
with different drm/kms dt nodes.
That is why i created the stih407.dtsi file.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>

diff --git a/arch/arm/boot/dts/stih407-b2120.dts b/arch/arm/boot/dts/stih407-b2120.dts
index 261d5e2c48d24de2262d2947387e39441c6a434d..af487145cd89903f3ad4335bea45c938ce202f34 100644 (file)
--- a/arch/arm/boot/dts/stih407-b2120.dts
+++ b/arch/arm/boot/dts/stih407-b2120.dts
@@ -7,9 +7,8 @@
  * published by the Free Software Foundation.
  */
 /dts-v1/;
-#include "stih407-clock.dtsi"
-#include "stih407-family.dtsi"
 #include "stihxxx-b2120.dtsi"
+#include "stih407.dtsi"
 / {
        model = "STiH407 B2120";
        compatible = "st,stih407-b2120", "st,stih407";

diff --git a/arch/arm/boot/dts/stih407.dtsi b/arch/arm/boot/dts/stih407.dtsi
new file mode 100644 (file)
index 0000000..3efa3b2
--- /dev/null
+++ b/arch/arm/boot/dts/stih407.dtsi
@@ -0,0 +1,151 @@
+/*
+ * Copyright (C) 2015 STMicroelectronics Limited.
+ * Author: Gabriel Fernandez <gabriel.fernandez@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * publishhed by the Free Software Foundation.
+ */
+#include "stih407-clock.dtsi"
+#include "stih407-family.dtsi"
+/ {
+       soc {
+               /* Display */
+               vtg_main: sti-vtg-main@8d02800 {
+                       compatible = "st,vtg";
+                       reg = <0x8d02800 0x200>;
+                       interrupts = <GIC_SPI 108 IRQ_TYPE_NONE>;
+               };
+
+               vtg_aux: sti-vtg-aux@8d00200 {
+                       compatible = "st,vtg";
+                       reg = <0x8d00200 0x100>;
+                       interrupts = <GIC_SPI 109 IRQ_TYPE_NONE>;
+               };
+
+               sti-display-subsystem {
+                       compatible = "st,sti-display-subsystem";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       assigned-clocks = <&clk_s_d2_quadfs 0>,
+                                         <&clk_s_d2_quadfs 0>,
+                                         <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
+                                         <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
+                                         <&clk_s_d2_flexgen CLK_PIX_GDP1>,
+                                         <&clk_s_d2_flexgen CLK_PIX_GDP2>,
+                                         <&clk_s_d2_flexgen CLK_PIX_GDP3>,
+                                         <&clk_s_d2_flexgen CLK_PIX_GDP4>;
+
+                       assigned-clock-parents = <0>,
+                                                <0>,
+                                                <&clk_s_d2_quadfs 0>,
+                                                <&clk_s_d2_quadfs 0>,
+                                                <&clk_s_d2_quadfs 0>,
+                                                <&clk_s_d2_quadfs 0>,
+                                                <&clk_s_d2_quadfs 0>,
+                                                <&clk_s_d2_quadfs 0>;
+
+                       assigned-clock-rates = <297000000>, <297000000>;
+
+                       ranges;
+
+                       sti-compositor@9d11000 {
+                               compatible = "st,stih407-compositor";
+                               reg = <0x9d11000 0x1000>;
+
+                               clock-names = "compo_main",
+                                             "compo_aux",
+                                             "pix_main",
+                                             "pix_aux",
+                                             "pix_gdp1",
+                                             "pix_gdp2",
+                                             "pix_gdp3",
+                                             "pix_gdp4",
+                                             "main_parent",
+                                             "aux_parent";
+
+                               clocks = <&clk_s_c0_flexgen CLK_COMPO_DVP>,
+                                        <&clk_s_c0_flexgen CLK_COMPO_DVP>,
+                                        <&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
+                                        <&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
+                                        <&clk_s_d2_flexgen CLK_PIX_GDP1>,
+                                        <&clk_s_d2_flexgen CLK_PIX_GDP2>,
+                                        <&clk_s_d2_flexgen CLK_PIX_GDP3>,
+                                        <&clk_s_d2_flexgen CLK_PIX_GDP4>,
+                                        <&clk_s_d2_quadfs 0>,
+                                        <&clk_s_d2_quadfs 1>;
+
+                               reset-names = "compo-main", "compo-aux";
+                               resets = <&softreset STIH407_COMPO_SOFTRESET>,
+                                        <&softreset STIH407_COMPO_SOFTRESET>;
+                               st,vtg = <&vtg_main>, <&vtg_aux>;
+                       };
+
+                       sti-tvout@8d08000 {
+                               compatible = "st,stih407-tvout";
+                               reg = <0x8d08000 0x1000>;
+                               reg-names = "tvout-reg";
+                               reset-names = "tvout";
+                               resets = <&softreset STIH407_HDTVOUT_SOFTRESET>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               assigned-clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
+                                                 <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
+                                                 <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
+                                                 <&clk_s_d0_flexgen CLK_PCM_0>,
+                                                 <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
+                                                 <&clk_s_d2_flexgen CLK_HDDAC>;
+
+                               assigned-clock-parents = <&clk_s_d2_quadfs 0>,
+                                                        <&clk_tmdsout_hdmi>,
+                                                        <&clk_s_d2_quadfs 0>,
+                                                        <&clk_s_d0_quadfs 0>,
+                                                        <&clk_s_d2_quadfs 0>,
+                                                        <&clk_s_d2_quadfs 0>;
+                               ranges;
+
+                               sti-hdmi@8d04000 {
+                                       compatible = "st,stih407-hdmi";
+                                       reg = <0x8d04000 0x1000>;
+                                       reg-names = "hdmi-reg";
+                                       interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
+                                       interrupt-names = "irq";
+                                       clock-names = "pix",
+                                                     "tmds",
+                                                     "phy",
+                                                     "audio",
+                                                     "main_parent",
+                                                     "aux_parent";
+
+                                       clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
+                                                <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
+                                                <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
+                                                <&clk_s_d0_flexgen CLK_PCM_0>,
+                                                <&clk_s_d2_quadfs 0>,
+                                                <&clk_s_d2_quadfs 1>;
+
+                                       hdmi,hpd-gpio = <&pio5 3>;
+                                       reset-names = "hdmi";
+                                       resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
+                                       ddc = <&hdmiddc>;
+
+                               };
+
+                               sti-hda@8d02000 {
+                                       compatible = "st,stih407-hda";
+                                       reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
+                                       reg-names = "hda-reg", "video-dacs-ctrl";
+                                       clock-names = "pix",
+                                                     "hddac",
+                                                     "main_parent",
+                                                     "aux_parent";
+                                       clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
+                                                <&clk_s_d2_flexgen CLK_HDDAC>,
+                                                <&clk_s_d2_quadfs 0>,
+                                                <&clk_s_d2_quadfs 1>;
+                               };
+                       };
+               };
+       };
+};

diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 0074bd49797c81fe11c6980394cac85f18149038..0bc8c17aa81fb745891fa399263071537b165f17 100644 (file)
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -48,7 +48,7 @@
                };
 
                /* SSC11 to HDMI */
-               i2c@9541000 {
+               hdmiddc: i2c@9541000 {
                        status = "okay";
                        /* HDMI V1.3a supports Standard mode only */
                        clock-frequency = <100000>;