gas: blackfin: catch invalid dest dregs in dsp mult insns

While we were catching a few mismatches in vectorized dsp mult insns,
the error we displayed was misleading.  Once we fix that up, we can
convert previously dead code into proper checking for destination
dreg matching.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/gas/ChangeLog b/gas/ChangeLog
index e283ac511c20afcccea8e95b0ddddb287907dc25..4c4a03c4aad822ff10d2f30ff584dc3b0af16acb 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2011-03-24  Mike Frysinger  <vapier@gentoo.org>
+
+       * config/bfin-parse.y (check_macfuncs): Clarify error message when
+       P is mismatched.  Check destination regno are off by one when P is
+       set, or are equal when P is not set.
+
 2011-03-23  Mike Frysinger  <vapier@gentoo.org>
 
        * config/bfin-parse.y (SEARCH): Return yyerror when dest reg $2 is

diff --git a/gas/config/bfin-parse.y b/gas/config/bfin-parse.y
index fcc2ee8b0f8fe43033ae9cbc7fce5d089e9d9605..f20d20b3c18addd85d990860eb1d65f1b0e959f2 100644 (file)
--- a/gas/config/bfin-parse.y
+++ b/gas/config/bfin-parse.y
@@ -336,11 +336,15 @@ check_macfuncs (Macfunc *aa, Opt_mode *opa,
       aa->s1.regno |= (ab->s1.regno & CODE_MASK);
     }
 
-  if (aa->w == ab->w  && aa->P != ab->P)
+  if (aa->w == ab->w && aa->P != ab->P)
+    return yyerror ("Destination Dreg sizes (full or half) must match");
+
+  if (aa->w && ab->w)
     {
-      return yyerror ("macfuncs must differ");
-      if (aa->w && (aa->dst.regno - ab->dst.regno != 1))
-       return yyerror ("Destination Dregs must differ by one");
+      if (aa->P && (aa->dst.regno - ab->dst.regno) != 1)
+       return yyerror ("Destination Dregs (full) must differ by one");
+      if (!aa->P && aa->dst.regno != ab->dst.regno)
+       return yyerror ("Destination Dregs (half) must match");
     }
 
   /* Make sure mod flags get ORed, too.  */

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 32073628d02524984f06927340d106da4fb992cf..328d9e8d942b88357324557b6c9ae15d00d317c9 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2011-03-24  Mike Frysinger  <vapier@gentoo.org>
+
+       * gas/bfin/expected_errors.s: Add invalid dsp mult insn tests.
+       * gas/bfin/expected_errors.l: Add new error messages.
+
 2011-03-23  Mike Frysinger  <vapier@gentoo.org>
 
        * gas/bfin/expected_errors.s: Add invalid SEARCH/BITMUX insns.

diff --git a/gas/testsuite/gas/bfin/expected_errors.l b/gas/testsuite/gas/bfin/expected_errors.l
index 09bfd7fd683c0a4eadb70798c69f08d6221e2879..316ff20f661247a605685c8e933d1ef158e3e97b 100644 (file)
--- a/gas/testsuite/gas/bfin/expected_errors.l
+++ b/gas/testsuite/gas/bfin/expected_errors.l
@@ -92,3 +92,6 @@
 .*:115: Error: Dreg expected for destination operand. Input text was \).
 .*:117: Error: Illegal dest register combination. Input text was \).
 .*:118: Error: Illegal source register combination. Input text was \).
+.*:120: Error: Destination Dregs \(full\) must differ by one.
+.*:121: Error: Destination Dregs \(half\) must match.
+.*:122: Error: Destination Dreg sizes \(full or half\) must match.

diff --git a/gas/testsuite/gas/bfin/expected_errors.s b/gas/testsuite/gas/bfin/expected_errors.s
index 0cea5ffe404962e65ecee121c309bb2b96fdc917..736613ff72044c7dc1261bd95c228153c68f932d 100644 (file)
--- a/gas/testsuite/gas/bfin/expected_errors.s
+++ b/gas/testsuite/gas/bfin/expected_errors.s
@@ -116,3 +116,7 @@
 
        (R3, R3) = SEARCH R0 (GE);
        BITMUX (R4, R4, A0) (ASR);
+
+       R0 = A0, R3 = A1;
+       R0.L = A0, R1.H = A1;
+       R0 = A0, R1.H = A1;