drm/i915: Naming constants to be written to GEN9_PG_ENABLE

Change-Id: I4253459c075c50d9b6f034b4ed4ad2f54cd7d1d7
Signed-off-by: Sagar Kamble <sagar.a.kamble@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 77d8874c2fc37c643fd64bb2b9efc1b702fd5246..4b48b3f92507a53e1b138f96e4fd582128e83fa5 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6198,6 +6198,8 @@ enum skl_disp_power_wells {
 #define GEN9_MEDIA_PG_IDLE_HYSTERESIS          0xA0C4
 #define GEN9_RENDER_PG_IDLE_HYSTERESIS         0xA0C8
 #define GEN9_PG_ENABLE                         0xA210
+#define GEN9_RENDER_PG_ENABLE                  (1<<0)
+#define GEN9_MEDIA_PG_ENABLE                   (1<<1)
 
 #define VLV_CHICKEN_3                          (VLV_DISPLAY_BASE + 0x7040C)
 #define  PIXEL_OVERLAP_CNT_MASK                        (3 << 30)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1ab9e897994aa5168572a821c5c8e14c08efa8f0..e04ef19673a90a19c69eee62acd70ff668ba2327 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4347,7 +4347,9 @@ static void gen9_enable_rc6(struct drm_device *dev)
                                   rc6_mask);
 
        /* 3b: Enable Coarse Power Gating only when RC6 is enabled */
-       I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ? 3 : 0);
+       I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ?
+                       (GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE) : 0);
+
 
        intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);